A double-sided circuit board and a manufacturing method thereof

Abstract

The application discloses a double-sided circuit board and a manufacturing method thereof, and relates to the technical field of electronic circuit additive manufacturing. The manufacturing method comprises the following steps: preparing a laminated body; the laminated body comprises an insulating layer with a vertically opposite first surface and a second surface, and a metal foil layer formed on the first surface of the insulating layer; a blind hole is formed through the insulating layer and reaches the metal foil layer; a printed circuit pattern is formed on the second surface of the insulating layer by using conductive paste, and a conductive column is filled in the blind hole to realize conductive interconnection between the printed circuit pattern and the metal foil layer; a plated circuit pattern is formed on the printed circuit pattern by electroplating, and an etched circuit pattern is formed by etching the metal foil layer. The application combines the printing process and the etching process, thereby effectively improving the production efficiency of the circuit board and reducing the waste and pollution treatment cost.

Description

Technical Field

[0001] This invention belongs to the field of additive manufacturing technology for electronic circuits, and particularly relates to a double-sided circuit board and its manufacturing method. Background Technology

[0002] Most double-sided or multi-layer circuit boards on the market are manufactured using chemical etching technology. Although this technology is mature and can meet the requirements for producing high-precision circuit patterns, it results in low production efficiency, significant environmental pollution, and high costs for waste materials and pollution treatment. Summary of the Invention

[0003] In view of this, one objective of the present invention is to provide a circuit board and a method for manufacturing the same, thereby solving the problems of low production efficiency, high environmental pollution, and high waste and pollution treatment costs associated with traditional circuit board manufacturing processes.

[0004] In some illustrative embodiments, the method for manufacturing the double-sided circuit board includes: preparing a laminate; the laminate includes: an insulating layer having a first side and a second side vertically opposite each other, and a metal foil layer formed on the first side of the insulating layer; forming blind vias penetrating the insulating layer and extending to the metal foil layer; forming a printed circuit pattern on the second side of the insulating layer using a conductive paste, and filling the blind vias to form conductive pillars that realize conductive interconnection between the printed circuit pattern and the metal foil layer; electroplating a plated circuit pattern on the printed circuit pattern, and etching the metal foil layer to form an etched circuit pattern.

[0005] In some alternative embodiments, the minimum line width and / or minimum line spacing of the printed circuit pattern is greater than that of the etched circuit pattern.

[0006] In some alternative embodiments, the density of the printed circuit pattern on the insulating layer is less than that of the etched circuit pattern.

[0007] In some optional embodiments, the printed circuit pattern includes at least two independent printed circuit units on the second surface of the insulating layer, wherein the printed circuit units are electrically connected to the metal foil layer through corresponding conductive posts.

[0008] In some optional embodiments, before electroplating the printed circuit pattern to form a plated circuit pattern, the method further includes: using the stacked structure with the printed circuit pattern and the conductive pillar as a semi-process circuit board, temporarily bonding the two semi-process circuit boards together with the metal foil layers on the sides, and shielding their respective metal foil layers.

[0009] In some alternative embodiments, after plating the printed circuit patterns on both sides of the bonding structure by electroplating, the semi-process circuit board is then separated and restored.

[0010] In some alternative embodiments, the two half-process circuit boards are temporarily bonded together using an adhesive layer.

[0011] In some alternative embodiments, the adhesive layer includes: a first adhesive layer, a carrier layer, and a second adhesive layer stacked together; wherein the structural strength of the carrier layer is greater than that of the first adhesive layer and / or the second adhesive layer; and the adhesion of the first adhesive layer and / or the second adhesive layer to the carrier layer is greater than its adhesion to the semi-process circuit board.

[0012] In some optional embodiments, the process of etching the metal foil layer to form an etched circuit pattern includes: forming a photoresist layer on the plated circuit pattern and the metal foil layer, forming the etched circuit pattern by exposure, development, and etching, and finally removing the remaining photoresist layer on the plated circuit pattern and the metal foil layer by stripping.

[0013] In some alternative embodiments, before creating the blind hole that penetrates the insulating layer to the metal foil layer, the method further includes: forming a base coating on a second surface of the insulating layer, the blind hole penetrating the base coating; wherein the base coating is used to enhance the adhesion of the conductive paste to the insulating layer.

[0014] In some alternative embodiments, after electroplating to form a plated circuit pattern on the printed circuit pattern and etching the metal foil layer to form an etched circuit pattern, the method further includes: forming a cover layer on the etched circuit pattern and / or the plated circuit pattern; wherein the cover layer covers part or all of the etched circuit pattern and / or the plated circuit pattern.

[0015] Another object of the present invention is to provide a circuit board to solve the technical problems in the prior art.

[0016] In some illustrative embodiments, the double-sided circuit board is obtained by any of the manufacturing methods described above.

[0017] Compared with the prior art, this application has the following advantages:

[0018] This invention combines printing and etching processes, which can effectively improve the production efficiency of circuit boards and reduce waste and pollution treatment costs. Attached Figure Description

[0019] Figure 1 This is a flowchart example of the circuit board manufacturing method in an embodiment of the present invention;

[0020] Figure 2 This is a process example of the circuit board manufacturing method in the embodiments of the present invention;

[0021] Figure 3 This is a second example of the process for manufacturing a circuit board in an embodiment of the present invention;

[0022] Figure 4 This is an example of an island structure for a circuit board in an embodiment of the present invention. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0024] It should be noted that, where there is no conflict, the various technical features in the embodiments of the present invention can be combined with each other.

[0025] This invention discloses a method for manufacturing a circuit board, specifically, as follows: Figure 1-4 As shown, Figure 1 This is a flowchart example of the circuit board manufacturing method in an embodiment of the present invention; Figure 2 This is a process example of the circuit board manufacturing method in the embodiments of the present invention; Figure 3 This is a second example of the process for manufacturing a circuit board in an embodiment of the present invention; Figure 4 This is an example of an islanded structure for a circuit board in an embodiment of the present invention. The method for manufacturing this circuit board includes:

[0026] Step S11: Prepare a layer of stacked material;

[0027] The laminate includes: an insulating layer 110 having a first surface and a second surface that are vertically opposite each other, and a metal foil layer 210 formed on the first surface of the insulating layer 110;

[0028] In this embodiment of the invention, the insulating layer 110 can be made of rigid board or flexible board. Rigid board includes, but is not limited to: FR-4, CEM-1, 22F, CEM-3, wood, glass, plastic, PMMA (acrylic), etc.; flexible board includes, but is not limited to: PET, PVC, PU, ​​PC, PP, PA, PI, CPI (transparent PI), TPE, TPU, TPV, etc.

[0029] The metal foil layer 210 in this embodiment of the invention includes, but is not limited to, gold, silver, copper, iron, aluminum, zinc, nickel, etc. The metal foil layer 210 may also include a conductive alloy material with the aforementioned materials as its main components.

[0030] Optionally, the metal foil layer 210 may be formed on the insulating layer 110 by means of lamination or deposition (chemical deposition, vapor deposition or sputtering), and the present invention does not limit this.

[0031] Optionally, for the laminate formed by laminating the metal foil layer 210 onto the insulating layer 110, a third adhesive layer 830 may be provided between the insulating layer 110 and the metal foil layer 210 to ensure a tight bond between the two.

[0032] Step S12: Create a blind hole that penetrates the insulating layer 110 and reaches the metal foil layer 210;

[0033] In this embodiment of the invention, the blind hole is not limited to being achieved by mechanical drilling or laser drilling. Specifically, it can be etched from the second side of the insulating layer 110 until the metal foil layer 210 is etched.

[0034] Alternatively, in embodiments of a laminate including a third adhesive layer, the blind hole also penetrates the third adhesive layer and extends to the metal foil layer 210.

[0035] Optionally, after the blind hole is fabricated, the process may further include: using a plasma generator to clean the inside of the blind hole, thereby removing residual insulating layer and / or third adhesive layer, exposing the complete metal surface at the bottom of the blind hole as much as possible, so as to improve the reliability of subsequent conductive interconnection and reduce contact resistance.

[0036] Preferably, the temperature of the insulating layer and / or the third adhesive layer can be controlled to reach the glass transition temperature of the material before blind hole cleaning is performed using plasma, which can effectively improve the removal of residual impurities.

[0037] Step S13: A printed circuit pattern 310 is formed on the second surface of the insulating layer 110 using conductive paste, and blind holes are filled to form conductive pillars 510 that realize the conductive interconnection between the printed circuit pattern 310 and the metal foil layer 210.

[0038] The printed circuit pattern 310 and the conductive post 510 can be formed by printing in one step or by printing in multiple steps, and this application does not impose any restrictions on this.

[0039] Furthermore, when the conductive post 510 and the printed circuit pattern 310 are formed separately in multiple printing processes, the forming order can be reversed, depending on the actual needs. That is, the hole can be filled first and then the surface can be printed, or the surface can be printed first and then the hole can be filled. This application does not impose any restrictions on this.

[0040] Optionally, the printing process used for the conductive paste in the embodiments of the present invention includes, but is not limited to, screen printing, direct writing printing, inkjet printing, etc.

[0041] Preferably, when using screen printing, the printed circuit pattern 310 and the conductive pillar 510 can be formed separately through at least two printing processes. This allows for the adjustment of different printing parameters (such as the squeegee pressure (degree of downward pressure) in the printing processes that have different requirements for the printed circuit pattern 310 and the conductive pillar 510) to meet the forming quality of surface forming and hole plugging.

[0042] The conductive paste in this embodiment of the invention refers to a composite low-temperature conductive paste that is mainly composed of conductive fillers, resin binders and solvents. After the paste is fully cured, the solvent will evaporate, thereby transforming it into a conductive film in which the conductive fillers are bound by the resin film-forming material.

[0043] The conductive filler is not limited to one or more of the following: metal particles, graphene, conductive carbon black, carbon nanotubes, and conductive particles with core-shell structures; the metal particles are not limited to one or more of the following: gold, silver, copper, iron, nickel, zinc, and silver-coated copper powder; the resin binder may be any commercially available resin, including but not limited to one or more of the following: epoxy resin, acrylic resin, naphthalene-containing epoxy resin, polyaromatic epoxy resin, multifunctional epoxy resin, bismaleimide resin, and polyimide resin. This application does not restrict the selection of solvents.

[0044] The curing method of the conductive paste in the embodiments of the present invention is not limited to thermosetting, photocuring, electromagnetic irradiation or other curing methods. The appropriate curing initiator can be added according to actual needs.

[0045] During the curing process of the conductive paste, the insulating layer and / or the third adhesive layer may also be affected, resulting in shrinkage and expansion deformation of the insulating layer and / or the third adhesive layer. However, due to the presence of the metal foil layer that is tightly bonded to the insulating layer / third adhesive layer, the metal foil layer, which is not affected by the curing conditions, can effectively hinder the shrinkage and expansion of the insulating layer and / or the third adhesive layer, thereby ensuring the molding quality of the circuit board and reducing the difficulty of alignment compensation calculation in the corresponding process.

[0046] Step S14: Electroplating is performed on the printed circuit pattern 310 to form a plated circuit pattern 410;

[0047] The main function of the plated circuit pattern 410 is to improve one or more of the following properties of the printed circuit pattern 310: conductivity, stability, solderability, oxidation resistance, and surface properties.

[0048] In some embodiments of the present invention, the metal foil layer 210 can be made of metal foil of the target thickness, thereby producing the etched line pattern 210E of the target thickness directly through a chemical etching process. Therefore, it is not necessary to thicken the surface of the metal foil layer 210 by plating. Therefore, the metal foil layer 210 can be shielded before step S14 to prevent contact with the electroplating solution.

[0049] Since printed circuit patterns require electroplating to improve their conductivity and surface properties, it is difficult to control the precision in actual production if thin metal foil is used to thicken it to the target thickness through an electroplating process. This is mainly because the conductive materials on both sides are different, so the same electroplating parameters cannot produce the same electroplating effect on both sides. During electroplating, the plating layer formation rate on the metal foil side is often much higher than that on the printed circuit side, making it difficult to control the electroplating parameters of both sides in a single electroplating process. However, electroplating them separately would require additional cumbersome processes, greatly reducing production efficiency and making the actual cost difficult to estimate. Therefore, in this embodiment of the invention, by electroplating only the printed circuit pattern to form the plated circuit pattern, the thickness and other parameters of the plated circuit pattern can be effectively controlled.

[0050] Furthermore, since the printed circuit pattern 310 on the second side of the insulating layer 110 is electrically interconnected with the entire metal foil layer 210 on the first side of the insulating layer 110, the metal foil layer 210 can improve the conductivity of the printed circuit pattern 310, thereby effectively improving the electroplating efficiency of the printed circuit pattern 310 during the electroplating process; at the same time, since the metal foil layer 210 is attached to the entire insulating layer 110 and covers the area of ​​the printed circuit pattern 310, the resistance distribution difference of the printed circuit pattern 310 can be reduced, and the surface flatness of the plating layer (plated circuit pattern) can be improved.

[0051] Furthermore, such as Figure 4 As shown, the entire metal foil layer 210 is fully electrically interconnected with the printed circuit pattern 310 on the other side, which can support the requirement that the printed circuit pattern 310 contains an island structure (i.e., at least two independent printed circuit units 31U on the second surface of the insulating layer 110, and the printed circuit units 31U are electrically connected to the metal foil layer 210 through corresponding conductive pillars 510). There is no need to design additional electroplated leads for the island structure, and there is also no need to add an extra process of removing the electroplated leads.

[0052] In some embodiments, the plated metal includes, but is not limited to, gold, silver, copper, iron, aluminum, zinc, nickel, etc.

[0053] Step S15: Etch the metal foil layer 210 to form an etched circuit pattern 210E.

[0054] The etching process for the metal foil layer can be carried out by traditional chemical etching, which involves covering the metal foil layer with a resist / film and then obtaining the etched circuit pattern through processes such as exposure, development, etching, and film removal. This is existing technology and will not be elaborated upon in this application.

[0055] In some embodiments, before etching the metal foil layer 210 to form the etched circuit pattern 210E, a temporary protective layer 900 can be used to shield the plated circuit pattern 410, thereby preventing the plated circuit pattern 410 from being affected by etching.

[0056] In some embodiments, the order of steps S14 and S15 can be reversed.

[0057] This invention combines printing and etching processes, which can effectively improve the production efficiency of circuit boards and reduce waste and pollution treatment costs.

[0058] The applicant has observed a phenomenon in many double-sided circuit boards currently on the market: the circuit patterns on one side of the double-sided circuit board are usually more complex and denser than those on the other side (i.e., the actual area occupied by the circuits within a specified range is larger). The side with lower density is mainly used as an auxiliary circuit for the other side. Therefore, in general, the side with higher density has higher precision requirements for parameters such as line width / spacing due to the denser circuits, while the precision requirements for the other side are not actually high. Therefore, in the embodiments of the present invention, a more precise etched circuit pattern can be obtained by etching a metal foil layer, and a printed circuit pattern (and plated circuit pattern) with lower precision requirements can be formed by printing and electroplating. This will not affect the forming quality of such circuit boards, and is also applicable to the etching and printing combined manufacturing method in the embodiments of the present invention.

[0059] Furthermore, since the etching is performed on the side with a higher density of deposits, the actual amount of metal foil etched is greatly reduced. This effectively reduces waste costs and pollution treatment costs while ensuring quality.

[0060] In some embodiments of the present invention, the minimum line width and / or minimum line spacing of the printed circuit pattern 310 is greater than that of the etched circuit pattern 210E.

[0061] In some embodiments, the density of the printed circuit pattern 310 on the insulating layer 110 is less than that of the etched circuit pattern 210E.

[0062] Optionally, the minimum line spacing and / or minimum line width of the etched circuit pattern 210E can range from 1 to 100 μm, while the minimum line spacing and / or minimum line width of the printed circuit pattern 310 can range from 2 to 200 μm.

[0063] Those skilled in the art should understand that, although the two ranges overlap, the minimum line spacing and / or minimum line width of the etched circuit pattern can be selected as needed, and the actual parameters should be smaller than the minimum line spacing and / or minimum line width of the printed circuit pattern.

[0064] In some embodiments, prior to electroplating to form a plated circuit pattern on the printed circuit pattern, the process may further include:

[0065] The stacked structure with printed circuit pattern 310 and conductive pillar 510 is used as a half-process circuit board. The two half-process circuit boards are temporarily bonded together with the metal foil layer 210 on the side to cover their respective metal foil layers 210.

[0066] After electroplating to form a plated circuit pattern 410 on the printed circuit pattern 310 exposed on both sides of the bonding structure, the semi-process circuit board is then separated and restored.

[0067] After the electroplating process is completed, the two half-process circuit boards that are temporarily bonded are disassembled and restored to two half-process circuit boards, thereby exposing their metal foil layer 210 so that the metal foil layer 210 can be etched.

[0068] In this embodiment, two half-process circuit boards are temporarily bonded together with the metal foil layer 210 on the side thereof using an adhesive layer 800 to cover their respective metal foil layers 210, thereby saving additional masking materials and additional cleaning processes.

[0069] In some embodiments, temporary bonding of two half-process circuit boards can be achieved through an adhesive layer. Specifically, the adhesive layer 800 may include: a first adhesive layer 810, a carrier layer 80A, and a second adhesive layer 820 stacked together; wherein the structural strength of the carrier layer 80A is greater than that of the first adhesive layer 810 and / or the second adhesive layer 820; and the adhesion of the first adhesive layer 810 and / or the second adhesive layer 820 to the carrier layer 80A is greater than its adhesion to the half-process circuit board.

[0070] By designing the carrier layer and double-sided adhesive layer, as well as their mutual adhesion, the problem of single adhesive layers being difficult to peel off due to lack of structural strength is solved, making the adhesive layer easier to remove. On the other hand, the addition of a carrier layer with a certain structural strength helps to reduce air bubbles between the adhesive bonding surfaces, making the bonding surfaces tighter and preventing the plating solution from leaking and causing undesirable plating on the metal foil surface.

[0071] Optionally, the carrier layer may include, but is not limited to, non-adhesive flexible or rigid boards.

[0072] The surface of the metal foil layer of the separated semi-process circuit board may have residual adhesive due to the quality of the colloid. Therefore, the residual adhesive on the surface of the metal foil layer can be removed after separation, thereby reducing the impact on subsequent etching processes.

[0073] Optionally, the process of separating two half-process circuit boards to expose the metal foil layer in this embodiment of the invention may include: after separating the two half-process circuit boards, removing residual adhesive on the metal foil layer by micro-etching. The degree of micro-etching can be 0.1-3μm; preferably, the degree of micro-etching can be 0.1-1μm.

[0074] Among these processes, the advantage of micro-etching to remove residual adhesive compared to plasma generators is that it can treat the entire surface of residual adhesive simultaneously, effectively improving the removal efficiency.

[0075] In some embodiments, the process of etching a metal foil layer to form an etched circuit pattern may include: forming a photoresist layer on the plated circuit pattern and the metal foil layer, forming an etched circuit pattern by exposure, development, and etching, and finally removing the remaining photoresist layer on the plated circuit pattern and the metal foil layer by stripping.

[0076] In this embodiment, the photoresist layer is not limited to positive or negative photoresist layers. Its purpose is to protect the plated circuit pattern during the etching stage, while the non-target pattern area of ​​the metal foil layer is etched away to obtain the etched circuit pattern. Finally, the plated circuit pattern and all remaining photoresist layers on the metal foil layer are removed through the stripping process.

[0077] In other embodiments, the temporary protective layer material that masks the plated circuit pattern can be other materials, not limited to photoresist, as long as it can protect the plated circuit pattern during etching and be removable after etching.

[0078] In some embodiments, before creating the blind hole that penetrates the insulating layer to the metal foil layer, the method further includes: forming a base coating on a second surface of the insulating layer, wherein the blind hole penetrates the base coating; wherein the base coating is used to enhance the adhesion of the conductive paste to the insulating layer.

[0079] In some embodiments, after electroplating to form a plated circuit pattern on a printed circuit pattern and etching a metal foil layer to form an etched circuit pattern, the method further includes forming a cover layer (i.e., a first cover layer 710 and a second cover layer 720) on the etched circuit pattern and / or the plated circuit pattern. The cover layer obscures part or all of the etched circuit pattern and / or the plated circuit pattern.

[0080] The areas exposed by the cover layer for etched and / or plated circuit patterns are not limited to those used for gold fingers, solder pads, etc.

[0081] Alternatively, the cover layer can be bonded to the plated circuit pattern and the etched circuit pattern by means of a fourth adhesive layer and a fifth adhesive layer.

[0082] Another object of the present invention is to provide a circuit board that can be obtained by any of the above-described manufacturing methods.

[0083] In some embodiments of the present invention, the circuit board may include: an insulating layer 110, an etched circuit pattern 210E on a first surface of the insulating layer 110, a printed circuit pattern 310 on a second surface of the insulating layer 110, and a plated circuit pattern 410 attached to the surface of the printed circuit pattern 310; wherein the etched circuit pattern 210E is connected to the printed circuit pattern 310 on the other side through a conductive post 510 penetrating the insulating layer 110, thereby realizing a double-sided board structure with conductive interconnection.

[0084] In some embodiments, a base coating may also be provided between the second side of the insulating layer and the printed circuit pattern.

[0085] In some embodiments, cover layers (i.e., first cover layer 710 and second cover layer 720) may be provided on both sides of the insulating layer; wherein the cover layers cover part or all of the etched circuit pattern and / or plated circuit pattern.

[0086] In some embodiments of the present invention, the minimum line width and / or minimum line spacing of the printed circuit pattern 310 is greater than that of the etched circuit pattern 210E.

[0087] In some embodiments, the density of the printed circuit pattern on the insulating layer is less than that of the etched circuit pattern.

[0088] The minimum line spacing and / or minimum line width of the etched circuit pattern can range from 1 to 100 μm, while the minimum line spacing and / or minimum line width of the printed circuit pattern can range from 2 to 200 μm. Those skilled in the art should understand that although the two ranges overlap, the actual parameters for the minimum line spacing and / or minimum line width of the etched circuit pattern can be selected to be smaller than those for the printed circuit pattern, depending on the requirements.

[0089] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for manufacturing a double-sided circuit board, characterized in that, include: Prepare a layer of stacked material; The laminate includes: an insulating layer having a first and a second surface that are vertically opposite each other, and a metal foil layer formed on the first surface of the insulating layer; A blind hole is made that penetrates the insulating layer and reaches the metal foil layer; A printed circuit pattern is formed on the second surface of the insulating layer using a conductive paste, and the blind holes are filled to form conductive pillars that achieve conductive interconnection between the printed circuit pattern and the metal foil layer; Based on the metal foil layer electrically interconnected with the printed circuit pattern, a plated circuit pattern is formed by electroplating on the printed circuit pattern, and the metal foil layer is etched to form an etched circuit pattern; The minimum line width and / or minimum line spacing of the printed circuit pattern is greater than that of the etched circuit pattern, and the density of the printed circuit pattern on the insulating layer is less than that of the etched circuit pattern.

2. The manufacturing method according to claim 1, characterized in that, The printed circuit pattern includes at least two independent printed circuit units on the second surface of the insulating layer, and the printed circuit units are electrically connected to the metal foil layer through corresponding conductive pillars.

3. The manufacturing method according to claim 1, characterized in that, Before electroplating to form a plated circuit pattern on the printed circuit pattern, the process further includes: A multilayer structure having the printed circuit pattern and the conductive pillars is used as a semi-process circuit board. Two semi-process circuit boards are temporarily bonded together with their metal foil layers facing each other, thus shielding their respective metal foil layers; and... After electroplating to form plated circuit patterns on the printed circuit patterns exposed on both sides of the bonding structure, the semi-process circuit board is then separated and restored.

4. The manufacturing method according to claim 3, characterized in that, The two semi-process circuit boards are temporarily bonded together using an adhesive layer.

5. The manufacturing method according to claim 4, characterized in that, The adhesive layer comprises: a first adhesive layer, a carrier layer, and a second adhesive layer stacked together; wherein the structural strength of the carrier layer is greater than that of the first adhesive layer and / or the second adhesive layer; and the adhesion of the first adhesive layer and / or the second adhesive layer to the carrier layer is greater than that to the semi-process circuit board.

6. The manufacturing method according to claim 1, characterized in that, The process of etching the metal foil layer to form an etched circuit pattern includes: A photoresist layer is formed on the plated circuit pattern and the metal foil layer, and the etched circuit pattern is formed by exposure, development and etching. Finally, the remaining photoresist layer on the plated circuit pattern and the metal foil layer is removed by stripping.

7. The manufacturing method according to claim 1, characterized in that, Before creating the blind hole that penetrates the insulating layer and reaches the metal foil layer, the method further includes: An undercoat is formed on the second surface of the insulating layer, and the blind via penetrates the undercoat; wherein the undercoat is used to enhance the adhesion of the conductive paste to the insulating layer.

8. The manufacturing method according to claim 1, characterized in that, After electroplating the printed circuit pattern to form a plated circuit pattern and etching the metal foil layer to form an etched circuit pattern, the process further includes: A cover layer is formed on the etched circuit pattern and / or plated circuit pattern; wherein the cover layer obscures part or all of the etched circuit pattern and / or plated circuit pattern.

9. A double-sided circuit board, characterized in that, Obtained by the manufacturing method according to any one of claims 1-8.

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