A method of manufacturing a back contact tbc cell

Abstract

The application discloses a preparation method of a back contact TBC battery and belongs to the field of solar cells. The preparation method of the back contact TBC battery comprises the following steps: polishing a silicon substrate, sequentially forming a first tunneling silicon oxide layer, a boron-doped polysilicon layer and a borosilicate glass layer on the back surface of the silicon substrate, removing the borosilicate glass layer, the boron-doped polysilicon layer and the first tunneling silicon oxide layer in the non-P region, then sequentially preparing a second tunneling silicon oxide layer, an intrinsic polysilicon layer and a phosphosilicate glass layer, then removing the phosphosilicate glass layer, the intrinsic polysilicon layer and the second tunneling silicon oxide layer on the P region by laser etching, converting the intrinsic polysilicon layer in the N region into a phosphorus-doped polysilicon layer, then removing the borosilicate glass layer and the phosphosilicate glass layer on the back surface of the silicon substrate, then preparing a passivation film layer on the front surface of the silicon substrate, preparing an anti-reflection layer on both surfaces, preparing an N region electrode and a P region electrode on the back surface, and finally obtaining the back contact TBC battery.

Description

Technical Field

[0001] This invention relates to the field of solar cells, and in particular to a method for preparing a back-contact TBC cell. Background Technology

[0002] TBC (Tunneling Oxide Passivated Contact Back Contact) cells are a special type of solar cell technology that combines the tunneling oxide passivated contact technology of Topcon cells with the back contact structure of IBC (Interdigitated Back Contact) cells. By adding a tunneling oxide layer and a passivation contact layer (doped with polycrystalline silicon) to the back of the cell, TBC cells eliminate electrode obstruction on the front surface, effectively improving light transmission and electron collection. This significantly reduces short-circuit current loss, thereby increasing the cell's conversion efficiency. This structural design helps reduce light loss, allowing more light energy to be absorbed and converted into electrical energy. By combining the advantages of Topcon and IBC, TBC cells offer higher conversion efficiency, better process compatibility, and more flexible application scenarios, making them a key direction in the development of solar cell technology.

[0003] The current conventional method for fabricating back-contact TBC solar cells involves: double-sided alkaline polishing, back-side tunneling oxide layer, i-poly layer, boron diffusion, first laser grooving, front-side etching, front and back alkaline washing, tunneling oxide layer, i-poly layer, phosphorus diffusion, second laser grooving, alkaline washing, third laser grooving, acid washing, front-side texturing, passivation anti-reflection coating, and printing and sintering. However, these existing technologies require multiple laser grooving and etching processes on the back side to achieve PN partitioning, which can easily damage the doped polycrystalline silicon layer of the cell, thus affecting the performance of the back-contact TBC solar cell. Moreover, the process is cumbersome and costly, and further improvements are needed. Summary of the Invention

[0004] The purpose of this invention is to provide a method for preparing a back-contact TBC battery to solve the above-mentioned problems in the background art.

[0005] To achieve the above objectives, the present invention provides the following technical solution:

[0006] One of the technical solutions of this invention is to provide a method for preparing a back-contact TBC battery, comprising the following steps:

[0007] Take a silicon substrate and divide the back side of the silicon substrate into a P-region, an isolation region and an N-region. Sequentially form a first tunneling silicon oxide layer, a boron-doped polycrystalline silicon layer and a borosilicate glass layer (BSG layer) on the back side of the silicon substrate to obtain precursor 1.

[0008] A laser mask layer that is resistant to acid but not alkali is formed on the surface of the borosilicate glass layer in the P-region of the precursor 1 by a masking method to obtain the precursor 2; the borosilicate glass layer in the non-P-region (isolation region and N-region) portion of the back side of the precursor 2 is removed by acid etching to obtain the precursor 3; then the boron-doped polysilicon layer, the first tunneling silicon oxide layer and the laser mask layer in the P-region portion of the precursor 3 are removed by alkaline etching to obtain the precursor 4.

[0009] A second tunneling silicon oxide layer, an intrinsic polycrystalline silicon layer, and a phosphosilicate glass layer (PSG layer) are sequentially prepared on the back side of the precursor 4 to obtain the precursor 5.

[0010] The phosphorosilicon glass layer, intrinsic polysilicon layer, and second tunneling silicon oxide layer in the P region of the precursor 5 are etched by laser etching to obtain the precursor 6.

[0011] The intrinsic polysilicon layer in the N region of the precursor 6 is transformed into a phosphorus-doped polysilicon layer to obtain the precursor 7.

[0012] The borosilicate glass layer and the phosphosilicate glass layer on the back side of the precursor 7 are removed by acid etching to obtain the precursor 8.

[0013] Precursor 9 is obtained by texturing the front side of the precursor 8 and preparing a passivation film layer, and preparing an antireflection layer on both sides.

[0014] An N-region electrode and a P-region electrode are fabricated on the N-region and P-region of the back side of the precursor 9, respectively, to obtain the back contact TBC battery.

[0015] Preferably, the silicon substrate is an N-type silicon substrate with a thickness of 100-200 μm.

[0016] Preferably, the thickness of the first tunneling silicon oxide layer is 0.5–5 nm; the thickness of the boron-doped polycrystalline silicon layer is 30–300 nm, and the carrier concentration is E18 cm⁻¹. -3 ~E21cm -3 The thickness of the borosilicate glass layer is 30-70 nm.

[0017] Preferably, the thickness of the laser mask layer is 5-20 nm.

[0018] Preferably, during the preparation of the laser mask layer, the wavelength of the laser is 200-400nm and the power is 1-50W.

[0019] Preferably, the thickness of the second tunneling silicon oxide layer is 0.5–5 nm; the thickness of the intrinsic polycrystalline silicon layer is 30–300 nm; and the thickness of the phosphosilicate glass layer is 30–70 nm.

[0020] Preferably, the first tunneling oxide layer and the second tunneling oxide layer have the same thickness; the boron-doped polycrystalline silicon layer and the phosphorus-doped polycrystalline silicon layer have the same thickness.

[0021] Preferably, the wavelength of the laser etching is 300-600nm and the power is 10-200W.

[0022] Preferably, the passivation film is made of aluminum oxide and has a thickness of 3-10 nm.

[0023] Preferably, the N-region electrode extends to a phosphorus-doped polycrystalline silicon layer, and the P-region electrode extends to a boron-doped polycrystalline silicon layer.

[0024] The second technical solution of the present invention provides a back contact TBC battery obtained according to the above preparation method.

[0025] The beneficial technical effects of the present invention are as follows:

[0026] This invention solves the problem of laser grooving, a common requirement in existing TBC battery fabrication processes, by avoiding damage to the material layers and reducing the risk of laser damage. In the formation of the boron-doped polycrystalline silicon layer and the borosilicate glass layer, this invention retains the surface borosilicate glass layer before subsequent operations. This allows the borosilicate glass layer to act as a laser protective layer in later steps, reducing damage to the edges of the P-region boron-doped polycrystalline silicon layer caused by laser patterning masks and to the passivation contact structure of the P-region tunneling oxide layer caused by laser etching.

[0027] In conventional TBC cell fabrication methods, laser grooving is typically required to isolate the N-region and P-region. However, laser operation can damage the doped polysilicon and silicon substrate in the N-region and P-region. This invention eliminates the need for laser grooving on the silicon substrate, using a tunneling silicon oxide layer and a polysilicon layer in the isolation region to isolate the N-region and P-region. Furthermore, the laser etching process in this invention does not affect the main structure of the product, eliminating the need for laser damage repair. This invention requires only two grooving operations (i.e., the laser patterning mask in step 3 of Example 1 and the laser grooving in step 5), and both use a BSG layer as a laser protection layer to reduce the risk of laser damage, thus minimizing the reduction in photoelectric conversion efficiency. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1This is a cross-sectional view of the back-contact TBC battery in Example 1.

[0030] Figure 2 This is a schematic cross-sectional view of intermediate product 1 in Example 1.

[0031] Figure 3 This is a schematic cross-sectional view of intermediate product 2 in Example 1.

[0032] Figure 4 This is a schematic cross-sectional view of intermediate product 3 in Example 1.

[0033] Figure 5 This is a schematic cross-sectional view of intermediate product 4 in Example 1.

[0034] Figure 6 This is a schematic cross-sectional view of intermediate product 5 in Example 1.

[0035] Figure 7 This is a schematic cross-sectional view of intermediate product 6 in Example 1.

[0036] Figure 8 This is a schematic cross-sectional view of intermediate product 7 in Example 1.

[0037] Figure 9 This is a schematic cross-sectional view of intermediate product 8 in Example 1.

[0038] Figure 10 This is a schematic cross-sectional view of intermediate product 9 in Example 1.

[0039] Figure 11 This is a schematic cross-sectional view of the intermediate product 10 in Example 1.

[0040] Wherein, 1: silicon substrate; 2: first tunneling oxide layer; 3: boron-doped polycrystalline silicon layer; 4: borosilicate glass layer; 5: laser mask layer; 6: second tunneling oxide layer; 7: intrinsic polycrystalline silicon layer; 8: phosphorus-silicon glass layer; 9: phosphorus-doped polycrystalline silicon layer; 10: passivation film layer; 11: antireflection film layer; 12: electrode.

[0041] Figure 12 This is a schematic cross-sectional view of a laser-grooved TBC solar cell. 210 is the silicon substrate, 220 is the tunneling oxide layer, 231 is the first doped polycrystalline silicon layer, 232 is the second doped polycrystalline silicon layer, 233 is the isolation layer, and 260 is the anti-reflection layer.

[0042] Figure 13This is a schematic cross-sectional view of the back-contact TBC cell in Comparative Example 1. Wherein, 1: silicon substrate; 2: first tunneling oxide layer; 3: boron-doped polycrystalline silicon layer; 4: second tunneling oxide layer; 5: phosphorus-doped polycrystalline silicon layer; 6: passivation film layer; 7: anti-reflection film layer; 8: electrode. Detailed Implementation

[0043] Various exemplary embodiments of the present invention will now be described in detail. This detailed description should not be considered as a limitation of the present invention, but rather as a more detailed description of certain aspects, features, and embodiments of the present invention. It should be understood that the terminology used in this invention is merely for describing particular embodiments and is not intended to limit the present invention.

[0044] Furthermore, regarding the numerical ranges in this invention, it should be understood that each intermediate value between the upper and lower limits of the range is also specifically disclosed. Any stated value or intermediate value within a stated range, as well as each smaller range between any other stated value or intermediate value within said range, are also included in this invention. The upper and lower limits of these smaller ranges may be independently included or excluded from the range.

[0045] Unless otherwise stated, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art. While only preferred methods and materials have been described herein, any methods and materials similar to or equivalent to those described herein may be used in the implementation or testing of this invention.

[0046] The terms “comprising,” “including,” “having,” “containing,” etc., used in this invention are all open-ended terms, meaning that they include but are not limited to.

[0047] Existing technologies typically require laser grooving and etching on the back of the battery to create PN junctions. As an example, the fabrication method for a laser-grooved TBC battery includes the following steps:

[0048] A groove is created on one side of a silicon substrate using a laser; a tunneling oxide layer and an intrinsic polycrystalline silicon layer are sequentially fabricated on the same side of the silicon substrate; a first doped silicon oxide layer is fabricated on the intrinsic polycrystalline silicon layer; the first doped silicon oxide layer located outside the groove is removed, exposing the intrinsic polycrystalline silicon layer; a dopant source from the first doped silicon oxide layer located inside the groove is pushed into the intrinsic polycrystalline silicon layer to form the first doped polycrystalline silicon layer; a second doped silicon oxide layer with the opposite doping type to the first doped silicon oxide layer is fabricated on the intrinsic polycrystalline silicon layer located outside the groove; a dopant source from the second doped silicon oxide layer located outside the groove is pushed into the intrinsic polycrystalline silicon layer to form the second doped polycrystalline silicon layer (the intrinsic polycrystalline silicon layer on the sidewall of the groove forms an isolation layer); and then an antireflection layer is deposited on the back side of the silicon substrate to obtain a laser-grooved TBC solar cell, the structural schematic of which is shown in the figure. Figure 12 As shown.

[0049] Figure 12 This is a schematic diagram of a laser-grooved TBC solar cell. In the diagram, 210 is a silicon substrate, 220 is a tunneling oxide layer, 231 is a first doped polycrystalline silicon layer, 232 is a second doped polycrystalline silicon layer, 233 is an isolation layer, and 260 is an antireflection layer.

[0050] like Figure 12 As shown, this cell is created by using a laser to create grooves in a silicon substrate. A first doped silicon oxide layer is then placed inside the groove, and a second doped silicon oxide layer is placed outside the groove. The two doped polycrystalline silicon layers are separated by the height difference between the inside and outside of the groove. After the doped polycrystalline silicon layers are prepared, there is no need to use a laser to separate the N-region and the P-region.

[0051] While this technology avoids damage to the layered structure of doped polycrystalline silicon by laser operation, the high energy of the laser during laser grooving causes the surface temperature of the silicon substrate to rise, leading to the formation of lattice defects. These defects become additional recombination centers, resulting in loss of photocurrent during transmission and thus reducing the efficiency of the cell. The localized second doped oxide layer outside the groove may also require laser grooving to remove the second doped oxide layer at the corresponding location in the P-region, causing laser damage to the doped polycrystalline silicon layer in the P-region. Alternatively, using a mask to prepare the localized second doped oxide layer instead of laser grooving would increase the cost and technical complexity of the cell, requiring regular maintenance and updates, thus limiting the improvement of solar cell production efficiency and cost-effectiveness.

[0052] This invention provides a method for preparing a back-contact TBC battery, comprising the following steps:

[0053] (1) An N-type silicon substrate (the back side of the silicon substrate is divided into a P-region, an isolation region, and an N-region) is selected. The damaged layer and the impurities encapsulated therein are removed by rough polishing with alkaline solution. Then, alkaline solution and hydrogen peroxide are used to pre-clean the silicon wafer by oxidation and etching to remove surface contaminants such as organic matter, metal, and particles, so as to prepare a clean surface for texturing and reduce the surface roughness of the silicon wafer. Then, alkaline solution and polishing agent (the concentration of NaOH in the solution is 1-2wt%, and the concentration of polishing agent is 0.5-1.5wt%) are used to polish both sides of the pre-cleaned silicon wafer to prepare the front and back surfaces of the silicon wafer with a flat alkaline polishing tower base morphology, and intermediate product 1 is obtained.

[0054] (2) A first tunneling silicon oxide layer (covering the entire back surface) is deposited on the back side of intermediate product 1, and then a boron-doped polycrystalline silicon layer is deposited on the first tunneling silicon oxide layer. A borosilicate glass layer is also formed on the side of the boron-doped polycrystalline silicon layer away from the silicon substrate, resulting in intermediate product 2. The first tunneling silicon oxide layer and the doped polycrystalline silicon layer can be grown by LPCVD and boron diffusion, or by PECVD and annealing. The thickness of the first tunneling silicon oxide layer is 0.5-5 nm, the thickness of the boron-doped polycrystalline silicon layer is 30-300 nm, and the carrier concentration of the boron-doped polycrystalline silicon layer is E18 cm⁻¹. -3 ~E21cm -3 The thickness of the borosilicate glass layer is 30-70 nm.

[0055] (3) The BSG layer on the front side of intermediate product 2 is removed by a chain acid washing device. A patterned laser mask layer is formed on the BSG layer in the P region of intermediate product 2 by a masking method to obtain intermediate product 3. The BSG layer in the non-P region on the back side of intermediate product 3 is removed by a chain acid washing device to obtain intermediate product 4. The boron-doped polysilicon layer, the first tunneling silicon oxide layer, the laser mask layer in the P region, and the polysilicon and oxide layer on the front side are removed by a tank alkaline washing device to obtain intermediate product 5. The laser mask layer is acid-resistant but not alkali-resistant. The material is oxide, nitride or wax, and the thickness is 5-20nm. During the preparation of the laser mask layer, the wavelength of the laser is 200-400nm and the power is 1-50W.

[0056] (4) A second tunneling silicon oxide layer is prepared by full-surface oxidation on the back side of intermediate product 5. Then, an intrinsic polycrystalline silicon layer and a phosphosilicate glass layer are deposited on the second tunneling silicon oxide layer to obtain intermediate product 6 (due to the difference in height between the P-region and non-P-region before deposition, a groove is formed in the N-region after deposition); wherein, the intrinsic polycrystalline silicon layer is grown by LPCVD, the PSG layer is grown by PECVD, SACVD or solution method, the thickness of the second tunneling silicon oxide layer is 0.5-5 nm, the thickness of the intrinsic polycrystalline silicon layer is 30-300 nm, and the thickness of the PSG layer is 30-70 nm.

[0057] (5) The PSG layer, intrinsic polysilicon layer and second tunneling silicon oxide layer on the P region of intermediate product 6 are patterned by laser etching until the BSG layer structure of the P region is exposed, and intermediate product 7 is obtained; wherein, the wavelength of laser etching is 300-600nm and the power is 10-200W.

[0058] (6) In the N region of intermediate product 7, the phosphorus source is directed by laser to transform the intrinsic polycrystalline silicon layer in the N region into a phosphorus-doped polycrystalline silicon layer. This phosphorus-doped polycrystalline silicon layer is used as the N-type doped region of the back contact TBC cell to obtain intermediate product 8.

[0059] (7) The intermediate product 8 is removed by acid washing, alkali washing and re-acid washing in sequence. The BSG layer, PSG layer on the back side, polysilicon and oxide layer on the front side are removed. The intermediate product 9 is obtained by cleaning.

[0060] (8) Texturing is performed on the light-receiving surface (front) of intermediate product 9 to form a textured surface with a reflectivity of 8-12% to enhance the absorption of sunlight and reduce reflection. A passivation film is formed on the textured surface. Antireflection films are prepared on the front and back sides of the silicon wafer to obtain intermediate product 10. The material of the passivation film is aluminum oxide with a thickness of 3-10 nm, and the thickness of the antireflection film is 70-90 nm.

[0061] (9) Screen printing and sintering metal paste on the N and P regions of the back of intermediate product 10 to obtain N-region electrode and P-region electrode. The P-region electrode penetrates the anti-reflection film and makes electrical contact with the boron-doped polycrystalline silicon layer. The N-region electrode penetrates the anti-reflection film and makes electrical contact with the phosphorus-doped polycrystalline silicon layer. Finally, the back contact TBC cell is obtained by photoinjection repair.

[0062] All raw materials used in the following embodiments and comparative examples of the present invention are commercially available products.

[0063] Example 1

[0064] A method for preparing a back-contact TBC battery, comprising the following steps:

[0065] (1) A 150 μm thick N-type silicon substrate (the back side of the silicon substrate is divided into a P-region, an isolation region, and an N-region) is selected. The damaged layer and its encapsulated impurities are removed by rough polishing with an alkaline solution. Then, a pre-cleaning process is performed using an alkaline solution and hydrogen peroxide through oxidation and etching to remove surface contaminants such as organic matter, metal, and particles, preparing a clean surface for texturing and reducing the surface roughness of the silicon wafer. Next, the pre-cleaned silicon wafer is polished on both sides using an alkaline solution and a polishing agent (NaOH concentration in the solution is 1.6 wt%, and the polishing agent concentration is 0.97 wt%) to prepare a silicon wafer with a flat alkaline polishing tower base morphology on the front and back surfaces, yielding intermediate product 1, such as... Figure 2 As shown.

[0066] (2) A first tunneling silicon oxide layer (covering the entire back surface) and an intrinsic polycrystalline silicon layer are deposited on the back side of intermediate product 1 using LPCVD process. Then, high-temperature diffusion is performed on the back side of the silicon wafer using a boron diffusion device to transform the intrinsic polycrystalline silicon layer into a boron-doped polycrystalline silicon layer. A borosilicate glass layer is also formed on the side of the boron-doped polycrystalline silicon layer away from the silicon substrate, resulting in intermediate product 2, as shown below. Figure 3 As shown; wherein, the thickness of the first tunneling silicon oxide layer is 1.5 nm, the thickness of the boron-doped polycrystalline silicon layer is 120 nm, and the carrier concentration of the boron-doped polycrystalline silicon layer is 5E18 cm⁻¹.-3 The thickness of the borosilicate glass layer is 40 nm.

[0067] (3) The BSG layer on the front side of intermediate product 2 is removed by a chain acid washing device. A patterned laser mask layer is formed on the BSG layer in the P region of intermediate product 2 using a masking method to obtain intermediate product 3, such as... Figure 4 As shown; the BSG layer in the non-P region on the back side of intermediate product 3 is removed using a chain acid washing device to obtain intermediate product 4, as shown. Figure 5 As shown; then, the boron-doped polysilicon layer, the first tunneling silicon oxide layer, the laser mask layer of the P region, and the polysilicon and oxide layer wrapped around the front side of the non-P region on the back side of intermediate product 4 are removed using a tank-type alkaline washing equipment to obtain intermediate product 5, as shown. Figure 6 As shown; the laser mask layer is acid-resistant but not alkali-resistant, made of wax, and 10nm thick. During the preparation of the laser mask layer, the laser wavelength is 266nm and the power is 5W.

[0068] (4) A second tunneling silicon oxide layer is prepared by full-surface oxidation on the back side of intermediate product 5. Then, an intrinsic polycrystalline silicon layer and a phosphosilicate glass layer are deposited on the second tunneling silicon oxide layer to obtain intermediate product 6 (due to the difference in height between the P-region and non-P-region before deposition, a groove is formed in the N-region after deposition). Figure 7 As shown; wherein, the intrinsic polysilicon layer is grown by LPCVD, the PSG layer is grown by PECVD, the thickness of the second tunneling silicon oxide layer is 1.5nm, the thickness of the intrinsic polysilicon layer is 120nm, and the thickness of the PSG layer is 40nm.

[0069] (5) The PSG layer, intrinsic polysilicon layer, and second tunneling silicon oxide layer on the P region of intermediate product 6 are patterned by laser etching until the BSG layer structure of the P region is exposed, thus obtaining intermediate product 7, as shown. Figure 8 As shown; the laser etching wavelength is 532nm and the power is 50W.

[0070] (6) In the N-region of intermediate product 7, a phosphorus source is directed by laser to transform the intrinsic polycrystalline silicon layer in the N-region into a phosphorus-doped polycrystalline silicon layer. This phosphorus-doped polycrystalline silicon layer is used as the N-type doped region of the back contact TBC cell to obtain intermediate product 8, as shown below. Figure 9 As shown.

[0071] (7) The intermediate product 8 is sequentially acid-washed, alkali-washed, and then acid-washed to remove the BSG layer and PSG layer on the back side, as well as the polysilicon and oxide layers on the front side. Specifically, the PSG layer on the front side of the intermediate product 8 is first removed using a chain acid-washing device; then, the polysilicon and oxide layers on the front side are removed using a tank alkali-washing device. Since the BSG and PSG layers on the back side of the intermediate product 8 act as a mask, the polysilicon layers in the P and N regions on the back side are unaffected; finally, the BSG and PSG layers on the back side of the intermediate product 8 are removed using a chain acid-washing device to obtain the intermediate product 9, as shown below. Figure 10 As shown.

[0072] (8) Texturing is performed on the light-receiving surface (front side) of intermediate product 9 to form a textured surface with a reflectivity of 10% to enhance the absorption of sunlight and reduce reflection. A passivation film is formed on the textured surface. Anti-reflection films are prepared on the front and back sides of the silicon wafer to obtain intermediate product 10, as shown below. Figure 11 As shown; the passivation film is made of aluminum oxide with a thickness of 5nm, and the antireflection film has a thickness of 80nm.

[0073] (9) Screen printing and sintering metal paste on the N-region and P-region of the back side of intermediate product 10 yields N-region electrodes and P-region electrodes. The P-region electrode penetrates the anti-reflection film and makes electrical contact with the boron-doped polycrystalline silicon layer, while the N-region electrode penetrates the anti-reflection film and makes electrical contact with the phosphorus-doped polycrystalline silicon layer. Finally, after photoinjection repair, a back-contact TBC cell is obtained, such as... Figure 1 As shown.

[0074] Figure 1 This is a cross-sectional view of the back-contact TBC battery in Example 1.

[0075] Figure 2 This is a schematic cross-sectional view of intermediate product 1 in Example 1.

[0076] Figure 3 This is a schematic cross-sectional view of intermediate product 2 in Example 1.

[0077] Figure 4 This is a schematic cross-sectional view of intermediate product 3 in Example 1.

[0078] Figure 5 This is a schematic cross-sectional view of intermediate product 4 in Example 1.

[0079] Figure 6 This is a schematic cross-sectional view of intermediate product 5 in Example 1.

[0080] Figure 7 This is a schematic cross-sectional view of intermediate product 6 in Example 1.

[0081] Figure 8This is a schematic cross-sectional view of intermediate product 7 in Example 1.

[0082] Figure 9 This is a schematic cross-sectional view of intermediate product 8 in Example 1.

[0083] Figure 10 This is a schematic cross-sectional view of intermediate product 9 in Example 1.

[0084] Figure 11 This is a schematic cross-sectional view of the intermediate product 10 in Example 1.

[0085] Wherein, 1: silicon substrate; 2: first tunneling oxide layer; 3: boron-doped polycrystalline silicon layer; 4: borosilicate glass layer; 5: laser mask layer; 6: second tunneling oxide layer; 7: intrinsic polycrystalline silicon layer; 8: phosphosilicate glass layer; 9: phosphorus-doped polycrystalline silicon layer; 10: passivation film layer; 11: antireflection film layer; 12: electrode.

[0086] In step (3), during the process of forming a patterned laser mask layer in the P-region on the back of the silicon wafer, the BSG layer under the mask in the non-P-region is a non-conductive dielectric layer, which can be used as a laser protection layer to reduce the impact of high-power laser on the silicon substrate below and reduce the risk of damage caused by the laser.

[0087] In step (5), during the patterning of the PSG layer, intrinsic polysilicon layer and second tunneling silicon oxide layer on the P region by laser etching, the BSG layer in the P region can protect the boron-doped polysilicon layer below, and also reduce the damage caused by the laser. Therefore, it helps to improve the photoelectric conversion efficiency of the fabricated back contact TBC cell.

[0088] Step (7) uses acid-base etching to remove excess deposited layers on the front and back sides, avoiding laser damage caused by the third laser grooving in the traditional preparation method. Furthermore, by using the tunneling layer and the intrinsic polysilicon layer as isolation layers, grooving is not required, which can also improve the problem of inaccurate Gap area position caused by laser alignment.

[0089] Comparative Example 1

[0090] (1) A 150 μm thick N-type silicon substrate (the back side of the silicon substrate is divided into P-region, isolation region and N-region) is selected. The damaged layer and the impurities it contains are removed by rough polishing with alkaline solution. Then, alkaline solution and hydrogen peroxide are used to pre-clean the silicon wafer by oxidation and etching to remove surface contaminants such as organic matter, metal and particles, so as to prepare a clean surface for texturing and reduce the surface roughness of the silicon wafer. Then, alkaline solution and polishing agent (the concentration of NaOH in the solution is 1.6 wt% and the concentration of polishing agent is 0.97 wt%) are used to polish both sides of the pre-cleaned silicon wafer to prepare the front and back surfaces of the silicon wafer with flat alkaline polishing tower base morphology, and intermediate product 1 is obtained.

[0091] (2) A first tunneling silicon oxide layer (covering the entire back surface) and an intrinsic polycrystalline silicon layer are deposited on the back side of intermediate product 1 using LPCVD process. Then, high-temperature diffusion is performed on the back side of the silicon wafer using a boron diffusion device to transform the intrinsic polycrystalline silicon layer into a boron-doped polycrystalline silicon layer. A borosilicate glass layer is also formed on the side of the boron-doped polycrystalline silicon layer away from the silicon substrate, resulting in intermediate product 2. The thickness of the first tunneling silicon oxide layer is 1.8 nm, the thickness of the boron-doped polycrystalline silicon layer is about 115 nm, and the carrier concentration of the boron-doped polycrystalline silicon layer is 5E18 cm⁻¹. -3 The thickness of the borosilicate glass layer is about 40nm.

[0092] (3) The BSG layer on the N-region surface of the back side of intermediate product 2 is removed by laser grooving. The BSG layer, polysilicon layer and first tunneling silicon oxide layer of the N-region are removed by single-sided acid etching and trench-type alkaline etching to obtain intermediate product 3. The wavelength of laser grooving is 355nm and the power is 10W.

[0093] (4) A second tunneling silicon oxide layer (covering the entire back surface) and an intrinsic polycrystalline silicon layer are deposited on the back side of intermediate product 3 using LPCVD process. Then, the back side of the silicon wafer is subjected to high-temperature diffusion using a phosphorus diffusion device to transform the intrinsic polycrystalline silicon layer into a phosphorus-doped polycrystalline silicon layer. A phosphorus-silicon glass layer is also formed on the side of the phosphorus-doped polycrystalline silicon layer away from the silicon substrate, resulting in intermediate product 4. The thickness of the second tunneling silicon oxide layer is 1.8 nm, the thickness of the phosphorus-doped polycrystalline silicon layer is about 115 nm, and the thickness of the PSG layer is about 40 nm.

[0094] (5) The PSG layer on the back surface of the non-N region of intermediate product 4 is removed by laser grooving, and the PSG layer is removed by single-sided acid etching on the front side; the phosphorus-doped polysilicon layer and the second tunneling silicon oxide layer in the non-N region on the back side, as well as the polysilicon and oxide layer on the front side, are removed by trench alkaline etching to obtain intermediate product 5; wherein, the wavelength of laser grooving is 355nm and the power is 10W.

[0095] (6) The tunneling layer and phosphorus-doped polysilicon layer of the isolation region between the N-region and the P-region are removed by laser grooving, and the BSG layer on the P-region is removed by acid washing to obtain intermediate product 6; wherein the wavelength of laser grooving is 532nm and the power is 30W.

[0096] (7) Texturing is performed on the light-receiving surface (front) of intermediate product 6 to form a textured surface with a reflectivity of 10% to enhance the absorption of sunlight and reduce reflection. A passivation film is formed on the textured surface. Antireflection films are prepared on the front and back sides of the silicon wafer to obtain intermediate product 7. The material of the passivation film is aluminum oxide with a thickness of 5 nm, and the thickness of the antireflection film is 80 nm.

[0097] (8) Screen printing and sintering metal paste on the N-region and P-region of the back side of intermediate product 7 yields N-region electrodes and P-region electrodes. The P-region electrode penetrates the anti-reflection film and makes electrical contact with the boron-doped polycrystalline silicon layer, while the N-region electrode penetrates the anti-reflection film and makes electrical contact with the phosphorus-doped polycrystalline silicon layer. Finally, after photoinjection repair, a back-contact TBC cell is obtained, such as... Figure 13 As shown.

[0098] Figure 13 This is a schematic cross-sectional view of the back-contact TBC cell in Comparative Example 1. Wherein, 1: silicon substrate; 2: first tunneling oxide layer; 3: boron-doped polycrystalline silicon layer; 4: second tunneling oxide layer; 5: phosphorus-doped polycrystalline silicon layer; 6: passivation film layer; 7: anti-reflection film layer; 8: electrode.

[0099] Effect verification

[0100] Electrical performance tests were conducted on the TBC batteries of Example 1 and Comparative Example 1 to obtain parameters such as short-circuit current (Isc), open-circuit voltage (Voc), fill factor (FF), and energy conversion efficiency (Eta), as shown in Table 1 below.

[0101] Table 1

[0102] Example 1 13.3607 0.7383 83.459 24.936 Comparative Example 1 13.3413 0.7284 83.366 24.538

[0103] Compared to Comparative Example 1, Example 1 only requires two laser grooving operations, which reduces damage to the silicon wafer, increases the minority carrier lifetime of the silicon substrate, and improves the short-circuit current. During the fabrication process, Example 1 uses an isolation layer to block the high-temperature diffusion of impurity atoms, achieving isolation between the P and N regions, avoiding leakage risks, and improving process stability. It eliminates the need for multiple laser grooving operations as in Comparative Example 1, reducing laser damage to the edges of the P and N regions, thereby enabling the Poly layer and tunneling layer to have better passivation effects, resulting in Voc and FF gains. Ultimately, the Eta of Example 1 is also improved.

[0104] The embodiments described above are merely preferred embodiments of the present invention and are not intended to limit the scope of the present invention. Various modifications and improvements made by those skilled in the art to the technical solutions of the present invention without departing from the spirit of the present invention should fall within the protection scope defined by the claims of the present invention.

Claims

1. A method for preparing a back-contact TBC battery, characterized in that, Includes the following steps: Take a silicon substrate and divide the back side of the silicon substrate into a P-region, an isolation region, and an N-region. Sequentially form a first tunneling silicon oxide layer, a boron-doped polycrystalline silicon layer, and a borosilicate glass layer on the back side of the silicon substrate to obtain precursor 1. A laser mask layer that is resistant to acid but not alkali is formed on the surface of the borosilicate glass layer in the P region of the precursor 1 by a masking method to obtain the precursor 2; the non-P region portion of the borosilicate glass layer on the back side of the precursor 2 is removed by acid etching to obtain the precursor 3. Then, the boron-doped polysilicon layer, the first tunneling silicon oxide layer, and the laser mask layer of the P region of the precursor 3 are removed by alkaline etching to obtain the precursor 4. A second tunneling silicon oxide layer, an intrinsic polycrystalline silicon layer, and a phosphosilicate glass layer are sequentially prepared on the back side of the precursor 4 to obtain the precursor 5. The phosphorosilicon glass layer, intrinsic polysilicon layer and second tunneling silicon oxide layer in the P region of the precursor 5 are etched by laser etching to obtain the precursor 6. The intrinsic polysilicon layer in the N region of the precursor 6 is transformed into a phosphorus-doped polysilicon layer to obtain the precursor 7. The borosilicate glass layer and the phosphosilicate glass layer on the back side of the precursor 7 are removed by acid etching to obtain the precursor 8. Precursor 9 is obtained by texturing the front side of the precursor 8 and preparing a passivation film layer, and preparing an antireflection layer on both sides. An N-region electrode and a P-region electrode are fabricated on the N-region and P-region of the back side of the precursor 9, respectively, to obtain the back contact TBC battery; The silicon substrate is an N-type silicon substrate with a thickness of 100-200 μm; The N-region electrode extends into the phosphorus-doped polysilicon layer, and the P-region electrode extends into the boron-doped polysilicon layer. The thickness of the first tunneling silicon oxide layer is 0.5~5 nm; the thickness of the boron-doped polycrystalline silicon layer is 30~300 nm, and the carrier concentration is E18cm. -3 ~E21cm -3 The thickness of the borosilicate glass layer is 30-70 nm. The thickness of the laser mask layer is 5-20 nm; During the preparation of the laser mask layer, the wavelength of the laser is 200-400nm and the power is 1-50W; The thickness of the second tunneling silicon oxide layer is 0.5~5nm; the thickness of the intrinsic polycrystalline silicon layer is 30~300nm; and the thickness of the phosphosilicate glass layer is 30~70nm. The laser etching wavelength is 300-600nm, and the power is 10-200W; The passivation film is made of aluminum oxide and has a thickness of 3-10 nm.

2. A back-contact TBC battery obtained by the preparation method according to claim 1.

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