Back contact battery, manufacturing method thereof and photovoltaic module

Abstract

The invention discloses a back contact battery, a manufacturing method thereof and a photovoltaic module, relates to the technical field of photovoltaics, and aims to reduce the hot spot risk of the back contact battery and improve the burning resistance of the back contact battery. A back contact cell includes a semiconductor substrate, a first doped semiconductor layer, a first interface passivation layer, a second doped semiconductor layer, and a transparent conductive layer. The first doped semiconductor layer is disposed in the first region. And along the thickness direction of the semiconductor substrate, the first interface passivation layer and the second doped semiconductor layer are sequentially stacked on the second region and extend to cover a part of the first doped semiconductor layer. The transparent conductive layer covers the second doped semiconductor layer. The edge portion, close to the second area, of the first doped semiconductor layer is a hole distribution area. The reverse electric leakage part of the second doped semiconductor part is electrically connected with the first doped semiconductor layer through the part, at least covering the hole structure, of the first interface passivation layer, and the reverse electric leakage part is covered with a transparent conductive layer extending from the second region.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic technology, and in particular to a back contact cell and a manufacturing method thereof, and a photovoltaic module. Background Art

[0002] A back-contact cell refers to a solar cell in which the light-facing side of the cell has no electrode, and the positive and negative electrodes are arranged on the backlight side of the cell. This can reduce the shading of the electrode to the cell, increase the short-circuit current of the cell, and improve the energy conversion efficiency of the cell.

[0003] In actual use, bird droppings, leaves, sand and dust may fall onto the back-contact battery. The temperature of the battery cell will rise after being blocked, resulting in a hot spot effect. If the temperature of the hot spot exceeds a certain temperature value, it will cause problems such as delamination of the photovoltaic module, burning of the back panel, and cracking of the glass, thus causing the entire solar cell to be scrapped. In severe cases, it may even cause a fire risk. Summary of the invention

[0004] The object of the present invention is to provide a back-contact cell and a method for manufacturing the same, as well as a photovoltaic module, for reducing the risk of hot spots in the back-contact cell and improving the burn resistance of the back-contact cell.

[0005] In order to achieve the above-mentioned object, in the first aspect, the present invention provides a back contact battery, which includes: a semiconductor substrate, a first doped semiconductor layer, a first interface passivation layer, a second doped semiconductor layer and a transparent conductive layer. The second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types. The semiconductor substrate includes a first surface and a second surface opposite to each other. The first surface includes a first region and a second region that are alternately distributed. The first doped semiconductor layer is arranged on the first region. Along the thickness direction of the semiconductor substrate, the first interface passivation layer and the second doped semiconductor layer are sequentially stacked on the second region and extend to cover part of the first doped semiconductor layer. The transparent conductive layer covers the second doped semiconductor layer. Among them, the edge portion of the first doped semiconductor layer close to the second region is a hole distribution region, and the hole distribution region has a plurality of hole structures that are inwardly concave, and the one-dimensional size of the hole structure is micrometer or nanometer. The second doped semiconductor portion includes a reverse leakage portion, and the reverse leakage portion is electrically connected to the first doped semiconductor layer through at least the portion of the first interface passivation layer covering the hole structure, and the reverse leakage portion is covered with a transparent conductive layer extending from the second region.

[0006] In the case of adopting the above technical solution, when the back contact battery is in working state, the first doped semiconductor layer and the second doped semiconductor layer of opposite conductivity type can effectively shunt the carriers, which is conducive to the formation of photocurrent. The transparent conductive layer covering the second doped semiconductor layer has a high conductivity, which can timely guide the carriers collected by the second doped semiconductor layer, reduce the carrier recombination rate, and help improve the conversion efficiency of the back contact battery.

[0007] Secondly, the above-mentioned second doped semiconductor layer and the first interface passivation layer are not only arranged on the second region, but also extend to cover part of the first doped semiconductor layer. In addition, the edge portion of the first doped semiconductor layer close to the second region is a hole distribution area with a plurality of hole structures. The above-mentioned hole structure is recessed into the first doped semiconductor layer, so that the surface of the area with the hole structure in the hole distribution area has an undulating morphology, which can increase the specific surface area of ​​the hole distribution area. In the actual manufacturing process, due to the same other conditions, the deposited film thickness of the first interface passivation layer is inversely proportional to the specific surface area of ​​the surface on which it is deposited. Therefore, increasing the specific surface area of ​​the hole distribution area is conducive to at least reducing the thickness of the first interface passivation layer covering the side wall of the hole structure. In addition, the one-dimensional size of the hole structure is micrometer-level or nanometer-level. When the first interface passivation layer is formed by a deposition process, the coverage of the first interface passivation layer at the small-sized hole structure is poor, at least reducing the electrical isolation effect of the portion of the first interface passivation layer covering the side wall of the hole structure, so that the second doped semiconductor portion including the reverse leakage portion can be electrically connected to the first doped semiconductor layer through at least the portion of the first interface passivation layer covering the hole structure, reducing the leakage current transmission barrier between the reverse leakage portion and the first doped semiconductor layer. At the same time, the reverse leakage portion is covered with a transparent conductive layer extending from the second region. At this time, the reverse leakage portion of the second doped semiconductor layer can form a built-in diode with a lower reverse breakdown voltage through the portion of the first interface passivation layer at least covering the hole structure and the first doped semiconductor layer. When the back contact battery is blocked, the leakage current can pass through the first doped semiconductor layer, the portion of the first interface passivation layer at least covering the hole structure and the reverse leakage portion of the second doped semiconductor layer, and then through the transparent conductive layer extending from the second area to cover the portion on the reverse leakage portion, and finally be led out through the electrode in contact with the portion of the transparent conductive layer corresponding to the second area, thereby reducing the risk of hot spots of the back contact battery and improving the anti-burning ability of the back contact battery. It should be noted that the reverse leakage portion is electrically connected to the first doped semiconductor layer through the portion of the first interface passivation layer at least covering the hole structure, and this electrical connection method does not include electrical connection achieved through the semiconductor substrate.

[0008] In addition, in the back-contact battery provided by the present invention, the hole distribution area of ​​the first doped semiconductor layer is arranged at the edge portion of the first doped semiconductor layer close to the second area, which is beneficial to control the size of the leakage contact area between the first doped semiconductor layer and the second doped semiconductor layer, so as to reduce the hot spot risk of the back-contact battery while making the back-contact battery have higher conversion efficiency and yield in the forward voltage region.

[0009] As a possible implementation, at least one hole structure is recessed into the first doped semiconductor layer along the thickness direction of the semiconductor substrate. Alternatively, at least one hole structure is recessed into the first doped semiconductor layer along a direction parallel to the first surface and from the boundary between the first region and the second region.

[0010] In the case of adopting the above technical solution, at least one hole structure can be a blind hole-like or through-hole-like hole structure extending along the thickness direction of the semiconductor substrate, or a notch-type hole structure that is recessed into the first doped semiconductor layer from the boundary between the first region and the second region in a direction parallel to the first surface. In this case, the hole structure has at least two instances, which is conducive to reducing the process difficulty of manufacturing the hole structure. At the same time, the sidewall morphology of hole structures with different morphologies is also different. For example, one end of the sidewall of the notch-type hole structure is open, and the area of ​​the first doped semiconductor layer that can be exposed is relatively small, which is conducive to controlling the leakage contact area and reducing the forward leakage loss of the back contact battery. The sidewall of the blind hole-like or through-hole-like hole structure is a surface formed by enclosure, and the area of ​​the first doped semiconductor layer that can be exposed is relatively large, which is conducive to increasing the leakage contact area and further reducing the hot spot risk of the back contact battery. Based on this, the morphology of the hole structure can be set according to actual needs to achieve balanced regulation of the hot spot risk and forward leakage loss of the back contact battery, thereby improving the working performance of the back contact battery.

[0011] As a possible implementation scheme, along the direction from the edge to the center of the first region, the ratio between the width of the hole distribution area and the width of the first doped semiconductor layer is greater than or equal to 1% and less than or equal to 15%.

[0012] When the above technical solution is adopted, along the direction from the edge to the center of the first region, the ratio between the width of the hole distribution area and the width of the first doped semiconductor layer is within the above range, which is conducive to preventing the first interface passivation layer from covering a small proportion of the hole structure due to the small ratio (i.e., the hole distribution area accounts for too small a proportion of the first doped semiconductor layer), ensuring that the leakage contact area and leakage current of the first doped semiconductor layer electrically connected to at least the part of the hole structure and the reverse leakage part of the second doped semiconductor layer through the first interface passivation layer are large, further reducing the hot spot risk of the back contact battery. In addition, it can also prevent the above leakage contact area and leakage current from being too large due to the large ratio (i.e., the hole distribution area accounts for too large a proportion of the first doped semiconductor layer), which is conducive to achieving a balanced regulation of the forward leakage loss and hot spot risk of the back contact battery, and is conducive to improving the working performance of the back contact battery.

[0013] As a possible implementation scheme, the width of the hole distribution area is less than 30 μm along the direction from the edge to the center of the first region. In this case, the larger width of the hole distribution area prevents the leakage contact area and leakage current from being too large due to a large number of hole structures distributed in the first doped semiconductor layer, thereby ensuring that the back contact battery has a lower forward leakage loss, which is beneficial to improving the conversion efficiency of the back contact battery.

[0014] As a possible implementation scheme, in the first region, the portion where the first doped semiconductor layer overlaps the second doped semiconductor layer is an overlapping region. Along the direction from the edge to the center of the first region, the ratio between the width of the hole distribution region and the width of the overlapping region is greater than or equal to 5% and less than or equal to 30%. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the ratio between the width of the hole distribution region and the width of the first doped semiconductor layer being greater than or equal to 1% and less than or equal to 15% described above, which will not be repeated here.

[0015] As a possible implementation solution, a one-dimensional size of at least one hole structure is greater than or equal to 100 nm and less than or equal to 3 μm.

[0016] In the case of adopting the above technical solution, it can be understood that, because the hole structure is a structure recessed into the first doped semiconductor layer, the larger its one-dimensional size is, the greater the undulation of the surface of the hole distribution area is, and the larger the specific surface area of ​​the corresponding hole distribution area is. Based on this, when the one-dimensional size of at least one hole structure is within the above range, it is helpful to prevent the difference between the thickness of the first interface passivation layer covering the side wall of the hole structure and the thickness of the first interface passivation layer located in the second area due to the small one-dimensional size of the hole structure, and the small proportion of the first interface passivation layer covering the hole structure, ensuring that the leakage contact area of ​​the first doped semiconductor layer and the second doped semiconductor layer at least covering the hole structure through the first interface passivation layer is large and the leakage transmission barrier is small, which is conducive to further reducing the risk of hot spots. In addition, it can also prevent the forward leakage loss of the first doped semiconductor layer and the second doped semiconductor layer from being too large due to the large one-dimensional size of the hole structure, thereby further improving the conversion efficiency of the back contact battery.

[0017] As a possible implementation solution, the distance between two adjacent hole structures is greater than or equal to 0.5 μm and less than or equal to 30 μm.

[0018] In the case of adopting the above technical solution, when other factors are the same, the larger the spacing between two adjacent hole structures, the smaller the distribution density of the hole structures in the hole distribution area. Based on this, when the spacing between two adjacent hole structures is within the above range, it can prevent the leakage contact area and leakage current of the first doped semiconductor layer and the second doped semiconductor layer being electrically connected through the first interface passivation layer at least covering the portion of the hole structure due to the smaller spacing, thereby reducing the forward leakage loss of the back contact battery and further improving the conversion efficiency of the back contact battery. In addition, it can also prevent the leakage contact area and leakage current of the first doped semiconductor layer and the second doped semiconductor layer being electrically connected through the first interface passivation layer at least covering the portion of the hole structure due to the larger spacing, thereby reducing the risk of hot spots in the back contact battery. In other words, the spacing between two adjacent hole structures is within the above range, which is conducive to achieving a balanced regulation of the forward leakage loss and hot spot risk of the back contact battery, and is conducive to improving the working performance of the back contact battery.

[0019] As a possible implementation scheme, the area of ​​the hole structure in the hole distribution area accounts for less than or equal to 10%. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the spacing between two adjacent hole structures being greater than or equal to 0.5μm and less than or equal to 30μm mentioned above, which will not be repeated here.

[0020] As a possible implementation scheme, the inner sidewall of at least one hole structure is uneven. In this case, the roughness of the surface of the hole distribution area can be further increased, which is conducive to further reducing the thickness and electrical isolation effect of the portion of the first interface passivation layer covering the inner sidewall of the hole structure, thereby reducing the transmission barrier of the first doped semiconductor layer and the second doped semiconductor layer being electrically connected through the first interface passivation layer at least covering the portion of the hole structure, thereby facilitating increasing the leakage current size when the back contact battery is blocked and reducing the risk of hot spots of the back contact battery.

[0021] As a possible implementation scheme, the edge profile of the hole distribution area close to the second region is wavy, sawtooth or comb-shaped.

[0022] In the case of adopting the above technical solution, when other factors are the same, compared with the edge contour of the hole distribution area close to the second area being a straight contour, when the edge contour of the hole distribution area close to the second area is wavy, sawtooth or comb-shaped, the edge contour of the hole distribution area close to the second area is an uneven morphology, which is conducive to increasing the length of the edge contour. Secondly, in the actual manufacturing process, the edge portion of the first doped semiconductor layer close to the second area can be heat-treated by processes such as laser etching to form a hole distribution area. At this time, increasing the edge contour length of the hole distribution area close to the second area can increase the length of the heat-treated portion of the hole distribution area close to the second area, which is conducive to increasing the distribution density of the hole structure, increasing the leakage contact area and leakage current of the first doped semiconductor layer and the second doped semiconductor layer electrically connected through the first interface passivation layer at least covering the portion of the hole structure, which is conducive to further reducing the risk of hot spots in back-contact batteries.

[0023] As a possible implementation scheme, in the first region, the first interface passivation layer is in direct contact with the first doped semiconductor layer. Alternatively, the back contact battery further includes an insulating layer; along the thickness direction of the semiconductor substrate, the insulating layer is disposed between the portion of the first doped semiconductor layer where the hole structure is not disposed and the first interface passivation layer.

[0024] In the case of adopting the above technical solution, when the first interface passivation layer is in direct contact with the first doped semiconductor layer in the first region, there is a large leakage contact area between the first doped semiconductor layer and the second doped semiconductor layer. In addition, the thickness of the first interface passivation layer covering the inner side wall of the hole structure is relatively small, so that the leakage transmission barrier is smaller, which is conducive to further reducing the risk of hot spots in the back contact battery. When the back contact battery also includes an insulating layer arranged between the portion of the first doped semiconductor layer where the hole structure is not arranged and the first interface passivation layer, the portion of the first interface passivation layer covering the hole structure becomes the main leakage channel between the first doped semiconductor layer and the second doped semiconductor layer, realizing the transmission of leakage current when the back contact battery is blocked, reducing the risk of hot spots, and also helping to control the size of the leakage contact area, so that the back contact battery has a higher conversion efficiency.

[0025] As a possible implementation scheme, the degree of crystallization of the hole distribution area is greater than the degree of crystallization of the remaining parts of the first doped semiconductor layer.

[0026] When the above technical solution is adopted, the hole distribution area is electrically connected to the second doped semiconductor layer of the opposite conductivity type to itself. When the back contact battery is blocked, there will be a reverse leakage current between the hole distribution area and the reverse leakage part of the second doped semiconductor layer. In addition, the degree of crystallization of the hole distribution area will affect its own conductivity. Specifically, the higher the degree of crystallization of the hole distribution area, the stronger its own conductivity. Based on this, when the degree of crystallization of the hole distribution area is greater than the degree of crystallization of the rest of the first doped semiconductor layer, the hole distribution area has a relatively high conductivity, which is beneficial to increase the leakage current between the hole distribution area and the reverse leakage part when the back contact battery is blocked, thereby helping to reduce the reverse breakdown voltage of the back contact battery, ensuring that the back contact battery has a lower risk of hot spots.

[0027] As a possible implementation scheme, along the direction from the edge to the center of the first region, the first interface passivation layer and the second doped semiconductor layer also extend from above the hole distribution area to cover the rest of the first doped semiconductor layer.

[0028] When adopting the above technical solution, while ensuring that the reverse leakage part covers the hole distribution area so that when the back contact battery is blocked, there is a leakage current of a certain size between the reverse leakage part and the first doped semiconductor layer, ensuring that the back contact battery has a lower risk of hot spots, there is no need to strictly require high manufacturing precision in order to extend the second doped semiconductor layer only to the edge of the hole distribution area away from the second area, thereby reducing the manufacturing difficulty.

[0029] As a possible implementation scheme, along the direction from the edge to the center of the first region, the transparent conductive layer also extends from above the hole distribution area to above the remaining at least part of the second doped semiconductor layer.

[0030] When the above technical solution is adopted, it is ensured that the reverse leakage part can cover the entire width of the hole distribution area of ​​the first doped semiconductor layer along the direction from the edge to the center of the first area, so that when the back contact battery is shielded, there is a certain amount of leakage current between the reverse leakage part and the hole distribution area, ensuring that the back contact battery has a lower risk of hot spots. At the same time, it is not necessary to strictly require high manufacturing precision in order to extend the transparent conductive layer only to the edge of the hole distribution area away from the second area, reducing the manufacturing difficulty.

[0031] As a possible implementation scheme, in the first interface passivation layer, the portion covering the hole distribution area is the first sub-passivation portion, and the portion located in the second area is the second sub-passivation portion. The difference in thickness between the first sub-passivation portion and the second sub-passivation portion is greater than or equal to 0.5nm and less than or equal to 5nm.

[0032] When the above technical solution is adopted, the difference in thickness between the first sub-passivation part and the second sub-passivation part is within the above range, which is conducive to preventing the thickness of the first sub-passivation part from being too large due to the small thickness difference, ensuring that the transmission resistance of the first doped semiconductor layer and the second doped semiconductor layer to be electrically connected through the first sub-passivation part is small, which is conducive to increasing the leakage current between the two, and further reducing the risk of hot spots in the back contact battery. In addition, it is also possible to prevent the thickness of the first sub-passivation part from being too small and / or the thickness of the second sub-passivation part from being too large due to the large thickness difference, ensuring that the back contact battery has a relatively low forward leakage loss between the first doped semiconductor layer and the second doped semiconductor layer under normal working conditions, and the second sub-passivation part has a low transmission resistance, which is conducive to improving the conversion efficiency of the back contact battery. It can be seen that by adjusting the thickness difference between the first sub-passivation part and the second sub-passivation part, the hot spot risk and conversion efficiency of the back contact battery can be balanced and regulated, and the working performance of the back contact battery can be improved.

[0033] As a possible implementation solution, the thickness of the first doped semiconductor layer is greater than 50 nm and less than or equal to 200 nm.

[0034] When the above technical solution is adopted, the thickness of the first doped semiconductor layer is within the above range, which is conducive to preventing the field passivation effect of the first doped semiconductor layer from being low due to the small thickness of the first doped semiconductor layer; it can also prevent the use of large consumables in manufacturing the first doped semiconductor layer due to the large thickness of the first doped semiconductor layer, which is conducive to controlling the manufacturing cost of the back contact battery. In addition, the thickness of the first doped semiconductor layer will affect the junction area of ​​the built-in diode between the hole distribution area and the reverse leakage part of the second doped semiconductor layer, and then affect the leakage contact area between the first doped semiconductor layer and the second doped semiconductor layer. Based on this, when the thickness of the first doped semiconductor layer is within the above range, it can also prevent the leakage current between the first doped semiconductor layer and the second doped semiconductor layer from being too large or too small due to the large or small thickness of the first doped semiconductor layer, effectively regulating the forward leakage loss and reverse breakdown voltage of the back contact battery, so that the back contact battery has higher working performance and lower hot spot risk.

[0035] As a possible implementation scheme, the doping concentration of the dopant in the first doped semiconductor layer and / or the second doped semiconductor layer is greater than or equal to 1E19 cm -3 , and less than or equal to 5E20cm -3 .

[0036] In the case of adopting the above technical solution, the doping concentration of the dopant in at least one of the first doped semiconductor layer and the second doped semiconductor layer is within the above range, which can prevent the low field passivation effect on the semiconductor substrate caused by the low doping concentration of the dopant in the first doped semiconductor layer and / or the second doped semiconductor layer, and ensure that the first side of the back contact battery has a relatively low carrier recombination rate under normal working conditions; at the same time, it is also beneficial to make the first doped semiconductor layer and / or the second doped semiconductor layer have good conductivity, ensuring that the hole distribution area of ​​the first doped semiconductor layer and / or the reverse leakage part of the second doped semiconductor layer have a relatively low transmission resistance when the back contact battery is blocked, which is beneficial to further reduce the reverse breakdown voltage of the back contact battery. In addition, it can also prevent the difficulty of doping the intrinsic semiconductor layer used to manufacture the first doped semiconductor layer and / or the second doped semiconductor layer due to the high doping concentration of the dopant in the first doped semiconductor layer and / or the second doped semiconductor layer, which is beneficial to improve the yield of the back contact battery.

[0037] As a possible implementation solution, the first doped semiconductor layer includes a doped crystalline silicon layer.

[0038] When the above technical solution is adopted, the doped crystalline silicon layer has higher lateral conductivity than the doped amorphous silicon layer. Based on this, when the first doped semiconductor layer includes a doped crystalline silicon layer, it is beneficial to reduce its own carrier lateral transmission loss and reduce the carrier recombination rate. At the same time, it is also beneficial to reduce the transmission loss of the leakage current between the hole distribution area of ​​the first doped semiconductor layer and the reverse leakage part of the second doped semiconductor layer, which is beneficial to further reduce the leakage loss of the back contact battery. Secondly, compared with the doped amorphous silicon layer, the doped crystalline silicon layer also has relatively high thermal stability, which can reduce or even eliminate the thermal effect of the high-temperature laser on the first doped semiconductor layer during the selective etching of the entire layer of the second doped semiconductor layer through the laser etching process, thereby improving the yield of the back contact battery.

[0039] As a possible implementation scheme, the thickness of the second doped semiconductor layer is greater than or equal to 5 nm and less than or equal to 50 nm. The application principle of the beneficial effect in this case is the same as the application principle of the beneficial effect of the first doped semiconductor layer having a thickness greater than or equal to 50 nm and less than or equal to 200 nm as described above, and will not be repeated here.

[0040] As a possible implementation solution, the crystallization rate of the second doped semiconductor layer is less than or equal to 60%.

[0041] In the case of adopting the above technical solution, it can be understood that the degree of crystallization of the second doped semiconductor layer will affect its own conductivity, and then affect the leakage loss of the back contact battery under normal working conditions, and the reverse breakdown voltage of the back contact battery when it is blocked. Based on this, when the degree of crystallization of the second doped semiconductor layer is within the above range, the degree of crystallization of the second doped semiconductor layer has a larger optional range. At this time, when the back contact battery provided by the present invention is set in an installation environment with fewer obstructions such as bird droppings, leaves or dust, the degree of crystallization of the second doped semiconductor layer can be set within a smaller range to reduce the recombination rate of carriers of opposite conductivity types between the first doped semiconductor layer and the second doped semiconductor layer, thereby facilitating the reduction of the leakage loss of the back contact battery in the forward voltage region, and ensuring that the back contact battery has a higher conversion efficiency. When the back contact battery provided by the invention is set in an installation environment with more obstructions such as bird droppings, leaves or dust, the degree of crystallization of the second doped semiconductor layer can be set within a larger range to improve the conductivity of the second doped semiconductor layer, thereby facilitating the reduction of the reverse breakdown voltage of the back contact battery, and ensuring that the back contact battery has a lower risk of hot spots. It can be seen that the crystallization degree of the second doped semiconductor layer can be set according to different environmental requirements, thereby improving the applicability of the back contact battery provided by the present invention in different practical application scenarios.

[0042] As a possible implementation solution, the conductivity of the second doped semiconductor layer is greater than or equal to 10E-5 S / cm and less than or equal to 1 S / cm.

[0043] In the case of adopting the above technical solution, it can be understood that the conductivity of the second doped semiconductor layer directly affects its own conductivity. The conductivity of the second doped semiconductor layer will affect the leakage loss of the back contact battery under normal working conditions, as well as the reverse breakdown voltage of the back contact battery when it is blocked. Based on this, when the conductivity of the second doped semiconductor layer is within the above range, it can prevent the forward leakage loss of the back contact battery from being large due to the large conductivity of the second doped semiconductor layer, which makes the conductivity of the second doped semiconductor layer too high; in addition, it can also prevent the reverse breakdown voltage of the back contact battery from being high due to the small conductivity of the second doped semiconductor layer, which makes the conductivity of the second doped semiconductor layer too low, which further helps to balance the reverse breakdown voltage and conversion efficiency of the back contact battery.

[0044] As a possible implementation scheme, the crystallization rate of the first interface passivation layer is less than or equal to 60%. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the crystallization rate of the second doped semiconductor layer being less than or equal to 60% described above, which will not be repeated here.

[0045] As a possible implementation solution, the thickness of the transparent conductive layer is greater than or equal to 10 nm and less than or equal to 150 nm.

[0046] When the above technical solution is adopted, within a certain range, the thickness of the transparent conductive layer is proportional to its own conductivity. Based on this, when the thickness of the transparent conductive layer is within the above range, it can prevent the carrier recombination rate on the first side of the back contact battery from being high due to its poor conductivity due to its small thickness, and the transparent conductive layer from having a high transmission resistance to leakage current when the back contact battery is blocked, thereby ensuring that the back contact battery has a high conversion efficiency and a low risk of hot spots. In addition, it is also beneficial to prevent the use of a large amount of consumables for the transparent conductive layer due to the large thickness of the transparent conductive layer, which is beneficial to controlling the manufacturing cost of the back contact battery.

[0047] As a possible implementation scheme, the material of the first doped semiconductor layer includes polycrystalline silicon and / or monocrystalline silicon, and the material of the second doped semiconductor layer includes at least one of amorphous silicon, microcrystalline silicon and nanocrystalline silicon. The second doped semiconductor layer is divided into a high crystallization region and a low crystallization region. The degree of crystallization of the portion of the second doped semiconductor layer located in the low crystallization region is less than the degree of crystallization of the portion of the second doped semiconductor layer located in the high crystallization region. In the second doped semiconductor layer, at least the reverse leakage portion is located in the low crystallization region, and at least a portion of the corresponding second region is located in the high crystallization region.

[0048] In the case of adopting the above technical solution, it can be understood that when the back contact battery is in normal working state, the part of the second doped semiconductor layer located in the second area needs to collect and guide out the carriers of the corresponding conductive type generated in the semiconductor substrate to facilitate the formation of photocurrent. The reverse leakage part of the second doped semiconductor layer is electrically connected to the first doped semiconductor layer of the opposite conductive type. When the back contact battery is in normal working state, the reverse leakage part of the second doped semiconductor layer will at least have leakage current with the hole distribution area in the first doped semiconductor layer. Secondly, under the same conditions of other factors, when the degree of crystallization of the doped semiconductor layer is smaller, the grains in the doped semiconductor layer are smaller, and even the disorder of amorphous semiconductor materials is presented. The smaller the grains in the doped semiconductor layer and / or the fewer the number of grains, the more interfaces between the grains in the doped semiconductor layer, so the resistance of the grain interface will be larger. In the above case, when the crystallization degree of at least a portion of the second doped semiconductor layer located in the second region is set to be greater than the crystallization degree of the reverse leakage portion of the second doped semiconductor layer, the conductivity of at least a portion of the second doped semiconductor layer located in the second region will be greater, which is conducive to reducing the transmission loss of at least a portion of the second doped semiconductor layer located in the second region, and reducing the contact resistance between at least a portion of the second doped semiconductor layer located in the second region and the transparent conductive layer. The crystallization degree of the reverse leakage portion of the second doped semiconductor layer is relatively low, and the conductivity of the reverse leakage portion of the second doped semiconductor layer is relatively low, which is conducive to reducing the magnitude of the forward leakage loss between at least the reverse leakage portion of the second doped semiconductor layer and the hole distribution area of ​​the first doped semiconductor layer, and further improving the conversion efficiency of the back contact battery.

[0049] As a possible implementation, the low crystallization region is located in the first region. Alternatively, along the arrangement direction of the first region and the second region, one side edge of the low crystallization region is located in the first region and the other side edge extends to the second region.

[0050] In the case of adopting the above technical solution, since the hole distribution area of ​​the first doped semiconductor layer is located in the first area, and the reverse leakage part of the second doped semiconductor layer covers the hole distribution area, when the low crystallization area is located in the first area, it can ensure that the conductivity of each area of ​​the reverse leakage part is small, effectively control the size of the forward leakage loss between the reverse leakage part and the hole distribution area, and help improve the conversion efficiency of the back contact battery. In addition, when along the arrangement direction of the first area and the second area, one side edge of the low crystallization area is located in the first area and the other side edge extends to the second area, it is beneficial to prevent the above operation from affecting the reverse leakage part of the second doped semiconductor layer while making at least part of the second area corresponding to the second area located in the high crystallization area by laser processing or the like, and ensure that the reverse leakage part of the second doped semiconductor layer has a small conductivity while reducing the requirements for the processing accuracy.

[0051] In a second aspect, the present invention provides a photovoltaic module, which includes a back-contact cell provided by the first aspect and various implementations thereof.

[0052] The beneficial effects of the second aspect of the present invention and its various implementations can be analyzed by referring to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0053] In a third aspect, the present invention provides a method for manufacturing a back-contact battery, the method for manufacturing a back-contact battery comprising: first, providing a semiconductor substrate. The semiconductor substrate comprises a first surface and a second surface opposite to each other. The first surface comprises a first region and a second region that are alternately distributed. Next, a first doped semiconductor layer disposed on the first region is formed. Next, along the thickness direction of the semiconductor substrate, a first interface passivation layer and a second doped semiconductor layer are formed, which are sequentially stacked on the second region and extend to cover part of the first doped semiconductor layer. The conductivity type of the second doped semiconductor layer is opposite to that of the first doped semiconductor layer. Next, a transparent conductive layer is formed covering the second doped semiconductor layer. Among them, the edge portion of the first doped semiconductor layer close to the second region is a hole distribution region, the hole distribution region has a plurality of hole structures that are inwardly concave, and the one-dimensional size of the hole structure is micrometer-level or nanometer-level. The second doped semiconductor portion comprises a reverse leakage portion, the reverse leakage portion is electrically connected to the first doped semiconductor layer through at least the portion of the first interface passivation layer covering the hole structure, and the reverse leakage portion is covered with a transparent conductive layer extending from the second region.

[0054] As a possible implementation scheme, forming a first doped semiconductor layer disposed on the first region includes: sequentially forming a first doped semiconductor layer and a mask layer disposed on the first surface. Next, using a laser etching process, removing a portion of the mask layer located in the second region and a portion of the first doped semiconductor layer located in the second region, and forming a hole structure.

[0055] The beneficial effects of the third aspect of the present invention and its various implementations can be analyzed by referring to the beneficial effects of the first aspect and its various implementations, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0057] Figure 1 A schematic longitudinal cross-sectional view of the structure of a back contact battery provided in an embodiment of the present invention Figure 1 ;

[0058] Figure 2 A local optical microscope image of the overlapping portion of the first doped semiconductor layer and the second doped semiconductor layer in the back contact battery provided by an embodiment of the present invention;

[0059] Figure 3 A local SEM image of the overlapping portion of the first doped semiconductor layer and the second doped semiconductor layer in the back contact battery provided by an embodiment of the present invention;

[0060] Figure 4 A schematic longitudinal cross-sectional view of the structure of a back contact battery provided in an embodiment of the present invention Figure 2 ;

[0061] Figure 5 A schematic longitudinal cross-sectional view of the structure of a back contact battery provided in an embodiment of the present invention Figure 3 ;

[0062] Figure 6 A schematic longitudinal cross-sectional view of the structure of a back contact battery provided in an embodiment of the present invention Figure 4 ;

[0063] Figure 7 A schematic longitudinal cross-sectional view of the structure of a back contact battery provided in an embodiment of the present invention Figure 5 ;

[0064] Figure 8 A schematic longitudinal cross-sectional view of the structure of a back contact battery provided in an embodiment of the present invention Figure 6 ;

[0065] Fig. 9A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 1 ;

[0066] Fig.10 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 2 ;

[0067] Fig.11 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 3 ;

[0068] Fig.12 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 4 ;

[0069] Fig.13 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 5 ;

[0070] Fig.14 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 6 ;

[0071] Fig.15 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 7 ;

[0072] Fig.16 A schematic longitudinal cross-sectional view of the structure of a back contact cell during the manufacturing process provided by an embodiment of the present invention Figure 8 .

[0073] Figure numerals: 11 is a semiconductor substrate, 12 is a first doped semiconductor layer, 13 is a first interface passivation layer, 14 is a second doped semiconductor layer, 15 is a transparent conductive layer, 16 is a first region, 17 is a second region, 18 is a reverse leakage portion, 19 is a hole distribution region, 20 is a hole structure, 21 is an insulating layer, 22 is a first sub-passivation portion, 23 is a second sub-passivation portion, 24 is a third sub-passivation portion, 25 is a second interface passivation layer, 26 is an insulating groove, 27 is a first electrode, 28 is a second electrode, and 29 is a mask layer. DETAILED DESCRIPTION

[0074] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present invention. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of the concept of the present invention.

[0075] Various structural schematic diagrams according to embodiments of the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for a clearer expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0076] In the context of the present invention, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be an intermediate layer / element between them. In addition, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "under" the other layer / element. In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0077] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined. The meaning of "several" is one or more, unless otherwise clearly and specifically defined.

[0078] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0079] In a first aspect, an embodiment of the present invention provides a back contact battery. Figures 1 to 3As shown, the back contact battery includes: a semiconductor substrate 11, a first doped semiconductor layer 12, a first interface passivation layer 13, a second doped semiconductor layer 14 and a transparent conductive layer 15. The conductivity type of the second doped semiconductor layer 14 is opposite to that of the first doped semiconductor layer 12. The semiconductor substrate 11 includes a first surface and a second surface opposite to each other. The first surface includes a first region 16 and a second region 17 that are alternately distributed. The first doped semiconductor layer 12 is disposed on the first region 16. Along the thickness direction of the semiconductor substrate 11, the first interface passivation layer 13 and the second doped semiconductor layer 14 are sequentially stacked on the second region 17 and extend to cover part of the first doped semiconductor layer 12. The transparent conductive layer 15 covers the second doped semiconductor layer 14. Among them, the edge portion of the first doped semiconductor layer 12 close to the second region 17 is a hole distribution area 19, and the hole distribution area 19 has a plurality of hole structures 20 that are concave inward, and the one-dimensional size of the hole structure 20 is micrometer level or nanometer level. The second doped semiconductor portion includes a reverse leakage portion 18 , which is electrically connected to the first doped semiconductor layer 12 through at least the portion of the first interface passivation layer 13 covering the hole structure 20 , and is covered with a transparent conductive layer 15 extending from the second region 17 .

[0080] When the above technical solution is adopted, when the back contact battery is in working state, the first doped semiconductor layer and the second doped semiconductor layer with opposite conductivity types can effectively shunt the carriers, which is conducive to the formation of photocurrent. The transparent conductive layer covering the second doped semiconductor layer has a high conductivity, which can timely guide the carriers collected by the second doped semiconductor layer, reduce the carrier recombination rate, and help improve the conversion efficiency of the back contact battery. Figures 1 to 3As shown, secondly, the second doped semiconductor layer 14 and the first interface passivation layer 13 are not only arranged on the second region 17, but also extend to cover part of the first doped semiconductor layer 12. In addition, the edge portion of the first doped semiconductor layer 12 close to the second region 17 is a hole distribution area 19 having a plurality of hole structures 20. The hole structure 20 is recessed into the first doped semiconductor layer 12, so that the surface of the hole distribution area 19 having the hole structure 20 has an undulating morphology, which can increase the specific surface area of ​​the hole distribution area 19. In the actual manufacturing process, due to the same other conditions, the deposited film thickness of the first interface passivation layer 13 is inversely proportional to the specific surface area of ​​the surface on which it is deposited. Therefore, increasing the specific surface area of ​​the hole distribution area 19 is conducive to at least reducing the thickness of the first interface passivation layer 13 covering the side wall of the hole structure 20. In addition, the one-dimensional size of the hole structure 20 is micrometer-level or nanometer-level. When the first interface passivation layer 13 is formed by a deposition process, the coverage of the first interface passivation layer 13 at the small-sized hole structure 20 is poor, which at least reduces the electrical isolation effect of the portion of the first interface passivation layer 13 covering the side wall of the hole structure 20, so that the second doped semiconductor portion including the reverse leakage portion 18 can be electrically connected to the first doped semiconductor layer 12 through the portion of the first interface passivation layer 13 at least covering the hole structure 20, thereby reducing the leakage current transmission barrier between the reverse leakage portion 18 and the first doped semiconductor layer 12. At the same time, the reverse leakage portion 18 is covered with a transparent conductive layer 15 extending from the second region 17. At this time, the reverse leakage portion 18 of the second doped semiconductor layer 14 can form a built-in diode with a lower reverse breakdown voltage through at least the portion of the first interface passivation layer 13 covering the hole structure 20 and the first doped semiconductor layer 12. When the back contact battery is blocked, the leakage current (it should be emphasized that for the sake of convenience and clear description, when the transmission mode of the leakage current mentioned in the embodiment of the present invention not only includes its own transmission path, but also includes its own transmission direction, but it does not mean that the transmission direction of the leakage current can only be a single direction in the description. When the conductive layer of the first doped semiconductor layer 12 and the second doped semiconductor layer 14 is blocked, the leakage current is not only blocked, but also includes the conductive layer of the first doped semiconductor layer 12 and the conductive layer of the second doped semiconductor layer 14. When the type changes, the transmission direction of the leakage current can also be opposite to the direction in the description, that is, in the embodiment of the present invention, only the transmission path of the leakage current is limited, and the transmission direction of the leakage current is not limited) can pass through the first doped semiconductor layer 12, the first interface passivation layer 13 at least covering the portion of the hole structure 20 and the reverse leakage portion 18 of the second doped semiconductor layer 14, and then through the transparent conductive layer extending from the second area 17 to cover the portion on the reverse leakage portion 18, and finally through the electrode in contact with the portion of the transparent conductive layer 15 corresponding to the second area 17 to be extracted, thereby reducing the risk of hot spots of the back contact battery and improving the anti-burning ability of the back contact battery.It should be noted that the reverse leakage portion 18 is electrically connected to the first doped semiconductor layer 12 through the first interface passivation layer 13 at least covering the portion of the hole structure 20, and the electrical connection method does not include the electrical connection achieved through the semiconductor substrate 11. In addition, in the back contact battery provided by the embodiment of the present invention, the hole distribution area 19 of the first doped semiconductor layer 12 is arranged at the edge of the first doped semiconductor layer 12 close to the second area 17, which is conducive to controlling the size of the leakage contact area between the first doped semiconductor layer 12 and the second doped semiconductor layer 14, so as to reduce the risk of hot spots of the back contact battery while making the back contact battery have higher conversion efficiency and yield in the forward voltage region.

[0081] In actual application, the embodiment of the present invention does not specifically limit the material and conductivity type of the semiconductor substrate. For example, the semiconductor substrate may be a silicon substrate. Alternatively, the semiconductor substrate may be a substrate made of any semiconductor material such as a germanium silicon substrate, a germanium substrate or a gallium arsenide substrate. Secondly, the semiconductor substrate may be an N-type semiconductor substrate or a P-type semiconductor substrate.

[0082] Secondly, the semiconductor substrate includes a first surface and a second surface that are opposite to each other, the first surface of the semiconductor substrate corresponds to the backlight surface of the back contact battery, and the second surface of the semiconductor substrate corresponds to the light-facing surface of the back contact battery. Among them, the distribution of the first area and the second area on the first surface can be determined according to the distribution of the first doped semiconductor layer and the second doped semiconductor layer formed on one side of the first surface. Specifically, since the first doped semiconductor layer included in the back contact battery is arranged in the first area, the distribution range of the first area on the first surface can be determined according to the distribution requirements of the first doped semiconductor layer in the actual application scenario. Since part of the second doped semiconductor layer included in the back contact battery is arranged on the second area of ​​the first surface, the distribution range of the second area on the first surface can be determined according to the distribution requirements of the second doped semiconductor layer on the semiconductor substrate in the actual application scenario.

[0083] It can be understood that the first region corresponds to the first emitter region, and the second region corresponds to the second emitter region. One of the first region and the second region is a P region, and the other is an N region.

[0084] The morphology of the first region and the second region can be set according to actual needs, as long as they can be applied to the back contact battery provided by the embodiment of the present invention. For example, the first region and the second region can be alternately distributed in strips or in interdigitated shapes.

[0085] In terms of surface morphology, Figure 1 As shown, the first surface and the second surface of the semiconductor substrate 11 may be polished surfaces. Figure 4As shown, the second surface of the semiconductor substrate 11 may also be a velvet surface to improve the light trapping effect of the second surface and improve the utilization rate of the semiconductor substrate 11 for light.

[0086] Secondly, the surfaces of the first area and the second area of ​​the first surface may be flush. Figure 5 As shown, a groove recessed into the semiconductor substrate 11 may also be formed in the second region 17; at this time, along the direction from the second surface to the first surface, the surface height of the groove portion is less than the surface height of the first region 16, so as to ensure that in the actual manufacturing process, after the entire deposited first doped semiconductor layer 12 is selectively etched, the first doped semiconductor layer 12 will no longer remain on the surface of the second region 17 of the semiconductor substrate 11, thereby preventing a short circuit.

[0087] Among them, Figure 1 As shown, the surfaces of the first region 16 and the second region 17 may both be polished surfaces. Figure 5 As shown, the surface of the first region 16 may be a polished surface, and the bottom surface of the groove may be a velvet surface. In this case, the surface of the first region 16 is a flat surface, and the surface roughness of the first region 16 is relatively small, which is conducive to making the first doped semiconductor layer 12 deposited on the surface of the first region 16 have a larger film thickness, and is conducive to making the inner side wall of the hole distribution area 19 of the first doped semiconductor layer 12 and the reverse leakage part 18 of the second doped semiconductor layer 14 have a larger contact area, which is conducive to further reducing the risk of hot spots of the back contact battery. In addition, a groove is formed in the second region 17, which is concave into the semiconductor substrate 11, and the bottom surface of the groove is a velvet surface. At this time, the part of the second doped semiconductor layer 14 disposed on the bottom surface of the groove, and its side away from the semiconductor substrate 11 also has a undulating morphology substantially the same as the velvet surface, which is conducive to increasing the contact area between the second doped semiconductor layer 14 and the transparent conductive layer 15, reducing transmission loss, and improving the conversion efficiency of the back contact battery. Furthermore, the hole distribution area 19 is close to the second region 17, and the reverse leakage part 18 covers the hole distribution area 19. Based on this, when the back contact battery is blocked, the reverse leakage current will be transmitted through the hole distribution area 19 and the reverse leakage part 18, where the heat is relatively high. In this case, the second area 17 adjacent to the side wall of the hole distribution area 19 is provided with a groove, so that other structures such as the second doped semiconductor layer 14 provided on the second area 17 can be staggered with the hole distribution area 19 along the thickness direction of the semiconductor substrate 11, preventing heat from accumulating inside the battery and facilitating heat dissipation.

[0088] For the first doped semiconductor layer, in terms of the conductivity type, the embodiment of the present invention does not specifically limit the conductivity type of the first doped semiconductor layer, as long as the conductivity types of the first doped semiconductor layer and the second doped semiconductor layer are opposite. Specifically, the conductivity type of the first doped semiconductor layer can be N-type, in which case the conductivity type of the second doped semiconductor layer is P-type; or the conductivity type of the first doped semiconductor layer can also be P-type, in which case the conductivity type of the second doped semiconductor layer is N-type.

[0089] In terms of materials, the material of the first doped semiconductor layer may include any semiconductor material such as silicon, silicon germanium, germanium or gallium arsenide. In terms of the arrangement of the material, the crystal phase of the first doped semiconductor layer may be amorphous, microcrystalline, nanocrystalline, single crystal or polycrystalline.

[0090] Optionally, the first doped semiconductor layer includes a doped crystalline silicon layer. The doped crystalline silicon layer may include a doped polycrystalline silicon layer and / or a doped single crystal silicon layer. In this case, compared with the doped amorphous silicon layer, the doped crystalline silicon layer has higher lateral conductivity. Based on this, when the first doped semiconductor layer includes a doped crystalline silicon layer, it is beneficial to reduce its own carrier lateral transmission loss and reduce the carrier recombination rate. At the same time, it is also beneficial to reduce the transmission loss of the leakage current between the hole distribution area of ​​the first doped semiconductor layer and the reverse leakage part of the second doped semiconductor layer, which is beneficial to further reduce the leakage loss of the back contact battery. Secondly, compared with the doped amorphous silicon layer, the doped crystalline silicon layer also has a relatively high thermal stability, which can reduce or even eliminate the thermal effect of the high-temperature laser on the first doped semiconductor layer during the selective etching of the entire layer of the second doped semiconductor layer by the laser etching process, thereby improving the yield of the back contact battery.

[0091] In terms of the formation position, Figure 1 As shown, the first doped semiconductor layer 12 may be directly disposed on the first region 16. Alternatively, as shown in FIG. Figure 5As shown, the above-mentioned back contact cell may also include a second interface passivation layer 25 located between the first doped semiconductor layer 12 and the semiconductor substrate 11. In this case, the passivation contact structure composed of the second interface passivation layer 25 and the first doped semiconductor layer 12 has an excellent interface passivation effect, and can realize the selective collection of carriers, reduce the carrier recombination rate of the first region 16 of the first surface of the semiconductor substrate 11, and further improve the photoelectric conversion efficiency of the back contact cell. The material and thickness of the second interface passivation layer 25 can be set according to the material of the first doped semiconductor layer 12 and actual needs, and are not specifically limited here. For example: when the material of the first doped semiconductor layer is doped polycrystalline silicon, the second interface passivation layer is a tunneling passivation layer. For another example: when the material of the first doped semiconductor layer includes at least one of doped amorphous silicon, doped microcrystalline silicon and doped nanocrystalline silicon, the second interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon layer or a mixed layer of the above three.

[0092] Exemplarily, the thickness of the first doped semiconductor layer is greater than 50nm and less than or equal to 200nm. For example, the thickness of the first doped semiconductor layer can be 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, 120nm, 150nm, 180nm or 200nm, etc. In this case, the thickness of the first doped semiconductor layer is within the above range, which is conducive to preventing the field passivation effect of the first doped semiconductor layer from being low due to the small thickness of the first doped semiconductor layer; it can also prevent the use of consumables for manufacturing the first doped semiconductor layer from being large due to the large thickness of the first doped semiconductor layer, which is conducive to controlling the manufacturing cost of the back contact battery. In addition, the thickness of the first doped semiconductor layer will affect the junction area of ​​the built-in diode between the hole distribution area and the reverse leakage part of the second doped semiconductor layer, and then affect the leakage contact area between the first doped semiconductor layer and the second doped semiconductor layer. Based on this, when the thickness of the first doped semiconductor layer is within the above range, it can also prevent the leakage current between the first doped semiconductor layer and the second doped semiconductor layer from being too large or too small due to the thickness of the first doped semiconductor layer being larger or smaller, thereby effectively regulating the forward leakage loss and reverse breakdown voltage of the back contact battery, so that the back contact battery has higher working performance and lower hot spot risk.

[0093] Exemplarily, the doping concentration of the dopant in the first doped semiconductor layer is greater than or equal to 1E19 cm -3 , and less than or equal to 5E20cm -3 For example, the doping concentration of the dopant in the first doped semiconductor layer may be 1E19 cm -3 、2E19cm -3 、4E19cm -3 、6E19cm -3、8E19cm -3 、1E20cm -3 、3E20cm -3 or 5E20cm -3 Etc. In this case, the doping concentration of the dopant in the first doped semiconductor layer is within the above range, which can prevent the low field passivation effect on the semiconductor substrate caused by the low doping concentration of the dopant in the first doped semiconductor layer, and ensure that the first side of the back contact battery has a relatively low carrier recombination rate under normal working conditions; at the same time, it is also conducive to making the first doped semiconductor layer have good conductivity, ensuring that the hole distribution area of ​​the first doped semiconductor layer has a relatively low transmission resistance when the back contact battery is blocked, which is conducive to further reducing the reverse breakdown voltage of the back contact battery. In addition, it can also prevent the difficulty of doping the intrinsic semiconductor layer used to manufacture the first doped semiconductor layer due to the high doping concentration of the dopant in the first doped semiconductor layer, which is conducive to improving the yield of the back contact battery.

[0094] In addition, it can be understood that because the reverse leakage portion of the second doped semiconductor layer covers the hole distribution area of ​​the first doped semiconductor layer, the width of the hole distribution area along the edge to the center of the first area may affect the size of the leakage contact area between the first doped semiconductor layer and the second doped semiconductor layer, thereby affecting the forward leakage loss and reverse breakdown voltage of the back contact battery. Based on this, the width of the hole distribution area along the edge to the center of the first area can be determined according to the requirements of the conversion efficiency and hot spot risk of the back contact battery in the actual application scenario, and no specific limitation is made here.

[0095] Exemplarily, along the direction from the edge to the center of the first region, the ratio between the width of the hole distribution area and the width of the first doped semiconductor layer is greater than or equal to 1% and less than or equal to 15%. For example, the ratio between the width of the hole distribution area and the width of the first doped semiconductor layer can be 1%, 2%, 3%, 5%, 8%, 10%, 12%, 13% or 15%, etc. In this case, along the direction from the edge to the center of the first region, the ratio between the width of the hole distribution area and the width of the first doped semiconductor layer is within the above range, which helps to prevent the first interface passivation layer from covering a small proportion of the hole structure due to the small ratio (i.e., the proportion of the hole distribution area in the first doped semiconductor layer is too small), ensuring that the leakage contact area and leakage current of the first doped semiconductor layer electrically connected to at least the part of the hole structure covered by the first interface passivation layer and the reverse leakage part of the second doped semiconductor layer are large, further reducing the risk of hot spots of the back contact battery. In addition, it can also prevent the leakage contact area and leakage current from being too large due to the large ratio (that is, the proportion of the hole distribution area in the first doped semiconductor layer is too large), which is beneficial to achieve balanced regulation of the forward leakage loss and hot spot risk of the back contact battery, and is beneficial to improving the working performance of the back contact battery.

[0096] Exemplarily, in the first region, the portion where the first doped semiconductor layer overlaps the second doped semiconductor layer is the overlapping region. Along the direction from the edge to the center of the first region, the ratio between the width of the hole distribution region and the width of the overlapping region is greater than or equal to 5% and less than or equal to 30%. For example: the ratio between the width of the hole distribution region and the width of the overlapping region can be 5%, 10%, 15%, 20%, 25% or 30%, etc. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the ratio between the width of the hole distribution region and the width of the first doped semiconductor layer being greater than or equal to 1% and less than or equal to 15% described above, which will not be repeated here.

[0097] Exemplarily, along the direction from the edge to the center of the first region, the width of the hole distribution area is less than 30 μm. For example, the width of the hole distribution area can be 1 μm, 5 μm, 8 μm, 10 μm, 15 μm, 20 μm, 25 μm or 30 μm, etc. In this case, the leakage contact area and leakage current are prevented from being too large due to a large number of hole structures distributed in the first doped semiconductor layer due to the large width of the hole distribution area, ensuring that the back contact battery has a lower forward leakage loss, which is conducive to improving the conversion efficiency of the back contact battery.

[0098] As for the morphology, size and distribution of the hole structure in the hole distribution area, they can be determined based on the requirements for the conversion efficiency and hot spot risk of the back contact battery in the actual application scenario, and no specific limitation is made here.

[0099] Specifically, Figure 3 As shown, at least one hole structure 20 can be recessed into the first doped semiconductor layer 12 along the thickness direction of the semiconductor substrate 11. Figure 3 As shown, at least one hole structure 20 can be recessed into the first doped semiconductor layer 12 along a direction parallel to the first surface and from the boundary between the first region 16 and the second region 17. In this case, at least one hole structure 20 can be a blind hole-like or through-hole-like hole structure extending along the thickness direction of the semiconductor substrate 11, or a notch-type hole structure recessed into the first doped semiconductor layer 12 along a direction parallel to the first surface and from the boundary between the first region 16 and the second region 17. In this case, the hole structure 20 has at least two instances, which is conducive to reducing the process difficulty of manufacturing the hole structure 20. At the same time, the sidewall morphology of the hole structures 20 with different morphologies is also different. For example, one end of the sidewall of the notch-type hole structure 20 is open, and the area of ​​the first doped semiconductor layer 12 that can be exposed is relatively small, which is conducive to controlling the leakage contact area and reducing the forward leakage loss of the back contact battery. The sidewall of the blind hole or through hole type hole structure is a surface formed by enclosure, and the area of ​​the first doped semiconductor layer 12 that can be exposed is relatively large, which is conducive to increasing the leakage contact area and further reducing the hot spot risk of the back contact battery. Based on this, the morphology of the hole structure 20 can be set according to actual needs to achieve a balanced regulation of the hot spot risk and forward leakage loss of the back contact battery, thereby improving the working performance of the back contact battery.

[0100] Exemplarily, the one-dimensional size of at least one hole structure may be greater than or equal to 100 nm and less than or equal to 3 μm. For example, the one-dimensional size of at least one hole structure may be 100 nm, 300 nm, 500 nm, 800 nm, 1 μm, 1.5 μm, 2 μm, 2.5 μm or 3 μm, etc. In this case, it can be understood that, because the hole structure is a structure recessed into the first doped semiconductor layer, the larger its one-dimensional size, the greater the undulation of the surface of the hole distribution area, and the larger the specific surface area of ​​the corresponding hole distribution area. Based on this, when the one-dimensional size of at least one hole structure is within the above range, it is helpful to prevent the difference between the thickness of the first interface passivation layer covering the side wall of the hole structure and the thickness of the first interface passivation layer in the second area due to the small one-dimensional size of the hole structure, and the first interface passivation layer covering the hole structure. The proportion of the portion is small, ensuring that the leakage contact area of ​​the first doped semiconductor layer and the second doped semiconductor layer is large and the leakage transmission barrier is small when the first interface passivation layer covers at least the portion of the hole structure to achieve electrical connection, which is conducive to further reducing the risk of hot spots. In addition, it can also prevent the forward leakage loss of the first doped semiconductor layer and the second doped semiconductor layer from being too large when the first interface passivation layer covers at least the portion of the hole structure due to the large one-dimensional size of the hole structure, and further improve the conversion efficiency of the back contact battery. Among them, the one-dimensional size of the hole structure can refer to the maximum value of the distance between two different points on the hole mouth contour of the hole structure along the direction parallel to the first surface, or it can be the recessed depth of the hole structure. Secondly, the one-dimensional sizes of different hole structures can be the same or different. Some positions between hole structures of different one-dimensional sizes can be randomly set.

[0101] Exemplarily, the spacing between two adjacent hole structures can be greater than or equal to 0.5 μm and less than or equal to 30 μm. For example, the spacing between two adjacent hole structures can be 0.5 μm, 1 μm, 5 μm, 10 μm, 15 μm, 20 μm, 25 μm or 30 μm, etc. In this case, when other factors are the same, the larger the spacing between two adjacent hole structures, the smaller the distribution density of the hole structures in the hole distribution area. Based on this, when the spacing between two adjacent hole structures is within the above range, it can prevent the leakage contact area and leakage current of the first doped semiconductor layer and the second doped semiconductor layer being electrically connected through at least the portion of the hole structure covered by the first interface passivation layer from being too large due to the smaller spacing, thereby reducing the forward leakage loss of the back contact battery and further improving the conversion efficiency of the back contact battery. Furthermore, it can also prevent the leakage contact area and leakage current of the first doped semiconductor layer and the second doped semiconductor layer being electrically connected through at least the portion of the hole structure covered by the first interface passivation layer from being too small due to the relatively large distribution density of the hole structure, thereby reducing the risk of hot spots in the back contact battery. In other words, the spacing between two adjacent hole structures within the above range is conducive to achieving a balanced regulation of the forward leakage loss and hot spot risk of the back contact battery, and is conducive to improving the working performance of the back contact battery. The spacing between two adjacent hole structures can be the same or different.

[0102] For example, the area of ​​the hole structure in the hole distribution area accounts for less than or equal to 10%. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the spacing between two adjacent hole structures being greater than or equal to 0.5μm and less than or equal to 30μm described above, which will not be repeated here.

[0103] In addition, the inner side wall of at least one hole structure may be a smooth inner side wall, or Figure 3 As shown, the inner side wall of at least one hole structure 20 may also be uneven. In this case, the roughness of the surface of the hole distribution area 19 can be further increased, which is conducive to further reducing the thickness and electrical isolation effect of the portion of the first interface passivation layer 13 covering the inner side wall of the hole structure 20, thereby reducing the transmission barrier of the first doped semiconductor layer 12 and the second doped semiconductor layer 14 being electrically connected through the first interface passivation layer 13 at least covering the portion of the hole structure 20, thereby facilitating increasing the leakage current size when the back contact battery is blocked and reducing the risk of hot spots of the back contact battery. Specifically, when the inner side wall of at least one hole structure 20 is uneven, the specific undulating morphology of the inner side wall of the hole structure 20 can be determined according to the actual manufacturing process and the actual application scenario, and is not specifically limited here.

[0104] As for the edge contour of the hole distribution area close to the second area, it can be straight line, curved line or broken line. Figure 2 and Figure 3 As shown, the edge profile of the hole distribution area 19 close to the second area can be wavy, sawtooth or comb-shaped. In this case, when other factors are the same, compared with the edge profile of the hole distribution area 19 close to the second area being a straight line profile, when the edge profile of the hole distribution area 19 close to the second area is wavy, sawtooth or comb-shaped, the edge profile of the hole distribution area 19 close to the second area is an uneven morphology, which is conducive to increasing the length of the edge profile. Secondly, in the actual manufacturing process, the edge portion of the first doped semiconductor layer close to the second area can be heat-treated by laser etching and other processes to form the hole distribution area 19. At this time, increasing the edge profile length of the hole distribution area 19 close to the second area can increase the length of the heat-treated portion of the hole distribution area 19 close to the second area, which is conducive to increasing the distribution density of the hole structure 20, increasing the leakage contact area and leakage current of the first doped semiconductor layer and the second doped semiconductor layer through the first interface passivation layer at least covering the portion of the hole structure 20 to achieve electrical connection, and further reducing the risk of hot spots of the back contact battery.

[0105] It should be noted that Figure 2 The white dots in the middle right half are the hole structures 20 provided in the first doped semiconductor layer 12. Figure 2 The middle hole distribution area is the area where the white spots are distributed.

[0106] In terms of conductivity, the degree of crystallization between parts of different regions in the first doped semiconductor layer can be the same. Alternatively, the degree of crystallization of the hole distribution area can also be greater than the degree of crystallization of the rest of the first doped semiconductor layer. In this case, the hole distribution area is electrically connected to the second doped semiconductor layer of the opposite conductivity type. When the back contact battery is blocked, there will be a reverse leakage current between the hole distribution area and the reverse leakage part of the second doped semiconductor layer. In addition, the degree of crystallization of the hole distribution area will affect its own conductivity. Specifically, the higher the degree of crystallization of the hole distribution area, the stronger its own conductivity. Based on this, when the degree of crystallization of the hole distribution area is greater than the degree of crystallization of the rest of the first doped semiconductor layer, the hole distribution area has a relatively high conductivity, which is conducive to increasing the leakage current between the hole distribution area and the reverse leakage part when the back contact battery is blocked, thereby helping to reduce the reverse breakdown voltage of the back contact battery and ensure that the back contact battery has a lower risk of hot spots. As for the difference between the degree of crystallization of the hole distribution area and the degree of crystallization of the rest of the first doped semiconductor layer, it can be set according to actual needs and is not specifically limited here.

[0107] For the second interface passivation layer and the second doped semiconductor layer, in terms of materials, the material of the second doped semiconductor layer may include any semiconductor material such as silicon, silicon germanium, germanium or gallium arsenide. In terms of the arrangement of the material, the crystalline phase of the second doped semiconductor layer may be amorphous, microcrystalline, nanocrystalline, single crystal or polycrystalline, etc. The material of the first interface passivation layer can be determined according to the material of the second doped semiconductor layer, and is not specifically limited here. For example: when the material of the second doped semiconductor layer is doped polycrystalline silicon, the second interface passivation layer is a tunneling passivation layer. For another example: when the material of the second doped semiconductor layer includes doped amorphous silicon, doped microcrystalline silicon and doped nanocrystalline silicon, the second interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon or a mixed layer of the above three.

[0108] As for the specific values ​​of the crystallization rates of the second doped semiconductor layer and the second interface passivation layer, they can be determined according to the actual application scenario and are not specifically limited here.

[0109] Exemplarily, the crystallization rate of the second doped semiconductor layer can be less than or equal to 60%. For example, the crystallization rate of the second doped semiconductor layer can be 0, 5%, 10%, 20%, 30%, 40%, 50% or 60%, etc. In this case, it can be understood that the degree of crystallization of the second doped semiconductor layer will affect its own conductivity, thereby affecting the leakage loss of the back contact battery under normal working conditions, and the reverse breakdown voltage of the back contact battery when it is blocked. Based on this, when the degree of crystallization of the second doped semiconductor layer is within the above range, the degree of crystallization of the second doped semiconductor layer has a larger optional range. At this time, when the back contact battery provided by the embodiment of the present invention is set in an installation environment with fewer obstructions such as bird droppings, leaves or sand and dust, the degree of crystallization of the second doped semiconductor layer can be set within a smaller range to reduce the recombination rate of carriers of opposite conductivity types between the first doped semiconductor layer and the second doped semiconductor layer, thereby facilitating the reduction of the leakage loss of the back contact battery in the forward voltage region, and ensuring that the back contact battery has a higher conversion efficiency. When the back-contact battery provided by the embodiment of the invention is installed in an environment with many obstructions such as bird droppings, leaves or sand and dust, the crystallization degree of the second doped semiconductor layer can be set within a larger range to improve the conductivity of the second doped semiconductor layer, thereby facilitating the reduction of the reverse breakdown voltage of the back-contact battery and ensuring that the back-contact battery has a lower risk of hot spots. It can be seen that the crystallization degree of the second doped semiconductor layer can be set according to different environmental requirements to improve the applicability of the back-contact battery provided by the embodiment of the invention in different practical application scenarios.

[0110] Exemplarily, the crystallization rate of the first interface passivation layer is less than or equal to 60%. For example, the crystallization rate of the first interface passivation layer can be 0, 5%, 10%, 20%, 30%, 40%, 50% or 60%. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the crystallization rate of the second doped semiconductor layer being less than or equal to 60% described above, which will not be repeated here.

[0111] In addition, in the actual application process, such as Figure 7 As shown, in the first region 16, the first interface passivation layer 13 may be in direct contact with the first doped semiconductor layer 12. Alternatively, as shown in FIG. Figure 8 As shown, the back contact battery further includes an insulating layer 21 ; along the thickness direction of the semiconductor substrate 11 , the insulating layer 21 is disposed between a portion of the first doped semiconductor layer 12 where no hole structure is disposed and the first interface passivation layer 13 .

[0112] When the above technical solution is adopted, Figure 7 As shown, when the first interface passivation layer 13 is in direct contact with the first doped semiconductor layer 12 in the first region 16, there is a large leakage contact area between the first doped semiconductor layer 12 and the second doped semiconductor layer 14. In addition, the thickness of the first interface passivation layer 13 covering the inner side wall of the hole structure 20 is relatively small, so that the leakage transmission barrier is smaller, which is conducive to further reducing the hot spot risk of the back contact battery. Figure 8 As shown, when the back contact battery also includes an insulating layer 21 disposed between the portion of the first doped semiconductor layer 12 where the hole structure 20 is not disposed and the first interface passivation layer 13, the portion of the first interface passivation layer 13 covering the hole structure 20 becomes the main leakage channel between the first doped semiconductor layer 12 and the second doped semiconductor layer 14, realizing the leakage current transmission when the back contact battery is blocked, reducing the risk of hot spots, and also helping to control the size of the leakage contact area, so that the back contact battery has a higher conversion efficiency. It can be seen that whether the back contact battery includes the insulating layer 21 will affect the size of the leakage contact area between the first doped semiconductor layer 12 and the second doped semiconductor layer 14. Therefore, it can be determined whether the back contact battery includes the insulating layer 21 based on the requirements for the hot spot risk and conversion efficiency of the back contact battery in the actual application scenario.

[0113] As for the material and thickness of the above-mentioned insulating layer, it can be determined according to the actual application scenario, as long as it can be applied to the back contact battery provided by the embodiment of the present invention. An exemplary insulating layer may include a silicon nitride layer.

[0114] In addition, in terms of the scope of formation, such as Figure 6 As shown, along the direction from the edge to the center of the first region 16, the first interface passivation layer 13 and the second doped semiconductor layer 14 may only cover the hole distribution area 19. Alternatively, as Figure 7 As shown, along the direction from the edge to the center of the first region 16, the first interface passivation layer 13 and the second doped semiconductor layer 14 can also extend from the top of the hole distribution area 19 to cover the remaining area of ​​the first doped semiconductor layer 12. In this case, while ensuring that the reverse leakage portion 18 covers the hole distribution area 19 so that there is a certain amount of leakage current between the reverse leakage portion 18 and the first doped semiconductor layer 12 when the back contact battery is shielded, ensuring that the back contact battery has a lower risk of hot spots, there is no need to strictly require a high manufacturing accuracy in order to extend the second doped semiconductor layer 14 only to the edge of the hole distribution area 19 away from the second region 17, thereby reducing the manufacturing difficulty.

[0115] Among them, the width of the first interface passivation layer and the second doped semiconductor layer extending from the top of the hole distribution area to cover the rest of the first doped semiconductor layer will affect the area of ​​the first doped semiconductor layer exposed outside the second doped semiconductor layer, and further affect the formation range of the first electrode electrically connected to the first doped semiconductor layer. Therefore, the width of the first interface passivation layer and the second doped semiconductor layer extending from the top of the hole distribution area to cover the rest of the first doped semiconductor layer can be determined according to the requirements for the carrier collection ability of the first electrode in the actual application scenario, and no specific limitation is made here.

[0116] In terms of conductivity, the conductivity of the second doped semiconductor layer directly affects its own conductivity. The conductivity of the second doped semiconductor layer will affect the forward leakage loss of the back contact battery between the reverse leakage part and the hole distribution area, as well as the reverse breakdown voltage of the back contact battery when it is blocked. Based on this, the conductivity of the second doped semiconductor layer can be determined according to the requirements for leakage loss and reverse breakdown voltage in actual application scenarios.

[0117] Exemplarily, the conductivity of the second doped semiconductor layer is greater than or equal to 10E-5S / cm and less than or equal to 1S / cm. For example, the conductivity of the second doped semiconductor layer may be 10E-5S / cm, 2E-4S / cm, 5E-4S / cm, 10E-4S / cm, 2E-3S / cm, 5E-3S / cm, 10E-3S / cm, 10E-2S / cm, 5E-1S / cm or 1S / cm. In this case, it is possible to prevent the forward leakage loss of the back contact battery from being large due to the large conductivity of the second doped semiconductor layer, which makes the conductivity of the second doped semiconductor layer too high; in addition, it is possible to prevent the reverse breakdown voltage of the back contact battery from being high due to the small conductivity of the second doped semiconductor layer, which makes the conductivity of the second doped semiconductor layer too low, which further helps to balance the reverse breakdown voltage and conversion efficiency of the back contact battery.

[0118] In actual application, the conductive properties of different parts of the second doped semiconductor layer may be the same or different. It is understandable that when the back contact battery is in normal working condition, the part of the second doped semiconductor layer located in the second region needs to collect and guide the carriers of the corresponding conductive type generated in the semiconductor substrate to facilitate the formation of photocurrent. The reverse leakage part of the second doped semiconductor layer is electrically connected to the first doped semiconductor layer of the opposite conductive type. When the back contact battery is in normal working condition, there will be leakage current between the reverse leakage part of the second doped semiconductor layer and the hole distribution area of ​​the first doped semiconductor layer. Secondly, under the same conditions of other factors, when the degree of crystallization of the doped semiconductor layer is smaller, the grains in the doped semiconductor layer are smaller, and even the disorder of amorphous semiconductor materials is presented. The smaller the grains in the doped semiconductor layer and / or the fewer the number of grains, the more interfaces between the grains in the doped semiconductor layer, so the resistance of the grain interface will be larger. It can be seen that the degree of crystallization of the parts of the second doped semiconductor layer located in different areas will affect its own conductive properties. Therefore, the conductive properties and degree of crystallization of different parts of the second doped semiconductor layer can be determined according to the effects of the parts of the second doped semiconductor layer located in different areas in actual application scenarios, as well as the requirements for the conversion efficiency and hot spot risks of the back contact battery.

[0119] Exemplarily, the material of the first doped semiconductor layer includes polycrystalline silicon and / or monocrystalline silicon, and the material of the second doped semiconductor layer includes at least one of amorphous silicon, microcrystalline silicon and nanocrystalline silicon. The second doped semiconductor layer is divided into a high crystallization region and a low crystallization region. The degree of crystallization of the portion of the second doped semiconductor layer located in the low crystallization region is less than the degree of crystallization of the portion of the second doped semiconductor layer located in the high crystallization region. In the second doped semiconductor layer, at least the reverse leakage portion is located in the low crystallization region, and at least a portion of the corresponding second region is located in the high crystallization region.

[0120] It should be noted that the greater the degree of crystallization referred to in the embodiments of the present invention may refer to a greater crystallization rate, a larger grain size and / or a greater number of grains. For example: when the second doped semiconductor layer is a nanocrystalline silicon layer (the nanocrystalline silicon layer generally may still contain a part of amorphous silicon part inside, which is difficult to avoid, and the content of the amorphous silicon part is relatively small, which is known in the art), the degree of crystallization of at least a part of the second doped semiconductor layer located in the second region is greater, and the part has a greater crystallization rate and grain size than the reverse leakage part of the second doped semiconductor layer. For another example: when the second doped semiconductor layer is an amorphous silicon layer (the amorphous silicon layer may contain a small amount of nanocrystalline silicon part inside, but the content of the nanocrystalline silicon part is very small, for example, less than 5%, which is known in the art), the second doped semiconductor layer located in at least a part of the second region will generate lattice-ordered grains inside, so that its degree of crystallization is increased. The reverse leakage part of the second doped semiconductor layer has a lower degree of crystallization, and at this time, the part with a lower degree of crystallization is still an amorphous silicon material, and there are no grains generated after laser treatment. In this case, when at least the reverse leakage portion of the second doped semiconductor layer is located in the low crystallization region, and at least part of the corresponding second region is located in the high crystallization region, the conductivity of at least the portion of the second doped semiconductor layer located in the second region will be greater, which is conducive to reducing the transmission loss of at least the portion of the second doped semiconductor layer located in the second region, and reducing the contact resistance between at least the portion of the second doped semiconductor layer located in the second region and the transparent conductive layer. The degree of crystallization of the reverse leakage portion of the second doped semiconductor layer is relatively low, and the conductivity of the reverse leakage portion of the second doped semiconductor layer is relatively low at this time, which is conducive to reducing the magnitude of the forward leakage loss between at least the reverse leakage portion of the second doped semiconductor layer and the hole distribution region of the first doped semiconductor layer, and further improving the conversion efficiency of the back contact battery.

[0121] Among them, in terms of scope, the scope of the high crystallization area and the low crystallization area in the second doped semiconductor layer can be determined according to the method used in the actual manufacturing process to make different regions of the second doped semiconductor layer have different degrees of crystallization, and the actual manufacturing accuracy, and is not specifically limited here.

[0122] Specifically, the low crystallization region may be located in the first region. In this case, the low crystallization region of the second doped semiconductor layer may correspond only to the portion of the second doped semiconductor layer covering the hole distribution region; or the low crystallization region may correspond not only to the portion of the second doped semiconductor layer covering the hole distribution region, but also to at least a portion of the region where the second doped semiconductor layer extends to cover the first doped semiconductor layer. The high crystallization region of the second doped semiconductor layer may correspond only to the portion of the second doped semiconductor layer located in a local range of the second region; or the high crystallization region may correspond to the entire second region.

[0123] Alternatively, along the arrangement direction of the first region and the second region, one side edge of the low crystallization region is located in the first region, and the other side edge extends to the second region. In this case, the portion of the second doped semiconductor layer located in the high crystallization region only corresponds to the portion of the second doped semiconductor layer located in a local range of the second region.

[0124] In the case of adopting the above technical solution, since the hole distribution area of ​​the first doped semiconductor layer is located in the first area, and the reverse leakage part of the second doped semiconductor layer covers the hole distribution area, when the low crystallization area is located in the first area, it can ensure that the conductivity of each area of ​​the reverse leakage part is small, effectively control the size of the forward leakage loss between the reverse leakage part and the hole distribution area, and help improve the conversion efficiency of the back contact battery. In addition, when along the arrangement direction of the first area and the second area, one side edge of the low crystallization area is located in the first area and the other side edge extends to the second area, it is beneficial to prevent the above operation from affecting the reverse leakage part of the second doped semiconductor layer while making at least part of the second area corresponding to the second area located in the high crystallization area by laser processing or the like, and ensure that the reverse leakage part of the second doped semiconductor layer has a small conductivity while reducing the requirements for the processing accuracy.

[0125] In addition, it can be understood that the greater the degree of crystallization of at least a portion of the second doped semiconductor layer located in the second region, the greater the conductivity of the portion. The smaller the degree of crystallization of the reverse leakage portion of the second doped semiconductor layer, the smaller the conductivity of the portion, and the higher the conversion efficiency of the back contact battery. At the same time, the degree of reduction of the hot spot risk will also be affected. Therefore, the difference in the degree of crystallization of the low crystallization region and the high crystallization region in the second doped semiconductor layer can be determined according to the requirements for the conversion efficiency and hot spot risk of the back contact battery in the actual application scenario, and no specific limitation is made here.

[0126] Exemplarily, the difference between the crystallization rate of the portion of the second doped semiconductor layer located in the high crystallization region and the crystallization rate of the portion of the second doped semiconductor layer located in the low crystallization region can be greater than or equal to 40% and less than or equal to 80%. For example, the difference between the crystallization rate of the portion of the second doped semiconductor layer located in the high crystallization region and the crystallization rate of the portion of the second doped semiconductor layer located in the low crystallization region can be 40%, 42%, 45%, 50%, 55%, 60%, 65%, 70%, 75% or 80%, etc. In this case, the difference is within the above range, which is conducive to preventing the second doped semiconductor layer located in the high crystallization region from having a low crystallization degree due to the small difference, resulting in poor carrier collection efficiency of the portion, and / or causing the second doped semiconductor layer located in the low crystallization region to have a high crystallization degree, resulting in a large forward leakage current corresponding to the portion, thereby ensuring that the back contact battery has a high conversion efficiency. In addition, it can also prevent the high risk of hot spots in the back contact battery due to the small degree of crystallization of the reverse leakage part of the second doped semiconductor layer caused by the large difference, thereby ensuring that the back contact battery has a high ability to resist burning.

[0127] From the doping aspect, the embodiment of the present invention does not specifically limit the doping concentration of the dopant in the second doped semiconductor layer, as long as it can be applied to the back contact battery provided by the embodiment of the present invention.

[0128] Exemplarily, the doping concentration of the dopant in the second doped semiconductor layer is greater than or equal to 1E19 cm -3 , and less than or equal to 5E20cm -3 For example, the doping concentration of the dopant in the second doped semiconductor layer may be 1E19 cm -3 、2E19cm -3 、4E19cm -3 、6E19cm -3 、8E19cm -3 、1E20cm -3 、3E20cm -3 or 5E20cm -3Etc. In this case, the doping concentration of the dopant in the second doped semiconductor layer is within the above range, which can prevent the low field passivation effect on the semiconductor substrate caused by the low doping concentration of the dopant in the second doped semiconductor layer, and ensure that the first side of the back contact battery has a relatively low carrier recombination rate under normal working conditions; at the same time, it is also conducive to making the second doped semiconductor layer have good conductivity, ensuring that the reverse leakage part of the second doped semiconductor layer has a relatively low transmission resistance when the back contact battery is blocked, which is conducive to further reducing the reverse breakdown voltage of the back contact battery. In addition, it can also prevent the difficulty of doping the intrinsic semiconductor layer used to manufacture the second doped semiconductor layer due to the high doping concentration of the dopant in the second doped semiconductor layer, which is conducive to improving the yield of the back contact battery.

[0129] In terms of thickness, the embodiment of the present invention does not specifically limit the thickness of the second doped semiconductor layer. Exemplarily, the thickness of the second doped semiconductor layer may be greater than or equal to 5 nm and less than or equal to 50 nm. For example, the thickness of the second doped semiconductor layer may be 5 nm, 10 nm, 15 nm, 20 nm, 30 nm, 40 nm or 50 nm. The application principle of the beneficial effect in this case is the same as the application principle of the beneficial effect of the first doped semiconductor layer having a thickness greater than or equal to 50 nm and less than or equal to 200 nm as described above, and will not be repeated here.

[0130] For the first interface passivation layer, the crystallization degrees of different regions in the first interface passivation layer may be the same or different. When the crystallization degrees of different regions in the first interface passivation layer are different, the distribution of the regions with different crystallization degrees may refer to the distribution of the regions with different crystallization degrees in the second doped semiconductor layer described above, which will not be described in detail here.

[0131] As for the thickness of the first interface passivation layer, since the thickness of the first interface passivation layer will affect its own transmission resistance and passivation effect, and thus affect the forward leakage loss and reverse breakdown voltage of the back contact battery, the thickness of the first interface passivation layer can be determined according to the requirements for the forward leakage loss and reverse breakdown voltage of the back contact battery in the actual application scenario, and no specific limitation is made here.

[0132] like Figure 7As shown, the portion of the first interface passivation layer 13 covering the hole distribution area 19 is defined as the first sub-passivation portion 22, and the portion located in the second area 17 is defined as the second sub-passivation portion 23. When the first interface passivation layer 13 also extends from the hole distribution area 19 to the remaining area of ​​the first doped semiconductor layer 12, the portion of the first interface passivation layer 13 extending from the hole distribution area 19 to the remaining area of ​​the first doped semiconductor layer 12 is defined as the third sub-passivation portion 24. Among them, only the thickness of the portion of the first sub-passivation portion 22 covering the side wall of the hole structure may be less than the thickness of the second sub-passivation portion 23 (or the second sub-passivation portion 23 and the third sub-passivation portion 24), or the thickness of each portion of the first sub-passivation portion 22 may be less than the thickness of the second sub-passivation portion 23 (or the second sub-passivation portion 23 and the third sub-passivation portion 24).

[0133] The thickness difference between the first sub-passivation portion and the second sub-passivation portion (or the second sub-passivation portion and the third sub-passivation portion) can be determined according to the requirements for the forward leakage loss and reverse breakdown voltage of the back contact battery in actual application scenarios.

[0134] Exemplarily, the thickness difference between the first sub-passivation part and the second sub-passivation part may be greater than or equal to 0.5nm and less than or equal to 5nm. For example, the thickness difference between the first sub-passivation part and the second sub-passivation part may be 0.5nm, 1nm, 2nm, 3nm, 4nm or 5nm. In this case, the thickness difference between the first sub-passivation part and the second sub-passivation part is within the above range, which is conducive to preventing the thickness of the first sub-passivation part from being too large due to the small thickness difference, ensuring that the transmission resistance of the first doped semiconductor layer and the second doped semiconductor layer to be electrically connected through the first sub-passivation part is small, which is conducive to increasing the leakage current between the two, and further reducing the risk of hot spots of the back contact battery. In addition, it is also possible to prevent the thickness of the first sub-passivation part from being too small and / or the thickness of the second sub-passivation part from being too large due to the large thickness difference, ensuring that the back contact battery has a relatively low forward leakage loss between the first doped semiconductor layer and the second doped semiconductor layer under normal working conditions, and the second sub-passivation part has a low transmission resistance, which is conducive to improving the conversion efficiency of the back contact battery. It can be seen that by adjusting the thickness difference between the first sub-passivation portion and the second sub-passivation portion, a balanced regulation of the hot spot risk and conversion efficiency of the back-contact battery can be achieved, thereby improving the working performance of the back-contact battery.

[0135] For the above-mentioned transparent conductive layer, the embodiment of the present invention does not specifically limit the material and thickness of the transparent conductive layer. Exemplarily, the material of the transparent conductive layer may include at least one of fluorine-doped tin oxide, aluminum-doped zinc oxide, tin-doped indium oxide, tungsten-doped indium oxide, molybdenum-doped indium oxide, cerium-doped indium oxide and indium hydroxide.

[0136] Exemplarily, the thickness of the transparent conductive layer is greater than or equal to 10 nm and less than or equal to 150 nm. For example, the thickness of the transparent conductive layer can be 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 70 nm, 90 nm, 120 nm or 150 nm, etc. In this case, within a certain range, the thickness of the transparent conductive layer is proportional to its own conductivity. Based on this, when the thickness of the transparent conductive layer is within the above range, it can prevent the transparent conductive layer from having a high carrier recombination rate on one side of the first surface when the back contact battery is working normally due to its own poor conductivity caused by its small thickness, and the transparent conductive layer from having a high transmission resistance to leakage current when the back contact battery is blocked, thereby ensuring that the back contact battery has a higher conversion efficiency and a lower risk of hot spots. In addition, it is also beneficial to prevent the use of a large amount of consumables of the transparent conductive layer due to the large thickness of the transparent conductive layer, which is beneficial to controlling the manufacturing cost of the back contact battery.

[0137] In terms of the scope of formation, Figure 6 As shown, the transparent conductive layer 15 may only cover the second doped semiconductor layer 14. Alternatively, as shown in FIG. Figure 7 As shown, the transparent conductive layer 15 may also cover the first doped semiconductor layer 12 and the second doped semiconductor layer 14, and an insulating groove 26 is provided in the transparent conductive layer 15 to physically insulate the portion of the transparent conductive layer 15 electrically connected to the first doped semiconductor layer 12 from the portion of the transparent conductive layer 15 corresponding to the second region 17.

[0138] Specifically, since the portion of the transparent conductive layer electrically connected to the first doped semiconductor layer is ohmically connected to the first electrode, and the portion of the transparent conductive layer corresponding to the second region is ohmically connected to the second electrode, the two portions of the transparent conductive layer cannot be directly electrically connected, that is, the two portions of the transparent conductive layer must be physically insulated, that is, not in contact. Based on this, it can be understood that in order to prevent a short circuit, such as Figure 5 As shown, both ends of the insulating groove 26 may be located above the first doped semiconductor layer 12; or Figure 7 As shown, the second interface passivation layer 25 and the second doped semiconductor layer 14 also extend from above the hole distribution area 19 to the remaining area of ​​the first doped semiconductor layer 12, and the two ends of the insulating groove 26 can also be located above the second doped semiconductor layer 14, or one end can be located above the first doped semiconductor layer and the other end can be located above the second doped semiconductor layer.

[0139] In addition, if Figure 7 As shown, the insulating groove 26 may only penetrate the transparent conductive layer 15. Figure 8As shown, when the second doped semiconductor layer 14 has a relatively low resistivity (such as the resistivity of the second doped semiconductor layer 14 is less than or equal to 0.01Ω·cm, specifically, when the second doped semiconductor layer 14 is a doped polysilicon layer and / or a doped single crystal silicon layer), the above-mentioned insulating groove 26 needs to penetrate not only the transparent conductive layer 15, but also at least penetrate the second doped semiconductor layer 14, so as to prevent a short circuit caused by the electrical connection of the portion of the transparent conductive layer 15 corresponding to the first region 16 and the second region 17 through the continuously arranged second doped semiconductor layer 14. Secondly, the first interface passivation layer 13 does not need to be disconnected at the insulating groove 26; of course, in some processes, the second doped semiconductor layer and the first interface passivation layer can also be disconnected together in the same process step).

[0140] As for the width of the insulating groove along the direction of the first region and the second region, it can be determined according to the effect of electrical insulation between two regions of opposite conductivity types for transporting carriers in the transparent conductive layer in actual application scenarios, and is not specifically limited here.

[0141] In addition, when the second doped semiconductor layer also extends from above the hole distribution area to cover the remaining part of the first doped semiconductor layer, the portion of the transparent conductive layer extending from the second area to above the first doped semiconductor layer may also be aligned only with the edge of the hole distribution area away from the second area. Figure 7 As shown, along the direction from the edge to the center of the first region 16, the transparent conductive layer 15 can also extend from above the hole distribution area 19 to above the remaining part of the first doped semiconductor layer 12. In this case, it is ensured that along the direction from the edge to the center of the first region, the reverse leakage portion 18 can cover the entire width of the hole distribution area 19 of the first doped semiconductor layer 12, so that when the back contact battery is blocked, there is a certain amount of leakage current between the reverse leakage portion 18 and the hole distribution area 19, ensuring that the back contact battery has a lower risk of hot spots. At the same time, there is no need to strictly require a high manufacturing precision in order to extend the transparent conductive layer 15 only to the edge of the hole distribution area 19 away from the second region 17, thereby reducing the manufacturing difficulty.

[0142] The specific width of the portion of the transparent conductive layer extending from the second region to the first region can be determined according to the actual manufacturing process and is not specifically limited here.

[0143] In a second aspect, an embodiment of the present invention provides a photovoltaic module, which includes a back-contact cell provided by the first aspect and various implementations thereof.

[0144] The beneficial effects of the second aspect and its various implementations in the embodiments of the present invention can be analyzed with reference to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0145] In a third aspect, an embodiment of the present invention provides a method for manufacturing a back-contact battery. Figures 9 to 16 The manufacturing process is described in detail with reference to the cross-sectional view of the operation shown in FIG. 1 . Specifically, the manufacturing method of the back contact battery includes the following steps:

[0146] First, if Fig. 9 As shown, a semiconductor substrate 11 is provided. The semiconductor substrate 11 includes a first surface and a second surface opposite to each other. The first surface includes first regions 16 and second regions 17 that are alternately distributed.

[0147] Specifically, the material of the semiconductor substrate, and the distribution of the first region and the second region on one side of the first surface and other information can be referred to in the previous text, and will not be described in detail here.

[0148] Next, if Fig.11 As shown, a first doped semiconductor layer 12 is formed on the first region 16 .

[0149] For example, Fig.10 As shown, the first doped semiconductor layer 12 and the mask layer 29 which are arranged on the first surface can be formed in sequence. Fig.11 As shown, the portion of the mask layer 29 located in the second region 17 and the portion of the first doped semiconductor layer 12 located in the second region 17 are removed, and a hole structure is formed.

[0150] In the actual manufacturing process, a whole layer of intrinsic semiconductor layer arranged on the first surface can be formed by a process such as chemical vapor deposition. Then, the whole layer of intrinsic semiconductor layer is doped by a process such as diffusion or doping source coating to form a first doped semiconductor layer. Then, a mask layer is formed on the portion of the first doped semiconductor layer corresponding to the first region. The embodiment of the present invention does not specifically limit the material of the mask layer. For example, the mask layer may include at least one of a doped silicon glass layer, a silicon nitride layer and an aluminum oxide layer. Among them, when a diffusion process is adopted and the material of the first doped semiconductor layer includes silicon, after the first doped semiconductor layer is formed, a doped silicon glass layer is also formed on the side of the first doped semiconductor layer away from the semiconductor substrate. In this case, if the mask layer is a doped silicon glass layer, the mask layer is also formed while the first doped semiconductor layer is formed. Alternatively, after removing the doped silicon glass layer, a mask layer may be formed on the portion of the first doped semiconductor layer corresponding to the first region by an etching process such as chemical vapor deposition. After forming the first doped semiconductor layer as a whole layer, if the above-mentioned doped silicon glass layer is not formed, a mask layer can be directly formed on the portion of the first doped semiconductor layer corresponding to the first region by chemical vapor deposition or other processes. Then, under the protection of the mask layer, laser etching or other processes can be used to remove the portion of the mask layer located in the second region and the portion of the first doped semiconductor layer located in the second region. Since the temperature of the etching laser used in the laser etching process is relatively high, a hole structure will also be formed while removing the portion of the mask layer located in the second region and the portion of the first doped semiconductor layer located in the second region.

[0151] It should be noted that, in the actual manufacturing process, the area ratio of the hole structure in the hole distribution area can be controlled by adjusting the thickness of the mask layer and the surface refractive index of the mask layer. Specifically, when the mask layer includes a doped silicon glass layer and / or a silicon nitride layer, the area ratio of the hole structure in the hole distribution area can be increased by increasing the film thickness of the mask layer. In addition, the area ratio of the hole structure in the hole distribution area can be reduced by increasing the surface refractive index of the mask layer.

[0152] For example: in the case where the mask layer includes a doped silicon glass layer and a silicon nitride layer located on the doped silicon glass layer, when the thickness of the doped silicon glass layer is 10nm, the thickness of the silicon nitride layer is 60nm, and the surface refractive index of the silicon nitride layer is 2.05, the area of ​​the hole structure in the hole distribution area accounts for 0.5%.

[0153] When the thickness of the doped silicon glass layer is 10 nm, the thickness of the silicon nitride layer is 70 nm, and the surface refractive index of the silicon nitride layer is 2.05, the area of ​​the hole structure in the hole distribution region accounts for 0.7%.

[0154] When the thickness of the doped silicon glass layer is 30 nm, the thickness of the silicon nitride layer is 60 nm, and the surface refractive index of the silicon nitride layer is 2.05, the area of ​​the hole structure in the hole distribution region accounts for 0.9%.

[0155] When the thickness of the doped silicon glass layer is 30 nm, the thickness of the silicon nitride layer is 80 nm, and the surface refractive index of the silicon nitride layer is 2.05, the area of ​​the hole structure in the hole distribution region accounts for 1.1%.

[0156] When the thickness of the doped silicon glass layer is 0 nm, the thickness of the silicon nitride layer is 60 nm, and the surface refractive index of the silicon nitride layer is 2.05, the area of ​​the hole structure in the hole distribution region accounts for 0%.

[0157] In addition, when the first doped semiconductor layer is disposed on the first region, and the back contact battery further includes a second interface passivation layer, a process such as thermal oxidation or chemical vapor deposition can also be used to first form a second interface passivation material disposed in an entire layer on one side of the first surface. Then, before forming the first doped semiconductor layer disposed in an entire layer, the second interface passivation material can be selectively etched to remove the portion of the second interface passivation material corresponding to the second region to obtain the second interface passivation layer; or, after forming the first doped semiconductor layer disposed in an entire layer, the first doped semiconductor layer and the second interface passivation material can be selectively etched at least under the protection of the same mask layer.

[0158] For example, in the manufactured back contact battery, when the second surface of the semiconductor substrate and the surface of the second region of the first surface are velvet, Fig.12 As shown, before forming the second interface passivation layer and the second doped semiconductor layer, the second region 17 and the second surface may be textured under the protection of the mask layer 29 so that the second region 17 and the second surface form a textured surface.

[0159] After forming the above-mentioned first doped semiconductor layer and before forming the above-mentioned second doped semiconductor layer, the above-mentioned mask layer can be selectively removed by using a process such as wet etching. In this case, the first interface passivation layer in the first region of the manufactured back-contact battery is in direct contact with the first doped semiconductor layer; alternatively, the mask layer may not be removed, and the remaining part of the mask layer forms the above-mentioned insulating layer.

[0160] Next, if Fig.14 As shown, along the thickness direction of the semiconductor substrate 11, a first interface passivation layer 13 and a second doped semiconductor layer 14 are sequentially stacked on the second region 17 and extend to cover a portion of the first doped semiconductor layer 12. The second doped semiconductor layer 14 and the first doped semiconductor layer 12 have opposite conductivity types.

[0161] For example, Fig.13As shown, a deposition process can be used to form a first interface passivation layer 13 and a second doped semiconductor layer 14 on the second region 17 and the first doped semiconductor layer 12. Then, a deposition and laser etching process is used to form a corresponding mask layer on the portion of the second doped semiconductor layer corresponding to the second region and part of the first region. Then, under the masking effect of the mask layer, a wet etching process is used to remove the first interface passivation layer and the second doped semiconductor layer corresponding to the first region. Next, as shown in FIG. Fig.14 As shown, the mask layer is removed.

[0162] Alternatively, after sequentially forming a first interface passivation layer and a second doped semiconductor layer that are entirely disposed on the first doped semiconductor layer and the second region, as Fig.13 and Fig.14 As shown, a laser etching process can be used to directly and selectively remove the first interface passivation layer 13 and the first region 15 corresponding to the second doped semiconductor layer 14. This can save the deposition and removal steps of the mask layer, reduce the manufacturing cost of the back contact battery, and improve the manufacturing efficiency of the back contact battery.

[0163] Next, if Fig.15 As shown, a transparent conductive layer 15 is formed covering the second doped semiconductor layer 14. Among them, the edge portion of the first doped semiconductor layer 12 close to the second region 17 is a hole distribution area 19, and the hole distribution area 19 has a plurality of hole structures concave inwardly, and the one-dimensional size of the hole structure is micrometer level or nanometer level. The second doped semiconductor portion includes a reverse leakage portion 18, and the reverse leakage portion 18 is electrically connected to the first doped semiconductor layer 12 through at least the portion of the first interface passivation layer 13 covering the hole structure 20, and the reverse leakage portion 18 is covered with a transparent conductive layer 15 extending from the second region 17.

[0164] For example, a physical vapor deposition process or the like can be used to form a whole layer of transparent conductive material disposed on the first doped semiconductor layer and the second doped semiconductor layer. Then, the transparent conductive layer can be patterned by chemical etching slurry or laser etching under the protection of a corresponding mask. The formation range of the transparent conductive layer can be referred to above and will not be described here.

[0165] like Fig.16 As shown, a process such as screen printing can then be used to form a first electrode 27 in ohmic contact with the first doped semiconductor layer 12 , and a second electrode 28 in ohmic contact with the second doped semiconductor layer 14 through the transparent conductive layer 15 .

[0166] The beneficial effects of the third aspect and its various implementations in the embodiments of the present invention can be analyzed with reference to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0167] In the above description, the technical details of the patterning and etching of each layer are not described in detail. However, those skilled in the art should understand that various technical means can be used to form layers, regions, etc. of desired shapes. In addition, in order to form the same structure, those skilled in the art can also design methods that are not completely the same as the methods described above. In addition, although the various embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage.

[0168] The embodiments of the present invention are described above. However, these embodiments are only for a clearer description and are not intended to limit the scope of the present invention. The scope of the present invention is defined by the appended claims and their equivalents. Without departing from the scope of the present invention, a person skilled in the art may make various substitutions and modifications, which should all fall within the scope of the present invention.

Claims

1. A back contact battery, characterized in that: include: A semiconductor substrate, a first doped semiconductor layer, a first interface passivation layer, a second doped semiconductor layer and a transparent conductive layer; The conductivity types of the second doped semiconductor layer and the first doped semiconductor layer are opposite; The semiconductor substrate comprises a first surface and a second surface opposite to each other; the first surface comprises first regions and second regions which are alternately distributed; The first doped semiconductor layer is disposed on the first region; Along the thickness direction of the semiconductor substrate, the first interface passivation layer and the second doped semiconductor layer are sequentially stacked on the second region and extend to cover a portion of the first doped semiconductor layer; The transparent conductive layer covers the second doped semiconductor layer; Wherein, the edge portion of the first doped semiconductor layer close to the second region is a hole distribution area, and the hole distribution area has a plurality of hole structures concave inwardly, and the one-dimensional size of the hole structure is micrometer level or nanometer level; The second doped semiconductor portion includes a reverse leakage portion, which is electrically connected to the first doped semiconductor layer through at least a portion of the first interface passivation layer covering the hole structure, and the reverse leakage portion is covered by the transparent conductive layer extending from the second region.

2. The back contact cell according to claim 1, characterized in that: At least one of the hole structures is recessed into the first doped semiconductor layer along the thickness direction of the semiconductor substrate; Alternatively, at least one of the hole structures is recessed into the first doped semiconductor layer along a direction parallel to the first surface and from a boundary between the first region and the second region.

3. The back contact cell according to claim 1, characterized in that: Along the direction from the edge to the center of the first region, the ratio between the width of the hole distribution area and the width of the first doped semiconductor layer is greater than or equal to 1% and less than or equal to 15%; and / or, along the direction from the edge to the center of the first region, the width of the hole distribution area is less than 30 μm; And / or, in the first region, the overlapping portion of the first doped semiconductor layer and the second doped semiconductor layer is an overlapping region; along the direction from the edge to the center of the first region, the ratio between the width of the hole distribution region and the width of the overlapping region is greater than or equal to 5% and less than or equal to 30%.

4. The back contact cell according to claim 1, characterized in that: At least one of the hole structures has a one-dimensional size greater than or equal to 100 nm and less than or equal to 3 μm; And / or, the distance between two adjacent hole structures is greater than or equal to 0.5 μm and less than or equal to 30 μm; And / or, the hole structure accounts for less than or equal to 10% of the area of ​​the hole distribution region.

5. The back contact cell according to claim 1, characterized in that: The inner side wall of at least one of the hole structures is uneven; And / or, the edge profile of the hole distribution area close to the second region is wavy, sawtooth or comb-shaped.

6. The back contact cell according to claim 1, characterized in that: In the first region, the first interface passivation layer is in direct contact with the first doped semiconductor layer; Alternatively, the back contact battery further includes an insulating layer; along the thickness direction of the semiconductor substrate, the insulating layer is disposed between a portion of the first doped semiconductor layer where the hole structure is not disposed and the first interface passivation layer.

7. The back contact battery according to any one of claims 1 to 6, characterized in that: Along the direction from the edge to the center of the first region, the first interface passivation layer and the second doped semiconductor layer also extend from above the hole distribution area to cover the remaining part of the first doped semiconductor layer; In the direction from the edge to the center of the first region, the transparent conductive layer further extends from above the hole distribution area to above the remaining at least part of the second doped semiconductor layer.

8. The back contact cell according to claim 1, characterized in that In the first interface passivation layer, the portion covering the hole distribution area is the first sub-passivation portion, and the portion located in the second area is the second sub-passivation portion; the difference in thickness between the first sub-passivation portion and the second sub-passivation portion is greater than or equal to 0.5 nm and less than or equal to 5 nm; And / or, the crystallization rate of the first interface passivation layer is less than or equal to 60%.

9. The back contact cell according to claim 1, characterized in that: The thickness of the first doped semiconductor layer is greater than 50 nm and less than or equal to 200 nm; and / or, the doping concentration of the dopant in the first doped semiconductor layer and / or the second doped semiconductor layer is greater than or equal to 1E19 cm -3 , and less than or equal to 5E20cm -3 ; And / or, the first doped semiconductor layer includes a doped crystalline silicon layer; And or, the thickness of the second doped semiconductor layer is greater than or equal to 5 nm and less than or equal to 50 nm; and / or, the crystallization rate of the second doped semiconductor layer is less than or equal to 60%; And / or, the conductivity of the second doped semiconductor layer is greater than or equal to 10E-5S / cm and less than or equal to 1S / cm; And or, the thickness of the transparent conductive layer is greater than or equal to 10 nm and less than or equal to 150 nm.

10. The back contact cell according to claim 1, characterized in that: The material of the first doped semiconductor layer includes polycrystalline silicon and / or single crystal silicon, and the material of the second doped semiconductor layer includes at least one of amorphous silicon, microcrystalline silicon and nanocrystalline silicon; The second doped semiconductor layer is divided into a high crystallization region and a low crystallization region; the crystallization degree of the portion of the second doped semiconductor layer located in the low crystallization region is less than the crystallization degree of the portion of the second doped semiconductor layer located in the high crystallization region; In the second doped semiconductor layer, at least the reverse leakage portion is located in the low crystallization region, and at least a portion corresponding to the second region is located in the high crystallization region.

11. The back contact cell according to claim 10, characterized in that: The low crystallization region is located within the first region; Alternatively, along the arrangement direction of the first region and the second region, one side edge of the low crystallization region is located in the first region, and the other side edge extends to the second region.

12. A photovoltaic module, characterized in that: Comprising a back contact battery as claimed in any one of claims 1 to 11.

13. A method for manufacturing a back contact battery, characterized in that: include: Providing a semiconductor substrate; The semiconductor substrate comprises a first surface and a second surface opposite to each other; the first surface comprises first regions and second regions which are alternately distributed; forming a first doped semiconductor layer disposed on the first region; A first interface passivation layer and a second doped semiconductor layer are sequentially stacked on the second region and extend to cover a portion of the first doped semiconductor layer, and are formed along the thickness direction of the semiconductor substrate; the second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types; forming a transparent conductive layer covering the second doped semiconductor layer; Among them, the edge portion of the first doped semiconductor layer close to the second area is a hole distribution area, and the hole distribution area has a plurality of hole structures that are concave inward, and the one-dimensional size of the hole structure is in the micrometer level or nanometer level; the second doped semiconductor part includes a reverse leakage part, and the reverse leakage part is electrically connected to the first doped semiconductor layer through at least the part of the hole structure covered by the first interface passivation layer, and the reverse leakage part is covered with the transparent conductive layer extending from the second area.

14. The method for manufacturing a back contact battery according to claim 13, characterized in that: The forming of the first doped semiconductor layer disposed on the first region includes: sequentially forming the first doped semiconductor layer and the mask layer which are entirely disposed on the first surface; A laser etching process is adopted to remove the portion of the mask layer located in the second region and the portion of the first doped semiconductor layer located in the second region, and to form the hole structure.

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