Back contact battery and manufacturing method thereof, photovoltaic module

Abstract

The present invention discloses a back contact cell and a manufacturing method thereof, and a photovoltaic module, which relate to the field of photovoltaic technology, in order to improve the utilization rate of incident light on the back side of the back contact cell. The back contact cell comprises a semiconductor substrate, a first doped semiconductor layer, a first doped region, and a second doped semiconductor layer. The first surface comprises a first region and a second region which are spaced apart, and a third region between the first region and the second region. The third region is adjacent to the first region. The first doped semiconductor layer is arranged on the first region. The doping element in the first doped semiconductor layer is a first doping element. The first doped region is arranged in the first region and the third region. The doping concentration of the first doping element in the first doping region is greater than the doping concentration of the first doping element in the second region. The second doped semiconductor layer is arranged on the second region. Along the arrangement direction of the first region and the second region, the width of the third region is greater than or equal to 1 μm.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic technology, and in particular to a back contact cell and a manufacturing method thereof, and a photovoltaic module. Background Art

[0002] A solar cell is a device that can convert sunlight into electrical energy. Specifically, when the solar cell is in operation, sunlight shines on the semiconductor pn junction of the solar cell, forming new hole-electron pairs. Under the action of the built-in electric field of the pn junction, photogenerated holes flow to the p region, and photogenerated electrons flow to the n region. When the circuit is connected, current can be generated. Among them, a solar cell in which both the positive electrode and the negative electrode are on the back of the cell is a back-contact cell. Compared with a double-sided contact solar cell, the front of the back-contact cell is not blocked by a metal electrode, so that the light-facing side of the back-contact cell has a higher light utilization rate. Therefore, the back-contact cell has a higher short-circuit current and photoelectric conversion efficiency, and is one of the current technical directions for achieving high-efficiency crystalline silicon cells.

[0003] However, the back side of the existing back-contact cell has a low utilization rate of incident light, which is not conducive to improving the conversion efficiency of the back-contact cell. Summary of the invention

[0004] The object of the present invention is to provide a back-contact cell and a manufacturing method thereof, and a photovoltaic module, which are used to improve the utilization rate of incident light on the back side of the back-contact cell, thereby improving the conversion efficiency of the back-contact cell.

[0005] In order to achieve the above-mentioned purpose, in a first aspect, the present invention provides a back-contact battery, which includes: a semiconductor substrate, a first doped semiconductor layer, a first doped region, and a second doped semiconductor layer. The conductivity type of the second doped semiconductor layer is opposite to that of the first doped semiconductor layer. The semiconductor substrate includes a first surface and a second surface opposite to each other. The first surface includes a first region and a second region that are spaced apart, and a third region between the first region and the second region. The third region is adjacent to the first region. The first doped semiconductor layer is arranged on the first region. The doping element in the first doped semiconductor layer is a first doping element. The first doped region is arranged in the first region and the third region. The doping concentration of the first doping element in the first doping region is greater than the doping concentration of the first doping element in the second region. The second doped semiconductor layer is arranged on the second region. Wherein, along the arrangement direction of the first region and the second region, the width of the third region is greater than or equal to 1 μm.

[0006] In the case of adopting the above technical solution, when the back contact battery is in working state, the first doped semiconductor layer and the second doped semiconductor layer which are arranged on one side of the first surface of the semiconductor substrate and have opposite conductivity types can effectively shunt and collect the photogenerated carriers in the semiconductor substrate, which is conducive to the formation of photocurrent. Secondly, the back contact battery also includes a first doping region arranged in the first region and the third region, the doping concentration of the first doping element in the first doping region is greater than the doping concentration of the first doping element in the second region, at this time, the doping concentration of the first doping element in the first doping region is high, and the conductivity type of the first doping region which is also doped with the first doping element at a higher concentration is the same as the conductivity type of the first doped semiconductor layer, so the first region and the third region of the semiconductor substrate can be field passivated by the first doping region, and the third region is adjacent to the first region, so that the first doping region and the first doped semiconductor layer arranged on the first region are electrically connected, and then the carriers collected by the first doping region can be transmitted to the corresponding electrode through the first doped semiconductor layer for extraction, and compared with the first doped semiconductor layer, the lateral conduction ability of the semiconductor substrate is stronger, so the first doping region arranged in the first region and the third region of the semiconductor substrate is more conducive to the transmission of carriers and reduces the transmission loss. In addition, since the area of ​​the first surface of the semiconductor substrate is a constant, compared with the back contact battery in which only the first doped semiconductor layer and the second doped semiconductor layer of opposite conductivity type are arranged on one side of the first surface, the back contact battery provided by the present invention also includes a first doped region arranged in the first area and the third area, and the width of the third area (the width of the third area is the width of the first doped region extending out of the first doped semiconductor layer) is greater than or equal to 1μm, which is conducive to reducing the area ratio of the first doped semiconductor layer of the same conductivity type as the first doped region on the side of the first surface, thereby helping to reduce the parasitic absorption of the incident light of the first surface by the first doped semiconductor layer, and helping to improve the light utilization rate of the back contact battery on the side of the first surface. In addition, compared with the existing back contact battery that simply reduces the area ratio of the first doped semiconductor layer on the side of the first surface, the back contact battery provided by the present invention is also provided with a first doped region for shunting and collecting carriers, which can reduce the carrier recombination rate on the side of the first surface and improve the conversion efficiency of the back contact battery.

[0007] As a possible implementation solution, the width of the third region is greater than or equal to 40 μm and less than or equal to 300 μm.

[0008] In the case of adopting the above technical solution, it can be understood that, because the above-mentioned first doped region is arranged in the first region and the third region, and the first doped semiconductor layer is arranged on the first region, the width of the third region will affect the width of the first doped region extending out of the first doped semiconductor layer. In this case, the width of the third region is within the above range, which is conducive to preventing the width of the first doped region extending out of the first doped semiconductor layer from being too small due to the width of the third region being too small, ensuring that the first doped semiconductor layer has a smaller area share on the side of the first surface, further reducing the parasitic absorption of the first doped semiconductor layer, and improving the utilization rate of the incident light on the side of the first surface of the back contact battery. In addition, it can also prevent the width of the first doped region extending out of the first doped semiconductor layer from being too large due to the larger width of the third region, resulting in the first doped semiconductor layer having an area share on the side of the first surface being too small, reducing the process difficulty of manufacturing electrodes on the first doped semiconductor layer, and helping to improve the yield and working performance of the back contact battery.

[0009] As a possible implementation solution, the width of the first region is greater than or equal to 50 μm and less than or equal to 400 μm.

[0010] When the above technical solution is adopted, the first doped semiconductor layer is arranged on the first region, so the width of the first region will affect the formation range of the first doped semiconductor layer on the first side. In this case, the width of the first region is within the above range, which is conducive to preventing the first doped semiconductor layer from occupying too small an area on the first side due to the small width of the first region, thereby reducing the process difficulty of manufacturing electrodes on the first doped semiconductor layer. In addition, it can also prevent the first doped semiconductor layer from occupying too large an area on the first side due to the excessive width of the first region, further reducing the parasitic absorption of the first doped semiconductor layer and improving the utilization rate of the incident light on the first side of the back contact battery.

[0011] As a possible implementation solution, the width of the second region is greater than or equal to 100 μm and less than or equal to 300 μm.

[0012] When the above technical solution is adopted, the width of the second region is within the above range, which can prevent the second doped semiconductor layer from being formed in a smaller range due to the smaller width of the second region, and ensure that the second doped semiconductor layer has a higher field passivation effect. In addition, since the area of ​​the first surface is a constant value, it can also prevent the first region and / or the third region co-located in the first surface with the second region from being smaller due to the width of the second region being too large, and ensure that the first doped region and the first doped semiconductor layer have a higher carrier collection efficiency, further reduce the carrier recombination rate on one side of the first surface, and improve the conversion efficiency of the back contact battery.

[0013] As a possible implementation solution, a maximum doping depth of the first doping region corresponding to the third region is greater than a maximum doping depth of the first doping region corresponding to the first region.

[0014] In the case of adopting the above technical solution, in the back contact battery provided by the present invention, at the first region of the semiconductor substrate, there is not only a first doped region, but also a first doped semiconductor layer, both of which can perform field passivation on the semiconductor substrate for shunting and collecting carriers. At the third region, only the first doped region is used to shunt and collect carriers of the corresponding conductivity type. In this case, when the maximum doping depth of the first doped region corresponding to the third region is large, it can be ensured that the part of the first doped region corresponding to the third region has a higher field passivation effect, further reducing the carrier recombination rate of the third region and improving the conversion efficiency of the back contact battery. The maximum doping depth of the first doped region corresponding to the first region is small, and the doping depth requirements of the first doped region located in the first region can be reduced on the premise of realizing effective shunting and collection of carriers through the first doped semiconductor layer, which is conducive to controlling the manufacturing cost of the back contact battery; at the same time, the maximum doping depth of the first doped region corresponding to the first region is small, which is also conducive to making the part of the first doped region corresponding to the first region relatively small. The doping concentration, so as to form a high-low junction between the first doped semiconductor layer and the first doped region located in the first region, further improves the carrier collection efficiency.

[0015] As a possible implementation scheme, the doping concentration of the first doping element at the surface of the third region corresponding to the first doping region is greater than the doping concentration of the first doping element at the surface of the first doping region corresponding to the first region. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the maximum doping depth of the first doping region corresponding to the third region being greater than the maximum doping depth of the first doping region corresponding to the first region described above, which will not be repeated here.

[0016] As a possible implementation scheme, the surface of the third region has a texture structure. In this case, the surface light trapping effect of the third region can be improved, and the utilization rate of the incident light on the first side of the back contact cell can be further improved.

[0017] As a possible implementation solution, surfaces of the first region and the second region are polished surfaces.

[0018] In the case of adopting the above technical solution, the first doped semiconductor layer is arranged on the first region, and the second doped semiconductor layer is arranged on at least the second region. Based on this, when the surfaces of the first region and the second region are polished surfaces, the surfaces of the first region and the second region are relatively flat, which is conducive to improving the formation quality and deposition film thickness of the first doped semiconductor layer and the second doped semiconductor layer, and enhancing the field passivation effect of the two. Secondly, the surfaces of the first region and the second region are polished surfaces, which is also conducive to reflecting part of the light incident from the second surface into the semiconductor substrate and about to be refracted out of the semiconductor substrate through the surfaces of the first region and the second region back into the semiconductor substrate, which is conducive to being reused by the semiconductor substrate, and further improving the conversion efficiency of the back contact battery.

[0019] As a possible implementation solution, a surface of the third region is recessed into the semiconductor substrate relative to a surface of the first region.

[0020] When the above technical solution is adopted, in the actual manufacturing process, the intrinsic semiconductor layer disposed only in the first region is obtained by patterning the entire deposited intrinsic semiconductor layer (used to manufacture the first doped semiconductor layer), and at least the intrinsic semiconductor layer and the third region are doped to obtain the first doped semiconductor layer and the first doped region. Based on this, when the surface of the third region is concave into the semiconductor substrate relative to the surface of the first region, it indicates that after the intrinsic semiconductor layer is patterned, no intrinsic semiconductor layer remains on the surface of the third region, and further after the doping treatment, no first doped semiconductor layer remains on the surface of the third region, further reducing the parasitic absorption of the first doped semiconductor layer.

[0021] As a possible implementation scheme, the depth of the surface of the third region recessed into the semiconductor substrate relative to the surface of the first region is greater than the maximum doping depth of the first doping region corresponding to the first region. The first doping region is continuously distributed in the first region and the third region. In this case, it can be ensured that the carriers collected by the first doping region located in the third region can be transmitted to the corresponding electrode through the first doped semiconductor layer and then led out, ensuring that the back contact battery has a high conversion efficiency.

[0022] As a possible implementation scheme, the surface of the second region is concave into the semiconductor substrate relative to the surface of the third region, and the concave depth is greater than the maximum doping depth of the first doping region. In this case, it can be ensured that when the second doped semiconductor layer is formed, the first doping element doped into the semiconductor substrate due to the manufacture of the first doped semiconductor layer and the first doping region does not exist in the second region, thereby reducing the risk of leakage between the second doped semiconductor layer and the first doping region, and further improving the conversion efficiency of the back contact battery.

[0023] As a possible implementation, the back contact cell further includes a second doping region disposed in the second region. The doping element in the second doped semiconductor layer is the second doping element, and the doping concentration of the second doping element in the second doping region is greater than the doping concentration of the second doping element in the first region.

[0024] When the above technical solution is adopted, the doping concentration of the second doping element in the second doping region is relatively high, and the second region can be field passivated by the second doping region to improve the passivation effect. Secondly, the doping element in the second doped semiconductor layer is the second doping element, so the conductivity type of the second doping element in the second doping region is the same as the conductivity type of the second doped semiconductor layer, so the second doping region can form a favorable electric field consistent with the induction direction of the second doped semiconductor layer. The existence of this favorable electric field can repel minority carriers and attract majority carriers on the surface of the second region of the semiconductor substrate, thereby improving the collection efficiency of the second doped semiconductor layer for carriers, further reducing the carrier recombination rate, and facilitating the improvement of the conversion efficiency of the back contact battery.

[0025] As a possible implementation scheme, the first surface further includes a fourth region located between the third region and the second region. The first doped region and the second doped semiconductor layer are physically insulated by the fourth region. In this case, the risk of leakage between the first doped region and the second doped semiconductor layer of opposite conductivity types can be reduced, further improving the conversion efficiency of the back contact battery.

[0026] As a possible implementation scheme, the surface of the fourth region is recessed into the semiconductor substrate relative to the surfaces of the second region and the third region to form an isolation groove. The doping element in the second doped semiconductor layer is the second doping element, and the doping concentration of the second doping element in each section of the fourth region is the same. In this case, there is no second doping region with the same conductivity type as the second doping semiconductor layer in the fourth region of the semiconductor substrate, which can prevent the first doping region from being electrically contacted with the second doping region with the opposite conductivity type to the first doping region, resulting in a higher risk of leakage, thereby ensuring that the back contact battery has a higher conversion efficiency.

[0027] As a possible implementation solution, along the arrangement direction of the first region and the second region, the width of the fourth region is greater than or equal to 20 μm and less than or equal to 500 μm.

[0028] When the above technical solution is adopted, the width of the fourth region is within the above range, which is conducive to preventing the spacing between the first doped region and the second doped semiconductor layer of opposite conductivity type from being too small due to the smaller width of the fourth region, and further reducing the risk of leakage between the first doped region and the second doped semiconductor layer. In addition, it can also prevent the width of at least one of the first region, the second region and the third region co-located in the first plane with the fourth region from being too small due to the larger width of the fourth region, thereby ensuring that the first doped semiconductor layer, the first doped region and the second doped semiconductor layer have a higher carrier collection efficiency, and ensuring that the back contact battery has a higher conversion efficiency.

[0029] As a possible implementation scheme, the second doped semiconductor layer also extends from the second region to cover at least a portion of the first doped region located in the third region. Wherein, in the third region, the second doped semiconductor layer and the first doped region are in direct contact; or, the back contact battery further includes an insulating layer, and the insulating layer is disposed between the first doped region and the second doped semiconductor layer located in the third region.

[0030] In the case of adopting the above technical solution, when the second doped semiconductor layer and the first doped region are in direct contact in the third region, the second doped semiconductor layer and the first doped region can form a built-in diode with a lower reverse breakdown voltage, thereby reducing the risk of hot spots in the back contact battery. When the back contact battery also includes an insulating layer arranged between the first doped region and the second doped semiconductor layer located in the third region, the insulating layer can physically insulate the first doped region and the second doped semiconductor layer of opposite conductivity types along the thickness direction of the semiconductor substrate, thereby reducing the forward leakage loss of the back contact battery and improving the conversion efficiency of the back contact battery. It can be seen from this that the risk of shielding the back contact battery by obstructions such as sand and dust in the installation environment of the back contact battery in actual application scenarios can be used to determine whether the second doped semiconductor layer in the third region of the back contact battery is electrically connected to the first doped region, thereby improving the applicability of the back contact battery provided by the present invention in different application scenarios.

[0031] As a possible implementation solution, in the third region, a ratio of a width of the second doped semiconductor layer to a width of the first doped region is greater than or equal to 5% and less than or equal to 80%.

[0032] When the above technical solution is adopted, in the third region, the larger the width of the second doped semiconductor layer, the larger the leakage contact area between the second doped semiconductor layer and the first doped region, and the larger the leakage current. Based on this, when the ratio of the width of the second doped semiconductor layer to the width of the first doped region in the third region is within the above range, it can prevent the leakage contact area between the two from being small due to the small ratio, ensuring that the back contact battery has a lower risk of hot spots. It can also prevent the forward leakage loss between the two from being too large due to the large ratio, ensuring that the back contact battery has a higher conversion efficiency.

[0033] As a possible implementation scheme, in the third region, the width of the second doped semiconductor layer is greater than or equal to 20 μm and less than or equal to 150 μm. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the ratio of the width of the second doped semiconductor layer to the width of the first doped region in the third region being greater than or equal to 5% and less than or equal to 80% as described above, which will not be repeated here.

[0034] As a possible implementation scheme, the doping element in the second doped semiconductor layer is the second doping element. When the second doped semiconductor layer located in the third region is in direct contact with the first doping region, the doping concentration of the second doping element in the first doping region in contact with the second doping semiconductor layer is greater than the doping concentration of the second doping element in the first region.

[0035] When the above technical solution is adopted, the first doped region in contact with the second doped semiconductor layer is not only doped with the first doping element of the same conductivity type as the first doped semiconductor layer, but also doped with the second doping element of the same conductivity type as the second doped semiconductor layer, that is, there are two types of doping elements of opposite conductivity types co-doped, which is beneficial to reducing the conductive properties of the first doped region in contact with the second doped semiconductor layer, thereby helping to reduce the leakage current between the first doped region and the second doped semiconductor layer, thereby reducing the forward leakage loss of the back contact battery, and helping to improve the conversion efficiency of the back contact battery.

[0036] In a second aspect, the present invention provides a photovoltaic module, which includes a back-contact cell provided by the first aspect and various implementations thereof.

[0037] The beneficial effects of the second aspect of the present invention and its various implementations can be analyzed by referring to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0038] In a third aspect, the present invention provides a method for manufacturing a back-contact battery, which comprises: first, providing a semiconductor substrate. The semiconductor substrate comprises a first surface and a second surface opposite to each other. The first surface comprises a first region and a second region which are spaced apart, and a third region between the first region and the second region. The third region is adjacent to the first region. Next, a first doped semiconductor layer is formed on the first region, and a first doped region is formed in the first region and the third region. The doping element in the first doped semiconductor layer is a first doping element. The doping concentration of the first doping element in the first doping region is greater than the doping concentration of the first doping element in the second region. Wherein, along the arrangement direction of the first region and the second region, the width of the third region is greater than or equal to 1 μm. Next, a second doped semiconductor layer is formed on the second region. The conductivity type of the second doped semiconductor layer is opposite to that of the first doped semiconductor layer.

[0039] As a possible implementation scheme, forming a first doped semiconductor layer disposed on the first region, and forming a first doped region disposed in the first region and the third region, includes: forming an intrinsic semiconductor layer on the first region. Next, performing a doping treatment on the intrinsic semiconductor layer and a portion of the first surface exposed outside the intrinsic semiconductor layer, so that the intrinsic semiconductor layer forms a first doped semiconductor layer, and forming a first doped region in the first region and a portion of the first surface exposed outside the first doped semiconductor layer. Next, selectively removing a portion of the first doped region outside the first region and the third region.

[0040] In the case of adopting the above technical solution, the manufacturing method provided by the present invention is to form an intrinsic semiconductor layer on the first region, and then perform doping treatment on the intrinsic semiconductor layer and the portion of the first surface exposed outside the intrinsic semiconductor layer to form a first doped semiconductor layer and a first doped region. At this time, compared with the formation by internal expansion of the doped semiconductor layer, the first doped region located in the third region is formed by directly performing doping treatment, which is beneficial to increase the doping concentration of the first doping element in the first doped region located in the third region, so that the first doped region located in the third region has higher conductive properties, which is beneficial to improve the field passivation effect of the first doped region located in the third region, thereby improving the conversion efficiency of the back contact battery.

[0041] As a possible implementation scheme, after forming an intrinsic semiconductor layer on the first region, before performing doping treatment on the intrinsic semiconductor layer and the portion of the first surface exposed outside the intrinsic semiconductor layer, the method for manufacturing a back contact battery also includes: texturing the surface of the third region to form a texture structure on the surface of the third region.

[0042] As a possible implementation scheme, the first surface also includes a fourth region located between the third region and the second region. After forming a second doped semiconductor layer disposed on the second region, the manufacturing method of the back contact battery includes: etching a portion of the semiconductor substrate located in the fourth region so that the surface of the fourth region is recessed into the semiconductor substrate relative to the surfaces of the second region and the third region to form an isolation groove. The doping element in the second doped semiconductor layer is the second doping element, and the doping concentration of the second doping element in each subdivision of the fourth region is the same.

[0043] As a possible implementation scheme, forming a second doped semiconductor layer disposed on the second region includes: forming a second doped semiconductor layer disposed entirely on the first doped semiconductor layer, the first doped region, and the second region. Next, selectively removing at least a portion of the second doped semiconductor layer located on the first doped semiconductor layer, and retaining a portion of the second doped semiconductor layer located on the second region and at least a portion of the first doped region.

[0044] The beneficial effects of the third aspect of the present invention and its various implementations can be analyzed by referring to the beneficial effects of the first aspect and its various implementations, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0046] Figure 1 A schematic longitudinal cross-sectional view of a first structure of a back contact battery provided by an embodiment of the present invention;

[0047] Figure 2 A schematic longitudinal cross-sectional view of a second structure of a back contact battery provided by an embodiment of the present invention;

[0048] Figure 3 A schematic longitudinal cross-sectional view of a third structure of a back contact battery provided by an embodiment of the present invention;

[0049] Figure 4 A schematic longitudinal cross-sectional view of a fourth structure of a back-contact battery provided by an embodiment of the present invention;

[0050] Figure 5 A schematic longitudinal cross-sectional view of a fifth structure of a back-contact battery provided by an embodiment of the present invention;

[0051] Figure 6 A schematic longitudinal cross-sectional view of a sixth structure of a back-contact battery provided by an embodiment of the present invention;

[0052] Figure 7A longitudinal cross-sectional schematic diagram of a seventh structure of a back-contact battery provided by an embodiment of the present invention;

[0053] Figure 8 A schematic longitudinal cross-sectional view of an eighth structure of a back-contact battery provided by an embodiment of the present invention;

[0054] Fig. 9 A longitudinal cross-sectional schematic diagram of a ninth structure of a back contact battery provided by an embodiment of the present invention;

[0055] Fig.10 A schematic longitudinal cross-sectional view of a tenth structure of a back contact battery provided by an embodiment of the present invention;

[0056] Fig.11 A schematic longitudinal cross-sectional view of an eleventh structure of a back-contact battery provided by an embodiment of the present invention;

[0057] Fig.12 Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 1 ;

[0058] Fig.13 Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 2 ;

[0059] Fig.14 Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 3 ;

[0060] Fig.15 Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 4 ;

[0061] Fig.16 Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 5 ;

[0062] Fig.17 Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 6 ;

[0063] Fig.18 Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 7 ;

[0064] Fig.19 Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 8 ;

[0065] Fig. 20Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 9 ;

[0066] Fig.21 Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 10 ;

[0067] Fig. 22 Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 10 one;

[0068] Fig.23 Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 10 two;

[0069] Fig.24 Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 10 three;

[0070] Fig.25 Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 10 Four;

[0071] Fig.26 Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 10 five;

[0072] Fig. 27 Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 10 six;

[0073] Fig.28 Schematic diagram of the structure of the back contact battery provided in the embodiment of the present invention during the manufacturing process Figure 10 seven.

[0074] Figure numerals: 11 is a semiconductor substrate, 12 is a first doped semiconductor layer, 13 is a first doped region, 14 is a second doped semiconductor layer, 15 is a first region, 16 is a second region, 17 is a third region, 18 is a second doped region, 19 is a fourth region, 20 is an isolation trench, 21 is an insulating layer, 22 is a first interface passivation layer, 23 is a second interface passivation layer, 24 is a surface passivation layer, 25 is an intrinsic semiconductor layer, 26 is a first mask layer, 27 is a doped silicon glass layer, 28 is a second mask layer, 29 is a third mask layer, 30 is a first electrode, and 31 is a second electrode. DETAILED DESCRIPTION

[0075] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present invention. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of the concept of the present invention.

[0076] Various structural schematic diagrams according to embodiments of the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for a clearer expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0077] In the context of the present invention, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be an intermediate layer / element between them. In addition, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "under" the other layer / element. In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0078] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined. The meaning of "several" is one or more, unless otherwise clearly and specifically defined.

[0079] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0080] A solar cell is a device that can convert sunlight into electrical energy. Specifically, when the solar cell is in operation, sunlight shines on the semiconductor pn junction of the solar cell, forming new hole-electron pairs. Under the action of the built-in electric field of the pn junction, photogenerated holes flow to the p region, and photogenerated electrons flow to the n region. When the circuit is connected, current can be generated. Among them, a solar cell in which both the positive electrode and the negative electrode are on the back of the cell is a back-contact cell. Compared with a double-sided contact solar cell, the front of the back-contact cell is not blocked by a metal electrode, so that the light-facing side of the back-contact cell has a higher light utilization rate. Therefore, the back-contact cell has a higher short-circuit current and photoelectric conversion efficiency, and is one of the current technical directions for achieving high-efficiency crystalline silicon cells.

[0081] However, the back side of the existing back-contact battery is provided with a doped semiconductor layer for collecting carriers. Although the doped semiconductor layer can realize the shunting and collection of photogenerated carriers, it has parasitic absorption, resulting in a low utilization rate of incident light on the back side of the back-contact battery, which is not conducive to improving the conversion efficiency of the back-contact battery. If the parasitic absorption of incident light on the back side is reduced by simply changing the formation range of the doped semiconductor layer on the back side of the battery, it will affect the shunting and collection of photogenerated carriers, resulting in a high carrier recombination rate, which is still not conducive to improving the conversion efficiency of the back-contact battery.

[0082] In order to solve the above technical problems, in the first aspect, an embodiment of the present invention provides a back contact battery. Figure 1 As shown, the back contact battery includes: a semiconductor substrate 11, a first doped semiconductor layer 12, a first doped region 13 and a second doped semiconductor layer 14. The conductivity type of the second doped semiconductor layer 14 is opposite to that of the first doped semiconductor layer 12. The semiconductor substrate 11 includes a first surface and a second surface opposite to each other. The first surface includes a first region 15 and a second region 16 that are spaced apart, and a third region 17 located between the first region 15 and the second region 16. The third region 17 is adjacent to the first region 15. The first doped semiconductor layer 12 is disposed on the first region 15. The doping element in the first doped semiconductor layer 12 is a first doping element. The first doped region 13 is disposed in the first region 15 and the third region 17. The doping concentration of the first doping element in the first doping region 13 is greater than the doping concentration of the first doping element in the second region 16. The second doped semiconductor layer 14 is disposed on the second region 16. Wherein, along the arrangement direction of the first region 15 and the second region 16, the width of the third region 17 is greater than or equal to 1 μm.

[0083] It should be noted that, along the arrangement direction of the first region and the second region, the width of the third region is equal to the width of the first doped region extending out of the first doped semiconductor layer. Along the arrangement direction of the first region and the second region, the width of the first doped region extending out of the first doped semiconductor layer refers to the width of the portion of the first doped region not covered by the first doped semiconductor layer along the arrangement direction of the first region and the second region.

[0084] In the case of adopting the above technical solution, when the back contact battery is in working state, the first doped semiconductor layer and the second doped semiconductor layer which are arranged on the first side of the semiconductor substrate and have opposite conductivity types can effectively shunt and collect the photogenerated carriers in the semiconductor substrate, which is conducive to the formation of photocurrent. Figure 1 As shown, the back contact battery also includes a first doping region 13 arranged in the first region 15 and the third region 17, and the doping concentration of the first doping element in the first doping region 13 is greater than the doping concentration of the first doping element in the second region 16. At this time, the doping concentration of the first doping element in the first doping region 13 is relatively high, and the conductivity type of the first doping region 13, which is also doped with a relatively high concentration of the first doping element, is the same as the conductivity type of the first doped semiconductor layer 12. Therefore, the first region 15 and the third region 17 of the semiconductor substrate 11 can be field passivated by the first doping region 13, and the third region 17 is adjacent to the first region 15, so that the first doping region 13 and the first doped semiconductor layer 12 arranged on the first region 15 are electrically connected, and then the carriers collected by the first doping region 13 can be transmitted to the corresponding electrode (i.e., the first electrode 30 in the figure) via the first doped semiconductor layer 12 for extraction, and compared with the first doped semiconductor layer 12, the lateral conduction capability of the semiconductor substrate 11 is relatively strong, so the first doping region 13 in the first region 15 and the third region 17 of the semiconductor substrate 11 is more conducive to the transmission of carriers and reduces transmission losses. In addition, since the area of ​​the first surface of the semiconductor substrate 11 is a constant, compared with the back contact battery in which only the first doped semiconductor layer 12 and the second doped semiconductor layer 14 of opposite conductivity type are arranged on one side of the first surface, the back contact battery provided by the embodiment of the present invention also includes a first doped region 13 arranged in the first region 15 and the third region 17, and the width of the third region 17 is greater than or equal to 1 μm, which is conducive to reducing the area ratio of the first doped semiconductor layer 12 of the same conductivity type as the first doped region 13 on the side of the first surface, thereby facilitating the reduction of the parasitic absorption of the incident light of the first surface by the first doped semiconductor layer 12, and facilitating the improvement of the light utilization rate of the back contact battery on the side of the first surface. In addition, compared with the existing back contact battery that simply reduces the area ratio of the first doped semiconductor layer 12 on the side of the first surface, the back contact battery provided by the embodiment of the present invention is also provided with a first doped region 13 for shunting and collecting carriers, which can reduce the carrier recombination rate on the side of the first surface and improve the conversion efficiency of the back contact battery.

[0085] In actual application, the embodiment of the present invention does not specifically limit the material and conductivity type of the semiconductor substrate. For example, the semiconductor substrate may be a silicon substrate; or, the semiconductor substrate may be a substrate made of any semiconductor material such as a germanium silicon substrate, a germanium substrate, or a gallium arsenide substrate. In addition, the semiconductor substrate may be an N-type semiconductor substrate, a P-type semiconductor substrate, or an intrinsic semiconductor substrate.

[0086] Secondly, the semiconductor substrate includes a first surface and a second surface relative to each other, the first surface of the semiconductor substrate corresponds to the back surface of the back contact battery, and the second surface of the semiconductor substrate corresponds to the front surface of the back contact battery. Among them, the distribution of the first region, the second region and the third region on the first surface can be determined according to the distribution of the first doped semiconductor layer, the first doped region and the second doped semiconductor layer formed on the first surface. Specifically, since the first doped semiconductor layer included in the back contact battery is arranged on the first region, the distribution range of the first region on the first surface can be determined according to the distribution requirements of the first doped semiconductor layer in the actual application scenario. Since at least part of the second doped semiconductor layer included in the back contact battery is arranged on the second region of the first surface, the distribution range of the second region on the first surface can be determined according to the distribution requirements of the second doped semiconductor layer on the semiconductor substrate in the actual application scenario. As for the third region, the distribution range of the third region on the first surface can be determined according to the width range requirements of the first doped region extending out of the first doped semiconductor layer in the actual application scenario.

[0087] It can be understood that the first region and the third region correspond to the first emitter region, and the second region corresponds to the second emitter region. One of the first emitter region and the second emitter region corresponds to the P region, and the other corresponds to the N region. As for the specific proportion of the first region, the second region and the third region in the first surface, it can be determined according to the requirements for the conversion efficiency of the back contact battery and the parasitic absorption of the first doped semiconductor layer in the actual application scenario, and no specific limitation is made here.

[0088] Specifically, the width of the third region may be any value greater than or equal to 1 μm, for example, the width of the third region may be 1 μm, 2 μm, 5 μm, 10 μm, 20 μm, 50 μm, 80 μm, 100 μm, 150 μm, 200 μm, 240 μm or 300 μm.

[0089] Exemplarily, the width of the third region may be greater than or equal to 40 μm and less than or equal to 300 μm. For example, the width of the third region may be 40 μm, 60 μm, 80 μm, 100 μm, 120 μm, 150 μm, 180 μm, 200 μm, 220 μm, 240 μm, 260 μm, 280 μm or 300 μm, etc. In this case, it can be understood that because the above-mentioned first doped region is arranged in the first region and the third region, and the first doped semiconductor layer is arranged on the first region, the width of the third region will affect the width of the first doped region extending out of the first doped semiconductor layer. In this case, the width of the third region is within the above range, which is conducive to preventing the width of the first doped region extending out of the first doped semiconductor layer from being too small due to the width of the third region being too small, ensuring that the first doped semiconductor layer has a smaller area share on one side of the first surface, further reducing the parasitic absorption of the first doped semiconductor layer, and improving the utilization rate of the incident light on one side of the first surface of the back contact battery. In addition, it can also prevent the width of the third region from being too large, which causes the width of the first doped region to extend too far out of the first doped semiconductor layer, resulting in the first doped semiconductor layer occupying too small an area on one side of the first surface, thereby reducing the process difficulty of manufacturing electrodes on the first doped semiconductor layer, and is beneficial to improving the yield and working performance of the back contact battery.

[0090] Exemplarily, the width of the first region may be greater than or equal to 50 μm and less than or equal to 400 μm. For example, the width of the first region may be 50 μm, 100 μm, 120 μm, 140 μm, 160 μm, 180 μm, 200 μm, 220 μm, 240 μm, 250 μm, 300 μm, 350 μm or 400 μm, etc. In this case, the first doped semiconductor layer is disposed on the first region, so the width of the first region affects the formation range of the first doped semiconductor layer on one side of the first surface. In this case, the width of the first region is within the above range, which is conducive to preventing the first doped semiconductor layer from occupying too small an area on one side of the first surface due to the small width of the first region, thereby reducing the process difficulty of manufacturing electrodes on the first doped semiconductor layer. In addition, it is also possible to prevent the first doped semiconductor layer from occupying too large an area on one side of the first surface due to the excessive width of the first region, further reducing the parasitic absorption of the first doped semiconductor layer, and improving the utilization rate of the incident light on one side of the first surface of the back contact battery.

[0091] Exemplarily, the width of the second region may be greater than or equal to 100 μm and less than or equal to 300 μm. For example, the width of the second region may be 100 μm, 120 μm, 140 μm, 160 μm, 180 μm, 200 μm, 220 μm, 240 μm, 260 μm, 280 μm or 300 μm, etc. In this case, the width of the second region is within the above range, which can prevent the second doped semiconductor layer from having a smaller formation range due to the smaller width of the second region, and ensure that the second doped semiconductor layer has a higher field passivation effect. In addition, since the area of ​​the first surface is a constant value, it can also prevent the width of the first region and / or the third region located in the first surface together with the second region from being smaller due to the width of the second region being too large, ensuring that the first doped region and the first doped semiconductor layer have a higher carrier collection efficiency, further reducing the carrier recombination rate on one side of the first surface, and improving the conversion efficiency of the back contact battery.

[0092] In terms of surface morphology, Figure 1 As shown, the first surface and the second surface of the semiconductor substrate 11 may be planes. Figure 2 As shown, the second surface of the semiconductor substrate 11 may also have a texture structure to improve the light trapping effect of the second surface and improve the utilization rate of light by the semiconductor substrate 11. The type of the texture structure on the second surface may be a pyramid texture structure, a hole texture structure, or a V-groove texture structure. The embodiment of the present invention does not specifically limit the morphology and size of the texture structure on the second surface.

[0093] As for the first surface, part of the surface may have a textured structure, and part of the surface may be a polished surface. The surface morphology of different areas in the first surface may be determined according to the requirements for the formation quality of the first doped semiconductor layer and the second doped semiconductor layer in the actual application scenario, and the requirements for the utilization rate of the incident light on one side of the first surface, and is not specifically limited here.

[0094] For example, Figure 3As shown, the surface of the third region 17 may have a texture structure. In this case, the surface light trapping effect of the third region 17 can be improved, and the utilization rate of the incident light on the first side of the back contact battery can be further improved. Among them, the morphology of the texture structure of the third region 17 can be a pyramid-type texture structure, a hole-type texture structure or a V-shaped groove texture structure. The embodiment of the present invention does not specifically limit the morphology and size of the texture structure of the third region 17. Among them, in the case where both the third region 17 and the second side have a texture structure, the type and size of the texture structure of the third region 17 and the second side can be roughly the same. At this time, the third region 17 and the second side can be textured at the same time by the same etching solution to improve the manufacturing efficiency of the back contact battery. Of course, the type and / or size of the texture structure of the third region 17 and the second side can also be different, so as to set the type and size of the texture structure of the third region 17 and the second side respectively according to the requirements of different regions in the actual application scenario, so as to improve the applicability of the back contact battery provided by the embodiment of the present invention in different application scenarios.

[0095] For example, Figure 3 As shown, the surfaces of the first region 15 and the second region 16 can be polished surfaces. In this case, the first doped semiconductor layer 12 is disposed on the first region 15, and the second doped semiconductor layer 14 is at least disposed on the second region 16. Based on this, when the surfaces of the first region 15 and the second region 16 are polished surfaces, the surfaces of the first region 15 and the second region 16 are relatively flat, which is conducive to improving the formation quality and deposition film thickness of the first doped semiconductor layer 12 and the second doped semiconductor layer 14, and enhancing the field passivation effect of the two. Secondly, the surfaces of the first region 15 and the second region 16 are polished surfaces, which is also conducive to reflecting part of the light incident from the second surface into the semiconductor substrate 11 and refracting out of the semiconductor substrate 11 through the surfaces of the first region 15 and the second region 16 back into the semiconductor substrate 11, which is conducive to being reused by the semiconductor substrate 11, and further improving the conversion efficiency of the back contact battery.

[0096] Secondly, if Figure 2 As shown, the surfaces of the first area 15 and the third area 17 of the first surface may be flush. Figure 3As shown, the surface of the third region 17 may also be recessed into the semiconductor substrate 11 relative to the surface of the first region 15. In this case, in the actual manufacturing process, the intrinsic semiconductor layer disposed only in the first region 15 is obtained by patterning the entire deposited intrinsic semiconductor layer (used to manufacture the first doped semiconductor layer 12), and at least the intrinsic semiconductor layer and the third region 17 are doped to obtain the first doped semiconductor layer 12 and the first doped region 13. Based on this, when the surface of the third region 17 is recessed into the semiconductor substrate 11 relative to the surface of the first region 15, it indicates that after the intrinsic semiconductor layer is patterned, no intrinsic semiconductor layer remains on the surface of the third region 17, and further after the doping treatment, no first doped semiconductor layer remains on the surface of the third region 17, further reducing the parasitic absorption of the first doped semiconductor layer.

[0097] The depth of the surface of the third region recessed into the semiconductor substrate relative to the surface of the first region can be determined based on the actual manufacturing process, the surface morphology of the third region, and the requirements for the absorption depth of the semiconductor substrate in the first region and the third region in actual application scenarios, and is not specifically limited here.

[0098] For example, Figure 3 As shown, the depth of the surface of the third region 17 recessed into the semiconductor substrate 11 relative to the surface of the first region 15 can be greater than the maximum doping depth of the first doping region 13 corresponding to the first region 15. In this case, it can be ensured that the first doped semiconductor layer 12 will not remain on the surface of the third region 17, and it is also beneficial to form a texture structure with anti-reflection effect such as a suede structure in the third region 17, which is beneficial to improve the conversion efficiency of the back contact battery.

[0099] For example, the depth of the surface of the third region recessed into the semiconductor substrate relative to the surface of the first region may be greater than 2 μm (eg, 2.01 μm, 2.1 μm, 2.5 μm, 3 μm, 3.5 μm, 4 μm, 4.5 μm or 5 μm, etc.).

[0100] It should be noted that if Figure 2 and Figure 3As shown, no matter the surface of the third region 17 is flush with the surface of the first region 15, or the surface of the third region 17 is recessed relative to the surface of the first region 15 toward the semiconductor substrate 11, the first doping region 13 is continuously distributed in the first region 15 and the third region 17. For example, even if the depth of the recess of the surface of the third region 17 relative to the surface of the first region 15 into the semiconductor substrate 11 is greater than the maximum doping depth of the first doping region 13 corresponding to the first region 15, the first doping region 13 is continuously distributed in the first region 15 and the third region 17. In this case, it can be ensured that the carriers collected by the first doping region 13 in the third region 17 can be transmitted to the corresponding electrode through the first doped semiconductor layer 12 and then led out, so as to ensure that the back contact battery has a higher conversion efficiency.

[0101] In addition, if Figure 2 As shown, the surface of the second region 16 may be flush with the surface of the third region 17. Alternatively, Figure 3 As shown, the surface of the second region 16 may also be recessed into the semiconductor substrate 11 relative to the surface of the third region 17, so that the second region 16 has a lower doping concentration of the first doping element, thereby reducing the leakage risk of the back contact battery. In this case, the depth of the recess of the surface of the second region 16 relative to the surface of the third region 17 into the semiconductor substrate 11 can be determined based on the maximum doping depth of the first doping region 13 and the requirements for the leakage risk of the back contact battery in the actual application scenario, and is not specifically limited here.

[0102] Exemplarily, when the surface of the second region is recessed into the semiconductor substrate relative to the surface of the third region, the depth of the recess of the surface of the second region relative to the surface of the third region into the semiconductor substrate may be greater than the maximum doping depth of the first doping region. In this case, it can be ensured that when the second doped semiconductor layer is formed, the first doping element doped into the semiconductor substrate due to the manufacture of the first doped semiconductor layer and the first doping region does not exist in the second region, thereby reducing the risk of leakage between the second doped semiconductor layer and the first doping region, and further improving the conversion efficiency of the back contact battery.

[0103] For example, the depth of the surface of the second region recessed into the semiconductor substrate relative to the surface of the third region may be greater than 3 μm (such as 3.01 μm, 3.2 μm, 3.5 μm, 3.8 μm, 4 μm, 4.2 μm, 4.5 μm, 4.8 μm or 5 μm, etc.).

[0104] It should be noted that, in the case where the surface of the third region has a texture structure, the depth of the surface of the third region being recessed into the semiconductor substrate relative to the surface of the first region refers to the distance between the top of the texture structure of the third region and the surface of the first region. The depth of the surface of the second region being recessed into the semiconductor substrate relative to the surface of the third region refers to the distance between the bottom of the texture structure of the third region (the side close to the semiconductor substrate) and the surface of the second region.

[0105] In addition, in the actual application process, such as Figure 2 As shown, the first surface of the semiconductor substrate 11 may only have the first region 15, the second region 16 and the third region 17. In this case, the third region 17 is adjacent to the first region 15 and the second region 16 on both sides along the width direction, which is beneficial to increase the area ratio of at least one of the first doped semiconductor layer 12, the first doped region 13 and the second doped semiconductor layer 14 on one side of the first surface, which is beneficial to the collection of carriers. Or, as Figure 3 As shown, the first surface may further include a fourth region 19 located between the third region 17 and the second region 16, and the first doped region 13 and the second doped semiconductor layer 14 are physically insulated by the fourth region 19. In this case, the risk of leakage between the first doped region 13 and the second doped semiconductor layer 14 of opposite conductivity types can be reduced, further improving the conversion efficiency of the back contact battery.

[0106] As for the width of the fourth region, it can be determined according to the requirements for leakage prevention between the first doped region and the second doped semiconductor layer and the requirements for carrier collection efficiency in actual application scenarios, and is not specifically limited here.

[0107] Exemplarily, along the arrangement direction of the first region and the second region, the width of the fourth region may be greater than or equal to 20 μm and less than or equal to 500 μm. For example, the width of the fourth region may be 20 μm, 40 μm, 60 μm, 80 μm, 100 μm, 120 μm, 150 μm, 180 μm, 200 μm, 240 μm, 300 μm, 350 μm, 400 μm, 450 μm or 500 μm, etc. In this case, the width of the fourth region is within the above range, which is conducive to preventing the spacing between the first doped region and the second doped semiconductor layer of opposite conductivity type from being too small due to the small width of the fourth region, and further reducing the risk of leakage between the first doped region and the second doped semiconductor layer. In addition, it is also possible to prevent the width of at least one of the first region, the second region and the third region co-located in the first plane with the fourth region from being too small due to the large width of the fourth region, thereby ensuring that the first doped semiconductor layer, the first doped region and the second doped semiconductor layer have a higher carrier collection efficiency, and ensuring that the back contact battery has a higher conversion efficiency.

[0108] In addition, if Figure 4As shown, the surface of the fourth region 19 may be flush with the surface of the second region 16. Alternatively, Figure 3 As shown, the surface of the fourth region 19 can also be recessed into the semiconductor substrate 11 relative to the surfaces of the second region 16 and the third region 17 to form an isolation groove 20. The presence of the isolation groove 20 can ensure that the second doped semiconductor layer 14 will not remain in the fourth region 19, further reducing the risk of leakage. The depth of the isolation groove 20 can be determined according to the material of the second doped semiconductor layer 14 in the actual application scenario and the anti-leakage requirements between the second doped semiconductor layer 14 and the first doped region 13, and is not specifically limited here.

[0109] For example, Figure 3 and Figure 5 As shown, when the doping element in the second doped semiconductor layer 14 is the second doping element, and the surface of the fourth region 19 is concave toward the semiconductor substrate 11 relative to the surfaces of the second region 16 and the third region 17, the doping concentration of the second doping element in each section of the fourth region 19 is the same. In this case, there is no second doping region 18 of the same conductivity type as the second doping semiconductor layer 14 in the fourth region 19 of the semiconductor substrate 11, which can prevent the first doping region 13 from being electrically in contact with the second doping region 18 of opposite conductivity type to the first doping region 13, thereby ensuring that the back contact cell has a higher conversion efficiency.

[0110] As for the first doped semiconductor layer, in terms of the conductivity type, the embodiment of the present invention does not specifically limit the conductivity type of the first doped semiconductor layer, as long as the conductivity types of the first doped semiconductor layer and the second doped semiconductor layer are opposite. Specifically, the conductivity type of the first doped semiconductor layer may be N-type, in which case the conductivity type of the second doped semiconductor layer is P-type; or the conductivity type of the first doped semiconductor layer may also be P-type, in which case the conductivity type of the second doped semiconductor layer is N-type.

[0111] In terms of materials, the material of the first doped semiconductor layer may include any semiconductor material such as silicon, silicon germanium, germanium or gallium arsenide. In terms of the arrangement of the material, the crystal phase of the first doped semiconductor layer may be amorphous, microcrystalline, nanocrystalline, single crystal or polycrystalline.

[0112] Secondly, if Figures 1 to 5 As shown, the first doped semiconductor layer 12 can be directly disposed on the first region 15. Alternatively, as shown in FIG. Figure 6As shown, the above-mentioned back contact cell may also include a first interface passivation layer 22 located between the first doped semiconductor layer 12 and the semiconductor substrate 11. In this case, the passivation contact structure composed of the first interface passivation layer 22 and the first doped semiconductor layer 12 has an excellent interface passivation effect, and can realize the selective collection of carriers, reduce the carrier recombination rate of the first region 15 of the first surface of the semiconductor substrate 11, and further improve the photoelectric conversion efficiency of the back contact cell. The material and thickness of the first interface passivation layer 22 can be set according to the material of the first doped semiconductor layer 12 and actual needs, and are not specifically limited here. For example: when the material of the first doped semiconductor layer is doped polycrystalline silicon, the first interface passivation layer is a tunneling passivation layer. For another example: when the material of the first doped semiconductor layer includes at least one of doped amorphous silicon, doped microcrystalline silicon and doped nanocrystalline silicon, the first interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon layer or a mixed layer of the above three.

[0113] It should be noted that the first doping element in the first doped semiconductor layer may be of one type, such as phosphorus; or, the first doping element may be of multiple types with the same conductivity type, such as phosphorus and arsenic.

[0114] For the first doping region, from the doping aspect, the type of the first doping element in the first doping region may be the same as or different from the type of the first doping element in the first doping semiconductor layer. For example: when the conductivity type of the first doping semiconductor layer and the first doping region is N-type, the first doping elements in the first doping semiconductor layer and the first doping region may both be phosphorus. For another example: when the conductivity type of the first doping semiconductor layer and the first doping region is P-type, the first doping elements in the first doping semiconductor layer and the first doping region may both be boron. For another example: when the conductivity type of the first doping semiconductor layer and the first doping region is N-type, the first doping element in the first doping semiconductor layer may be phosphorus, and the first doping element in the first doping region may both be arsenic. It can be understood that if in the actual manufacturing process, the first doping element in the first doping region and the first doping element in the first doping semiconductor layer are obtained by doping based on the same doping source, then the type of the first doping element in the first doping semiconductor layer is the same as the type of the first doping element in the first doping region.

[0115] Secondly, the doping concentration of the first doping element in the first doping region is greater than the doping concentration of the first doping element in the second region. Specifically, the doping concentration and doping depth of the first doping element in each part of the first doping region can be determined according to the formation method of the first doping region and the requirements of the field passivation effect of the first doping region in the actual application scenario, and are not specifically limited here.

[0116] For example, the maximum doping depth of the first doping region corresponding to the third region may be equal to the maximum doping depth of the first doping region corresponding to the first region. Figure 6 As shown, the maximum doping depth of the first doping region 13 corresponding to the third region 17 may also be greater than the maximum doping depth of the first doping region 13 corresponding to the first region 15. In this case, in the back contact battery provided by the embodiment of the present invention, in the first region 15 of the semiconductor substrate 11, there is not only the first doping region 13, but also the first doped semiconductor layer 12, both of which can perform field passivation on the semiconductor substrate 11 for shunting and collecting carriers. In the third region 17, only the first doping region 13 is used to shunt and collect carriers of the corresponding conductive type. In this case, when the maximum doping depth of the first doping region 13 corresponding to the third region 17 is large, it can be ensured that the portion of the first doping region 13 corresponding to the third region 17 has a higher field passivation effect, further reducing the carrier recombination rate of the third region 17, and improving the conversion efficiency of the back contact battery. The maximum doping depth of the first doping region 13 corresponding to the first region 15 is relatively small. On the premise that effective carrier diversion and collection are achieved through the first doped semiconductor layer 12, the doping depth requirement for the first doping region 13 located in the first region 15 can be reduced, which is beneficial to controlling the manufacturing cost of the back contact battery. At the same time, the maximum doping depth of the first doping region 13 corresponding to the first region 15 is relatively small, which is also beneficial to making the part of the first doping region 13 corresponding to the first region 15 have a relatively small doping concentration, thereby forming a high-low junction between the first doped semiconductor layer 12 and the first doping region 13 located in the first region 15, so as to further improve the carrier collection efficiency.

[0117] Among them, the difference between the maximum doping depth of the first doping region corresponding to the third region and the maximum doping depth of the first doping region corresponding to the first region can be determined according to the formation method of the first doping region and the different requirements for the first doping region being located in the first region and the third region in actual application scenarios, and no specific limitation is made here.

[0118] For example, in the portion of the first doping region corresponding to the first area, the doping concentration is greater than 1E18 cm -3 The maximum doping depth of the region can be less than 200nm. In the portion of the first doping region corresponding to the third region, the doping concentration is greater than 1E18cm -3 The maximum doping depth of the region can be greater than 200 nm.

[0119] Exemplarily, the doping concentration of the first doping element at the surface of the third region corresponding to the first doping region may be equal to the doping concentration of the first doping element at the surface of the first region corresponding to the first doping region. Alternatively, it may be greater than the doping concentration of the first doping element at the surface of the first region corresponding to the first doping region. The application principle of the beneficial effect in this case can refer to the maximum doping depth of the first doping region corresponding to the third region described above. The application principle of the beneficial effect of being greater than the maximum doping depth of the first doping region corresponding to the first region is not repeated here.

[0120] It should be noted that, in the process of detecting the doping concentration and doping depth of the first doping region, when the detection equipment detects that the doping concentration of the first doping element in the semiconductor substrate is 0 (or close to 0); or, when it is detected that the doping concentration of the first doping element in the semiconductor substrate tends to be consistent, it can be considered that the doping concentration of the first doping element in the semiconductor substrate is 0, or the area where its doping concentration tends to be consistent is the non-first doping region of the semiconductor substrate, and the doping concentration of the first doping element in the semiconductor substrate is greater than 0, or the area where the doping concentration of the first doping element gradually decreases from the first surface to the second surface is the first doping region.

[0121] As for the second doped semiconductor layer, from the material aspect, the material of the second doped semiconductor layer may include any semiconductor material such as silicon, silicon germanium, germanium or gallium arsenide. From the aspect of the arrangement of the material, the crystal phase of the second doped semiconductor layer may be amorphous, microcrystalline, nanocrystalline, single crystal or polycrystalline.

[0122] In terms of the scope of formation, Figure 6 As shown, the second doped semiconductor layer 14 may be disposed only on the second region 16 .

[0123] Or, if Figure 7 and Figure 8 As shown, the second doped semiconductor layer 14 is not only disposed on the second region 16, but also extends from the second region 16 to cover at least a portion of the first doped region 13 located in the third region 17. In the third region 17, the second doped semiconductor layer 14 and the first doped region 13 may be in direct contact; or, the back contact cell may further include an insulating layer 21, and the insulating layer 21 is disposed between the first doped region 13 and the second doped semiconductor layer 14 located in the third region 17. In this case, Figure 7 As shown, when the second doped semiconductor layer 14 and the first doped region 13 are in direct contact in the third region 17, the second doped semiconductor layer 14 and the first doped region 13 can form a built-in diode with a lower reverse breakdown voltage, thereby reducing the risk of hot spots in the back contact battery. Figure 8As shown, when the back contact battery also includes an insulating layer 21 disposed between the first doped region 13 and the second doped semiconductor layer 14 located in the third region 17, the insulating layer 21 can physically insulate the first doped region 13 and the second doped semiconductor layer 14 of opposite conductivity types along the thickness direction of the semiconductor substrate 11, thereby reducing the forward leakage loss of the back contact battery and improving the conversion efficiency of the back contact battery. It can be seen from this that, according to the risk of shielding the back contact battery by obstructions such as sand and dust in the installation environment of the back contact battery in actual application scenarios, it can be determined whether the third region 17 of the back contact battery and the second doped semiconductor layer 14 are electrically connected to the first doped region 13, thereby improving the applicability of the back contact battery provided by the embodiment of the present invention in different application scenarios.

[0124] Specifically, it can be understood that when the second doped semiconductor layer and the first doped region are in direct contact in the third region, the width of the second doped semiconductor layer in the third region will affect the leakage contact area and leakage current between the second doped semiconductor layer and the first doped region, thereby affecting the anti-burning ability and conversion efficiency of the back-contact battery. Therefore, the width of the second doped semiconductor layer in the third region can be determined based on the requirements for the hot spot risk and conversion efficiency of the back-contact battery in the actual application scenario, and no specific limitation is made here.

[0125] Exemplarily, in the third region, the ratio of the width of the second doped semiconductor layer to the width of the first doped region may be greater than or equal to 5% and less than or equal to 80%. In this case, in the third region, the greater the width of the second doped semiconductor layer, the greater the leakage contact area between the second doped semiconductor layer and the first doped region, and the greater the leakage current. Based on this, when in the third region, the ratio of the width of the second doped semiconductor layer to the width of the first doped region is within the above range, it can prevent the leakage contact area between the two from being small due to the small ratio, ensuring that the back contact battery has a lower risk of hot spots. It can also prevent the forward leakage loss between the two from being too large due to the large ratio, ensuring that the back contact battery has a higher conversion efficiency.

[0126] Exemplarily, in the third region, the width of the second doped semiconductor layer is greater than or equal to 20 μm and less than or equal to 150 μm. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the ratio of the width of the second doped semiconductor layer to the width of the first doped region in the third region being greater than or equal to 5% and less than or equal to 80% as described above, which will not be repeated here.

[0127] When the back contact battery also includes an insulating layer, the extension width of the second doped semiconductor layer in the third region can be determined based on the production capacity of patterning the second doped semiconductor layer in the actual application scenario, and the requirements for preventing leakage between the second doped semiconductor layer and the first doped semiconductor layer, and no specific limitation is made here.

[0128] As for the above-mentioned insulating layer, its material may include any insulating material such as silicon oxide, silicon nitride and aluminum oxide, as long as it can be applied to the back contact battery provided in the embodiment of the present invention.

[0129] In terms of the formation position, Figures 1 to 5 As shown, the second doped semiconductor layer 14 can be directly disposed on the second region 16. Alternatively, Figure 6 and Fig. 9 As shown, the above-mentioned back contact battery can also include a second interface passivation layer 23, and the second interface passivation layer 23 is at least located between the second region 16 and the second doped semiconductor layer 14 on the first surface (when the second doped semiconductor layer 14 also extends to the first doped region 13, the second interface passivation layer 23 also extends from the second region 16 to between the second doped semiconductor layer 14 and the first doped region 13). In this case, the passivation contact structure composed of the second interface passivation layer 23 and the part of the second doped semiconductor layer 14 located on the second region 16 can realize the selective collection of carriers and reduce the carrier recombination rate of the second region 16 of the first surface of the semiconductor substrate 11. The material and thickness of the second interface passivation layer 23 can be set according to the material of the second doped semiconductor layer 14 and actual needs, and are not specifically limited here. For example: when the material of the second doped semiconductor layer is doped polysilicon, the second interface passivation layer is a tunneling passivation layer. For another example, when the material of the second doped semiconductor layer includes doped amorphous silicon, doped microcrystalline silicon and doped nanocrystalline silicon, the second interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon layer or a mixture of the above three.

[0130] In addition, the doping element in the second doped semiconductor layer is defined as a second doping element (the second doping element may be of one type, such as boron; or the second doping element may be of a plurality of types with the same conductivity type, such as boron and aluminum). In this case, Figure 7 As shown, the doping concentration of the second doping element in each part of the second region 16 of the semiconductor substrate 11 can be the same, that is, there is no inner diffusion doping region with the same conductivity type as the second doped semiconductor layer 14 in the second region 16 of the semiconductor substrate 11, which can prevent the above-mentioned first doping region 13 from electrically contacting the inner diffusion doping region with the opposite conductivity type to itself, resulting in a higher risk of leakage, thereby ensuring that the back-contact battery installed in an installation environment with high obstructions such as bird droppings has a higher conversion efficiency.

[0131] Or, if Fig. 9As shown, the back contact battery may further include a second doping region 18 disposed in the second region 16. Furthermore, the doping concentration of the second doping element in the second doping region 18 may be greater than the doping concentration of the second doping element in the first region 15. In this case, the doping concentration of the second doping element in the second doping region 18 is relatively high, and the second region 16 may be field passivated by the second doping region 18 to improve the passivation effect. Secondly, the doping element in the second doped semiconductor layer 14 is the second doping element, so the conductivity type of the second doping element in the second doping region 18 is the same as the conductivity type of the second doped semiconductor layer 14, so the second doping region 18 may form a favorable electric field consistent with the induction direction of the second doped semiconductor layer 14, and the existence of the favorable electric field may repel minority carriers and attract majority carriers on the surface of the second region 16 of the semiconductor substrate 11, thereby improving the collection efficiency of the second doped semiconductor layer 14 for carriers, further reducing the carrier recombination rate, and facilitating the improvement of the conversion efficiency of the back contact battery.

[0132] As for the doping concentration of the second doping element in the second doping region, it can be set according to the formation method of the second doping region and actual needs, and is not specifically limited here.

[0133] It should be noted that, if in the actual manufacturing process, the second doping element in the second doping region is diffused from the second doping semiconductor layer into the second doping region, the type of the second doping element in the second doping semiconductor layer is the same as the type of the second doping element in the second doping region. In the above case, the doping concentration of the second doping element in the second doping semiconductor layer will not only affect its own field passivation performance, but also affect the doping concentration of the second doping element in the second doping region. Therefore, the doping concentration of the second doping element in the second doping region can be determined according to the doping concentration of the second doping semiconductor layer and the requirements for the field passivation effect of the second doping semiconductor layer in the actual application scenario, and no specific limitation is made here.

[0134] Of course, the second doping element in the second doping region may also be formed by other methods, and the type of the second doping element in the second doping region may also be different from the type of the second doping element in the second doped semiconductor layer.

[0135] Secondly, if Fig. 9As shown, when the second doped semiconductor layer 14 is not only disposed on the second region 16, but also extends from the second region 16 to cover at least a portion of the first doped region 13 located in the third region 17, if the second doped semiconductor layer 14 located in the third region 17 is in direct contact with the first doped region 13, the first doped region 13 in contact with the second doped semiconductor layer 14 is also doped with the second doping element, so that the doping concentration of the second doping element in the first doped region 13 in contact with the second doped semiconductor layer 14 is greater than the doping concentration of the second doping element in the first region 15. In this case, the first doped region 13 in contact with the second doped semiconductor layer 14 is not only doped with the first doping element of the same conductivity type as the first doped semiconductor layer 12, but also doped with the second doping element of the same conductivity type as the second doped semiconductor layer 14, that is, there are two types of doping elements of opposite conductivity types co-doped, which is conducive to reducing the conductive characteristics of the first doped region 13 in contact with the second doped semiconductor layer 14, thereby facilitating the reduction of the leakage current between the first doped region 13 and the second doped semiconductor layer 14, thereby reducing the forward leakage loss of the back contact battery, and facilitating the improvement of the conversion efficiency of the back contact battery.

[0136] In some cases, such as Fig.10 and Fig.11 As shown, the back contact cell provided by the embodiment of the present invention may also include a surface passivation layer 24 stacked in sequence on the first doped semiconductor layer 12, the first doped region 13, and the second doped semiconductor layer 14 along the thickness direction of the semiconductor substrate 11, so as to reduce the carrier recombination rate on one side of the first surface, and further improve the conversion efficiency of the back contact cell provided by the embodiment of the present invention. The embodiment of the present invention does not specifically limit the material and thickness of the surface passivation layer 24.

[0137] Exemplarily, the surface passivation layer may include at least one of a silicon oxide layer, an aluminum oxide layer, and an intrinsic silicon layer.

[0138] In a second aspect, an embodiment of the present invention provides a photovoltaic module, which includes a back-contact cell provided by the first aspect and various implementations thereof.

[0139] The beneficial effects of the second aspect and its various implementations in the embodiments of the present invention can be analyzed with reference to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0140] In a third aspect, an embodiment of the present invention provides a method for manufacturing a back-contact battery. Figures 12 to 28 The manufacturing process is described in detail with reference to the cross-sectional view of the operation shown in FIG. 1 . Specifically, the manufacturing method of the back contact battery includes the following steps:

[0141] First, a semiconductor substrate is provided. The semiconductor substrate includes a first surface and a second surface opposite to each other. The first surface includes a first region and a second region that are spaced apart, and a third region 17 located between the first region and the second region. The third region 17 is adjacent to the first region.

[0142] Specifically, the material of the semiconductor substrate, and the distribution of the first region, the second region, and the third region on one side of the first surface and other information can be referred to in the previous text and will not be described in detail here.

[0143] Next, if Figures 12 to 19 As shown, a first doped semiconductor layer 12 is formed on the first region 15, and a first doped region 13 is formed in the first region 15 and the third region 17. The doping element in the first doped semiconductor layer 12 is the first doping element. The doping concentration of the first doping element in the first doping region 13 is greater than the doping concentration of the first doping element in the second region 16. In the arrangement direction of the first region 15 and the second region 16, the width of the third region 17 is greater than or equal to 1 μm.

[0144] For example, Figure 12 to Figure 14 As shown, a patterned intrinsic semiconductor layer 25 may be first formed on the first region 15. Next, as shown in FIG. Fig.17 As shown, the intrinsic semiconductor layer and the portion of the first surface exposed outside the intrinsic semiconductor layer are doped to form the first doped semiconductor layer 12 in the intrinsic semiconductor layer, and the first doped region 13 is formed in the first region 15 and the portion of the first surface exposed outside the first doped semiconductor layer 12. Next, as Fig.18 and Fig.19 As shown, the portion of the first doped region 13 outside the first region 15 and the third region 17 is selectively removed. In this case, the manufacturing method provided by the embodiment of the present invention is to form an intrinsic semiconductor layer 25 on the first region 15, and then perform doping treatment on the intrinsic semiconductor layer 25 and the portion of the first surface exposed outside the intrinsic semiconductor layer 25 to form the first doped semiconductor layer 12 and the first doped region 13. At this time, compared with the formation by inward expansion of the doped semiconductor layer, the first doped region 13 located in the third region 17 is formed by directly performing doping treatment, which is beneficial to increase the doping concentration of the first doping element in the first doped region 13 located in the third region 17, so that the first doped region 13 located in the third region 17 has higher conductive properties, which is beneficial to improve the field passivation effect of the first doped region 13 located in the third region 17, thereby improving the conversion efficiency of the back contact battery.

[0145] In the actual manufacturing process, Fig.12 As shown, chemical vapor deposition or other processes can be used to form an intrinsic semiconductor layer 25 disposed entirely on the first surface. Fig.12As shown, a process such as chemical vapor deposition can be used to form a first mask layer 26 on the side of the intrinsic semiconductor layer 25 away from the semiconductor substrate 11 (the first mask layer 26 can include any protective mask layer such as silicon nitride and / or aluminum oxide, as long as it can be applied to the manufacturing method provided in the embodiment of the present invention). Next, as Fig.13 As shown, the first mask layer 26 is patterned by laser etching or chemical slurry etching, and only the portion of the first mask layer 26 corresponding to the first area 15 is retained. Fig.14 As shown, under the protection of the first mask layer 26, a dry etching or wet etching process is used to remove the portion of the intrinsic semiconductor layer 25 exposed outside the first mask layer 26, thereby obtaining a patterned intrinsic semiconductor layer 25 located on the first region 15. Then, as shown in FIG. Fig.16 As shown in FIG. 1 , the first mask layer may be removed by dry etching or wet etching. Fig.17 As shown, the intrinsic semiconductor layer and the portion of the first surface exposed outside the intrinsic semiconductor layer can be doped by diffusion or doping source coating and other processes, so that the intrinsic semiconductor layer forms a first doped semiconductor layer 12, and a first doped region 13 is formed in the first region 15 and the portion of the first surface exposed outside the first doped semiconductor layer 12. It can be understood that in this case, the first doping element in the portion of the first doping region 13 corresponding to the first region 15 is obtained by internal diffusion of the first doping element in the first doped semiconductor layer 12. In addition, if the diffusion process is used for doping, a doped silicon glass layer 27 will be formed on the first doped semiconductor layer 12 and the first doping region 13 after the doping process. Next, as Fig.18 and Fig.19 As shown, the portion of the first doped region 13 outside the first region 15 and the third region 17 is selectively removed. Specifically, if the above-mentioned doped silicon glass layer 27 is formed, the portion of the doped silicon glass layer 27 corresponding to at least the second region 16 can be heat-treated by laser irradiation or other processes, so that the portion of the first region 15 and the third region 17 of the doped silicon glass layer 27 that has not been heat-treated forms a second mask layer 28. If the above-mentioned doped silicon glass layer is not formed, a deposition and selective etching process can be used to form a second mask layer 28 covering the first doped semiconductor layer 12 and the first doped region 13 located in the third region 17 (the material of the second mask layer 28 can refer to the material of the first mask layer described above, which will not be repeated here). Then, under the protection of the second mask layer 28, the first doped region 13 is patterned, and the first doped semiconductor layer 12 is retained, and only the portion of the first doped region 13 located in the first region 15 and the third region 17 is retained.

[0146] It should be noted that if the surface of the third region in the manufactured back contact battery has a textured structure, after the intrinsic semiconductor layer is formed on the first region, and before the intrinsic semiconductor layer and the portion of the first surface exposed outside the intrinsic semiconductor layer are doped, Fig.15 As shown, the surface of the third region 17 can be textured by wet etching or the like under the protection of the second mask layer 28 to form a texture structure on the surface of the third region 17. The type and size of the texture structure on the surface of the third region 17 can be referred to above and will not be described here.

[0147] In addition, if the manufactured back contact battery also includes a first interface passivation layer, a process such as thermal oxidation or chemical vapor deposition can also be used to first form a first interface passivation material that is set as a whole layer on one side of the first surface. Then, before forming a whole layer of the intrinsic semiconductor layer, the first interface passivation material can be selectively etched to remove at least the portion of the first interface passivation material corresponding to the second region and the third region to obtain the first interface passivation layer; or, after forming a whole layer of the intrinsic semiconductor layer, the intrinsic semiconductor layer and the first interface passivation material can be selectively etched under the protection of the same first mask layer.

[0148] Furthermore, if the manufactured back contact cell does not include the aforementioned insulating layer, the second mask layer needs to be removed by dry etching or wet etching before subsequent operations are performed. If the manufactured back contact cell includes the aforementioned insulating layer, the second mask layer does not need to be removed and subsequent operations can be performed directly; and after the second doped semiconductor layer is formed, the remaining portion of the second mask layer forms an insulating layer.

[0149] Next, if Figure 20 to Figure 24 As shown, a second doped semiconductor layer 14 is formed on the second region 16. The second doped semiconductor layer 14 and the first doped semiconductor layer 12 have opposite conductivity types.

[0150] For example, Fig. 20 As shown, a deposition and doping process may be used to form a second doped semiconductor layer 14 disposed entirely on the first doped semiconductor layer 12, the first doped region 13, and the second region 16 (when the first surface further includes the fourth region 19, the second doped semiconductor layer 14 also covers the fourth region 19). Next, as Figure 21 to Figure 24As shown, at least the portion of the second doped semiconductor layer 14 located on the first doped semiconductor layer 12 is selectively removed, and the portion of the second doped semiconductor layer 14 located on the second region 16 and at least a portion of the first doped region 13 is retained. Specifically, a deposition and laser etching or other etching process can be used to form a third mask layer 29 on at least the portion of the second doped semiconductor layer 14 corresponding to the second region 16 (when the second doped semiconductor layer 14 also extends to the first doped region 13, the third mask layer 29 covers the portion of the second doped semiconductor layer 14 extending to the portion of the first doped region 13). Then, under the masking effect of the third mask layer 29, the second doped semiconductor layer 14 is patterned by a wet etching or other process. Next, the third mask layer is removed.

[0151] It should be noted that if Fig.24 As shown, if the first surface of the manufactured back contact battery further includes a fourth region 19 located between the third region 17 and the second region 16, after forming the second doped semiconductor layer 14 disposed on the second region 16, the manufacturing method of the back contact battery may further include the following steps: Fig.24 As shown, a wet etching process or the like is used to etch the portion of the semiconductor substrate 11 located in the fourth region 19, so that the surface of the fourth region 19 is recessed into the semiconductor substrate 11 relative to the surfaces of the second region 16 and the third region 17, thereby forming an isolation groove 20. The depth of the isolation groove 20 can be referred to in the foregoing text and will not be described in detail here.

[0152] In addition, if Figure 20 to Figure 24 As shown, when the manufactured back contact battery also includes a second interface passivation layer 23, before forming the second doped semiconductor layer 14, a chemical vapor deposition process or the like can be used to form a second interface passivation material disposed on the first doped semiconductor layer 12, the first doped region 13, and the second region 16. Then, before forming the second doped semiconductor layer 14 disposed in an entire layer, the second interface passivation material can be selectively etched to remove at least the portion of the second interface passivation material corresponding to the first region 15 and the third region 17, thereby obtaining the second interface passivation layer 23; or, after forming the second doped semiconductor layer 14 disposed in an entire layer, the second doped semiconductor layer 14 and the second interface passivation material can be selectively etched under the masking action of the same third mask layer 29.

[0153] Then, if Fig.25 and Fig.26 As shown, chemical vapor deposition and other processes can be used to form a surface passivation layer 24 covering the first doped semiconductor layer 12, the first doped region 13 and the second doped semiconductor layer 14. The material of the surface passivation layer 24 can be referred to above and will not be repeated here.

[0154] Then, if Fig. 27 and Fig.28 As shown, screen printing, electroplating or chemical plating can be used to form a first electrode 30 in ohmic contact with the first doped semiconductor layer 12 and a second electrode 31 in ohmic contact with the second doped semiconductor layer 14. The material of the first electrode 30 and the second electrode 31 can include any conductive material such as silver, aluminum, copper, nickel or titanium, as long as it can be applied to the manufacturing method provided in the embodiment of the present invention.

[0155] The beneficial effects of the third aspect and its various implementations in the embodiments of the present invention can be analyzed with reference to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.

[0156] In the above description, the technical details of the patterning and etching of each layer are not described in detail. However, those skilled in the art should understand that various technical means can be used to form layers, regions, etc. of desired shapes. In addition, in order to form the same structure, those skilled in the art can also design methods that are not completely the same as the methods described above. In addition, although the various embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage.

[0157] The embodiments of the present invention are described above. However, these embodiments are only for a clearer description and are not intended to limit the scope of the present invention. The scope of the present invention is defined by the appended claims and their equivalents. Without departing from the scope of the present invention, a person skilled in the art may make various substitutions and modifications, which should all fall within the scope of the present invention.

Claims

1. A back contact battery, characterized in that: include: A semiconductor substrate, a first doped semiconductor layer, a first doped region, and a second doped semiconductor layer; The conductivity types of the second doped semiconductor layer and the first doped semiconductor layer are opposite; The semiconductor substrate comprises a first surface and a second surface opposite to each other; the first surface comprises a first region and a second region distributed at intervals, and a third region located between the first region and the second region; the third region is adjacent to the first region; The first doped semiconductor layer is disposed on the first region; the doping element in the first doped semiconductor layer is a first doping element; The first doping region is arranged in the first region and the third region; the doping concentration of the first doping element in the first doping region is greater than the doping concentration of the first doping element in the second region; the second doping semiconductor layer is arranged on the second region; Wherein, along the arrangement direction of the first region and the second region, the width of the third region is greater than or equal to 1 μm.

2. The back contact cell according to claim 1, characterized in that: The width of the third region is greater than or equal to 40 μm and less than or equal to 300 μm; and / or, the width of the first region is greater than or equal to 50 μm and less than or equal to 400 μm; And / or, the width of the second region is greater than or equal to 100 μm and less than or equal to 300 μm.

3. The back contact cell according to claim 1, characterized in that: The maximum doping depth of the first doping region corresponding to the third region is greater than the maximum doping depth of the first doping region corresponding to the first region; And / or, a doping concentration of the first doping element at a surface of the first doping region corresponding to the third region is greater than a doping concentration of the first doping element at a surface of the first doping region corresponding to the first region.

4. The back contact cell according to claim 1, characterized in that: The surface of the third region has a texture structure; And / or, surfaces of the first region and the second region are polished surfaces.

5. The back contact cell according to claim 1, characterized in that: The surface of the third region is recessed into the semiconductor substrate relative to the surface of the first region; And / or, a depth at which a surface of the third region is recessed into the semiconductor substrate relative to a surface of the first region is greater than a maximum doping depth of the first doping region corresponding to the first region; and the first doping region is continuously distributed in the first region and the third region.

6. The back contact cell according to claim 1, characterized in that: The surface of the second region is recessed into the semiconductor substrate relative to the surface of the third region, and the recessed depth is greater than the maximum doping depth of the first doping region.

7. The back contact cell according to claim 1, characterized in that: The back contact cell further includes the second doped region disposed within the second region; The doping element in the second doped semiconductor layer is a second doping element, and the doping concentration of the second doping element in the second doping region is greater than the doping concentration of the second doping element in the first region.

8. The back contact battery according to any one of claims 1 to 7, characterized in that: The first surface further includes a fourth region located between the third region and the second region; the first doped region and the second doped semiconductor layer are physically insulated by the fourth region.

9. The back contact cell according to claim 8, characterized in that: The surface of the fourth region is concave toward the semiconductor substrate relative to the surfaces of the second region and the third region to form an isolation groove; the doping element in the second doped semiconductor layer is a second doping element, and the doping concentration of the second doping element in each subdivision of the fourth region is the same; And / or, along the arrangement direction of the first region and the second region, the width of the fourth region is greater than or equal to 20 μm and less than or equal to 500 μm.

10. The back contact battery according to any one of claims 1 to 7, characterized in that: The second doped semiconductor layer also extends from the second region to cover at least a portion of the first doped region located in the third region; Wherein, in the third region, the second doped semiconductor layer is in direct contact with the first doped region; or, the back contact battery further includes an insulating layer, and the insulating layer is arranged between the first doped region and the second doped semiconductor layer located in the third region.

11. The back contact cell according to claim 10, characterized in that: In the third region, a ratio of a width of the second doped semiconductor layer to a width of the first doped region is greater than or equal to 5% and less than or equal to 80%; And / or, in the third region, the width of the second doped semiconductor layer is greater than or equal to 20 μm and less than or equal to 150 μm.

12. The back contact cell according to claim 10, characterized in that: The doping element in the second doped semiconductor layer is a second doping element; when the second doped semiconductor layer located in the third region is in direct contact with the first doping region, the doping concentration of the second doping element in the first doping region in contact with the second doping semiconductor layer is greater than the doping concentration of the second doping element in the first region.

13. A photovoltaic module, characterized in that: Comprising a back contact battery as claimed in any one of claims 1 to 12.

14. A method for manufacturing a back contact battery, characterized in that: include: Providing a semiconductor substrate; The semiconductor substrate comprises a first surface and a second surface opposite to each other; the first surface comprises a first region and a second region distributed at intervals, and a third region located between the first region and the second region; the third region is adjacent to the first region; forming a first doped semiconductor layer disposed on the first region, and forming a first doped region disposed in the first region and the third region; The doping element in the first doped semiconductor layer is a first doping element; The doping concentration of the first doping element in the first doping region is greater than the doping concentration of the first doping element in the second region; wherein along the arrangement direction of the first region and the second region, the width of the third region is greater than or equal to 1 μm; A second doped semiconductor layer is formed on the second region; the second doped semiconductor layer and the first doped semiconductor layer have opposite conductivity types.

15. The method for manufacturing a back contact battery according to claim 14, characterized in that: The forming of a first doped semiconductor layer disposed on the first region, and forming a first doped region disposed in the first region and the third region, comprises: forming an intrinsic semiconductor layer on the first region; Performing a doping process on the intrinsic semiconductor layer and the portion of the first surface exposed outside the intrinsic semiconductor layer, so that the intrinsic semiconductor layer forms the first doped semiconductor layer, and the first doped region is formed in the first region and the portion of the first surface exposed outside the first doped semiconductor layer; A portion of the first doping region outside the first region and the third region is selectively removed.

16. The method for manufacturing a back contact battery according to claim 15, characterized in that: After forming the intrinsic semiconductor layer on the first region, and before performing doping treatment on the intrinsic semiconductor layer and the portion of the first surface exposed outside the intrinsic semiconductor layer, the method for manufacturing a back contact battery further includes: The surface of the third region is subjected to texturing treatment to form a texture structure on the surface of the third region.

17. The method for manufacturing a back contact battery according to any one of claims 14 to 16, characterized in that: The first surface further includes a fourth region located between the third region and the second region; After forming the second doped semiconductor layer disposed on the second region, the method for manufacturing the back contact cell includes: Etching a portion of the semiconductor substrate located in the fourth region so that a surface of the fourth region is recessed into the semiconductor substrate relative to surfaces of the second region and the third region to form an isolation groove; The doping element in the second doped semiconductor layer is a second doping element, and the doping concentration of the second doping element in each section of the fourth region is the same.

18. The method for manufacturing a back contact battery according to any one of claims 14 to 16, characterized in that: The forming of a second doped semiconductor layer disposed on the second region includes: forming the second doped semiconductor layer entirely disposed on the first doped semiconductor layer, the first doped region and the second region; The portion of the second doped semiconductor layer at least located on the first doped semiconductor layer is selectively removed, and the portion of the second doped semiconductor layer located on the second region and at least a portion of the first doped region is retained.

Images