Back contact battery and photovoltaic module
By designing a first dielectric passivation layer with high field passivation and chemical passivation effects in the back contact battery and a second dielectric passivation layer with reduced field passivation effects, the problem that the surface passivation layer in the prior art cannot meet the passivation requirements of P and N regions at the same time is solved, and higher working efficiency and photoelectric conversion efficiency are achieved.
Patent Information
- Application Number
- CN202411534982.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-09-12
- Filing Date
- 2024-10-30
- Publication Date
- 2025-04-01
- Estimated Expiration
- 2044-10-30
AI Technical Summary
The surface passivation layer of the existing back contact battery cannot meet the passivation requirements of P and N regions at the same time, resulting in poor operating performance of the battery.
A back contact battery is designed, which includes a semiconductor substrate, a first doped semiconductor portion, a second doped semiconductor portion, a first dielectric passivation layer, and a second dielectric passivation layer. The first dielectric passivation layer has a high field passivation and chemical passivation effect on the first doped semiconductor portion, while the second dielectric passivation layer reduces the influence on the field passivation of the second doped semiconductor portion.
The working efficiency of the back contact battery is improved, the carrier recombination rate is reduced, the carrier separation capacity is enhanced, and the photoelectric conversion efficiency of the battery is improved.
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Figure CN119744033A_ABST
Abstract
Description
[0001] This application claims the priority of the Chinese patent filed with the China Patent Office on September 12, 2024, with application number 202411278194.1 and invention name “A back contact battery and photovoltaic module”, the entire contents of which are incorporated by reference in this application. Technical Field
[0002] The present invention relates to the field of photovoltaic technology, and in particular to a back contact cell and a photovoltaic module. Background Art
[0003] A solar cell is a device that can convert sunlight into electrical energy. Specifically, when the solar cell is in operation, sunlight shines on the semiconductor pn junction of the solar cell, forming new hole-electron pairs. Under the action of the built-in electric field of the pn junction, photogenerated holes flow to the p region, and photogenerated electrons flow to the n region. When the circuit is connected, current can be generated. Among them, a solar cell in which both the positive electrode and the negative electrode are on the back of the cell is a back contact cell. Compared with a double-sided contact solar cell, the front of the back contact cell is not blocked by a metal electrode, so that the light-facing side of the back contact cell has a higher light utilization rate. Therefore, the back contact cell has a higher short-circuit current and photoelectric conversion efficiency, and is one of the current technical directions for realizing high-efficiency crystalline silicon cells. In addition, the above-mentioned back contact cell may include a surface passivation layer having both field passivation and chemical passivation functions to improve the passivation effect of the side of the back contact cell having the surface passivation layer.
[0004] However, in the existing back contact battery including the surface passivation layer having both field passivation and chemical passivation functions, the surface passivation layer cannot simultaneously meet the passivation requirements of the P region and the N region, resulting in poor working performance of the battery. Summary of the invention
[0005] The object of the present invention is to provide a back-contact cell and a photovoltaic module, which are used to reduce the influence of the second dielectric passivation layer on the field passivation of the second doped semiconductor part while reducing the influence of the second dielectric passivation layer on the field passivation of the second doped semiconductor part, thereby improving the working efficiency of the back-contact cell.
[0006] In order to achieve the above-mentioned object, in a first aspect, the present invention provides a back contact battery, which includes: a semiconductor substrate, a first doped semiconductor part, a second doped semiconductor part, a first dielectric passivation layer and a second dielectric passivation layer. The first doped semiconductor part and the second doped semiconductor part have opposite conductivity types. The first dielectric passivation layer and the second dielectric passivation layer both include a first sub-passivation layer having a field passivation function. The conductivity type of the first doped semiconductor part is opposite to the conductivity type of the fixed charge of the first sub-passivation layer. Wherein, the semiconductor substrate has a first face and a second face opposite to each other. Along the direction parallel to the first face, the first doped semiconductor part and the second doped semiconductor part are alternately distributed on the first face. The first dielectric passivation layer covers the side of the first doped semiconductor part away from the semiconductor substrate, and the second dielectric passivation layer covers the side of the second doped semiconductor part away from the semiconductor substrate. The thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the first sub-passivation layer included in the second dielectric passivation layer. The above-mentioned first dielectric passivation layer and the second dielectric passivation layer also include a second sub-passivation layer having a chemical passivation function. The second sub-passivation layer is arranged on the side of the first sub-passivation layer away from the semiconductor substrate. The material of the second sub-passivation layer included in the first dielectric passivation layer is different from the material of the first sub-passivation layer included in the first dielectric passivation layer. The material of the second sub-passivation layer included in the second dielectric passivation layer is different from the material of the first sub-passivation layer included in the second dielectric passivation layer.
[0007] In the case of adopting the above technical solution, the conductivity types of the first doped semiconductor part and the second doped semiconductor part are opposite, and the conductivity type of the first doped semiconductor is opposite to the conductivity type of the fixed charge of the first sub-passivation layer covering the first doped semiconductor part away from the semiconductor substrate, and the first sub-passivation layer covering the second doped semiconductor part away from the semiconductor substrate. In addition, the first sub-passivation layer included in the first dielectric passivation layer and the second dielectric passivation layer not only has a chemical passivation function, but also has a field passivation function. In addition, the first sub-passivation layer included in the first dielectric passivation layer will induce a charge opposite to the conductivity type of the first doped semiconductor part on the side close to the first doped semiconductor part, while the first sub-passivation layer included in the first dielectric passivation layer on the side away from the first doped semiconductor part has the same charge as the conductivity type of the first doped semiconductor part, so that an electric field is formed at the first sub-passivation layer included in the first dielectric passivation layer. Because the conductivity type of the fixed charge of the first sub-passivation layer included in the first dielectric passivation layer is opposite to the conductivity type of the dopant in the first doped semiconductor part, the electric field can shield minority carriers and enhance the carrier collection ability and carrier separation ability of the first doped semiconductor part. On the contrary, the electric field formed in the first sub-passivation layer included in the second dielectric passivation layer will form a reverse field at the second doped semiconductor part of the same fixed charge conductivity type as itself. At this time, the field passivation function of the second dielectric passivation layer has a weakening effect on the electric field of the second doped semiconductor part, which will affect the carrier collection ability of the second doped semiconductor part. Secondly, the field passivation effect of the first sub-passivation layer is proportional to its own thickness. Based on this, when the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the first sub-passivation layer included in the second dielectric passivation layer, the thickness of the first sub-passivation layer arranged on the side of the second doped semiconductor portion away from the semiconductor substrate is smaller. At this time, the first sub-passivation layer included in the second dielectric passivation layer with a smaller thickness can weaken its own effect on the reverse field of the second doped semiconductor portion, which is conducive to making the second doped semiconductor portion have a higher carrier collection efficiency. At the same time, the existence of the first sub-passivation layer and the second sub-passivation layer included in the second dielectric passivation layer can chemically passivate the surface of the second doped semiconductor portion and reduce the surface defects of the second doped semiconductor portion; in addition, the thickness of the first sub-passivation layer arranged on the side of the first doped semiconductor portion away from the semiconductor substrate is larger. At this time, the first sub-passivation layer with a larger thickness has a higher field passivation effect of the same direction field on the first doped semiconductor portion, enhances the carrier collection ability of the first doped semiconductor portion and reduces the surface defects of the first doped semiconductor portion.It can be seen that in the back contact battery provided by the present invention, in view of the different conductivity types of the first doped semiconductor part and the second doped semiconductor part, the first dielectric passivation layer has a higher field passivation and chemical passivation effect on the first doped semiconductor part, while reducing the influence of the second dielectric passivation layer on the field passivation of the second doped semiconductor part, and at the same time, the passivation requirements of the two doped semiconductor parts of different conductivity types are met, which is beneficial for making the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back contact battery have a lower carrier recombination rate and a higher carrier separation ability, thereby improving the working performance of the back contact battery.
[0008] As a possible implementation scheme, under the same test conditions, on the backlight side of the back contact cell, the PL brightness value corresponding to the portion corresponding to the second doped semiconductor portion is greater than the PL brightness value corresponding to the portion corresponding to the first doped semiconductor portion.
[0009] In the case of adopting the above technical solution, since the PL brightness value refers to the brightness of light emitted by the battery under illumination conditions, the size of the PL brightness value is related to the passivation performance of the test part, which represents the comprehensive passivation effect of all film layers at the position corresponding to the first doped semiconductor part or the position corresponding to the second doped semiconductor part, such as the comprehensive passivation effect of the tunneling passivation layer, the doped semiconductor part, and the dielectric passivation layer. Specifically, under the same test conditions, the larger the PL brightness value, the higher the passivation performance of the part, and the smaller the PL brightness value, the lower the passivation performance of the part. Based on this, when the PL brightness value corresponding to the part corresponding to the second doped semiconductor part on the backlight side of the back contact battery is greater than the PL brightness value corresponding to the part corresponding to the first doped semiconductor part, it represents the comprehensive passivation effect of all film layers at the position corresponding to the first doped semiconductor part or the position corresponding to the second doped semiconductor part, such as the comprehensive passivation effect of the tunneling passivation layer, the doped semiconductor part, and the dielectric passivation layer. On the backlight side of the back contact battery provided by the present invention, the passivation performance of the part corresponding to the second doped semiconductor part is higher than the passivation performance of the part corresponding to the first doped semiconductor part. At the same time, the PL brightness values of the two areas can also indirectly reflect the chemical passivation effect, that is, the chemical passivation effect of the second dielectric passivation layer is greater than the chemical passivation effect of the first dielectric passivation layer. Chemical passivation is used to enhance the comprehensive passivation effect of the corresponding second doped semiconductor portion, and reduce the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the back contact battery. At the same time, the passivation requirements of two doped semiconductor portions of different conductive types are met, which is beneficial for the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the back contact battery to have a lower carrier recombination rate and a higher carrier separation ability, thereby improving the working performance of the back contact battery.
[0010] As a possible implementation scheme, the thickness of the first sub-passivation layer is greater than or equal to 2nm and less than or equal to 15nm. In this case, the thickness of the first sub-passivation layer is within the above range, which can prevent the low passivation effect caused by the thickness of the first sub-passivation layer being too small, and ensure that the first doped semiconductor part and the second doped semiconductor part have a lower carrier recombination rate on the side away from the semiconductor substrate. In addition, it can also prevent the first sub-passivation layer from having a greater impact on the carrier collection efficiency of the second doped semiconductor part due to the thickness of the first sub-passivation layer being too large, and ensure that the back contact battery has a higher conversion efficiency.
[0011] As a possible implementation scheme, the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than or equal to 4nm and less than or equal to 15nm. In this case, the thickness of the first sub-passivation layer included in the first dielectric passivation layer is relatively large, which can further enhance the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer on the first doped semiconductor part, which is beneficial to further reduce the degree of differentiation in passivation effect between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back contact battery, and further improve the working performance of the back contact battery.
[0012] As a possible implementation scheme, the thickness of the first sub-passivation layer included in the second dielectric passivation layer is greater than or equal to 2 nm and less than or equal to 8 nm.
[0013] When the above technical solution is adopted, the thickness of the first sub-passivation layer included in the second dielectric passivation layer is within the above range, which is beneficial to prevent the second dielectric passivation layer from having a low comprehensive passivation effect on the second doped semiconductor portion due to the small thickness of the first sub-passivation layer included in the second dielectric passivation layer, thereby ensuring that the second doped semiconductor portion has fewer surface defects on the side away from the semiconductor substrate; in addition, it is also beneficial to prevent the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer from having a high degree of weakening of the electric field of the second doped semiconductor portion due to the large thickness of the first sub-passivation layer included in the second dielectric passivation layer, thereby ensuring that the second doped semiconductor portion has a higher carrier collection efficiency.
[0014] As a possible implementation scheme, the thickness of the second sub-passivation layer included in the first dielectric passivation layer is smaller than the thickness of the second sub-passivation layer included in the second dielectric passivation layer.
[0015] When the above technical solution is adopted, the second sub-passivation layer included in the second dielectric passivation layer with a larger thickness (relative to the second sub-passivation layer included in the first dielectric passivation layer) is arranged on the first sub-passivation layer included in the second dielectric passivation layer with a smaller thickness (relative to the first sub-passivation layer included in the first dielectric passivation layer), which is beneficial for compensating the weakening of the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer on the side away from the semiconductor substrate by the second sub-passivation layer included in the second dielectric passivation layer with a larger thickness, further reducing the number of surface defects on the side away from the semiconductor substrate of the second doped semiconductor part, and helping to reduce the difference in passivation effect between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back contact battery, thereby improving the working performance of the back contact battery.
[0016] As a possible implementation scheme, the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer is greater than or equal to 0.5 nm and less than or equal to 5 nm.
[0017] In the case of adopting the above technical solution, the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer is within the above range, which can prevent the second sub-passivation layer included in the second dielectric passivation layer and the second sub-passivation layer included in the first dielectric passivation layer from having substantially the same chemical passivation effect due to the small difference, and ensure that the difference in chemical passivation effect between the parts corresponding to the first doped semiconductor part and the second doped semiconductor part on one side of the backlight surface can be compensated by the second sub-passivation layer included in the second dielectric passivation layer. It can also prevent the second sub-passivation layer included in the first dielectric passivation layer from having too low a passivation effect due to the large difference, or from having too large a thickness of the second sub-passivation layer included in the second dielectric passivation layer, which leads to a high amount of consumables, which is beneficial to controlling the manufacturing cost of the battery.
[0018] As a possible implementation scheme, the thickness of the second sub-passivation layer is greater than or equal to 50nm and less than or equal to 160nm. In this case, the thickness of the second sub-passivation layer is within the above range, which is conducive to preventing the weak passivation effect of the second sub-passivation layer due to its small thickness, ensuring that the backlight side of the back contact battery has a lower carrier recombination rate, and improving the working performance of the back contact battery. In addition, it can also prevent the large amount of consumables used due to the large thickness of the second sub-passivation layer, which is conducive to controlling the manufacturing cost of the back contact battery.
[0019] As a possible implementation scheme, the thickness of the first dielectric passivation layer is less than the thickness of the second dielectric passivation layer. In this case, because the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the second sub-passivation layer included in the second dielectric passivation layer, when the thickness of the first dielectric passivation layer is less than the thickness of the second dielectric passivation layer, it is beneficial to make the thickness of the second sub-passivation layer included in the first dielectric passivation layer less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer. Based on this, the application principle of the beneficial effect of the thickness of the first dielectric passivation layer being less than the thickness of the second dielectric passivation layer can refer to the application principle of the beneficial effect of the thickness of the second sub-passivation layer included in the first dielectric passivation layer being less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer described above, which will not be repeated here.
[0020] As a possible implementation solution, the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1.
[0021] When the above technical solution is adopted, when the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1, the thickness of the first dielectric passivation layer arranged on the side of the first doped semiconductor portion away from the semiconductor substrate is approximately the same as the thickness of the second dielectric passivation layer arranged on the side of the second doped semiconductor portion away from the semiconductor substrate, which is beneficial for making the first dielectric passivation layer and the second dielectric passivation layer have approximately the same comprehensive passivation effect, thereby helping to further reduce the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the back contact battery.
[0022] As a possible implementation solution, the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is greater than or equal to 52 nm and less than or equal to 175 nm.
[0023] When the above technical solution is adopted, when the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is within the above range, the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is moderate to prevent the passivation effect of the first dielectric passivation layer and / or the second dielectric passivation layer from being weak due to the small thickness value. It can also prevent the distribution density of the microstructure in the first dielectric passivation layer and / or the second dielectric passivation layer from being large or the use of consumables being high due to the large thickness, thereby ensuring that the back contact battery has a high working efficiency while helping to control the manufacturing cost of the battery.
[0024] As a possible implementation scheme, the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1; and / or the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer is greater than or equal to 2.0 and less than or equal to 2.2.
[0025] In the case of adopting the above technical solution, when the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1, the refractive index of the first dielectric passivation layer and the refractive index of the second dielectric passivation layer are substantially the same, which is conducive to making the portion corresponding to the first dielectric passivation layer and the portion corresponding to the second dielectric passivation layer on the backlight side of the back contact battery have substantially the same light refraction effect, which is conducive to achieving uniform light absorption and ensuring the balance of electrons and holes. In addition, when the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer is within the above range, the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer has a higher refractive effect on light, which is conducive to allowing more light to be set into the semiconductor substrate through the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer, thereby improving the bifaciality of the battery.
[0026] As a possible implementation scheme, the first sub-passivation layer included in the above-mentioned first dielectric passivation layer is an aluminum oxide layer, and under the test conditions of an exposure time of 0.2s and a light intensity of 1sun, the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer away from the semiconductor substrate is greater than or equal to 5000, and / or, the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer away from the semiconductor substrate is greater than or equal to 16500.
[0027] When the above technical solution is adopted, the aluminum oxide layer contains a large amount of oxygen anions, which can form a high-density fixed negative charge at the interface between itself and the first doped semiconductor part, forming a built-in electric field that has a shielding effect on minority carriers, thereby improving the carrier collection efficiency of the first doped semiconductor part and enhancing the carrier separation ability of the first doped semiconductor part. Secondly, under the test conditions of an exposure time of 0.2s and a light intensity of 1sun, when the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer away from the semiconductor substrate is greater than or equal to 5000, the presence of the first sub-passivation layer included in the first dielectric passivation layer of greater thickness improves the field passivation effect on the first doped semiconductor part, which is conducive to further reducing the difference in passivation effect between the portion corresponding to the first doped semiconductor part and the portion corresponding to the second doped semiconductor part on the backlight side of the back contact battery. In addition, the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer facing away from the semiconductor substrate is within the above range, and the second doped semiconductor part can be chemically passivated and / or field passivated by the first sub-passivation layer included in the second dielectric passivation layer, which can reduce the influence of its own field passivation function on the carrier collection efficiency of the second doped semiconductor part as much as possible, ensure that the second doped semiconductor part has a higher carrier separation ability, and help to further reduce the difference in passivation effect between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back contact battery.
[0028] As a possible implementation scheme, when the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are both aluminum oxide layers, the ratio of the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer facing away from the semiconductor substrate to the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer facing away from the semiconductor substrate is greater than or equal to 2.5 and less than or equal to 3.4. In this case, when the ratio of the PL brightness value corresponding to the side of the second doped semiconductor portion away from the semiconductor substrate to the PL brightness value corresponding to the side of the first doped semiconductor portion away from the semiconductor substrate (approximately greater than or equal to 3 and less than or equal to 4), the ratio of the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer away from the semiconductor substrate to the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer away from the semiconductor substrate is greater than or equal to 2.5 and less than or equal to 3.4, the ratio between the above PL brightness values is smaller, that is, the presence of the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer is beneficial to reducing the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the back contact battery, while realizing the passivation requirements of two doped semiconductor portions of different conductive types.
[0029] As a possible implementation solution, the surface reflectivity of the first doped semiconductor portion on a side facing away from the semiconductor substrate is greater than the surface reflectivity of the second doped semiconductor portion on a side facing away from the semiconductor substrate.
[0030] In the case of adopting the above technical solution, it can be understood that the surface reflectivity is inversely proportional to the specific surface area. The larger the specific surface area, the higher the surface light trapping effect and the lower the surface reflectivity. Secondly, the specific surface area is proportional to the surface roughness. The larger the specific surface area, the higher the surface roughness. Based on this, when the surface reflectivity of the first doped semiconductor part facing away from the semiconductor substrate is greater than the surface reflectivity of the second doped semiconductor part facing away from the semiconductor substrate, the surface roughness of the first doped semiconductor part facing away from the semiconductor substrate is smaller, and the surface roughness of the second doped semiconductor part facing away from the semiconductor substrate is larger. Under the same conditions, the film deposition thickness of the first sub-passivation layer included in the first dielectric passivation layer and the second dielectric passivation layer is inversely proportional to the roughness of the surface on which it is deposited. Therefore, when the surface roughness of the first doped semiconductor portion on the side away from the semiconductor substrate is relatively small, it is beneficial to form the first sub-passivation layer included in the first dielectric passivation layer with a relatively large thickness on the side of the first doped semiconductor portion away from the semiconductor substrate when manufacturing the first sub-passivation layer included in the second dielectric passivation layer under the same process conditions, thereby improving the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer, and forming the first sub-passivation layer included in the second dielectric passivation layer with a relatively small thickness on the side of the second doped semiconductor portion away from the semiconductor substrate, thereby reducing the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer, reducing the ratio of the PL brightness values of the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the battery, and reducing the degree of differentiation in passivation. Moreover, when the surface roughness of the second doped semiconductor portion facing away from the semiconductor substrate is relatively large, it is beneficial to form a second dielectric passivation layer with a relatively small thickness on the side of the second doped semiconductor portion facing away from the semiconductor substrate, including a first sub-passivation layer, thereby reducing the influence of the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer on the carrier collection efficiency of the second doped semiconductor portion.
[0031] As a possible implementation scheme, when the surface reflectivity of the first doped semiconductor portion facing away from the semiconductor substrate is greater than the surface reflectivity of the second doped semiconductor portion facing away from the semiconductor substrate, the surface of the first doped semiconductor portion facing away from the semiconductor substrate has a first texture structure, and the surface of the second doped semiconductor portion facing away from the semiconductor substrate has a second texture structure. The one-dimensional size of the first texture structure is different from the one-dimensional size of the second texture structure.
[0032] When the above technical solution is adopted, the one-dimensional size of the first texture structure and the second texture structure can be adjusted so that the reflectivity of the surface of the side of the first doped semiconductor part formed with the first texture structure away from the semiconductor substrate is larger and its surface roughness is lower, which is conducive to forming a first sub-passivation layer including a first dielectric passivation layer with a relatively large thickness on the side of the first doped semiconductor part away from the semiconductor substrate, thereby improving the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer, and forming a first sub-passivation layer including a second dielectric passivation layer with a relatively small thickness on the side of the second doped semiconductor part away from the semiconductor substrate, thereby reducing the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer, reducing the ratio of the PL brightness values of the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the battery, and reducing the degree of differentiation in passivation. Furthermore, the reflectivity of the surface of the second doped semiconductor portion having the second texture structure facing away from the semiconductor substrate is smaller and the surface roughness is higher, which is conducive to forming a second dielectric passivation layer with a relatively small thickness including a first sub-passivation layer on the side of the second doped semiconductor portion facing away from the semiconductor substrate, thereby reducing the influence of the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer on the carrier collection efficiency of the second doped semiconductor portion.
[0033] As a possible implementation scheme, when the first doped semiconductor portion is a P-type doped semiconductor portion and the second doped semiconductor portion is an N-type doped semiconductor portion, the doping concentration of the dopant in the first doped semiconductor portion is less than the doping concentration of the dopant in the second doped semiconductor portion, and / or the thickness of the first doped semiconductor portion is greater than the thickness of the second doped semiconductor portion.
[0034] When the above technical solution is adopted, as described above, the first sub-passivation layer included in the first dielectric passivation layer can form a superposition field at the first doped semiconductor part, thereby improving the carrier collection efficiency of the first doped semiconductor part. The first sub-passivation layer included in the second dielectric passivation layer will form a reverse field at the second doped semiconductor part, thereby affecting the carrier collection efficiency of the second doped semiconductor part. Based on this, when the doping concentration of the dopant in the second doped semiconductor part is relatively high, the electric field strength formed by the second doped semiconductor part itself is greater, which can compensate for the difference in carrier collection ability between the second doped semiconductor part and the first doped semiconductor part caused by the inhibitory effect of the reverse field formed by the field passivation function of the first sub-passivation layer included in the second dielectric passivation layer, thereby facilitating the uniform collection of carriers of different conductivity types.
[0035] As a possible implementation scheme, when the first doped semiconductor portion is a P-type doped semiconductor portion and the second doped semiconductor portion is an N-type doped semiconductor portion, the thickness of the first doped semiconductor portion is greater than the thickness of the second doped semiconductor portion. In this case, it is beneficial to increase the field passivation effect of the first doped semiconductor portion on the surface of the corresponding area of the semiconductor substrate, and the ratio of the PL brightness value of the part corresponding to the first doped semiconductor portion and the part corresponding to the second doped semiconductor portion on the backlight side of the battery can be further reduced, thereby reducing the degree of differentiation in passivation.
[0036] As a possible implementation scheme, the first sub-passivation layer included in the first dielectric passivation layer includes a hydrogen-containing passivation layer, and a local area of the hydrogen-containing passivation layer has a microstructure.
[0037] In the case of adopting the above technical solution, the presence of the above microstructure indicates that the hydrogen ion content in the hydrogen-containing passivation layer is sufficient, so that the hydrogen passivation effect on the corresponding doped semiconductor layer is higher, and the surface defects of the corresponding doped semiconductor layer are further reduced. Specifically, at least one microstructure can be a bulging structure in the direction away from the semiconductor substrate. At this time, there is a bulging and enclosed accommodation space between the hydrogen-containing passivation layer with the microstructure and the corresponding doped semiconductor part. There is hydrogen in the accommodation space to produce the bulging structure, which further reduces the surface defects of the corresponding doped semiconductor layer. Secondly, the hydrogen in the bulging structure can also continuously provide hydrogen ions in the subsequent manufacturing process or the battery operation process, so as to realize the continuous hydrogen passivation of the corresponding doped semiconductor layer, which is beneficial to improve the yield of the battery and extend the service life of the battery.
[0038] In addition, when at least one microstructure is a microstructure with a concave or bulging middle part and a cyclonic edge (at this time, the microstructure presents a morphology formed by a fluid rotating around a straight line or a curved axis in a certain direction), it indicates that the hydrogen content in the hydrogen-containing passivation layer is higher, so that the content of hydrogen ions that have not been used for hydrogen passivation is sufficient, so that after escaping from the hydrogen-containing passivation layer, the microstructure explodes. Based on this, when the hydrogen-containing passivation layer includes such a microstructure, the hydrogen-containing passivation layer has a higher hydrogen passivation effect on the corresponding doped semiconductor layer. Moreover, after the explosion occurs, an uneven microstructure can be formed on the side of the hydrogen-containing passivation layer away from the semiconductor substrate, which is beneficial to reduce the reflectivity of the side of the hydrogen-containing passivation layer away from the semiconductor substrate and improve its own light trapping effect.
[0039] As a possible implementation scheme, when the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer both include hydrogen-containing passivation layers, the distribution density of the microstructure in the first sub-passivation layer included in the first dielectric passivation layer is greater than the distribution density of the microstructure in the first sub-passivation layer included in the second dielectric passivation layer.
[0040] In the case of adopting the above technical solution, it can be understood that when the thickness of the hydrogen-containing passivation layer is greater and / or the density is higher, the hydrogen content of the hydrogen-containing passivation layer is higher, and the hydrogen escape is easier to form the above microstructure after the hydrogen is heated. Based on this, when the distribution density of the microstructure in the first sub-passivation layer included in the first dielectric passivation layer is greater than the distribution density of the microstructure in the first sub-passivation layer included in the second dielectric passivation layer, it is beneficial to make the first sub-passivation layer included in the first dielectric passivation layer have a greater thickness and / or a higher film density (compared to the first sub-passivation layer included in the second dielectric passivation layer) to ensure that the first sub-passivation layer included in the first dielectric passivation layer has a higher field passivation effect on the first doped semiconductor layer. At the same time, it is beneficial to make the first sub-passivation layer included in the second dielectric passivation layer have a smaller thickness and / or a lower film density to reduce the influence of the field passivation function of the first sub-passivation layer included in the second dielectric passivation layer on the carrier collection efficiency of the second doped semiconductor layer, ensuring that the back contact battery has a higher working efficiency.
[0041] As a possible implementation solution, a size of at least one microstructure is greater than or equal to 10 μm and less than or equal to 20 μm.
[0042] In the case of adopting the above technical solution, as described above, when the hydrogen-containing passivation layer has the above microstructure, it indicates that the hydrogen ion content in the hydrogen-containing passivation layer is sufficient, so that it has a high chemical passivation effect on the corresponding doped semiconductor layer. The presence of the above microstructure will also cause the hydrogen-containing passivation layer to be unable to contact the corresponding doped semiconductor layer at least in part of the microstructure, that is, the hydrogen-containing passivation layer cannot passivate the corresponding doped semiconductor layer at least in part of the microstructure. Based on this, when the size of the microstructure is within the above range, it can prevent the hydrogen content in the hydrogen-containing passivation layer itself from being small due to the small size; secondly, it can also prevent the effective contact area between the hydrogen-containing passivation layer and the corresponding doped semiconductor layer from being small due to the large size, ensuring that the hydrogen-containing passivation layer has a high passivation effect on the corresponding doped semiconductor layer. In addition, it can also prevent the first sub-passivation layer included in the second dielectric passivation layer from including a hydrogen-containing passivation layer, and the size of the microstructure in the first sub-passivation layer included in the second dielectric passivation layer is large, so that the thickness of the first sub-passivation layer included in the second dielectric passivation layer is also large, thereby affecting the carrier collection efficiency of the second doped semiconductor part.
[0043] As a possible implementation, at least one microstructure has a height greater than or equal to 0.1 μm and less than or equal to 0.5 μm. The application principle of the beneficial effect in this case is similar to the application principle of the beneficial effect of the microstructure having a size greater than or equal to 10 μm and less than or equal to 20 μm described above, and will not be repeated here.
[0044] As a possible implementation scheme, an uneven anti-reflection structure is formed in the first doped semiconductor part and / or the second doped semiconductor part at a position corresponding to the microstructure. In this case, the reflectivity of the first doped semiconductor part and / or the second doped semiconductor part away from the semiconductor substrate is reduced, which is conducive to refracting more light into the semiconductor substrate through the first doped semiconductor part and / or the second doped semiconductor part, thereby improving the bifaciality of the battery.
[0045] As a possible implementation scheme, the back contact battery further includes a third passivation layer disposed on the second surface, and the thickness of the third passivation layer is greater than the thickness of the portion of the first sub-passivation layer included in the first dielectric passivation layer. In this case, the second surface side of the semiconductor substrate is well chemically passivated by the third passivation layer having a relatively high thickness, thereby reducing the number of surface defects and carrier recombination rate on the second surface side.
[0046] As a possible implementation scheme, the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are made of the same material. In this case, it is beneficial to reduce the types of materials used to manufacture different structures of back-contact batteries, improve the compatibility between different structures, and improve the yield of back-contact batteries.
[0047] As a possible implementation scheme, the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are integrally continuous. In this case, the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer can be formed simultaneously based on the same material and in the same step, which improves the manufacturing efficiency of the back contact battery and helps reduce the manufacturing cost of the back contact battery.
[0048] As a possible implementation scheme, under the same test conditions, the ratio of the PL brightness value of the first sub-passivation layer included in the second dielectric passivation layer on the side away from the semiconductor substrate to the PL brightness value of the first sub-passivation layer included in the first dielectric passivation layer on the side away from the semiconductor substrate is PL1. And, under the same test conditions, the ratio of the PL brightness value of the second sub-passivation layer included in the second dielectric passivation layer on the side away from the semiconductor substrate to the PL brightness value of the second sub-passivation layer included in the first dielectric passivation layer on the side away from the semiconductor substrate is PL2, and PL2 is less than PL1. In this case, by providing the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer with different thicknesses, the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the back contact battery can be further reduced.
[0049] As a possible implementation scheme, when the second sub-passivation layer is a silicon nitride layer, PL2 is greater than or equal to 1.62 and less than or equal to 1.9. In this case, when the second sub-passivation layer is formed, the ratio of the PL brightness value of the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the battery can be further reduced, thereby reducing the degree of differentiation in passivation.
[0050] As a possible implementation scheme, the difference between the refractive index of the second sub-passivation layer included in the second dielectric passivation layer and the refractive index of the second sub-passivation layer included in the first dielectric passivation layer is greater than or equal to 0.01 and less than or equal to 0.1.
[0051] As a possible implementation scheme, the material of the second sub-passivation layer included in the first dielectric passivation layer is the same as the material of the second sub-passivation layer included in the second dielectric passivation layer. In this case, it is beneficial to reduce the types of materials used to manufacture different structures of back-contact batteries, improve the compatibility between different structures, and improve the yield of back-contact batteries.
[0052] As a possible implementation scheme, the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are integrally continuous. In this case, the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer can be formed simultaneously based on the same material and in the same step, which improves the manufacturing efficiency of the back contact battery and helps reduce the manufacturing cost of the back contact battery.
[0053] In a second aspect, the present invention provides a photovoltaic module, which includes a back-contact cell provided by the first aspect and various implementations thereof.
[0054] The beneficial effects of the second aspect of the present invention and its various implementations can be analyzed by referring to the beneficial effects of the first aspect and its various implementations, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS
[0055] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:
[0056] Figure 1 A schematic longitudinal cross-sectional view of the structure of a back contact battery provided in an embodiment of the present invention Figure 1 ;
[0057] Figure 2 A schematic longitudinal cross-sectional view of the structure of a back contact battery provided in an embodiment of the present invention Figure 2 ;
[0058] Figure 3 A schematic longitudinal cross-sectional view of the structure of a back contact battery provided in an embodiment of the present invention Figure 3 ;
[0059] Figure 4 A schematic longitudinal cross-sectional view of the structure of a back contact battery provided in an embodiment of the present invention Figure 4 ;
[0060] Figure 5 A schematic longitudinal cross-sectional view of the structure of a back contact battery provided in an embodiment of the present invention Figure 5 ;
[0061] Figure 6 3D image of a local area of a back-contact cell on the backlight side provided by an embodiment of the present invention Figure 1 ;
[0062] Figure 7 3D image of a local area of a back-contact cell on the backlight side provided by an embodiment of the present invention Figure 2 ;
[0063] Figure 8 SEM image of a local area of the back-contact cell provided in an embodiment of the present invention on the back-light side Figure 1 ;
[0064] Fig. 9 SEM image of a local area of the back-contact cell provided in an embodiment of the present invention on the back-light side Figure 2 ;
[0065] Fig.10 A 3D scan of a local area on the backlight side of a back contact battery provided by an embodiment of the present invention;
[0066] Fig.11 A SEM image of a local area of the first doped semiconductor portion in a back contact cell provided by an embodiment of the present invention, which is away from the semiconductor substrate;
[0067] Fig.12 A schematic longitudinal cross-sectional view of the structure of a back contact battery provided in an embodiment of the present invention Figure 6 ;
[0068] Fig.13 A PL brightness value test diagram of the finished structure of the back contact battery provided by an embodiment of the present invention on the back side;
[0069] Fig.14 A schematic diagram of the connection relationship of photovoltaic modules provided in an embodiment of the present invention.
[0070] Figure numerals: 11 is a semiconductor substrate, 12 is a first doped semiconductor portion, 13 is a second doped semiconductor portion, 14 is a first dielectric passivation layer, 15 is a second dielectric passivation layer, 16 is a first texture structure, 17 is a second texture structure, 18 is a microstructure, 19 is an anti-reflection structure, 20 is a third passivation layer, 21 is a first sub-passivation layer, 22 is a second sub-passivation layer, and 23 is an interface passivation layer. DETAILED DESCRIPTION
[0071] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present invention. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of the concept of the present invention.
[0072] Various structural schematic diagrams according to embodiments of the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for a clearer expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.
[0073] In the context of the present invention, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be an intermediate layer / element between them. In addition, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "under" the other layer / element. In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.
[0074] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined. The meaning of "several" is one or more, unless otherwise clearly and specifically defined.
[0075] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0076] A solar cell is a device that can convert sunlight into electrical energy. Specifically, when the solar cell is in operation, sunlight shines on the semiconductor pn junction of the solar cell, forming new hole-electron pairs. Under the action of the built-in electric field of the pn junction, photogenerated holes flow to the p region, and photogenerated electrons flow to the n region. When the circuit is connected, current can be generated. Among them, a solar cell in which both the positive electrode and the negative electrode are on the back of the cell is a back contact cell. Compared with a double-sided contact solar cell, the front of the back contact cell is not blocked by a metal electrode, so that the light-facing side of the back contact cell has a higher light utilization rate. Therefore, the back contact cell has a higher short-circuit current and photoelectric conversion efficiency, and is one of the current technical directions for realizing high-efficiency crystalline silicon cells. In addition, the above-mentioned back contact cell may include a surface passivation layer having both field passivation and chemical passivation functions to improve the passivation effect of the side of the back contact cell having the surface passivation layer.
[0077] However, in the existing back-contact battery including the above-mentioned surface passivation layer having both field passivation and chemical passivation functions, the surface passivation layer cannot simultaneously meet the passivation requirements of the P region and the N region, resulting in poor working performance of the battery. Specifically, the above-mentioned back-contact battery generally includes a semiconductor substrate, a first doped semiconductor portion, a second doped semiconductor portion and a surface passivation layer. Among them, the first doped semiconductor portion and the second doped semiconductor portion are alternately distributed on the same surface of the semiconductor substrate, and the conductivity types of the first doped semiconductor portion and the second doped semiconductor portion are opposite. The above-mentioned surface passivation layer covers the side of the first doped semiconductor portion and the second doped semiconductor portion away from the semiconductor substrate. Furthermore, the surface passivation layer (such as an aluminum oxide layer and / or a silicon nitride layer, etc.) not only has a chemical passivation function, but can also chemically passivate the first doped semiconductor portion and the second doped semiconductor portion on the side facing away from the semiconductor substrate; moreover, the conductivity type of the fixed charge possessed by the surface passivation layer is opposite to the conductivity type of the first doped semiconductor portion, so that the surface passivation layer also has a field passivation function, and can field passivate the first doped semiconductor portion, that is, it has a reinforcing effect on the electric field of the first doped semiconductor portion, and the electric field formed by the surface passivation layer shields minority carriers, thereby accelerating the collection of majority carriers.
[0078] However, the field passivation function of the surface passivation layer will weaken the electric field of the second doped semiconductor part, affecting the collection of carriers by the second doped semiconductor part. In the above case, the existing back contact battery including the surface passivation layer does not design differential passivation functions according to the different conductivity types of the first doped semiconductor part and the second doped semiconductor part, resulting in poor carrier collection ability of the second doped semiconductor part due to the large thickness of the surface passivation layer on the first doped semiconductor part and the second doped semiconductor part, or poor passivation effect of the surface passivation layer on the first doped semiconductor part due to the small thickness of the surface passivation layer on the first doped semiconductor part and the second doped semiconductor part, which is not conducive to improving the working efficiency of the back contact battery.
[0079] In order to solve the above technical problems, in the first aspect, an embodiment of the present invention provides a back contact battery. Figure 1 As shown, the back contact battery includes: a semiconductor substrate 11, a first doped semiconductor portion 12, a second doped semiconductor portion 13, a first dielectric passivation layer 14 and a second dielectric passivation layer 15. The first doped semiconductor portion 12 and the second doped semiconductor portion 13 have opposite conductivity types. The first dielectric passivation layer 14 and the second dielectric passivation layer 15 both include a first sub-passivation layer 21 having a field passivation function and a chemical passivation function. The conductivity type of the first doped semiconductor portion 12 is opposite to the conductivity type of the fixed charge of the first sub-passivation layer 21. Among them, the semiconductor substrate 11 has a first face and a second face opposite to each other. Along the direction parallel to the first face, the first doped semiconductor portion 12 and the second doped semiconductor portion 13 are alternately distributed on the first face. The first dielectric passivation layer 14 covers the side of the first doped semiconductor portion 12 away from the semiconductor substrate 11, and the second dielectric passivation layer 15 covers the side of the second doped semiconductor portion 13 away from the semiconductor substrate 11. The thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 is greater than the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15. As shown Figure 1 As shown, the first dielectric passivation layer 14 and the second dielectric passivation layer may further include a second sub-passivation layer 22 having a chemical passivation function. The second sub-passivation layer 22 is disposed on a side of the first sub-passivation layer 21 away from the semiconductor substrate 11. The material of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 is different from the material of the first sub-passivation layer 21 included in the first dielectric passivation layer 14. The material of the second sub-passivation layer 22 included in the second dielectric passivation layer 15 is different from the material of the first sub-passivation layer 21 included in the second dielectric passivation layer 15.
[0080] In the case of adopting the above technical solution, the conductivity types of the first doped semiconductor part and the second doped semiconductor part are opposite, and the conductivity type of the first doped semiconductor is opposite to the conductivity type of the fixed charge of the first sub-passivation layer included in the first dielectric passivation layer covering the side of the first doped semiconductor part away from the semiconductor substrate, and the first sub-passivation layer included in the second dielectric passivation layer covering the side of the second doped semiconductor part away from the semiconductor substrate. In addition, the first sub-passivation layer included in the first dielectric passivation layer will induce a charge opposite to the conductivity type of the first doped semiconductor part on the side close to the first doped semiconductor part, while the first sub-passivation layer included in the first dielectric passivation layer on the side away from the first doped semiconductor part has the same charge as the conductivity type of the first doped semiconductor part, so that an electric field is formed at the first sub-passivation layer included in the first dielectric passivation layer. Since the conductivity type of the fixed charge of the first sub-passivation layer included in the first dielectric passivation layer is opposite to the conductivity type of the dopant in the first doped semiconductor part, the electric field can shield minority carriers and enhance the carrier collection ability and carrier separation ability of the first doped semiconductor part. On the contrary, the electric field formed in the first sub-passivation layer included in the second dielectric passivation layer will form a reverse field at the second doped semiconductor part of the same fixed charge conductivity type as itself. At this time, the field passivation function of the first sub-passivation layer included in the second dielectric passivation layer has a weakening effect on the electric field of the second doped semiconductor part, which will affect the carrier collection ability of the second doped semiconductor part. Secondly, within a certain range, the field passivation effect of the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer is proportional to its own thickness. Based on this, if Figure 1As shown in FIG. 1 , when the thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 is greater than the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15, the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15 disposed on the side of the second doped semiconductor portion 13 away from the semiconductor substrate 11 is smaller. At this time, the first sub-passivation layer 21 included in the second dielectric passivation layer 15 with a smaller thickness can weaken its own effect on the reverse field of the second doped semiconductor portion 13, which is beneficial for the second doped semiconductor portion 13 to have a higher carrier collection efficiency. At the same time, the first sub-passivation layer 21 included in the second dielectric passivation layer 15 The presence of the layer 21 and the second sub-passivation layer 22 can chemically passivate the surface of the second doped semiconductor portion 13, thereby reducing the surface defects of the second doped semiconductor portion 13; in addition, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 arranged on the side of the first doped semiconductor portion 12 away from the semiconductor substrate 11 has a larger thickness. At this time, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 with a larger thickness has a higher field passivation effect of the same direction field on the first doped semiconductor portion 12, thereby enhancing the carrier collection ability of the first doped semiconductor portion 12 and reducing the surface defects of the first doped semiconductor portion 12. It can be seen that in the back contact battery provided by the embodiment of the present invention, in view of the difference in conductivity types between the first doped semiconductor portion 12 and the second doped semiconductor portion 13, the first dielectric passivation layer 14 has a higher field passivation and chemical passivation effect on the first doped semiconductor portion 12, while reducing the weakening effect of the second dielectric passivation layer 15 on the field passivation of the second doped semiconductor portion 13, and at the same time, the passivation requirements of the two doped semiconductor portions of different conductivity types are met, thereby facilitating that the portion corresponding to the first doped semiconductor portion 12 and the portion corresponding to the second doped semiconductor portion 13 on the backlight side of the back contact battery both have a lower carrier recombination rate and a higher carrier separation ability, thereby improving the working performance of the back contact battery. 。
[0081] In actual application, the embodiment of the present invention does not specifically limit the material and conductivity type of the semiconductor substrate. For example, the semiconductor substrate may be a silicon substrate. Alternatively, the semiconductor substrate may be a substrate made of any semiconductor material such as a germanium silicon substrate, a germanium substrate, or a gallium arsenide substrate. In addition, the semiconductor substrate may be an N-type semiconductor substrate or a P-type semiconductor substrate.
[0082] Secondly, the semiconductor substrate comprises a first surface and a second surface opposite to each other, the first surface of the semiconductor substrate corresponds to the backlight side of the back contact battery, and the second surface of the semiconductor substrate corresponds to the light-facing side of the back contact battery. Figure 1 and Figure 2 As shown, the second surface of the semiconductor substrate 11 can be a plane or a velvet surface. When the second surface of the semiconductor substrate 11 is a velvet surface, it is beneficial to improve the light trapping effect of the second surface and improve the light utilization rate of the back contact battery.
[0083] As for the surface morphology of the first surface of the semiconductor substrate, the first doped semiconductor part and the second doped semiconductor part are alternately distributed on the first surface of the semiconductor substrate. In addition, the surface morphology of the first doped semiconductor part and the second doped semiconductor part on the side away from the semiconductor substrate will be affected by the surface morphology of the corresponding area of the semiconductor substrate where the above-mentioned two doped semiconductor layers are formed. The surface morphology of the first doped semiconductor part and the second doped semiconductor part on the side away from the semiconductor substrate will affect its own surface roughness, and then affect the thickness of the first sub-passivation layer and the first sub-passivation layer formed in the first dielectric passivation layer and the second doped semiconductor part on the side away from the semiconductor substrate. Based on this, the surface morphology of different areas in the semiconductor substrate can be determined according to the thickness requirements of the first sub-passivation layer and the first sub-passivation layer of the first dielectric passivation layer and the second dielectric passivation layer in the actual application scenario.
[0084] For example, the first surface of the semiconductor substrate may be a polished surface or a texture structure may be further formed on the polished surface. Furthermore, in the first surface, the side length of the tower-shaped texture structure formed on the surface of the region corresponding to the first doped semiconductor portion may be greater than the side length of the tower-shaped texture structure formed on the surface of the region corresponding to the second doped semiconductor portion; and / or, in the first surface, the height of the tower-shaped texture structure formed on the surface of the region corresponding to the first doped semiconductor portion may be less than the height of the tower-shaped texture structure formed on the surface of the region corresponding to the second doped semiconductor portion.
[0085] For another example: the first surface of the semiconductor substrate may be all velvet. Moreover, in the first surface, the base side length (or diagonal length) of the pyramid-type velvet structure formed on the surface of the region corresponding to the first doped semiconductor part may be smaller than the base side length (or diagonal length) of the pyramid-type velvet structure formed on the surface of the region corresponding to the second doped semiconductor part; and / or, in the first surface, the height of the pyramid-type velvet structure formed on the surface of the region corresponding to the first doped semiconductor part may be smaller than the height of the pyramid-type velvet structure formed on the surface of the region corresponding to the second doped semiconductor part.
[0086] For another example: in the first surface, the surface of the region corresponding to the first doped semiconductor portion may be a polished surface or a texture structure may be further formed on the polished surface, and the surface of the region corresponding to the second doped semiconductor portion may be a velvet surface.
[0087] It should be noted that the surface morphologies of various regions of the first surface of the semiconductor substrate may also be the same. In this case, the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer having different thicknesses can be obtained by adjusting the formation parameters of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer.
[0088] For the above-mentioned first doped semiconductor part and the second doped semiconductor part, from the aspect of conductivity type, the embodiment of the present invention does not specifically limit the conductivity type of the first doped semiconductor part and the second doped semiconductor part, as long as the conductivity types of the first doped semiconductor part and the second doped semiconductor part are opposite, and the conductivity type of the first doped semiconductor part is opposite to the conductivity type of the fixed charge of the first sub-passivation layer. Specifically, the conductivity type of the first doped semiconductor part can be N-type, in which case the conductivity type of the second doped semiconductor part is P-type, and the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer both have fixed negative charges; or, the conductivity type of the first doped semiconductor part can also be P-type, in which case the conductivity type of the second doped semiconductor part is N-type, and the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer both have fixed positive charges.
[0089] In terms of distribution, Figure 1 As shown, the first doped semiconductor portion 12 may be disposed in a local region of the first surface of the semiconductor substrate 11. Figure 3 As shown, the first doped semiconductor portion 12 may also be disposed on a local region of the first surface of the semiconductor substrate 11 .
[0090] As for the second doped semiconductor portion, Figure 2 As shown, the second doped semiconductor portion 13 may be disposed in a local area of the first surface of the semiconductor substrate 11. Figure 3 As shown, the second doped semiconductor portion 13 may also be arranged at least on a partial region of the first surface of the semiconductor substrate 11 .
[0091] Wherein, when the first doped semiconductor portion and the second doped semiconductor portion are both doped semiconductor layers disposed on the first surface, as Figure 1 and Figure 2 As shown, the first doped semiconductor portions 12 and the second doped semiconductor portions 13 may be alternately distributed on one side of the first surface of the semiconductor substrate 11. Figure 3 As shown, the second doped semiconductor portion 13 may also cover a portion of the first doped semiconductor portion 12 , and the second doped semiconductor portion 13 and the first doped semiconductor portion 12 are spaced apart at least along the thickness direction of the semiconductor substrate 11 to prevent short circuit.
[0092] In terms of materials, when at least one of the first doped semiconductor part and the second doped semiconductor part is a doped semiconductor layer disposed on the first surface, the material of the doped semiconductor layer may include any semiconductor material such as silicon, silicon germanium, germanium or gallium arsenide. In terms of the arrangement of the material, the crystal phase of the doped semiconductor layer may be amorphous, microcrystalline, nanocrystalline, single crystal or polycrystalline, etc. Among them, when the first doped semiconductor part and the second doped semiconductor part are both doped semiconductor layers disposed on the first surface, the materials of the first doped semiconductor part and the second doped semiconductor part may be the same or different. For example: the materials of the first doped semiconductor part and the second doped semiconductor part may both be doped polycrystalline silicon. For another example: the materials of the first doped semiconductor part and the second doped semiconductor part may both include at least one of doped amorphous silicon, doped microcrystalline silicon and doped nanocrystalline silicon. For another example: the material of the first doped semiconductor part may be doped polycrystalline silicon, and the material of the second doped semiconductor part may include at least one of doped amorphous silicon, doped microcrystalline silicon and doped nanocrystalline silicon.
[0093] Secondly, if Figure 1 and Figure 2 As shown in FIG. 1 , when at least one of the first doped semiconductor portion 12 and the second doped semiconductor portion 13 is a doped semiconductor layer disposed on the first surface, the doped semiconductor layer may be directly disposed on the semiconductor substrate 11. Alternatively, as Figure 3 and Figure 5 As shown, the back contact cell may also include an interface passivation layer 23, which is at least arranged between the doped semiconductor layer and the semiconductor substrate 11. In this case, the passivation contact structure composed of the interface passivation layer 23 and the doped semiconductor layer has an excellent interface passivation effect, and can realize the selective collection of carriers, reduce the carrier recombination rate on the surface of the corresponding area in the first surface of the semiconductor substrate 11, and further improve the photoelectric conversion efficiency of the back contact cell. The material and thickness of the interface passivation layer 23 can be set according to the material of the doped semiconductor layer and actual needs, and are not specifically limited here. For example: when the material of the doped semiconductor layer is doped polycrystalline silicon, the interface passivation layer is a tunneling passivation layer. For another example: when the material of the doped semiconductor layer includes at least one of doped amorphous silicon, doped microcrystalline silicon and doped nanocrystalline silicon, the interface passivation layer is an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, an intrinsic nanocrystalline silicon layer or a mixed layer of the above three.
[0094] Wherein, when the first doped semiconductor portion and the second doped semiconductor portion are both doped semiconductor layers disposed on the first surface, an interface passivation layer may be disposed only between the first doped semiconductor portion and the semiconductor substrate. Figure 3 As shown, an interface passivation layer 23 may be provided only between the second doped semiconductor portion 13 and the semiconductor substrate 11. Alternatively, as Figure 5As shown, an interface passivation layer 23 may be provided between the first doped semiconductor portion 12 and the semiconductor substrate 11, and between the second doped semiconductor portion 13 and the semiconductor substrate 11; in this case, the type of the first selective contact structure formed by the first doped semiconductor portion 12 and the interface passivation layer 23 may be the same as or different from the type of the second selective contact structure formed by the second doped semiconductor portion 13 and the interface passivation layer 23.
[0095] Optionally, the first selective contact structure and the second selective contact structure may both be tunnel passivation contact structures.
[0096] In terms of surface morphology, the surface morphology of the first doped semiconductor part away from the semiconductor substrate and the surface morphology of the second doped semiconductor part away from the semiconductor substrate will affect the surface reflectivity of the side away from the semiconductor substrate. The surface reflectivity is inversely proportional to the specific surface area. The larger the specific surface area, the higher the surface light trapping effect and the lower the surface reflectivity. Secondly, the specific surface area is proportional to the surface roughness. The larger the specific surface area, the higher the surface roughness. Moreover, under the same conditions, the deposition film thickness of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer is inversely proportional to the roughness of the deposited surface. Based on this, the surface morphology and surface reflectivity of the first doped semiconductor part away from the semiconductor substrate and the surface morphology and surface reflectivity of the second doped semiconductor part away from the semiconductor substrate can be determined according to the thickness requirements of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer in the actual application scenario, and the actual manufacturing process of the back contact battery.
[0097] Specifically, the surface reflectivity of the first doped semiconductor portion facing away from the semiconductor substrate can be equal to the surface reflectivity of the second doped semiconductor portion facing away from the semiconductor substrate; at this time, different film thicknesses can be obtained by adjusting the condition parameters when manufacturing the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer.
[0098] Alternatively, the surface reflectivity of the first doped semiconductor portion facing away from the semiconductor substrate may be greater than the surface reflectivity of the second doped semiconductor portion facing away from the semiconductor substrate. In this case, the surface roughness of the first doped semiconductor portion facing away from the semiconductor substrate is smaller, and the surface roughness of the second doped semiconductor portion facing away from the semiconductor substrate is larger. As mentioned above, under the same conditions, the film deposition thickness of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer is inversely proportional to the roughness of the surface on which they are deposited. Therefore, when the surface roughness of the first doped semiconductor part facing away from the semiconductor substrate is relatively small, it is beneficial to manufacture the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer under the same process conditions. The first sub-passivation layer included in the first dielectric passivation layer with a relatively large thickness is formed on the side of the first doped semiconductor part facing away from the semiconductor substrate, thereby improving the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer, and the first sub-passivation layer included in the second dielectric passivation layer with a relatively small thickness is formed on the side of the second doped semiconductor part facing away from the semiconductor substrate, thereby reducing the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer, thereby reducing the degree of difference in the comprehensive passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the battery. Furthermore, when the surface roughness of the second doped semiconductor portion on the side away from the semiconductor substrate is relatively large, it is beneficial to form a first sub-passivation layer included in the second dielectric passivation layer with a relatively small thickness on the side of the second doped semiconductor portion away from the semiconductor substrate, thereby reducing the influence of the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer on the carrier collection efficiency of the second doped semiconductor portion. As for the difference in surface reflectivity of the first doped semiconductor portion and the second doped semiconductor portion on the side away from the semiconductor substrate, it can be determined according to the difference in thickness of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer, and is not specifically limited here.
[0099] Secondly, the surface morphology of the first doped semiconductor portion facing away from the semiconductor substrate can be the same as the surface morphology of the second doped semiconductor portion facing away from the semiconductor substrate; at this time, different film thicknesses can be obtained by adjusting the condition parameters when manufacturing the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer.
[0100] Alternatively, the surface morphology of the first doped semiconductor portion facing away from the semiconductor substrate may be different from the surface morphology of the second doped semiconductor portion facing away from the semiconductor substrate. Figure 6 and Figure 7As shown, the first doped semiconductor portion 12 may have a first texture structure 16 on one side of the surface facing away from the semiconductor substrate, and the second doped semiconductor portion 13 may have a second texture structure 17 on one side of the surface facing away from the semiconductor substrate. The one-dimensional size of the first texture structure 16 and the one-dimensional size of the second texture structure 17 are different, and / or the types of the first texture structure 16 and the second texture structure 16 are different. Among them, the types of the first texture structure 16 and the second texture structure 17 can be set according to actual needs. For example: the first texture structure and the second texture structure can be a tower-like texture structure. The bottom surface of the tower-like texture structure can be a regular or irregular polygon, a bottom surface with an arc-shaped contour, etc. The specific meaning of the above one-dimensional size can be determined according to the type of the first texture structure and the second texture structure. For example, when the first texture structure and / or the second texture structure is a tower-like texture structure, the one-dimensional size can be the height, side length, diagonal length or perimeter of the tower-like texture structure.
[0101] Three examples of the surface morphology of the first doped semiconductor portion and the second doped semiconductor portion on the side facing away from the semiconductor substrate are given below. However, these three examples are only used to explain the present invention and are not used to limit the present invention.
[0102] For example, Figure 6 and Figure 7As shown, the surface of the first doped semiconductor portion 12 facing away from the semiconductor substrate may have a first tower-like texture structure, and the surface of the second doped semiconductor portion 13 facing away from the semiconductor substrate may have a second tower-like texture structure. The side length of the first tower-like texture structure may be greater than the side length of the second tower-like texture structure, and / or the height of the first tower-like texture structure may be less than the height of the second tower-like texture structure. In this case, when the side length of the first tower-shaped texture structure is greater than the side length of the second tower-shaped texture structure, and when the height of the first tower-shaped texture structure is less than the height of the second tower-shaped texture structure, the reflectivity of the surface of the side of the first doped semiconductor part 12 formed with the first tower-shaped texture structure away from the semiconductor substrate 11 is greater, and its surface roughness is lower, which is conducive to forming a first sub-passivation layer 21 including a first dielectric passivation layer with a relatively large thickness on the side of the first doped semiconductor part 12 away from the semiconductor substrate, thereby improving the field passivation effect of the first sub-passivation layer 21 included in the first dielectric passivation layer, and forming a first sub-passivation layer 21 including a second dielectric passivation layer 15 with a relatively small thickness on the side of the second doped semiconductor part 13 away from the semiconductor substrate, thereby reducing the field passivation effect of the first sub-passivation layer 21 included in the second dielectric passivation layer 15, and reducing the degree of differentiation in the comprehensive passivation effect between the portion corresponding to the first doped semiconductor part 12 and the portion corresponding to the second doped semiconductor part 13 on the backlight side of the battery. In addition, the second doped semiconductor part 13 having a second tower-shaped texture structure with a smaller side length and / or a larger height has a smaller reflectivity on the surface of the side away from the semiconductor substrate, and a higher surface roughness, which is conducive to forming a first sub-passivation layer 21 included in the second dielectric passivation layer 15 with a relatively small thickness on the side of the second doped semiconductor part 13 away from the semiconductor substrate, thereby reducing the influence of the field passivation effect of the first sub-passivation layer 21 included in the second dielectric passivation layer 15 on the carrier collection efficiency of the second doped semiconductor part 13. As for the side length and height of the first tower-shaped texture structure, and the side length and height of the second tower-shaped texture structure, they can be determined according to the difference in thickness between the first sub-passivation layer 21 included in the first dielectric passivation layer and the first sub-passivation layer 21 included in the second dielectric passivation layer 15, and are not specifically limited here.
[0103] Illustratively, a surface of the first doped semiconductor portion facing away from the semiconductor substrate may have a tower-shaped texture structure, and a surface of the second doped semiconductor portion facing away from the semiconductor substrate may have a pyramid-shaped velvet structure.
[0104] Exemplarily, the surface of the first doped semiconductor portion facing away from the semiconductor substrate may have a first pyramid-shaped velvet structure, and the surface of the second doped semiconductor portion facing away from the semiconductor substrate may have a second pyramid-shaped velvet structure. The side length of the first pyramid-shaped velvet structure may be smaller than the side length of the second pyramid-shaped velvet structure, and / or the height of the first pyramid-shaped velvet structure may be smaller than the height of the second pyramid-shaped texture structure.
[0105] As for the doping concentration and thickness of the dopant in the first doped semiconductor part and the second doped semiconductor part, they can be set according to actual needs. As mentioned above, the first sub-passivation layer included in the first dielectric passivation layer can form a superposition field at the first doped semiconductor part, thereby improving the carrier collection efficiency of the first doped semiconductor part. The first sub-passivation layer included in the second dielectric passivation layer will form a reverse field at the second doped semiconductor part, affecting the carrier collection efficiency of the second doped semiconductor part. In addition, the doping concentration and thickness of the dopant in the first doped semiconductor part and the second doped semiconductor part will affect the level of their own field passivation effect. Therefore, the doping concentration and thickness of the dopant in the first doped semiconductor part and the second doped semiconductor part can be determined according to the requirements for the field passivation effect of the first doped semiconductor part and the second doped semiconductor part in the actual application scenario.
[0106] Exemplarily, the doping concentration of the dopant in the first doped semiconductor part may be less than or equal to the doping concentration of the dopant in the second doped semiconductor part. When the doping concentration of the dopant in the second doped semiconductor part is relatively high, the electric field strength formed by the second doped semiconductor part itself is relatively high, which can compensate for the difference in carrier collection ability between the second doped semiconductor part and the first doped semiconductor part caused by the suppression effect of the reverse field formed by the field passivation function of the first sub-passivation layer included in the second dielectric passivation layer, thereby facilitating the uniform collection of carriers of different conductivity types.
[0107] For example, the doping concentration of the dopant in the first doped semiconductor portion may be 6E19cm -3 To 7E19cm -3 ; and / or, the doping concentration of the dopant in the second doped semiconductor portion may be 5E20cm -3 To 6E20cm -3 .
[0108] For example, Figure 4As shown, the thickness of the first doped semiconductor portion 12 may be greater than or equal to the thickness of the second doped semiconductor portion 13. When the thickness of the first doped semiconductor portion 12 is greater than the thickness of the second doped semiconductor portion 13, it is beneficial to increase the field passivation effect of the first doped semiconductor portion 12 on the surface of the corresponding region of the semiconductor substrate 11, and the ratio of the PL brightness value of the portion corresponding to the first doped semiconductor portion 12 and the portion corresponding to the second doped semiconductor portion 13 on the backlight side of the battery can be further reduced, thereby reducing the degree of differentiation in passivation.
[0109] For example, the thickness of the first doped semiconductor portion may be 200 nm to 400 nm; and / or the thickness of the second doped semiconductor portion may be 100 nm to 300 nm.
[0110] For the above-mentioned first dielectric passivation layer and the second dielectric passivation layer, from the material aspect, the material of the first sub-passivation layer included in the first dielectric passivation layer and the material of the first sub-passivation layer included in the second dielectric passivation layer can be determined according to the conductivity type of the fixed charge contained therein, as long as the conductivity type of the first doped semiconductor part is respectively opposite to the conductivity type of the fixed charge contained in the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer, the first sub-passivation layer at least has a field passivation function, wherein the material of the first sub-passivation layer included in the first dielectric passivation layer and the material of the first sub-passivation layer included in the second dielectric passivation layer can include a single-layer material or a stacked-layer material, as long as at least one layer has the same fixed charge type, to ensure that the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer have the same fixed charge type.
[0111] Exemplarily, the material of the first sub-passivation layer or the second sub-passivation layer may include at least one of aluminum oxide, silicon nitride, silicon oxide, silicon oxynitride and the like.
[0112] Exemplarily, the first sub-passivation layer included in the first dielectric passivation layer or the second dielectric passivation layer may include: a dielectric passivation layer with a negative charge such as aluminum oxide, and the second sub-passivation layer includes a stacked combination of one or more materials such as silicon nitride, silicon oxide, and silicon oxynitride, as long as the first dielectric passivation layer and the second dielectric passivation layer have both chemical passivation and field passivation functions. Specifically, the first sub-passivation layer included in the first dielectric passivation layer and / or the first sub-passivation layer included in the second passivation layer may also be a stacked structure composed of multiple passivation layers, and a certain passivation layer in the stacked structure may have both chemical passivation and field passivation functions, or some passivation layers in the stacked structure may only have a chemical passivation function or only have a field passivation function. For example, the first sub-passivation layer included in the first dielectric passivation layer is used as an example to illustrate: when the first doped semiconductor part is a P-type doped semiconductor part, the first sub-passivation layer included in the first dielectric passivation layer may include an aluminum oxide layer, and the second sub-passivation layer includes silicon nitride arranged on the side of the aluminum oxide layer away from the semiconductor substrate; another example: when the first doped semiconductor part is a P-type doped semiconductor part, the first sub-passivation layer included in the first dielectric passivation layer may include an aluminum oxide layer, and the second sub-passivation layer includes silicon oxynitride arranged on the side of the aluminum oxide layer away from the semiconductor substrate. Another example: when the first doped semiconductor part is a P-type doped semiconductor part, the first sub-passivation layer included in the first dielectric passivation layer may include an aluminum oxide layer, and the second sub-passivation layer may include a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer stacked in sequence along the thickness direction of the battery. Another example: when the first doped semiconductor part is a P-type doped semiconductor part, the first sub-passivation layer included in the first dielectric passivation layer may include a silicon oxide layer and an aluminum oxide layer stacked in sequence along the thickness direction of the battery, and the second sub-passivation layer may include a silicon nitride layer stacked in sequence along the thickness direction of the battery.
[0113] In addition, the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer may be the same or different, and may be selected differently according to the different conductivity types of the first doped semiconductor portion. Specifically, when the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are the same, the materials of the two first sub-passivation layers may both include materials having a negative fixed charge such as aluminum oxide, or may both include at least one of materials having a positive fixed charge such as silicon oxide, silicon nitride, and silicon oxynitride. Secondly, when the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are different, if the conductivity type of the first doped semiconductor part is P-type, the two first sub-passivation layers can be different types of materials and both have negative fixed charge materials; at this time, the second sub-passivation layer, its material can be selected from at least one of silicon oxide, silicon nitride, silicon oxynitride and other materials with positive fixed charge, the second sub-passivation layer can make up for the weakening effect of the negative fixed charge material on the field passivation effect of the second doped semiconductor part, and can also provide better chemical passivation for the first doped semiconductor part and the second doped semiconductor part. If the conductivity type of the first doped semiconductor part is N-type, the two first sub-passivation layers can be different types of materials and both have positive fixed charge materials, in addition to playing a field passivation role, can also provide better chemical passivation for the first doped semiconductor part and the second doped semiconductor part, and at this time, the material of the second sub-passivation layer can be selected from materials with negative fixed charge such as aluminum oxide, in this case, the second sub-passivation layer can make up for the weakening effect of the positive fixed charge material on the field passivation effect of the second doped semiconductor part.
[0114] Among them, when the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are the same, it is beneficial to reduce the types of materials used to manufacture different structures of back-contact batteries, improve the compatibility between different structures, and improve the yield of back-contact batteries.
[0115] Secondly, if Figure 5As shown, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 and the first sub-passivation layer 21 included in the second dielectric passivation layer 15 can also be continuous as one. In this case, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 and the first sub-passivation layer 21 included in the second dielectric passivation layer 15 can be formed simultaneously based on the same material and in the same step, which improves the manufacturing efficiency of the back contact battery and helps to reduce the manufacturing cost of the back contact battery. Of course, the first sub-passivation layer 21 included in the first dielectric passivation layer 14 and the first sub-passivation layer 21 included in the second dielectric passivation layer 15 can also be manufactured separately in different operation steps, as long as the conductivity type of the first doped semiconductor part 12 is opposite to the conductivity type of the fixed charge of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 and the first sub-passivation layer 21 included in the second dielectric passivation layer 15, and the thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 is greater than the thickness of the first sub-passivation layer 21 included in the second dielectric passivation layer 15.
[0116] Exemplarily, the first sub-passivation layer included in the first dielectric passivation layer and / or the first sub-passivation layer included in the second dielectric passivation layer include a hydrogen-containing passivation layer, so as to achieve chemical passivation of the corresponding doped semiconductor portion by hydrogen passivation, thereby reducing the number of defects on the side of the corresponding doped semiconductor portion away from the semiconductor substrate. For example, the first sub-passivation layer included in the first dielectric passivation layer and / or the first sub-passivation layer included in the second dielectric passivation layer may include at least one of the following film layers: an aluminum oxide layer, a silicon oxide layer, a silicon nitride layer, and a silicon oxynitride layer.
[0117] Specifically, in the first dielectric passivation layer and the second dielectric passivation layer, only the first sub-passivation layer included in the first dielectric passivation layer may be a hydrogen passivation layer, only the first sub-passivation layer included in the second dielectric passivation layer may be a hydrogen passivation layer, or both the first sub-passivation layers included in the first dielectric passivation layer and the second dielectric passivation layer may be hydrogen passivation layers.
[0118] For example, the local area of the hydrogen-containing passivation layer may have a microstructure. Figure 8 and Fig. 9 As shown, at least one microstructure 18 may be a protruding structure in a direction away from the semiconductor substrate 11; and / or Fig.10As shown, at least one microstructure 18 can be a microstructure 18 that is concave or bulged in the middle and has a cyclonic edge. In this case, when at least one microstructure 18 is a bulging structure in a direction away from the semiconductor substrate 11, there is a bulging and enclosed accommodation space between the hydrogen-containing passivation layer having the microstructure 18 and the corresponding doped semiconductor part, and hydrogen that produces the bulging structure exists in the accommodation space. At this time, it indicates that the hydrogen ion content in the hydrogen-containing passivation layer is sufficient, so that the hydrogen passivation effect on the corresponding doped semiconductor layer is higher, and the surface defects of the corresponding doped semiconductor layer are further reduced. Secondly, the hydrogen in the bulging structure can also continuously provide hydrogen ions in the subsequent manufacturing process or the battery operation process, so as to realize the continuous hydrogen passivation of the corresponding doped semiconductor layer, which is beneficial to improve the yield of the battery and extend the service life of the battery. In addition, when at least one microstructure 18 is a microstructure 18 with a concave or bulging middle part and a cyclonic edge, it indicates that the hydrogen content in the hydrogen-containing passivation layer is higher, so that the hydrogen ion content that has not been used for hydrogen passivation is sufficient, so that after escaping from the hydrogen-containing passivation layer, the microstructure 18 will explode. Based on this, when the hydrogen-containing passivation layer includes such microstructures 18, the hydrogen-containing passivation layer has a higher hydrogen passivation effect on the corresponding doped semiconductor layer. Moreover, after the explosion occurs, an uneven microstructure 18 can be formed on the side of the hydrogen-containing passivation layer away from the semiconductor substrate 11, which is beneficial to reduce the reflectivity of the side of the hydrogen-containing passivation layer away from the semiconductor substrate 11 and improve its own light trapping effect.
[0119] Specifically, when only the first sub-passivation layer included in the first dielectric passivation layer in the first dielectric passivation layer and the second dielectric passivation layer includes a hydrogen-containing passivation layer, a local area of the first sub-passivation layer included in the first dielectric passivation layer may have the above-mentioned microstructure, or may not have the above-mentioned microstructure. When only the first sub-passivation layer included in the second dielectric passivation layer in the first dielectric passivation layer and the second dielectric passivation layer includes a hydrogen-containing passivation layer, a local area of the first sub-passivation layer included in the second dielectric passivation layer may have the above-mentioned microstructure, or may not have the above-mentioned microstructure. When both the first sub-passivation layers included in the first dielectric passivation layer and the second dielectric passivation layer include a hydrogen-containing passivation layer, only the first sub-passivation layer included in the first dielectric passivation layer may have the above-mentioned microstructure, or only the first sub-passivation layer included in the second dielectric passivation layer may have the above-mentioned microstructure, or both the first sub-passivation layers included in the first dielectric passivation layer and the second dielectric passivation layer may have the above-mentioned microstructure. Alternatively, neither the first sub-passivation layer included in the first dielectric passivation layer nor the first sub-passivation layer included in the second dielectric passivation layer may have the above-mentioned microstructure.
[0120] Exemplarily, when the first sub-passivation layers included in the first dielectric passivation layer and the second dielectric passivation layer both include hydrogen-containing passivation layers, in order to meet the passivation requirements of the two doping regions, the thickness of the first sub-passivation layer included in the first dielectric passivation layer is thicker than the thickness of the first sub-passivation layer included in the second dielectric passivation layer. At this time, a local area of the first sub-passivation layer included in the first dielectric passivation layer has the above-mentioned microstructure, and the first sub-passivation layer included in the second dielectric passivation layer may have the above-mentioned microstructure or may not have the above-mentioned microstructure.
[0121] It can be understood that when the thickness of the hydrogen-containing passivation layer is greater and / or the density is higher, the hydrogen content of the layer itself is higher, and it is easier to form the above-mentioned microstructure due to hydrogen escape after the layer itself is heated. Therefore, the distribution density of the microstructure within the layer itself can be determined according to whether the first sub-passivation layer included in the first dielectric passivation layer and the second dielectric passivation layer includes a hydrogen-containing passivation layer, and the thickness and density of the two, which is not specifically limited here.
[0122] For example, Figure 6 and Figure 7 As shown, in the first dielectric passivation layer 14 and the second dielectric passivation layer 15, when at least a local area of the first sub-passivation layer 21 included in the first dielectric passivation layer 14 has a microstructure 18, the distribution density of the microstructure 18 in the first sub-passivation layer 21 included in the first dielectric passivation layer 14 can be greater than the distribution density of the microstructure 18 in the first sub-passivation layer 21 included in the second dielectric passivation layer 15. In this case, it is beneficial to make the first sub-passivation layer 21 included in the first dielectric passivation layer 14 have a greater thickness and / or a higher film density (compared with the first sub-passivation layer 21 included in the second dielectric passivation layer 15), so as to ensure that the first sub-passivation layer 21 included in the first dielectric passivation layer 14 has a higher field passivation effect on the first doped semiconductor layer. At the same time, it is beneficial to make the first sub-passivation layer 21 included in the second dielectric passivation layer 15 have a smaller thickness and / or lower film density, so as to reduce the influence of the field passivation function of the first sub-passivation layer 21 included in the second dielectric passivation layer 15 on the carrier collection efficiency of the second doped semiconductor layer, thereby ensuring that the back contact battery has a higher working efficiency.
[0123] As for the size and height of the microstructure, when the hydrogen-containing passivation layer has the above-mentioned microstructure, it indicates that the hydrogen ion content in the hydrogen-containing passivation layer is sufficient, so that it has a high chemical passivation effect on the corresponding doped semiconductor layer. In addition, the presence of the above-mentioned microstructure will also cause at least part of the hydrogen-containing passivation layer at the microstructure to be unable to contact the corresponding doped semiconductor layer, that is, at least part of the hydrogen-containing passivation layer at the microstructure cannot perform passivation treatment on the corresponding doped semiconductor layer, so it can be determined according to the requirements for the passivation effect of the hydrogen-containing passivation layer in the actual application scenario, the thickness and density of the hydrogen-containing passivation layer, and no specific limitation is made here.
[0124] Exemplarily, the size of at least one microstructure may be greater than or equal to 10 μm and less than or equal to 20 μm. For example, the size of the microstructure may be 10 μm, 11 μm, 12 μm, 14 μm, 16 μm, 18 μm or 20 μm, etc. In this case, as described above, based on this, when the size of the microstructure is within the above range, it can prevent the hydrogen content in the hydrogen-containing passivation layer itself from being small due to the small size; secondly, it can also prevent the effective contact area between the hydrogen-containing passivation layer and the corresponding doped semiconductor layer from being small due to the large size, thereby ensuring that the hydrogen-containing passivation layer has a high passivation effect on the corresponding doped semiconductor layer. In addition, it can also prevent the first sub-passivation layer included in the second dielectric passivation layer from including a hydrogen-containing passivation layer, and the size of the microstructure in the first sub-passivation layer included in the second dielectric passivation layer is large, which makes the thickness of the first sub-passivation layer included in the second dielectric passivation layer also large, thereby affecting the carrier collection efficiency of the second doped semiconductor portion.
[0125] Exemplarily, the height of at least one microstructure may be greater than or equal to 0.1 μm and less than or equal to 0.5 μm. For example, the height of at least one microstructure may be 0.1 μm, 0.15 μm, 0.2 μm, 0.25 μm, 0.3 μm, 0.4 μm or 0.5 μm, etc. The application principle of the beneficial effect in this case is similar to the application principle of the beneficial effect of the microstructure size being greater than or equal to 10 μm and less than or equal to 20 μm described above, and will not be repeated here.
[0126] For example, Fig.11As shown, in the first doped semiconductor part 12 and / or the second doped semiconductor part 13, an uneven anti-reflection structure 19 (such as the area with slightly higher brightness in the figure) is formed at a position corresponding to the microstructure 18. Specifically, when the microstructure 18 is present in a local area of the first doped semiconductor part 12, an anti-reflection structure 19 may be formed at a position of the first doped semiconductor part 12 corresponding to the microstructure 18. And / or, when the microstructure 18 is present in a local area of the second doped semiconductor part 13, an anti-reflection structure 19 may be formed at a position of the second doped semiconductor part 13 corresponding to the microstructure 18. The anti-reflection structure 19 may affect the surface morphology of the portion corresponding to the microstructure 18 in the first doped semiconductor part 12 and / or the second doped semiconductor part 13 under the compression of hydrogen when hydrogen escapes from the corresponding passivation layer having the microstructure 18. In this case, the reflectivity of the first doped semiconductor portion 12 and / or the second doped semiconductor portion 13 facing away from the semiconductor substrate 11 is reduced, which is conducive to allowing more light to be refracted into the semiconductor substrate 11 through the first doped semiconductor portion 12 and / or the second doped semiconductor portion 13, thereby improving the bifaciality of the battery. The specific morphology of the above-mentioned anti-reflection structure 19 can be determined according to the actual manufacturing process and is not specifically limited here. For example, the anti-reflection structure 19 can be a pit structure with a surface recessed into the corresponding doped semiconductor portion.
[0127] As for the specific thickness of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer, it can be determined according to the material types of the two, and the requirements for field passivation and chemical passivation of the first dielectric passivation layer in the actual application scenario, as well as the requirements for chemical passivation of the second dielectric passivation layer, and no specific limitation is made here. Optionally, the thickness of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer can be selected within the range of greater than or equal to 2nm and less than or equal to 15nm. Secondly, the first sub-passivation layer can be an aluminum oxide layer. In this case, the thickness of the aluminum oxide layer formed by atomic layer deposition is usually relatively uniform, but since there may be aluminum oxide material plating around the edge of the battery, 1 to 2 points can be selected in the middle area of the battery, corresponding to the positions of the first doped semiconductor part and the second doped semiconductor part, for testing, and the thickness of the aluminum oxide layer formed on the two first doped semiconductor parts and the second doped semiconductor part can be compared.
[0128] Exemplarily, the thickness of the first sub-passivation layer included in the first dielectric passivation layer may be greater than or equal to 4 nm and less than or equal to 15 nm. For example, the thickness of the first sub-passivation layer included in the first dielectric passivation layer may be 4 nm, 5 nm, 6 nm, 6.2 nm, 6.5 nm, 6.8 nm, 7 nm, 7.2 nm, 7.5 nm, 7.8 nm, 8 nm, 10 nm, 12 nm or 15 nm, etc. In this case, the thickness of the first sub-passivation layer included in the first dielectric passivation layer is relatively large, which can further enhance the field passivation effect of the first sub-passivation layer included in the first dielectric passivation layer on the first doped semiconductor part, which is beneficial to further reduce the difference in the passivation effect between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back contact battery, and further improve the working performance of the back contact battery.
[0129] Exemplarily, the thickness of the first sub-passivation layer included in the second dielectric passivation layer may be greater than or equal to 2nm and less than or equal to 8nm. For example, the thickness of the first sub-passivation layer included in the second dielectric passivation layer may be 2nm, 4nm, 4.2nm, 4.5nm, 4.8nm, 5nm, 5.2nm, 5.5nm, 5.8nm, 6nm, 7nm or 8nm. In this case, the thickness of the first sub-passivation layer included in the second dielectric passivation layer is within the above range, which is conducive to preventing the second dielectric passivation layer from having a low comprehensive passivation effect on the second doped semiconductor part due to the small thickness of the first sub-passivation layer included in the second dielectric passivation layer, and ensuring that the second doped semiconductor part has fewer surface defects on the side away from the semiconductor substrate; in addition, it is also conducive to preventing the field passivation effect of the first sub-passivation layer included in the second dielectric passivation layer from having a high degree of weakening of the electric field of the second doped semiconductor part due to the large thickness of the first sub-passivation layer included in the second dielectric passivation layer, and ensuring that the second doped semiconductor part has a high carrier collection efficiency.
[0130] As for the first dielectric passivation layer and the second dielectric passivation layer included in the second sub-passivation layer, from the material aspect, the material of the second sub-passivation layer included in the above-mentioned first dielectric passivation layer can be any passivation material different from the first sub-passivation layer included in the first dielectric passivation layer, and the second sub-passivation layer included in the first dielectric passivation layer can be a passivation layer having only a chemical passivation function, or a passivation layer having both chemical passivation and field passivation functions. Secondly, the material of the second sub-passivation layer included in the second dielectric passivation layer can be any passivation material different from the first sub-passivation layer included in the second dielectric passivation layer, and the first sub-passivation layer included in the second dielectric passivation layer can be a passivation layer having only a chemical passivation function, or a passivation layer having both chemical passivation and field passivation functions.
[0131] In addition, the material of the second sub-passivation layer included in the first dielectric passivation layer and the material of the second sub-passivation layer included in the second dielectric passivation layer may be the same or different. When the material of the second sub-passivation layer included in the first dielectric passivation layer and the material of the second sub-passivation layer included in the second dielectric passivation layer are the same, it is beneficial to reduce the types of materials of different structures used to manufacture back-contact batteries, improve the compatibility between different structures, and improve the yield of back-contact batteries. Alternatively, the material of the second sub-passivation layer included in the first dielectric passivation layer may also be different from the material of the second sub-passivation layer included in the second dielectric passivation layer.
[0132] Secondly, if Figure 5 As shown, the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 may also be continuous as one. In this case, the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 may be formed simultaneously based on the same material and in the same step, which improves the manufacturing efficiency of the back contact battery and helps reduce the manufacturing cost of the back contact battery.
[0133] In terms of thickness, the thickness of the second sub-passivation layer included in the first dielectric passivation layer and the thickness of the second sub-passivation layer included in the second dielectric passivation layer can be determined according to their respective material types and the requirements for the passivation effects of different second sub-passivation layers in actual application scenarios, and are not specifically limited here.
[0134] For example, the thickness of the second sub-passivation layer included in the first dielectric passivation layer may be equal to the thickness of the second sub-passivation layer included in the second dielectric passivation layer. Figure 4 As shown, the thickness of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 may also be less than the thickness of the second sub-passivation layer 22 included in the second dielectric passivation layer 15. In this case, the second sub-passivation layer 22 included in the second dielectric passivation layer 15 with a larger thickness (relative to the second sub-passivation layer 22 included in the first dielectric passivation layer 14) is arranged on the first sub-passivation layer 21 included in the second dielectric passivation layer 15 with a smaller thickness (relative to the first sub-passivation layer 21 included in the first dielectric passivation layer 14), which is conducive to compensating the weakening of the field passivation effect of the first sub-passivation layer 21 included in the second dielectric passivation layer 15 on the side away from the semiconductor substrate 11 by the second sub-passivation layer 22 included in the second dielectric passivation layer 15, further reducing the number of surface defects on the side away from the semiconductor substrate 11 of the second doped semiconductor part 13, and helping to reduce the difference in passivation effect between the part corresponding to the first doped semiconductor part 12 and the part corresponding to the second doped semiconductor part 13 on the backlight side of the back contact battery, thereby improving the working performance of the back contact battery.
[0135] In the actual manufacturing process, Figure 5 As shown, when the thickness of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 is less than the thickness of the second sub-passivation layer 22 included in the second dielectric passivation layer 15, and the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 are continuous as a whole, the deposition thickness of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 can be different according to the different doping concentrations of the dopants in the first doped semiconductor portion 12 and the second doped semiconductor portion 13. For example, the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 are both silicon nitride layers. When the doping concentration of the dopant in the first doped semiconductor portion 12 is less than the doping concentration of the dopant in the second doped semiconductor portion 13, when the second sub-passivation layer 22 included in the first dielectric passivation layer 14 and the second sub-passivation layer 22 included in the second dielectric passivation layer 15 are simultaneously formed based on the same material and in the same step by using a process such as plasma chemical vapor deposition, due to the difference in electric field strengths corresponding to the first doped semiconductor portion 12 and the second doped semiconductor portion 13, the thickness of the second sub-passivation layer 22 included in the first dielectric passivation layer 14 is smaller, and the thickness of the second sub-passivation layer 22 included in the second dielectric passivation layer 15 is larger.
[0136] Of course, the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer can also be manufactured separately in different operation steps and by adjusting different manufacturing parameters, as long as the thickness of the second sub-passivation layer included in the first dielectric passivation layer is less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer.
[0137] As for the specific thickness and thickness difference of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer, it can be determined according to the requirements for the PL brightness values of the parts corresponding to the first doped semiconductor part and the second doped semiconductor part on the backlight side of the back contact battery in the actual application scenario, and no specific limitation is made here.
[0138] Exemplarily, the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer may be greater than or equal to 0.5 nm and less than or equal to 5 nm. For example, the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer may be 0.5 nm, 0.7 nm, 0.9 nm, 1 nm, 2 nm, 3 nm, 4 nm or 5 nm. In this case, the difference between the thickness of the second sub-passivation layer included in the second dielectric passivation layer and the thickness of the second sub-passivation layer included in the first dielectric passivation layer is within the above range, which can prevent the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer from having substantially the same chemical passivation effect due to the small difference, and ensure that the difference in field passivation effect between the portions corresponding to the first doped semiconductor portion and the second doped semiconductor portion on one side of the backlight surface can be compensated by the second sub-passivation layer included in the second dielectric passivation layer. It can also prevent the difference from being too large, which makes the thickness of the second sub-passivation layer included in the first dielectric passivation layer too small, resulting in too low passivation effect of the second sub-passivation layer included in the first dielectric passivation layer, or making the thickness of the second sub-passivation layer included in the second dielectric passivation layer too large, resulting in high consumption of consumables, which is beneficial to controlling the manufacturing cost of the battery.
[0139] Exemplarily, the thickness of the second sub-passivation layer may be greater than or equal to 50nm and less than or equal to 160nm. For example, the thickness of the second sub-passivation layer may be 50nm, 55nm, 60nm, 65nm, 67nm, 70nm, 71nm, 73nm, 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 135nm, 136nm, 142nm, 145nm, 146nm, 148nm, 150nm, 152nm, 156nm, 158nm or 160nm, etc. In this case, the thickness of the second sub-passivation layer is within the above range, which is conducive to preventing the second sub-passivation layer from having a weak passivation effect due to its small thickness, ensuring that the backlight side of the back contact battery has a low carrier recombination rate, and improving the working performance of the back contact battery. In addition, it can also prevent the second sub-passivation layer from having a large amount of consumables due to its large thickness, which is conducive to controlling the manufacturing cost of the back contact battery. Among them, when the thickness of the second sub-passivation layer included in the first dielectric passivation layer is less than the thickness of the second sub-passivation layer of the second dielectric passivation layer, the specific thickness values of the second sub-passivation layers corresponding to the two doped semiconductor parts can be set according to actual needs and the description method above.
[0140] Exemplarily, the thickness of the first sub-passivation layer may be greater than or equal to 2 nm and less than or equal to 15 nm; meanwhile, the thickness of the second sub-passivation layer may be greater than or equal to 50 nm and less than or equal to 160 nm. In this case, the first sub-passivation layer and the second sub-passivation layer are used in a matching manner within the above thickness range, so that the second sub-passivation layer can better match the difference in field passivation effect between the two doped semiconductor parts due to the first sub-passivation layer, thereby reducing the difference in passivation effect between the two doped semiconductor parts.
[0141] Exemplarily, the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer may be greater than or equal to 0.9 and less than or equal to 1.1; and / or the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer may be greater than or equal to 52nm and less than or equal to 175nm.
[0142] For example, the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer may be 0.9, 0.92, 0.95, 0.96, 1, 1.02, 1.05, 1.08 or 1.1, etc.
[0143] For example, the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer may be 52 nm, 55 nm, 60 nm, 70 nm, 75 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 165 nm, 170 nm or 175 nm, etc.
[0144] When the above technical solution is adopted, when the ratio of the thickness of the first dielectric passivation layer to the thickness of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1, the thickness of the first dielectric passivation layer arranged on the side of the first doped semiconductor portion away from the semiconductor substrate is approximately the same as the thickness of the second dielectric passivation layer arranged on the side of the second doped semiconductor portion away from the semiconductor substrate, which is beneficial for making the first dielectric passivation layer and the second dielectric passivation layer have approximately the same comprehensive passivation effect, thereby helping to further reduce the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the back contact battery. In addition, when the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is within the above range, the thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is moderate to prevent the passivation effect of the first dielectric passivation layer and / or the second dielectric passivation layer from being weak due to a small thickness value, and can also prevent the distribution density of the microstructure in the first dielectric passivation layer and / or the second dielectric passivation layer from being large or the use of consumables being high due to the large thickness, thereby ensuring that the back-contact battery has a high working efficiency while helping to control the manufacturing cost of the battery.
[0145] As for the thickness of the first dielectric passivation layer and the second dielectric passivation layer, the thickness of the first dielectric passivation layer may be equal to the thickness of the second dielectric passivation layer. Alternatively, the thickness of the first dielectric passivation layer may also be less than the thickness of the second dielectric passivation layer. Among them, because the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the second sub-passivation layer included in the second dielectric passivation layer, when the thickness of the first dielectric passivation layer is less than the thickness of the second dielectric passivation layer, it is beneficial to make the thickness of the second sub-passivation layer included in the first dielectric passivation layer less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer. Based on this, the application principle of the beneficial effect of the thickness of the first dielectric passivation layer being less than the thickness of the second dielectric passivation layer can refer to the application principle of the beneficial effect of the thickness of the second sub-passivation layer included in the first dielectric passivation layer being less than the thickness of the second sub-passivation layer included in the second dielectric passivation layer described above, which will not be repeated here. In addition, the difference in thickness of the first dielectric passivation layer and the second dielectric passivation layer can be determined according to the difference in thickness of the first sub-passivation layer and the second sub-passivation layer included in the two, which is not specifically limited here.
[0146] In addition, when the thickness of the second sub-passivation layer included in the second dielectric passivation layer is greater than the thickness of the second sub-passivation layer included in the first dielectric passivation layer, it is beneficial to make the thickness of the first dielectric passivation layer and the second dielectric passivation layer approximately the same. In addition, it is also beneficial to make the refractive index of the portion corresponding to the first doped semiconductor part and the portion of the second doped semiconductor part in the backlight surface of the back contact battery approximately the same, which is beneficial to achieve uniform light absorption. Based on this, the thickness of the first dielectric passivation layer and the second dielectric passivation layer can also be determined according to the requirements for the refractive index of different areas on one side of the backlight surface in actual application scenarios. As for the refractive index of the portion corresponding to the first doped semiconductor part and the portion of the second doped semiconductor part in the backlight surface of the back contact battery, it can be determined according to actual needs and the material types of the first dielectric passivation layer and the second dielectric passivation layer.
[0147] Exemplarily, the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer may be greater than or equal to 0.9 and less than or equal to 1.1; and / or, the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer may be greater than or equal to 2.0 and less than or equal to 2.2.
[0148] For example, the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer may be 0.9, 0.92, 0.95, 0.96, 1, 1.02, 1.05, 1.08 or 1.1, etc.
[0149] For example, the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer may be 2.0, 2.01, 2.02, 2.03, 2.05, 2.08, 2.1, 2.12, 2.15, 2.18 or 2.2, etc.
[0150] In the case of adopting the above technical solution, when the ratio of the refractive index of the first dielectric passivation layer to the refractive index of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.1, the refractive index of the first dielectric passivation layer and the refractive index of the second dielectric passivation layer are approximately the same, which is conducive to making the part corresponding to the first dielectric passivation layer and the part corresponding to the second dielectric passivation layer on the backlight side of the back contact battery have approximately the same light refraction effect, which is conducive to achieving uniform light absorption and ensuring the balance of electrons and holes. Secondly, when the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer is within the above range, the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer has a higher refractive effect on light, which is conducive to allowing more light to be set into the semiconductor substrate through the refractive index of the first dielectric passivation layer and / or the second dielectric passivation layer, thereby improving the bifaciality of the battery.
[0151] Exemplarily, the difference between the refractive index of the second sub-passivation layer included in the second dielectric passivation layer and the refractive index of the second sub-passivation layer included in the first dielectric passivation layer may be greater than or equal to 0.01 and less than or equal to 0.1. For example, the difference between the refractive index of the second sub-passivation layer included in the second dielectric passivation layer and the refractive index of the second sub-passivation layer included in the first dielectric passivation layer may be 0.01, 0.02, 0.03, 0.05, 0.06, 0.08 or 0.1, etc. The application principle of the beneficial effect in this case can refer to the application principle of the beneficial effect of the refractive index of the first dielectric passivation layer and the second dielectric passivation layer being approximately the same, which will not be repeated here.
[0152] In the actual application process, since the PL brightness value refers to the brightness of light emitted by the battery under lighting conditions, the size of the PL brightness value is related to the passivation performance of the test part, which represents the comprehensive passivation effect of all film layers at the position corresponding to the first doped semiconductor part or the position corresponding to the second doped semiconductor part, such as the comprehensive passivation effect of the tunneling passivation layer, the doped semiconductor part, and the dielectric passivation layer. Specifically, under the same test conditions, the larger the PL brightness value, the higher the passivation performance of the part, and the smaller the PL brightness value, the lower the passivation performance of the part. Based on this, it can be determined according to the requirements for the passivation effect of the first dielectric passivation layer and the second dielectric passivation layer in the actual application scenario. Under the same test conditions, the PL brightness value corresponding to the part corresponding to the second doped semiconductor part and the PL brightness value corresponding to the part corresponding to the first doped semiconductor part on the backlight side of the back contact battery are not specifically limited here.
[0153] For example, under the same test conditions, on the backlight side of the back-contact cell, the PL brightness value corresponding to the portion corresponding to the second doped semiconductor portion 13 may be greater than the PL brightness value corresponding to the portion corresponding to the first doped semiconductor portion 12 .
[0154] It should be noted that the embodiments of the present invention do not specifically limit the conditions for testing the PL brightness value. As for the test position of the PL brightness value, it can be tested on the finished battery. Specifically, the corresponding film layers around the corresponding interconnection parts (such as main grid or pad point, etc.) arranged above the first doped semiconductor part and the second doped semiconductor part in the finished battery and located on the outermost side are selected for testing (for example: when the first dielectric passivation layer and the second dielectric passivation layer in the back contact battery are the outermost film layers arranged on the side of the first surface, it is necessary to test the first dielectric passivation layer and the second dielectric passivation layer on the side away from the semiconductor substrate and the corresponding interconnection part. Alternatively, the test position of the PL brightness value can also be after removing the conductive electrode in the finished battery, and then testing on the above-mentioned corresponding film layer located on the outermost side. Alternatively, the PL brightness value can also be specially prepared by using a double-sided symmetrical sample preparation method for the battery, such as symmetrically setting the entire surface of the first doped semiconductor part and the first dielectric passivation layer on both sides of the battery, or setting the entire surface of the second doped semiconductor part and the second dielectric passivation layer, and then performing PL testing.
[0155] When the above-mentioned technical solution is adopted, when the PL brightness value corresponding to the portion corresponding to the second doped semiconductor part on the backlight side of the back contact battery is greater than the PL brightness value corresponding to the portion corresponding to the first doped semiconductor part, the passivation performance of the portion corresponding to the second doped semiconductor part on the backlight side of the back contact battery provided by an embodiment of the present invention is higher than the passivation performance of the portion corresponding to the first doped semiconductor part. In the above case, at the same time, the PL brightness values of the two regions reflect the comprehensive effect of field passivation and chemical passivation, and can also indirectly reflect other passivation effects of other film layers except the first sub-passivation layer, that is, the other passivation effect including the second dielectric passivation layer is greater than the other passivation effect including the first dielectric passivation layer. The comprehensive passivation effect of the corresponding second doped semiconductor part is enhanced by the passivation of other film layers, and the difference in passivation effect between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back contact battery is reduced, and the passivation requirements of the two doped semiconductor parts of different conductivity types are realized at the same time, so that the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back contact battery have lower carrier recombination rate and higher carrier separation ability, thereby improving the working performance of the back contact battery. See. Fig.13 , the figure shows the PL brightness test diagram of the finished structure of the back contact battery provided by the embodiment of the present invention. Among them, the bold solid line and the dotted line respectively select the corresponding part of the first doped semiconductor part and the corresponding second doped semiconductor part. It can be seen from the figure that the PL brightness values of the two areas on the back side of the finished battery are roughly the same, and at this time, the passivation effects of the two areas on the back side of the finished battery are roughly the same.
[0156] In addition, it can be understood that when the structures and materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are different, the passivation effects of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer may be different, so that under the same test conditions, the PL brightness value corresponding to the part corresponding to the second doped semiconductor part and the PL brightness value corresponding to the part of the first doped semiconductor part on the backlight side of the back contact battery may also be different. Therefore, the PL brightness values corresponding to the above two parts on the backlight surface can be determined according to the materials of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer, and the structure of the back contact battery, and no specific limitation is made here.
[0157] Exemplarily, the first sub-passivation layer included in the first dielectric passivation layer is an aluminum oxide layer, and under the test conditions of an exposure time of 0.2s and a light intensity of 1sun, the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer away from the semiconductor substrate can be greater than or equal to 5000. For example: when the first sub-passivation layer included in the first dielectric passivation layer is an aluminum oxide layer, and under the test conditions of an exposure time of 0.2s and a light intensity of 1sun, the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer away from the semiconductor substrate can be 5000, 5500, 5800, 6000, 6500, 7000, 7500, 8000 or 9000, etc. In this case, the aluminum oxide layer contains a large amount of oxygen anions, which can form a high-density fixed negative charge at the interface between itself and the first doped semiconductor part, forming a built-in electric field with a shielding effect on minority carriers, improving the carrier collection efficiency of the first doped semiconductor part and enhancing the carrier separation ability of the first doped semiconductor part. Secondly, under the test conditions of an exposure time of 0.2s and a light intensity of 1sun, when the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer facing away from the semiconductor substrate is greater than or equal to 5000, the presence of the first sub-passivation layer included in the first dielectric passivation layer with a larger thickness improves the field passivation effect on the first doped semiconductor part, which is beneficial to further reduce the difference in passivation effect between the portion corresponding to the first doped semiconductor part and the portion corresponding to the second doped semiconductor part on the backlight side of the back contact battery.
[0158] Exemplarily, the first sub-passivation layer included in the second dielectric passivation layer is an aluminum oxide layer, and under the test conditions of an exposure time of 0.2s and a light intensity of 1sun, the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer away from the semiconductor substrate may be greater than or equal to 16500. For example: the first sub-passivation layer included in the second dielectric passivation layer is an aluminum oxide layer, and under the test conditions of an exposure time of 0.2s and a light intensity of 1sun, the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer away from the semiconductor substrate may be 16500, 16800, 17000, 18000, 20000, 22000, 24000, 28000 or 30000, etc. In this case, chemical passivation through the first sub-passivation layer included in the second dielectric passivation layer can minimize the impact of its own field passivation function on the carrier collection efficiency of the second doped semiconductor part, ensuring that the second doped semiconductor part has a higher carrier separation ability, which is beneficial to further reduce the difference in passivation effect between the part corresponding to the first doped semiconductor part and the part corresponding to the second doped semiconductor part on the backlight side of the back contact battery.
[0159] Exemplarily, when the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are both aluminum oxide layers (under the same test conditions), the ratio between the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer away from the semiconductor substrate and the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer away from the semiconductor substrate may be greater than or equal to 2.5 and less than or equal to 3.4. For example, the above ratio may be 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3 or 3.4, etc. In this case, when the ratio of the PL brightness value corresponding to the side of the second doped semiconductor portion away from the semiconductor substrate to the PL brightness value corresponding to the side of the first doped semiconductor portion away from the semiconductor substrate (approximately greater than or equal to 3 and less than or equal to 4), the ratio of the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer away from the semiconductor substrate to the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer away from the semiconductor substrate is greater than or equal to 2.5 and less than or equal to 3.4, the ratio between the above PL brightness values is smaller, that is, the presence of the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer is beneficial to reducing the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the back contact battery, which is beneficial to achieving uniform passivation.
[0160] In addition, under the same test conditions, the ratio of the PL brightness value corresponding to the side of the second dielectric passivation layer away from the semiconductor substrate to the PL brightness value corresponding to the side of the first dielectric passivation layer away from the semiconductor substrate is defined as PL1. And under the same test conditions, the ratio of the PL brightness value of the side of the fifth passivation layer away from the semiconductor substrate to the PL brightness value of the side of the fourth passivation layer away from the semiconductor substrate is defined as PL2, and PL2 is less than PL1. In this case, by providing the fourth passivation layer and the fifth passivation layer with different thicknesses, the difference in passivation effect between the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the back contact cell can be further reduced.
[0161] It can be understood that when the structures and materials of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are different, the passivation effects of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer may be different, so that under the same test conditions, the PL brightness value corresponding to the part corresponding to the second doped semiconductor part and the PL brightness value corresponding to the part of the first doped semiconductor part on the backlight side of the back contact battery may also be different. Therefore, the PL brightness values corresponding to the above two parts on the backlight surface can be determined according to the materials of the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer, and the structure of the back contact battery, and no specific limitation is made here.
[0162] Exemplarily, when the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are both silicon nitride layers, PL2 may be greater than or equal to 1.62 and less than or equal to 1.9. For example, PL2 may be 1.62, 1.65, 1.7, 1.75, 1.8, 1.85 or 1.9, etc. In this case, when the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are formed, the ratio of the PL brightness value of the portion corresponding to the first doped semiconductor portion and the portion corresponding to the second doped semiconductor portion on the backlight side of the battery may be further reduced, thereby reducing the degree of differentiation in passivation.
[0163] Optionally, under the test conditions of an exposure time of 0.2s and a light intensity of 1sun, the PL brightness value corresponding to the portion of the backlight side of the back contact cell corresponding to the first doped semiconductor portion may be greater than or equal to 8000 and less than or equal to 25000.
[0164] Optionally, under the test conditions of an exposure time of 0.2s and a light intensity of 1sun, the PL brightness value corresponding to the portion of the backlight side of the back contact cell corresponding to the first doped semiconductor portion may be greater than or equal to 20,000 and less than or equal to 45,000.
[0165] As a possible implementation, Fig.12 As shown, the back contact cell may further include a third passivation layer 20 disposed on the second surface, and the thickness of the third passivation layer 20 is greater than the thickness of the first sub-passivation layer 21 included in the first dielectric passivation layer 14. In this case, the second surface of the semiconductor substrate 11 is well chemically passivated by the third passivation layer 20 with a relatively high thickness, thereby reducing the number of surface defects and carrier recombination rate on the second surface.
[0166] The embodiment of the present invention does not specifically limit the material and thickness of the third passivation layer, as long as the thickness of the third passivation layer is greater than the thickness of the first dielectric passivation layer. For example, the material of the third passivation layer may include at least one of aluminum oxide, silicon oxide, silicon nitride and aluminum nitride.
[0167] Second, as Fig.14 As shown, an embodiment of the present invention provides a photovoltaic module, which includes a back-contact cell provided by the first aspect and various implementations thereof.
[0168] Specifically, since the type of battery included in the photovoltaic module provided in the embodiment of the present invention is a back contact battery, the positive and negative connectors used to interconnect different batteries in the photovoltaic module are both arranged on the back side of the battery. In addition, the photovoltaic module may include a transparent cover plate, a first packaging film, a back contact battery layer, a circuit interconnection layer, a second packaging film and a back plate arranged in sequence.
[0169] Among them, the material of the transparent cover plate may include at least one of tempered glass, high-transmittance plastic and silicone rubber. The material of the first encapsulation film and the second encapsulation film may be POE, EVA, PVB or other materials. The back contact battery layer may include a plurality of back contact batteries distributed in an array, and the plurality of back contact batteries are connected through a circuit interconnection layer. The above-mentioned circuit interconnection layer may be an electrical connection of different back contact batteries through an in-series interconnection member such as a welding ribbon, or the above-mentioned circuit interconnection layer may also be a conductive backplane, which includes a conductive circuit layer and an insulating material layer located between the conductive circuit layer and the back contact battery layer. A conductive window is provided in the insulating material layer, and the interconnection structure of the back contact battery is interconnected with the patterned conductive circuit layer through the conductive window. As for the above-mentioned backplane, the material of the backplane may be TPC, PET, TPT, CPC or other materials to prevent the circuit interconnection layer from reacting in the external environment and prolong the service life of the photovoltaic module.
[0170] The beneficial effects of the second aspect and its various implementations in the embodiments of the present invention can be analyzed by referring to the beneficial effects of the first aspect and its various implementations, and will not be repeated here.
[0171] In the above description, the technical details of the patterning and etching of each layer are not described in detail. However, those skilled in the art should understand that various technical means can be used to form layers, regions, etc. of desired shapes. In addition, in order to form the same structure, those skilled in the art can also design methods that are not completely the same as the methods described above. In addition, although the various embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage.
[0172] The embodiments of the present invention are described above. However, these embodiments are only for a clearer description and are not intended to limit the scope of the present invention. The scope of the present invention is defined by the appended claims and their equivalents. Without departing from the scope of the present invention, a person skilled in the art may make various substitutions and modifications, which should all fall within the scope of the present invention.
Claims
1. A back contact battery, characterized in that: include: A semiconductor substrate, a first doped semiconductor portion, a second doped semiconductor portion, a first dielectric passivation layer, and a second dielectric passivation layer; The first doped semiconductor portion and the second doped semiconductor portion have opposite conductivity types; The first dielectric passivation layer and the second dielectric passivation layer both include a first sub-passivation layer having a field passivation function; the conductivity type of the first doped semiconductor portion is opposite to the conductivity type of the fixed charge of the first sub-passivation layer; The semiconductor substrate has a first surface and a second surface opposite to each other; along a direction parallel to the first surface, the first doped semiconductor portions and the second doped semiconductor portions are alternately distributed on the first surface; The first dielectric passivation layer covers a side of the first doped semiconductor portion away from the semiconductor substrate, and the second dielectric passivation layer covers a side of the second doped semiconductor portion away from the semiconductor substrate; the thickness of the first sub-passivation layer included in the first dielectric passivation layer is greater than the thickness of the first sub-passivation layer included in the second dielectric passivation layer; The first dielectric passivation layer and the second dielectric passivation layer also include a second sub-passivation layer having a chemical passivation function; the second sub-passivation layer is arranged on a side of the first sub-passivation layer away from the semiconductor substrate; the material of the second sub-passivation layer included in the first dielectric passivation layer is different from the material of the first sub-passivation layer included in the first dielectric passivation layer; the material of the second sub-passivation layer included in the second dielectric passivation layer is different from the material of the first sub-passivation layer included in the second dielectric passivation layer.
2. The back contact cell according to claim 1, characterized in that: Under the same test conditions, on the backlight side of the back-contact cell, the PL brightness value corresponding to the portion corresponding to the second doped semiconductor portion is greater than the PL brightness value corresponding to the portion corresponding to the first doped semiconductor portion.
3. The back contact cell according to claim 1, characterized in that: The thickness of the first sub-passivation layer is greater than or equal to 2 nm and less than or equal to 15 nm.
4. The back contact cell according to claim 1, characterized in that: The thickness of the second sub-passivation layer included in the first dielectric passivation layer is smaller than the thickness of the second sub-passivation layer included in the second dielectric passivation layer.
5. The back contact cell according to claim 1, characterized in that: A difference between a thickness of the second sub-passivation layer included in the second dielectric passivation layer and a thickness of the second sub-passivation layer included in the first dielectric passivation layer is greater than or equal to 0.5 nm and less than or equal to 5 nm.
6. The back contact cell according to claim 1, characterized in that: The thickness of the second sub-passivation layer is greater than or equal to 50 nm and less than or equal to 160 nm.
7. The back contact cell according to claim 1, characterized in that: The thickness of the first dielectric passivation layer is smaller than the thickness of the second dielectric passivation layer.
8. The back contact cell according to claim 1, characterized in that: A ratio of a thickness of the first dielectric passivation layer to a thickness of the second dielectric passivation layer is greater than or equal to 0.9 and less than or equal to 1.
1.
9. The back contact cell according to claim 1, characterized in that: The thickness of the first dielectric passivation layer and / or the second dielectric passivation layer is greater than or equal to 52 nm and less than or equal to 175 nm.
10. The back contact cell according to claim 1, characterized in that: The first sub-passivation layer is an aluminum oxide layer, and under the test conditions of an exposure time of 0.2s and a light intensity of 1sun, The PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer away from the semiconductor substrate is greater than or equal to 5000; and / or the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer away from the semiconductor substrate is greater than or equal to 16500.
11. The back contact cell according to claim 1, characterized in that: The first sub-passivation layer is an aluminum oxide layer, and under the test conditions of an exposure time of 0.2s and a light intensity of 1sun, the ratio of the PL brightness value corresponding to the side of the first sub-passivation layer included in the second dielectric passivation layer away from the semiconductor substrate to the PL brightness value corresponding to the side of the first sub-passivation layer included in the first dielectric passivation layer away from the semiconductor substrate is greater than or equal to 2.5 and less than or equal to 3.
4.
12. The back contact cell according to claim 1, characterized in that: A surface reflectivity of a side of the first doped semiconductor portion facing away from the semiconductor substrate is greater than a surface reflectivity of a side of the second doped semiconductor portion facing away from the semiconductor substrate.
13. The back contact cell according to claim 12, characterized in that: The first doped semiconductor portion has a first texture structure on a surface facing away from the semiconductor substrate, and the second doped semiconductor portion has a second texture structure on a surface facing away from the semiconductor substrate; the one-dimensional size of the first texture structure is different from the one-dimensional size of the second texture structure.
14. The back contact cell according to claim 1, characterized in that In the case where the first doped semiconductor portion is a P-type doped semiconductor portion and the second doped semiconductor portion is an N-type doped semiconductor portion, The doping concentration of the dopant in the first doped semiconductor portion is lower than the doping concentration of the dopant in the second doped semiconductor portion; and / or the thickness of the first doped semiconductor portion is greater than the thickness of the second doped semiconductor portion.
15. The back contact cell according to claim 1, characterized in that: The first sub-passivation layer included in the first dielectric passivation layer includes a hydrogen-containing passivation layer, and a local area of the hydrogen-containing passivation layer has a microstructure.
16. The back contact cell according to claim 15, characterized in that In the case where the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer both include the hydrogen-containing passivation layer, A distribution density of the microstructures in the first sub-passivation layer included in the first dielectric passivation layer is greater than a distribution density of the microstructures in the first sub-passivation layer included in the second dielectric passivation layer.
17. The back contact cell according to claim 15, characterized in that: The size of at least one of the microstructures is greater than or equal to 10 μm and less than or equal to 20 μm; And / or, a height of at least one of the microstructures is greater than or equal to 0.1 μm and less than or equal to 0.5 μm.
18. The back contact battery according to any one of claims 1 to 17, characterized in that: The first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are made of the same material; And / or, the first sub-passivation layer included in the first dielectric passivation layer and the first sub-passivation layer included in the second dielectric passivation layer are integrally continuous.
19. The back contact cell according to claim 1, characterized in that: Under the same test conditions, the ratio of the PL brightness value of the first sub-passivation layer included in the second dielectric passivation layer on the side away from the semiconductor substrate to the PL brightness value of the first sub-passivation layer included in the first dielectric passivation layer on the side away from the semiconductor substrate is PL1; Under the same test conditions, the ratio of the PL brightness value of the second sub-passivation layer included in the second dielectric passivation layer facing away from the semiconductor substrate to the PL brightness value of the second sub-passivation layer included in the first dielectric passivation layer facing away from the semiconductor substrate is PL2, and PL2 is less than PL1.
20. The back contact cell according to claim 19, characterized in that When the second sub-passivation layer is a silicon nitride layer, PL2 is greater than or equal to 1.62 and less than or equal to 1.
9.
21. The back contact cell according to claim 1, characterized in that The material of the second sub-passivation layer included in the first dielectric passivation layer is the same as the material of the second sub-passivation layer included in the second dielectric passivation layer; And / or, the second sub-passivation layer included in the first dielectric passivation layer and the second sub-passivation layer included in the second dielectric passivation layer are integrally continuous.
22. A photovoltaic module, characterized in that: Comprising a back contact battery as claimed in any one of claims 1 to 21.
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