High-brightness flip LED chip and preparation method thereof
By designing a full-angle reflection structure on the transparent conductive layer of the flip-mounted LED chip and combining a DBR Bragg reflector, the problem of low light reflection efficiency in the prior art is solved, efficient light extraction and current injection are achieved, and the brightness and reliability of the LED chip are improved.
Patent Information
- Application Number
- CN202411945504.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-27
- Publication Date
- 2025-04-01
AI Technical Summary
The existing flip LED chips have low light reflection efficiency in a larger incident angle range, resulting in limited light output of LED chips in all directions and unable to fully realize their luminous potential.
A full-angle reflection structure is designed on the transparent conductive layer, and a DBR Bragg mirror and a transparent substrate are combined to form a full-angle light reflection structure to achieve light scattering regulation and improve the light output efficiency of the LED chip.
The light extraction efficiency, current injection efficiency and luminous uniformity of the flip-mounted LED chip are significantly improved, optical loss and current diffusion are reduced, and overall brightness and reliability are improved.
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Figure CN119744059A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of semiconductor lighting, and in particular to a high-brightness flip-chip LED chip and a preparation method thereof. Background Art
[0002] As a new generation of semiconductor light source, LED (light emitting diode) has the advantages of high efficiency, energy saving and long life, and is widely used in lighting, display and indication. In recent years, in order to further improve the light output efficiency of LED, flip-chip LED has received extensive attention and use in the industry.
[0003] In traditional flip-chip LED chips, a Bragg reflector (DBR) is often used to reflect and extract light on the chip surface. However, although the existing DBR layer has a certain high reflectivity in the vertical incident direction, its reflection efficiency is relatively low for light with a larger incident angle range, which limits the light output of the LED chip in all directions and cannot fully realize its luminous potential.
[0004] Therefore, how to improve the surface of the dielectric layer before preparing the DBR layer to enhance light reflection at all angles and improve the light output efficiency of the LED has become an urgent problem to be solved in the industry. Summary of the invention
[0005] The purpose of the present invention is to provide a high-brightness flip-chip LED chip and a preparation method thereof, by designing a full-angle reflection structure above a transparent conductive layer, thereby effectively improving the light extraction efficiency and enhancing the overall luminous performance.
[0006] The technical solution of the present invention:
[0007] A high brightness flip-chip LED chip, comprising:
[0008] A transparent substrate layer, which is used to provide mechanical support, allow light to pass through, and ensure that light is efficiently emitted from the substrate side;
[0009] An N-type layer, located above the substrate layer;
[0010] A multi-quantum well layer, located above the N-type layer, for emitting light;
[0011] A P-type layer, located above the multi-quantum well layer;
[0012] A transparent conductive layer, located above the P-type layer, for providing current conduction and light transmittance;
[0013] The full-angle reflective structure is located above the transparent conductive layer and has an arc or dome shape, and has grid, circular, honeycomb or random distribution characteristics in a top view;
[0014] a Bragg reflector (DBR), located above the full-angle reflection structure;
[0015] Electrodes, electrically connected to the P-type layer and the N-type layer respectively through conductive through holes on the DBR;
[0016] The full-angle reflection structure is combined with the DBR Bragg reflector to form a full-angle light reflection structure, thereby realizing light scattering regulation and improving the light extraction efficiency of the LED chip.
[0017] The full-angle reflection structure is also located above the N-type layer, and is used to reflect and guide the laterally emitted light, and together with the DBR Bragg reflector forms a full-angle reflection system, further improving the lateral light extraction efficiency of the LED chip and reducing optical losses.
[0018] Preferably, a current blocking layer is provided above the P-type layer, and the current blocking layer is a patterned SiO2 or SiN x The P-type layer does not completely cover the P-type layer and is used to guide the current to flow through the effective light-emitting area, reduce the diffusion of invalid current, and improve the current injection efficiency.
[0019] The full-angle reflective structure may be circular, grid, honeycomb or random in a top view.
[0020] The transparent conductive layer is an ITO transparent conductive layer, and its thickness is between 10nm and 300nm.
[0021] The DBR Bragg reflector includes alternately stacked high refractive index layers and low refractive index layers to provide efficient light reflection.
[0022] The method for preparing the high-brightness flip-chip LED chip comprises the following steps:
[0023] Etch an N-type layer on the LED epitaxial wafer to expose part of the N-type layer for subsequent electrode connection;
[0024] Depositing a transparent conductive layer on the P-type layer, wherein the transparent conductive layer is an ITO transparent conductive layer with a thickness between 10 nm and 300 nm;
[0025] On the transparent conductive layer, a full-angle reflection structure is formed, including:
[0026] Depositing SiO2 thin film with a thickness of 200nm to 500nm;
[0027] Forming grid, circular, honeycomb or random patterns on SiO2 film by photolithography;
[0028] Using dry etching process, combined with anisotropic etching and isotropic etching, to form arc or dome morphology on SiO2 film;
[0029] Depositing a DBR Bragg reflector above the full-angle reflection structure, wherein the DBR is formed by alternately stacking a high refractive index layer and a low refractive index layer;
[0030] On the DBR, a p / n conductive through hole is provided to ensure electrical connection with the electrode;
[0031] Electrode evaporation is performed to form a P-type electrode and an N-type electrode in the p / n conductive through hole, respectively. The electrodes are made of materials such as Cr, Ti, Al, Ag, Ni, Pt, and Au.
[0032] Preferably, before depositing the transparent conductive layer, a current blocking layer is formed on the P-type layer, comprising the following steps:
[0033] Deposition of SiO2 or SiN x Thin film, the film thickness is between 50nm and 500nm;
[0034] forming a desired pattern on the film by a photolithography process;
[0035] The film is etched by wet etching or dry etching to form a current blocking layer that partially does not cover the P-type layer.
[0036] Preferably, the SiO2 or SiN x The thin film is deposited using a plasma enhanced chemical vapor deposition (PECVD) process.
[0037] Preferably, the photolithography process uses a mask to expose and develop the thin film to form a regular or irregular pattern.
[0038] Preferably, the dry etching process is performed by reactive ion etching (RIE) or plasma etching (ICP).
[0039] Preferably, the dry etching combines anisotropic etching and isotropic etching to form a full-angle reflection structure with an arc or dome shape.
[0040] During the etching process, due to the combined effects of anisotropic etching and isotropic etching, the etching rate of the SiO2 film is slower at the edge of the opening area, while the etching rate in the middle area is faster. This difference in etching rate causes the SiO2 film to present a dome-shaped or arc-shaped structure in the opening area, forming a full-angle reflection structure. Due to the control of the etching process, the SiO2 film gradually forms a smooth arc or dome shape at the top of the opening area. This structure can effectively reflect and guide incident light at different angles, thereby achieving full-angle light reflection.
[0041] Preferably, the electrode evaporation step is performed using a vacuum evaporation or sputtering deposition process.
[0042] The size, density and spacing of the full-angle reflection structure are optimized according to the optical requirements of the LED chip.
[0043] The present invention significantly improves the light extraction efficiency, current injection efficiency and luminous uniformity of the flip-chip LED chip by designing a full-angle reflection structure above the transparent conductive layer, setting a current blocking layer above the P-type layer, and combining a DBR Bragg reflector with a transparent substrate. The full-angle reflection structure adopts an arc or dome shape, effectively realizing the efficient reflection of multi-angle light, reducing the scattering and loss of light inside the chip, and greatly improving the light extraction efficiency. At the same time, the current blocking layer is formed by patterning SiO2 or SiN x The N-type layer guides the current to the effective light-emitting area, reduces current diffusion and leakage, optimizes current distribution, and improves current injection efficiency. In addition, the lateral light is effectively guided to the front of the chip through the full-angle reflection structure above the N-type layer, reducing lateral optical energy loss, ensuring that the light is more concentrated, and significantly improving the uniformity of light emission. The synergistic effect of the three enables the LED chip to maintain efficient and stable performance under high-power working conditions, comprehensively improving the deficiencies of traditional flip-chip LED chips in optical, structural and electrical performance, and significantly improving the overall brightness and reliability. BRIEF DESCRIPTION OF THE DRAWINGS
[0044] Figure 1 It is a cross-sectional schematic diagram of the high-brightness flip-chip LED chip of the present invention. DETAILED DESCRIPTION
[0045] The structure and preparation process of the high brightness flip-chip LED chip of the present invention are described in detail below in conjunction with the accompanying drawings.
[0046] Embodiment 1:
[0047] like Figure 1 As shown, this embodiment provides a high-brightness flip-chip LED chip, and the specific structure is as follows:
[0048] Transparent substrate layer 100:
[0049] A transparent sapphire substrate is used to provide mechanical support and allow light to be transmitted efficiently, ensuring that light can be efficiently emitted from the substrate side.
[0050] N-type layer 200:
[0051] An N-type GaN layer is grown on a transparent substrate to provide an electron conduction path.
[0052] Multi-quantum well layer 300:
[0053] An InGaN multi-quantum well layer is grown on top of the N-type layer to serve as the light-emitting core area of the LED chip.
[0054] P-type layer 400:
[0055] A P-type GaN layer is grown on the multi-quantum well layer for hole conduction.
[0056] Current blocking layer 500:
[0057] A SiO2 film is deposited on the P-type layer with a thickness of about 100nm. The required pattern is formed by photolithography, and then partially etched by wet etching to form a current blocking layer that does not cover the P-type layer. This layer effectively guides the current to flow through the effective light-emitting area and reduces current leakage.
[0058] Transparent conductive layer 600:
[0059] An ITO transparent conductive layer is deposited on the P-type layer with a thickness of 150nm. This layer not only ensures the effective conduction of current, but also has a high light transmittance.
[0060] Full-angle reflection structure 700:
[0061] A SiO2 film with a thickness of about 300nm is deposited on top of the transparent conductive layer. A grid pattern is formed using a photolithography process, and an arc or dome-shaped structure is formed in the pattern opening area by dry etching (RIE and ICP) combined with anisotropic etching and isotropic etching. This structure can efficiently reflect and guide light at different angles, achieving full-angle light reflection.
[0062] Bragg Reflector (DBR) 800:
[0063] A DBR Bragg reflector is deposited on top of the full-angle reflection structure, using SiO2 and TiO2 to alternately stack to form an efficient light reflection layer. The combination of DBR and the full-angle reflection structure further improves the light extraction efficiency.
[0064] Electrode 900:
[0065] A p / n conductive through hole is opened on the DBR to ensure that the electrode is electrically connected to the N-type layer and the P-type layer. The electrode material is selected from Cr, Ti, Al, Ag, Ni, Pt, and Au, and the thickness is controlled at about 2μm.
[0066] Embodiment 2:
[0067] (1) N-type layer etching
[0068] On the LED epitaxial wafer, ICP dry etching is used to etch the N-type layer to expose part of the N-type layer area for subsequent electrode connection.
[0069] (2) Formation of current blocking layer
[0070] A SiO2 film is deposited on top of the P-type layer with a thickness controlled at 100nm.
[0071] The desired pattern is formed on the film using a photolithography process.
[0072] Part of the area is removed by wet etching or dry etching to form a patterned current blocking layer to reduce current diffusion and guide the current path.
[0073] (3) Deposition of transparent conductive layer
[0074] An ITO transparent conductive layer with a thickness of 150nm is deposited on the P-type layer, and its thickness and transmittance are controlled by optimizing the process.
[0075] (4) Formation of full-angle reflection structure
[0076] A SiO2 film with a thickness of about 300nm is deposited on the transparent conductive layer.
[0077] A grid, circular or honeycomb pattern is formed on the SiO2 film using a photolithography process.
[0078] Dry etching (RIE / ICP) is used to combine anisotropic etching and isotropic etching to form an arc-shaped or dome-shaped structure. The etching rate of this structure is slower at the edge of the opening area, while the etching rate in the middle is faster, eventually forming a smooth arc-shaped or dome-shaped morphology.
[0079] (5) Deposition of Bragg reflector (DBR)
[0080] A DBR Bragg reflector is deposited above the full-angle reflection structure, which is made of alternately stacked SiO2 and TiO2 to provide efficient light reflection.
[0081] (6) Conductive through-hole opening
[0082] A p / n conductive via is opened on the DBR using a photolithography process to ensure that the electrode can be electrically connected to the N-type layer and the P-type layer.
[0083] (7) Electrode evaporation
[0084] Metal electrodes are formed on the P-type layer and the N-type layer respectively using a vacuum evaporation or sputtering deposition process.
[0085] The electrode materials include Cr, Ti, Al, Ag, Ni, Pt, and Au, and the thickness is controlled at about 2μm.
[0086] (8) Chip packaging
[0087] After the electrode evaporation is completed, the chip is packaged to ensure the stability and durability of the LED chip in practical applications.
[0088] Through the above embodiments, the technical effects that can be achieved include:
[0089] The light extraction efficiency is significantly improved: the full-angle reflection structure is combined with DBR to effectively reduce optical loss and improve light extraction effect.
[0090] Improved current injection efficiency: The current blocking layer optimizes the current path and reduces current leakage.
[0091] Improved luminous uniformity: Current and light distribution are more uniform, avoiding local overheating and uneven brightness.
Claims
1. A high brightness flip-chip LED chip, characterized in that: include: A transparent substrate layer, which is used to provide mechanical support, allow light to pass through, and ensure that light is efficiently emitted from the substrate side; An N-type layer, located above the substrate layer; A multi-quantum well layer, located above the N-type layer, for emitting light; A P-type layer, located above the multi-quantum well layer; A transparent conductive layer, located above the P-type layer, for providing current conduction and light transmittance; The full-angle reflective structure is located above the transparent conductive layer and has an arc or dome shape, and has grid, circular, honeycomb or random distribution characteristics in a top view; A DBR Bragg reflector, located above the full-angle reflection structure; Electrodes, electrically connected to the P-type layer and the N-type layer respectively through conductive through holes on the DBR; The full-angle reflection structure is combined with the DBR Bragg reflector to form a full-angle light reflection structure, thereby realizing light scattering regulation and improving the light extraction efficiency of the LED chip.
2. The high brightness flip-chip LED chip according to claim 1, characterized in that: The full-angle reflection structure is also located above the N-type layer, and is used to reflect and guide the light emitted laterally to reduce optical loss.
3. The high brightness flip-chip LED chip according to claim 2, characterized in that: The full-angle reflection structure above the N-type layer and the DBR Bragg reflector together form a full-angle reflection system, further improving the lateral light extraction efficiency of the LED chip.
4. The high brightness flip-chip LED chip according to claim 1, characterized in that: A current blocking layer is arranged above the P-type layer. The current blocking layer is a patterned SiO2 or SiNx layer that does not completely cover the P-type layer. It is used to guide the current to flow through the effective light-emitting area, reduce the diffusion of invalid current, and improve the current injection efficiency.
5. The high brightness flip-chip LED chip according to claim 1, characterized in that: The full-angle reflective structure may be circular, grid, honeycomb or random in a top view.
6. The high brightness flip-chip LED chip according to claim 1, characterized in that: The transparent conductive layer is an ITO transparent conductive layer, and its thickness is between 10nm and 300nm.
7. The high brightness flip-chip LED chip according to claim 1, characterized in that: The DBR Bragg reflector includes alternately stacked high refractive index layers and low refractive index layers to provide efficient light reflection.
8. The method for preparing a high brightness flip-chip LED chip according to any one of claims 1 to 7, characterized in that: The following steps are involved: Etch an N-type layer on the LED epitaxial wafer to expose part of the N-type layer for subsequent electrode connection; Depositing a transparent conductive layer on the P-type layer, wherein the transparent conductive layer is an ITO transparent conductive layer with a thickness between 10 nm and 300 nm; On the transparent conductive layer, a full-angle reflection structure is formed, including: Depositing SiO2 thin film with a thickness of 200nm to 500nm; Forming grid, circular, honeycomb or random patterns on SiO2 film by photolithography; Using dry etching process, combined with anisotropic etching and isotropic etching, to form arc or dome morphology on SiO2 film; Depositing a DBR Bragg reflector above the full-angle reflection structure, wherein the DBR is formed by alternately stacking a high refractive index layer and a low refractive index layer; On the DBR, a p / n conductive through hole is provided to ensure electrical connection with the electrode; Electrode evaporation is performed to form a P-type electrode and an N-type electrode in the p / n conductive through hole, respectively. The electrodes are made of materials such as Cr, Ti, Al, Ag, Ni, Pt, and Au.
9. The method for preparing a high brightness flip-chip LED chip according to claim 8, characterized in that: Before the transparent conductive layer is deposited, a current blocking layer is formed on the P-type layer, comprising the following steps: Deposition of SiO2 or SiN x Thin film, the film thickness is between 50nm and 500nm; forming a desired pattern on the film by a photolithography process; The film is etched by wet etching or dry etching to form a current blocking layer that partially does not cover the P-type layer.
Citation Information
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