Semiconductor structure and manufacturing method thereof

By using a two-step etching process in the semiconductor structure, an appropriate opening structure is formed, and the leakage problem in the semiconductor structure due to too close distance is solved, the process yield is improved and the RC delay effect is reduced.

CN119767675APending Publication Date: 2025-04-04NAN YA TECH
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Patent Information

Application Number
CN202411964684.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-09-13
Filing Date
2024-12-30
Publication Date
2025-04-04

AI Technical Summary

Technical Problem

In the semiconductor manufacturing process, as the semiconductor structure size decreases, components are prone to leakage due to too close spacing, resulting in a decrease in process yield.

Method used

Using a two-step etching process, the second dielectric layer is first etched until the top surface of the first dielectric layer is exposed, forming a first opening; then the first dielectric layer is etched based on the position of the first opening, forming a second opening to reduce the capacitance value and improve the process yield.

Benefits of technology

Through the two-step etching process, the distance between the bit line contacts and the spacer is reduced, the capacitance value is reduced, thereby reducing the RC delay effect and improving the process yield of the semiconductor structure.

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Abstract

The embodiment of the invention provides a semiconductor structure. Comprising an active region arranged in a substrate, a gate structure arranged on the active region, two source / drain regions arranged in the substrate at two sides of the gate structure, two bit line contacts arranged at two sides of the gate structure, a first dielectric layer surrounding the upper part of the gate structure and a second dielectric layer surrounding the upper part of each bit line contact. Each bit line contact directly contacts a portion of each source / drain region. In addition, the invention also provides a method for manufacturing the semiconductor structure. According to the semiconductor structure and the manufacturing method thereof provided by the embodiment of the invention, the capacitance value can be reduced, and the problem of resistance-capacitance delay effect can be improved.
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