Fast recovery diode capable of modulating carrier distribution and preparation method thereof

Abstract

The invention discloses a fast recovery diode capable of modulating carrier distribution and a preparation method thereof, and relates to the technical field of semiconductors. The method comprises the following steps: depositing an epitaxial layer on an N-type substrate, and injecting acceptor type impurities into the front surface of the epitaxial layer; growing an oxide layer on the surface of the epitaxial layer, and opening a window on the oxide layer; injecting donor type impurities into the front surface of the epitaxial layer from the window, and performing high-temperature diffusion treatment to obtain a first preparation part; depositing a polycrystalline silicon layer on the surface of the first preparation piece, and obtaining a polycrystalline silicon field plate through photoetching; an active region window is formed in the oxide layer, and acceptor type impurities are injected into the epitaxial layer through the window; injecting heavy metal impurities into the epitaxial layer and annealing to obtain a second preparation part; depositing metal electrode layers on the front surface and the back surface of the second preparation piece; and coating polyimide on two sides of the front metal electrode layer to form a passivation layer. According to the preparation method, the range of the main junction region and the field limiting ring region can be well controlled, the preparation cost is reduced, and chip size miniaturization and product stability are facilitated.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a fast recovery diode capable of modulating carrier distribution and a preparation method thereof. Background Art

[0002] Insulated Gate Bipolar Transistor (IGBT) has the advantages of high switching speed, high input impedance, low control power and low loss, and is an ideal switching device in the field of power electronics. The core technology of IGBT is the design and production of IGBT chips and fast recovery diode chips. Among them, fast recovery diodes are used in combination with IGBTs, so the requirements for them are also increasing.

[0003] Fast recovery diodes can modulate the electric field distribution of power devices by setting field limiting rings, so that the power devices can reach the ideal withstand voltage level. The existing method of preparing field limiting rings is mainly to apply photoresist to the part other than the field limiting ring area, perform photolithography on the field limiting ring area, and then inject ions and anneal to activate to form a field limiting ring. However, the range and dose of injected ions are easily affected by the size of the window opened on the photoresist layer and equipment fluctuations; in addition, after the existing field limiting ring is prepared, it is necessary to add high-concentration doped donor impurities to the terminal area of ​​the substrate for electric field cutoff, so the terminal area is required to be greater, which is not conducive to the miniaturization of chip size. Summary of the invention

[0004] The object of the present invention is to provide a fast recovery diode with modulatable carrier distribution and a preparation method thereof, which can well control the range of the main junction region and the field limiting ring region, reduce the preparation cost, and facilitate the miniaturization of the chip size and product stability.

[0005] The embodiment of the present invention is achieved as follows:

[0006] One aspect of the present invention provides a method for preparing a fast recovery diode capable of modulating carrier distribution, comprising:

[0007] An epitaxial layer is deposited on an N-type substrate, and acceptor-type impurities are injected into the front side of the epitaxial layer; an oxide layer is grown on the surface of the epitaxial layer, and windows are opened in the non-main junction area and field limiting ring setting area of ​​the oxide layer corresponding to the N-type substrate through a photolithography process; donor-type impurities are injected into the front side of the epitaxial layer through the window, and the epitaxial layer is subjected to a high-temperature diffusion treatment so that the acceptor-type impurities and the donor-type impurities are uniformly diffused to obtain a first prepared part; a polysilicon layer is deposited on the surface of the first prepared part, and a polysilicon field plate is obtained through photolithography; an active area window is opened in the active area of ​​the oxide layer corresponding to the N-type substrate through a photolithography process, and acceptor-type impurities are injected into the epitaxial layer through the active area window to form an ohmic contact area; heavy metal impurities are injected into the epitaxial layer and annealed to obtain a second prepared part; a front metal electrode layer is deposited on the front side of the second prepared part, and a back metal electrode layer is deposited on the back side, wherein the front metal electrode layer is located on the top of the main junction area of ​​the N-type substrate; polyimide is coated on both sides of the front metal electrode layer to form a passivation layer, and the passivation layer is covered on the polysilicon field plate.

[0008] Optionally, growing an oxide layer on the surface of the epitaxial layer includes: providing a silicon dioxide layer on the surface of the epitaxial layer in a temperature environment within 1100°C.

[0009] Optionally, donor-type impurities are implanted into the front side of the epitaxial layer through the window, and the epitaxial layer is subjected to high-temperature diffusion treatment, including: performing high-temperature diffusion treatment on the epitaxial layer at a temperature environment above 1100°C.

[0010] Optionally, heavy metal impurities are implanted into the epitaxial layer and annealed, including: the heavy metal impurities are platinum or gold.

[0011] Optionally, a front metal electrode layer is deposited on the front side of the second prepared component, and a back metal electrode layer is deposited on the back side, including: depositing a metal layer on the front side of the second prepared component, and removing a portion of the front deposited metal layer except for a main junction region corresponding to the N-type substrate through a photolithography process.

[0012] Optionally, before depositing a front metal electrode layer on the front side of the second prepared component and depositing a back metal electrode layer on the back side, the method further comprises: thinning the back side of the N-type substrate to a thickness of 200um-250um.

[0013] Optionally, a front metal electrode layer is deposited on the front side of the second prepared component, and a back metal electrode layer is deposited on the back side, including: the front metal electrode layer is a titanium / nickel / silver metal layer deposited in sequence.

[0014] Optionally, a front metal electrode layer is deposited on the front side of the second prepared component, and a back metal electrode layer is deposited on the back side, including: the front metal electrode layer is a deposited aluminum mixed metal layer, and the aluminum mixed metal layer is a metal aluminum-copper layer or a metal aluminum-silicon-copper layer.

[0015] Optionally, a front metal electrode layer is deposited on the front side of the second prepared component, and a back metal electrode layer is deposited on the back side, including: the back metal electrode layer is a titanium / nickel / silver metal layer deposited in sequence.

[0016] Another aspect of the present invention provides a fast recovery diode with modulated carrier distribution, which is prepared by a method for preparing a fast recovery diode with modulated carrier distribution.

[0017] The beneficial effects of the present invention include at least one of the following:

[0018] The present application provides a method for preparing a fast recovery diode capable of modulating carrier distribution, which comprises: depositing an epitaxial layer on an N-type substrate, and injecting acceptor-type impurities into the front side of the epitaxial layer to ensure the dose stability of the acceptor impurities; growing an oxide layer on the surface of the epitaxial layer, and opening windows in the oxide layer corresponding to the non-main junction region and the field limiting ring setting region of the N-type substrate through a photolithography process; injecting donor-type impurities into the front side of the epitaxial layer through the window, and performing a high-temperature diffusion treatment on the epitaxial layer to uniformly diffuse the acceptor-type impurities and the donor-type impurities, thereby obtaining a first prepared component. By means of such a setting, a stable diffusion range of the acceptor-type impurities can be ensured, so that the setting of the cut-off ring can be eliminated, which can reduce the production cost and also realize the miniaturization of the chip. ; depositing a polysilicon layer on the surface of the first preparation, and obtaining a polysilicon field plate by photolithography; opening an active area window in the active area of ​​the oxide layer corresponding to the N-type substrate by photolithography, and injecting acceptor-type impurities into the epitaxial layer through the active area window to form an ohmic contact area; injecting heavy metal impurities into the epitaxial layer and annealing to obtain a second preparation. The setting of the second preparation can prevent the impurity ions from contaminating the active area and the main junction area during the production process, thereby improving the product stability; depositing a front metal electrode layer on the front of the second preparation and a back metal electrode layer on the back, wherein the front metal electrode layer is located on the top of the main junction area of ​​the N-type substrate; coating polyimide on both sides of the front metal electrode layer to form a passivation layer, and the passivation layer is covered on the polysilicon field plate. The above-mentioned preparation method of the fast recovery diode with modulatable carrier distribution can well control the range of the main junction area and the field limiting ring area, reduce the preparation cost, and is conducive to the miniaturization of the chip size and product stability.

[0019] The present application also provides a fast recovery diode with modulated carrier distribution, which is prepared by a method for preparing a fast recovery diode with modulated carrier distribution. The fast recovery diode with modulated carrier distribution has good product stability and reliability, which is conducive to miniaturization of chip size. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0021] Figure 1 A flow chart of preparing a fast recovery diode with modulatable carrier distribution provided by an embodiment of the present invention;

[0022] Figure 2 One of the structural schematic diagrams of a fast recovery diode with modulatable carrier distribution provided in an embodiment of the present invention;

[0023] Figure 3 The second structural schematic diagram of the fast recovery diode with modulated carrier distribution provided by the embodiment of the present invention;

[0024] Figure 4 The third structural schematic diagram of the fast recovery diode with modulated carrier distribution provided in an embodiment of the present invention.

[0025] Icon: 110 - N-type substrate; 111 - main junction region; 112 - field limiting ring; 113 - ohmic contact region; 120 - epitaxial layer; 130 - oxide layer; 140 - polysilicon field plate; 150 - front metal electrode layer; 160 - back metal electrode layer; 170 - passivation layer. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0027] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0029] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inside", "outside", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, or the positions or positional relationships in which the product of the invention is usually placed when in use. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0030] In addition, the terms "horizontal", "vertical" and the like do not mean that the components are required to be absolutely horizontal or suspended, but can be slightly tilted. For example, "horizontal" only means that its direction is more horizontal than "vertical", and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0031] In the description of the present invention, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0032] Please refer to Figure 1 This embodiment provides a method for preparing a fast recovery diode capable of modulating carrier distribution, and the preparation steps are as follows:

[0033] Step S100, depositing an epitaxial layer 120 on an N-type substrate 110, and implanting acceptor-type impurities into the front surface of the epitaxial layer 120;

[0034] Specifically, the epitaxial layer 120 can be deposited on the N-type substrate 110 by chemical vapor deposition. The epitaxial layer 120 can isolate and buffer the substrate, and can isolate impurities in the N-type substrate 110, avoid the influence of the subsequent preparation process on the active area, and ensure the preparation reliability of the fast recovery diode with modulated carrier distribution. After the epitaxial layer 120 is deposited on the N-type substrate 110, the surface of the epitaxial layer 120 can be cleaned to remove particulate impurities, organic residues, and metal impurities that may be contaminated on the surface, further improving the preparation yield of the fast recovery diode with modulated carrier distribution.

[0035] Subsequently, acceptor-type impurities are implanted into the surface of the epitaxial layer 120. Preferably, the acceptor-type impurities are boron. Since the entire surface of the epitaxial layer 120 is implanted with ions and the acceptor-type impurities are implanted, compared with the prior art method of first photolithography the field limiting ring 112 region and then implanting ions, the dosage of the acceptor-type impurities in the present application can be precisely controlled, thereby improving the preparation yield and reliability of the fast recovery diode with modulatable carrier distribution.

[0036] Step S200: Figure 2 As shown, an oxide layer 130 is grown on the surface of the epitaxial layer 120, and windows are opened in the oxide layer 130 corresponding to the non-main junction region of the N-type substrate 110 and the region where the field limiting ring 112 is set by a photolithography process;

[0037] Specifically, the oxide layer 130 can be formed on the surface of the epitaxial layer 120 by thermal oxidation or chemical vapor deposition, wherein the specific thickness of the oxide layer 130 can be controlled according to specific process requirements. The oxide layer 130 can not only play an electrical insulating role, effectively preventing the passage of current, thereby improving the performance and stability of the device, but also provide a suitable working surface for the subsequent photolithography process, thereby improving the preparation efficiency and reliability.

[0038] like Figure 2 As shown, by opening a window in the oxide layer 130 corresponding to the non-main junction region of the N-type substrate 110 and the field limiting ring 112 setting region through a photolithography process, it is convenient to subsequently inject impurities into the window to form the field limiting ring 112, which can effectively expand the space of the electric field distribution and reduce the edge electric field strength, thereby improving the withstand voltage performance of the device. Among them, the size, shape, number, etc. of the window can be adjusted according to the preparation requirements, and this application does not impose any restrictions on this.

[0039] It should be noted that, in one possible implementation of the present application, the oxide layer 130 may be a silicon dioxide layer formed on the surface of the epitaxial layer 120 at a temperature environment within 1100° C.

[0040] Step S300, implanting donor-type impurities into the front surface of the epitaxial layer 120 through the window, and performing high-temperature diffusion treatment on the epitaxial layer 120 to uniformly diffuse the acceptor-type impurities and the donor-type impurities, thereby obtaining a first prepared component;

[0041] Specifically, the window opened in step S200 is a channel for impurity injection to ensure that the donor impurity can be accurately introduced into the location where the electrical properties need to be changed. Preferably, the donor impurity is phosphorus.

[0042] When the epitaxial layer 120 is in a high temperature environment, the atoms obtain sufficient energy to achieve the diffusion of donor-type impurities and acceptor-type impurities to obtain the first prepared component. Since the diffusion coefficient of boron is greater than that of phosphorus, under the same conditions, the phosphorus element can penetrate the impurity region where the boron element is located, ensuring the stability of the position of the acceptor impurities and forming a pn junction for withstand voltage; the acceptor-type impurities and donor-type impurities diffuse evenly to optimize the electrical properties of the epitaxial layer 120.

[0043] It should be noted that in one possible implementation mode of the present application, step S300 requires performing high-temperature diffusion treatment on the epitaxial layer 120 in a temperature environment above 1100°C so that the injected impurity atoms can be better integrated into the lattice structure of the semiconductor epitaxial layer 120, thereby being activated, and also helps to achieve a more uniform distribution of impurities in the entire epitaxial layer 120.

[0044] Step S400: Figure 3 As shown, a polysilicon layer is deposited on the surface of the first prepared member, and a polysilicon field plate 140 is obtained by photolithography;

[0045] Specifically, a polysilicon layer can be deposited by chemical vapor deposition. Polysilicon has good electrical properties, such as adjustable conductivity. Its electrical properties can be changed by doping and other means, so that it can effectively conduct or control the electric field. The polysilicon field plate 140 can extend the surface depletion region wider than the body in the lateral direction, thereby improving the breakdown characteristics of the device. The polysilicon field plate 140 is arranged in the non-main junction region.

[0046] Step S500: Figure 3 As shown, an active area window is opened in the active area of ​​the oxide layer 130 corresponding to the N-type substrate 110 by a photolithography process, and acceptor type impurities are injected into the epitaxial layer 120 through the active area window to form an ohmic contact area 113; optionally, the acceptor type impurity is boron.

[0047] Step S600, injecting heavy metal impurities into the epitaxial layer 120 and annealing to obtain a second prepared part;

[0048] Specifically, heavy metal impurities can produce special electrical properties. After being injected, these heavy metal impurities will introduce special energy levels in the semiconductor lattice. These energy levels can serve as recombination centers to effectively control the lifetime and recombination process of carriers. In the process of forming the field limiting ring 112, this control of carrier recombination helps to adjust the electrical properties of the edge region of the epitaxial layer 120.

[0049] During the ion implantation process, high-speed impurity ions bombard the epitaxial layer 120, which may cause defects such as displacement of lattice atoms and vacancies. Annealing is to heat treat the material at a certain temperature so that the atoms can obtain enough energy to rearrange to form the field limiting ring 112, such as Figure 3 After annealing, the heavy metal impurities are stabilized in the lattice, and their distribution is also optimized to a certain extent due to thermal motion. This optimized impurity distribution helps to form suitable electrical properties in the field limiting ring 112 area.

[0050] Since the ion implantation of the active region and the field limiting ring 112 is performed before the heavy metal impurities are implanted, the possibility of impurity ions contaminating the active region and the PN junction during the preparation process can be reduced, thereby improving the stability of the fast recovery diode with modulatable carrier distribution.

[0051] It should be noted that in a specific embodiment of the present application, the heavy metal impurity is platinum or gold. Platinum and gold can form effective recombination centers in semiconductor materials. When they are injected into the epitaxial layer 120, they can capture electron-hole pairs and accelerate the recombination process of carriers. In the process of forming the field limiting ring 112, the role of this recombination center is crucial for controlling the carrier lifetime and concentration in the edge area of ​​the epitaxial layer 120. It also helps to adjust the electric field distribution at the edge of the epitaxial layer 120.

[0052] Step S700: Figure 4 As shown, a front metal electrode layer 150 is deposited on the front side of the second prepared component, and a back metal electrode layer 160 is deposited on the back side, wherein the front metal electrode layer 150 is located on the top of the main junction region 111 of the N-type substrate 110;

[0053] Specifically, the deposition of the front metal electrode layer 150 and the back metal electrode layer 160 is usually achieved by physical vapor deposition or chemical vapor deposition technology. Figure 4 As shown, the front metal electrode layer 150 is located on the top of the main junction region 111 of the N-type substrate, and the main junction region 111 is a key part for realizing the main electrical functions in the semiconductor device. Depositing the metal electrode layer at this position can achieve good electrical contact to effectively conduct the current generated by the main junction region 111, or inject carriers into the main junction region 111. Optionally, when preparing the front metal electrode layer 150, a metal layer can be first deposited on the front side of the second prepared part, and the portion of the front deposited metal layer other than the main junction region 111 corresponding to the N-type substrate 110 is removed by a photolithography process to obtain the front metal electrode layer 150.

[0054] The back metal electrode layer 160 can provide another electrical contact point, and cooperate with the front metal electrode layer 150 to achieve a complete electrical path.

[0055] It should be noted that, first, before depositing the front metal electrode layer 150 on the front side of the second prepared component and the back metal electrode layer 160 on the back side, the back side of the N-type substrate 110 may be thinned to make the thickness of the N-type substrate 110 between 200um and 250um. By thinning the back side of the N-type substrate 110, the heat dissipation efficiency and the reliability of the fast recovery diode capable of modulating carrier distribution can be improved.

[0056] Second, in one possible implementation of the present application, the front metal electrode layer 150 is a titanium / nickel / silver metal layer deposited in sequence. The titanium metal layer is deposited first. Titanium has good adhesion and diffusion barrier properties, so it can be tightly attached to the surface of the epitaxial layer 120, providing a stable and solid foundation for the deposition of subsequent metal layers; at the same time, the titanium metal layer can also effectively prevent other metal atoms from diffusing to the bottom layer, ensuring the stability and purity of the entire metal structure.

[0057] Then, a nickel metal layer is deposited. Nickel further enhances the bonding between metal layers on the titanium layer and helps improve the conductivity and corrosion resistance of the entire metal structure. The presence of the nickel layer allows the subsequently deposited silver metal layer to better exert its excellent conductive properties.

[0058] Finally, a silver metal layer is deposited. Silver has extremely high conductivity and can provide a low-resistance current conduction path for the fast recovery diode with modulated carrier distribution during operation, ensuring the high efficiency and stability of signal transmission, thereby improving the current conduction capacity of the fast recovery diode with modulated carrier distribution.

[0059] In another possible implementation of the present application, the front metal electrode layer 150 is a deposited aluminum mixed metal layer, and the aluminum mixed metal layer is a metal aluminum copper layer or a metal aluminum silicon copper layer. This is because the aluminum mixed metal layer can form a good electrical contact with the semiconductor material, ensuring that the current can be smoothly transmitted between the metal and the semiconductor without generating a large contact resistance.

[0060] Third, in one possible implementation mode of the present application, the back metal electrode layer 160 may also be a titanium / nickel / silver metal layer deposited in sequence.

[0061] Step S800 : coating polyimide on both sides of the front metal electrode layer 150 to form a passivation layer 170 . The passivation layer 170 covers the polysilicon field plate 140 .

[0062] Specifically, in order to provide a certain protection effect to the polysilicon field plate 140 and the field limiting ring 112, as Figure 4As shown, a passivation layer 170 formed of polyimide is covered on the non-main junction area of ​​the N-type substrate 110. Polyimide has good insulation properties and can effectively prevent abnormal conduction of charges between different metal layers or other areas of the chip, reduce leakage risks, and ensure the stability of the chip's electrical performance.

[0063] The method for preparing the fast recovery diode with modulated carrier distribution can well control the range of the main junction region 111 and the field limiting ring 112 region, reduce the preparation cost, and facilitate the miniaturization of the chip size and product stability.

[0064] In another aspect of the embodiment of the present application, a fast recovery diode with modulated carrier distribution is provided, which is prepared by a method for preparing a fast recovery diode with modulated carrier distribution. The method for preparing a fast recovery diode with modulated carrier distribution has been described in detail above and will not be repeated here. The fast recovery diode with modulated carrier distribution has good product stability and reliability, which is conducive to miniaturization of chip size.

[0065] The above description is only an optional embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

[0066] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the present invention will not further describe various possible combinations.

Claims

1. A method for preparing a fast recovery diode capable of modulating carrier distribution, characterized in that: include: Depositing an epitaxial layer (120) on an N-type substrate (110), and implanting acceptor-type impurities into the front surface of the epitaxial layer (120); An oxide layer (130) is grown on the surface of the epitaxial layer (120), and windows are opened in the oxide layer (130) corresponding to the non-main junction region of the N-type substrate (110) and the field limiting ring (112) setting region through a photolithography process; Injecting donor-type impurities into the front side of the epitaxial layer (120) through the window, and subjecting the epitaxial layer (120) to high-temperature diffusion treatment so that the acceptor-type impurities and the donor-type impurities are evenly diffused to obtain a first prepared component; Depositing a polysilicon layer on the surface of the first prepared member, and obtaining a polysilicon field plate (140) by photolithography; An active region window is formed in the oxide layer (130) corresponding to the active region of the N-type substrate (110) by photolithography, and acceptor-type impurities are injected into the epitaxial layer (120) through the active region window to form an ohmic contact region (113); Injecting heavy metal impurities into the epitaxial layer (120) and annealing to obtain a second prepared part; Depositing a front metal electrode layer (150) on the front side of the second prepared component and depositing a back metal electrode layer (160) on the back side, wherein the front metal electrode layer (150) is located on the top of the main junction region (111) of the N-type substrate (110); Polyimide is coated on both sides of the front metal electrode layer (150) to form a passivation layer (170), and the passivation layer (170) is covered on the polysilicon field plate (140).

2. The method for preparing a fast recovery diode with modulated carrier distribution according to claim 1, characterized in that: The step of growing an oxide layer (130) on the surface of the epitaxial layer (120) comprises: A silicon dioxide layer is grown on the surface of the epitaxial layer (120) in a temperature environment within 1100°C.

3. The method for preparing a fast recovery diode with modulated carrier distribution according to claim 1, characterized in that: The step of injecting donor-type impurities into the front side of the epitaxial layer (120) through the window and performing high-temperature diffusion treatment on the epitaxial layer (120) comprises: The epitaxial layer (120) is subjected to high temperature diffusion treatment in a temperature environment above 1100°C.

4. The method for preparing a fast recovery diode with modulated carrier distribution according to claim 1, characterized in that: The step of injecting heavy metal impurities into the epitaxial layer (120) and annealing the epitaxial layer (120) comprises: The heavy metal impurities are platinum or gold.

5. The method for preparing a fast recovery diode with modulated carrier distribution according to claim 1, characterized in that: Depositing a front metal electrode layer (150) on the front side of the second prepared component and depositing a back metal electrode layer (160) on the back side includes: A metal layer is deposited on the front side of the second prepared component, and a portion of the front-deposited metal layer other than a main junction region (111) corresponding to the N-type substrate (110) is removed by a photolithography process.

6. The method for preparing a fast recovery diode with modulated carrier distribution according to claim 1, characterized in that: Before depositing a front metal electrode layer (150) on the front side of the second prepared component and depositing a back metal electrode layer (160) on the back side, the method further comprises: The back side of the N-type substrate (110) is thinned to a thickness of 200um-250um.

7. The method for preparing a fast recovery diode with modulated carrier distribution according to claim 1, characterized in that: Depositing a front metal electrode layer (150) on the front side of the second prepared component and depositing a back metal electrode layer (160) on the back side includes: The front metal electrode layer (150) is a titanium / nickel / silver metal layer deposited in sequence.

8. The method for preparing a fast recovery diode with modulated carrier distribution according to claim 1, characterized in that: Depositing a front metal electrode layer (150) on the front side of the second prepared component and depositing a back metal electrode layer (160) on the back side includes: The front metal electrode layer (150) is a deposited aluminum mixed metal layer, and the aluminum mixed metal layer is a metal aluminum-copper layer or a metal aluminum-silicon-copper layer.

9. The method for preparing a fast recovery diode with modulated carrier distribution according to claim 1, characterized in that: Depositing a front metal electrode layer (150) on the front side of the second prepared component and depositing a back metal electrode layer (160) on the back side includes: The back metal electrode layer (160) is a titanium / nickel / silver metal layer deposited in sequence.

10. A fast recovery diode with modulatable carrier distribution, characterized in that: The fast recovery diode is prepared by the method for preparing a fast recovery diode with modulated carrier distribution as described in any one of claims 1 to 9.

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