Semiconductor structure and manufacturing method thereof

By designing a specific injection zone structure and a trench shield gate structure in the semiconductor structure, the impact of the avalanche capacity improvement solution of semiconductor devices on threshold voltage and on-resistance in the prior art is solved, and higher avalanche resistance and better device performance are achieved.

CN119767748AActive Publication Date: 2025-04-04ZHUHAI GREE ELECTRONIC COMPONENTS CO LTD +1
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Patent Information

Application Number
CN202411883794.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-19
Publication Date
2025-04-04
Estimated Expiration
2044-12-19

AI Technical Summary

Technical Problem

The avalanche capability improvement solution of semiconductor devices in the prior art will affect the threshold voltage and on-resistance of the device, thereby affecting device performance.

Method used

By designing a specific implantation region structure and a trench shield gate structure in the semiconductor structure, the highly doped third implantation region is limited between the two first trenches, forming a fourth implantation region and a third implantation region with ion concentrations sequentially increasing, reducing the resistance of the first implantation region, and filling the trench and contact holes through the metal layer to enhance the device's avalanche resistance.

Benefits of technology

It effectively improves the avalanche resistance of the semiconductor structure, while reducing the impact on the device threshold voltage and on-resistance, and improving device performance.

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Abstract

The invention provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a substrate; the epitaxial layer is located on the surface of one side of the substrate; the first injection region and the second injection region are overlapped in the epitaxial layer along the direction far away from the substrate; the third injection region is located in the first injection region, and the fourth injection region is located in the first injection region and located on the periphery of the third injection region; the first dielectric layer is located on the side, away from the substrate, of the epitaxial layer; the first contact hole and the two first grooves penetrate through the first dielectric layer and the second injection region and are in contact with the third injection region and the fourth injection region respectively, and the two first grooves are at least located on the two sides of the first contact hole; the second dielectric layer is located on the bottom surfaces of the two first grooves; the metal layer is located on the surface, far away from the epitaxial layer, of the first dielectric layer and on the partial surface, far away from the substrate, of the second injection region on the two sides of the first grooves, and the two first grooves and the first contact holes are further filled with the metal layer.
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