Chip electrodes and mounted LED chips

Abstract

The present invention discloses a chip electrode and a front-mounted LED chip, wherein the chip electrode comprises an ohmic contact layer, a reflective layer, a first barrier layer, a composite layer, a second barrier layer and a bonding layer stacked in sequence, wherein the composite layer comprises a conductive layer and a protective layer, wherein the protective layer is arranged between the first barrier layer and the conductive layer, and / or the protective layer is arranged between the conductive layer and the second barrier layer; the conductive layer is a Cu layer and / or a Cu alloy layer; and the material of the protective layer is a metal whose standard electrode potential is lower than that of Cu. The implementation of the present invention can reduce the manufacturing cost of the chip electrode while ensuring the reliability of the chip electrode.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a chip electrode and a positive-mounted LED chip. Background Art

[0002] The electrodes of existing upright LED chips generally include an ohmic contact layer, a reflective layer, a coating layer and a bonding layer. The reflective layer is generally an Al layer, the coating layer is generally a Ti / Pt layer or a Ni / Pt layer, and the bonding layer is generally an inert and highly conductive Au layer. In order to improve the current conductivity of the chip and reduce the chip voltage, it is generally necessary to set the thickness of the bonding layer between 1μm and 3μm. The thicker bonding layer significantly increases the cost of the chip. In addition, the precious metal Pt used in the coating layer will also increase the cost of the chip. However, it is difficult to ensure the stability and reliability of the chip electrodes in the chip manufacturing process by only using relatively low-priced metals such as Ag and Al instead of Au to make the bonding layer. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a chip electrode and a front-mounted LED chip, which can ensure the reliability of the chip electrode while reducing the manufacturing cost of the chip electrode.

[0004] In order to solve the above problems, the present invention discloses a chip electrode, comprising an ohmic contact layer, a reflective layer, a first barrier layer, a composite layer, a second barrier layer and a bonding layer stacked in sequence, wherein the composite layer comprises a conductive layer and a protective layer, wherein the protective layer is arranged between the first barrier layer and the conductive layer, and / or the protective layer is arranged between the conductive layer and the second barrier layer;

[0005] The conductive layer is a Cu layer and / or a Cu alloy layer; the material of the protective layer is a metal whose standard electrode potential is lower than that of Cu.

[0006] As an improvement of the above technical solution, the thickness of the conductive layer is 1000nm to 1500nm.

[0007] As an improvement of the above technical solution, in the Cu alloy, the alloy metal is a metal having a standard electrode potential lower than that of Cu;

[0008] The alloy metal is one or more of Cr, Ti, Al, Ni, Zn, Sn, and Mg;

[0009] As an improvement of the above technical solution, the mass proportion of the alloy metal is 2% to 15%.

[0010] As an improvement of the above technical solution, the protective layer includes any one or more combinations of a Cr layer, a Ti layer, an Al layer, a Ni layer, a Zn layer, a Sn layer, and a Mg layer.

[0011] As an improvement of the above technical solution, the thickness of the protective layer is 100nm to 300nm; the ratio of the thickness of the protective layer to the thickness of the conductive layer is 1:(3 to 6.5).

[0012] As an improvement of the above technical solution, the bonding layer includes any one or more combinations of Au layer, Al layer and Ag layer, and the thickness of the bonding layer is 3nm to 500nm.

[0013] As an improvement of the above technical solution, the first barrier layer includes any one or more combinations of a Cr layer, a Ti layer, and a Ni layer, and the thickness of the first barrier layer is 100nm to 800nm;

[0014] The second barrier layer includes any one or more combinations of a Cr layer, a Ti layer, and a Ni layer. The thickness of the second barrier layer is 100 nm to 800 nm.

[0015] As an improvement of the above technical solution, the ohmic contact layer includes any one or more combinations of a Cr layer, a Ti layer, and a Ni layer, and the thickness of the ohmic contact layer is 0.5 nm to 20 nm;

[0016] The reflective layer includes any one or more combinations of an Al layer, an Ag layer, and a Mg layer, and the thickness of the reflective layer is 50 nm to 300 nm.

[0017] Correspondingly, the present invention also discloses a front-mounted LED chip, and the front-mounted LED chip includes the above-mentioned chip electrode.

[0018] The implementation of the present invention has the following beneficial effects: the present invention sets a composite layer between the reflective layer and the bonding layer, wherein the composite layer includes a Cu conductive layer and / or a Cu alloy conductive layer, and the metal copper is low in price and has excellent mechanical properties, electrical conductivity and thermal conductivity, and can expand the current to a limited extent. The composite layer also includes a protective layer to protect the conductive layer and prevent the protective layer from being electrochemically corroded, thereby improving the electrode's resistance to high temperature and high humidity. The chip electrode of the present invention can improve the quality of the reflective layer while reducing the thickness of the bonding layer, thereby improving the conductive effect of the chip electrode, improving the reliability of the chip electrode, reducing the operating voltage of the front-mounted LED chip, and improving the photoelectric conversion efficiency of the front-mounted LED chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a schematic structural diagram of a chip electrode provided in Example 1 of the present invention;

[0020] Figure 2 is a schematic diagram of the structure of a chip electrode provided in Example 6 of the present invention;

[0021] Figure 3It is a schematic diagram of the structure of the chip electrode provided in Example 7 of the present invention. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention is described in further detail below.

[0023] See also Figure 1 to Figure 3 The present invention provides a chip electrode, comprising an ohmic contact layer 1, a reflective layer 2, a first barrier layer 3, a composite layer 4, a second barrier layer 5 and a bonding layer 6 stacked in sequence. Specifically, the composite layer 4 comprises a conductive layer 41 and a protective layer, the protective layer being arranged between the first barrier layer 3 and the conductive layer 41, and / or the protective layer being arranged between the conductive layer 41 and the second barrier layer 5. The conductive layer 41 is a Cu layer and / or a Cu alloy layer, and the material of the protective layer is a metal having a standard electrode potential lower than that of Cu.

[0024] The present invention provides a composite layer between the reflective layer and the bonding layer, wherein the composite layer includes a conductive layer and a protective layer, the material of the conductive layer is Cu and / or Cu alloy, the price of metallic copper is low and it has excellent mechanical properties, electrical conductivity and thermal conductivity, and it can expand the current to a limited extent, thereby reducing the current expanded through the reflective layer and extending the life of the reflective layer. In addition, the provision of the conductive layer can also reduce the thickness of the bonding layer, and replace part of the precious metals of the bonding layer with Cu and / or Cu alloy to achieve cost reduction. The composite layer also includes a protective layer to protect the conductive layer, prevent the protective layer from being electrochemically corroded, and further improve the electrode's resistance to high temperature and high humidity. The chip electrode of the present invention can improve the quality of the reflective layer while reducing the thickness of the bonding layer, thereby improving the conductive effect of the chip electrode, improving the reliability of the chip electrode, reducing the operating voltage of the chip, and improving the electro-optical conversion efficiency of the chip.

[0025] It can be understood that the protective layer includes a first protective layer 421 and / or a second protective layer 422. Figure 1 As shown, the protective layer can be arranged between the first barrier layer 3 and the conductive layer 41, that is, the composite layer 4 includes the first protective layer 421 and the conductive layer 41 stacked in sequence, and the first protective layer 421 protects the conductive layer 41 to prevent electrochemical corrosion of the conductive layer 41. Figure 2 As shown, the protective layer can be arranged between the conductive layer 41 and the second barrier layer 5, that is, the composite layer 4 includes the conductive layer 41 and the second protective layer 422 stacked in sequence, and the second protective layer 422 protects the conductive layer 41 to prevent electrochemical corrosion of the conductive layer 41. Figure 3As shown, the protective layer can be arranged between the first barrier layer 3 and the conductive layer 41, and between the conductive layer 41 and the second barrier layer 5, that is, the composite layer 4 includes a first protective layer 421, a conductive layer 41 and a second protective layer 422 stacked in sequence, and the first protective layer 421 and the second protective layer 422 protect the conductive layer 41, and the protection effect is good.

[0026] In one embodiment, the thickness of the conductive layer 41 is 1000nm to 1500nm, and is exemplarily 1000nm, 1000nm, 1500nm, 1000nm or 1500nm, but is not limited thereto. If the thickness of the conductive layer 41 is less than 1000nm, it is difficult to effectively improve the conductivity of the chip electrode; if the thickness of the conductive layer 41 is greater than 1500nm, the thickness of the chip electrode will increase.

[0027] When the material of the conductive layer is a Cu alloy, the alloy metal in the Cu alloy is a metal with a standard electrode potential lower than that of Cu, thereby ensuring the stability of the conductive layer material. Specifically, the alloy metal may be one or more of Cr, Ti, Al, Ni, Zn, Sn, and Mg, but is not limited thereto. Using a Cu alloy as the conductive layer material can improve the physical and mechanical properties while ensuring electrical conductivity, improve the stability of the electrode under high temperature and high humidity, and extend the service life of the electrode.

[0028] In a preferred embodiment, the mass proportion of the alloy metal is 2% to 15%, exemplified by 3%, 5%, 8%, 10% or 12%, but not limited thereto. If the mass proportion of the alloy metal is less than 2%, the oxidation resistance and corrosion resistance of the conductive layer 41 will be reduced; if the mass proportion of the alloy metal is greater than 15%, the conductive layer 41 will be difficult to meet the conductivity requirements of the electrode. By controlling the selection and mass proportion of the alloy metal, the reliability of the conductive layer is further improved.

[0029] It is understandable that in order to protect the conductive layer, the metal of the protective layer will not form an intermediate phase compound with a conductive electrode difference with the metal of the bonding layer 6. Optionally, the protective layer is a single-layer structure or a stacked structure, and each layer can be one of a Cr layer, a Ti layer, an Al layer, a Ni layer, a Zn layer, a Sn layer, and a Mg layer. The thickness of the protective layer is 100nm to 300nm, and exemplarily 120nm, 150nm, 180nm, 200nm or 250nm, but not limited to this. If the thickness of the protective layer is too small, it is difficult to play a good protective role; if the thickness of the protective layer is too large, it will cause an increase in cost. In a preferred embodiment, the ratio of the thickness of the protective layer to the thickness of the conductive layer 41 is 1: (3 to 6.5), and exemplarily 1: 4, 1: 4.5, 1: 5, 1: 5.5 or 1: 6, but not limited to this.

[0030] In one embodiment, the bonding layer 6 includes any one or more combinations of Au layer, Al layer, and Ag layer, and the thickness of the bonding layer is 3nm to 500nm, exemplarily 50nm, 100nm, 200nm, 300nm or 400nm, but not limited thereto. If the thickness of the bonding layer is less than 3nm, it is difficult for the wire to form a good electrical connection with the chip electrode. Compared with conventional electrodes, the thickness of the bonding layer 6 of the chip electrode of the present invention is significantly reduced, and accordingly, the manufacturing cost of the chip electrode is significantly reduced.

[0031] Since the setting of the conductive layer 41 can improve the current spreading effect, as the thickness of the conductive layer 41 increases, the thickness of the bonding layer 6 decreases. In a preferred embodiment, the thickness h1 of the conductive layer 41 and the thickness h2 of the bonding layer 6 satisfy the following relationship: 0.5h1+h2=850nm-1200nm, which reduces the cost while ensuring the conductivity and reliability of the chip electrode.

[0032] In one embodiment, the first barrier layer 3 includes any one or more combinations of a Cr layer, a Ti layer, and a Ni layer, but is not limited thereto. The thickness of the first barrier layer 3 is 100 nm to 800 nm, and is exemplarily 200 nm, 300 nm, 400 nm, 500 nm, or 600 nm, but is not limited thereto.

[0033] In one embodiment, the melting point of the material of the second barrier layer 5 is greater than 1500° C. The second barrier layer 5 includes any one or more combinations of a Cr layer, a Ti layer, and a Ni layer, but is not limited thereto. The thickness of the second barrier layer 5 is 100 nm to 800 nm, and is exemplarily 200 nm, 300 nm, 400 nm, 500 nm, or 600 nm, but is not limited thereto.

[0034] In one embodiment, the ohmic contact layer 1 includes any one or more of a Cr layer, a Ti layer, and a Ni layer. The thickness of the ohmic contact layer 1 is 0.5 nm to 20 nm, exemplarily 2 nm, 5 nm, 10 nm, 14 nm, or 18 nm, but not limited thereto. The ohmic contact layer 1 ensures good ohmic contact performance between the chip electrode and the chip epitaxial structure, and reduces the chip voltage.

[0035] In one embodiment, the reflective layer 2 includes any one or more combinations of an Al layer, an Ag layer, and a Mg layer. The thickness of the reflective layer 2 is 50 nm to 300 nm, and is exemplarily 80 nm, 100 nm, 150 nm, 200 nm, or 250 nm, but is not limited thereto. The reflective layer 2 has a high reflective property, and the light emitted from the chip electrode can be reflected back to the chip again, and emitted from other areas through secondary reflection or multiple reflections, thereby preventing the light from being absorbed by the chip electrode.

[0036] The present invention also provides a normal-mounted LED chip, including the above-mentioned chip electrode. It is understandable that the normal-mounted LED chip includes but is not limited to an epitaxial structure, a current blocking layer, a transparent conductive layer, an electrode and a passivation layer, wherein the electrode includes a P-type electrode and an N-type electrode, and the chip electrode provided by the present invention can be used as a P-type electrode and / or an N-type electrode. In a preferred embodiment, the P-type electrode and the N-type electrode of the normal-mounted LED chip both use the chip electrode provided by the present invention, and the deposition of the P-type electrode and the N-type electrode can be completed simultaneously by using the same process steps, further reducing costs.

[0037] The present invention also provides a method for preparing a front-mounted LED chip, comprising the following steps:

[0038] S1. Provide a substrate. Specifically, the substrate may be a sapphire substrate, a Si substrate or a SiC substrate, but is not limited thereto.

[0039] S2. Form an epitaxial structure on the substrate. The epitaxial structure includes, but is not limited to, an N-type semiconductor layer, an active light-emitting layer, and a P-type semiconductor layer stacked in sequence. Specifically, the N-type semiconductor layer may be an N-type GaN layer, an N-type AlGaN layer, or an N-type GaAs layer, but is not limited thereto; the active light-emitting layer may be an InGaN / GaN layer, an InGaN / AlGaN layer, or an AlGaN / AlGaN layer, but is not limited thereto; the P-type semiconductor layer may be a P-type GaN layer, a P-type AlGaN layer, or a P-type GaAs layer, but is not limited thereto.

[0040] S3, performing patterning on the epitaxial structure to form a MESA step exposing the N-type semiconductor layer.

[0041] S4, depositing a current blocking layer and a transparent conductive layer on the N-type semiconductor layer and the P-type semiconductor layer. The current blocking layer may be a SiO2 current blocking layer, and the transparent conductive layer may be an ITO transparent conductive layer.

[0042] S5, depositing a P-type electrode on the transparent conductive layer on the P-type semiconductor layer, and depositing an N-type electrode on the transparent conductive layer on the N-type semiconductor layer. Specifically, the P-type electrode and the N-type electrode each include an ohmic contact layer, a reflective layer, a first barrier layer, a composite layer, a second barrier layer, and a bonding layer stacked in sequence.

[0043] S6. Deposit a passivation layer and expose the N-type electrode and the P-type electrode.

[0044] The present invention will be further described below with specific embodiments:

[0045] Example 1

[0046] This embodiment provides a chip electrode, including an ohmic contact layer, a reflective layer, a first barrier layer, a composite layer, a second barrier layer and a bonding layer stacked in sequence, wherein the composite layer includes a first protective layer and a conductive layer stacked in sequence.

[0047] The ohmic contact layer is a Cr layer with a thickness of 3 nm.

[0048] The reflective layer is an Al layer with a thickness of 100 nm.

[0049] The first barrier layer is a Ti layer with a thickness of 200 nm.

[0050] The first protective layer is a Ni layer with a thickness of 100 nm.

[0051] The conductive layer is a Cu layer with a thickness of 1300 nm.

[0052] The second barrier layer is a Ti layer with a thickness of 200 nm.

[0053] The bonding layer is an Au layer with a thickness of 400nm.

[0054] Example 2

[0055] This embodiment provides a chip electrode, including an ohmic contact layer, a reflective layer, a first barrier layer, a composite layer, a second barrier layer and a bonding layer stacked in sequence, wherein the composite layer includes a first protective layer and a conductive layer stacked in sequence.

[0056] The ohmic contact layer is a Cr layer with a thickness of 3 nm.

[0057] The reflective layer is an Al layer with a thickness of 100 nm.

[0058] The first barrier layer is a Ti layer with a thickness of 200 nm.

[0059] The first protective layer is a Ni layer with a thickness of 100 nm.

[0060] The conductive layer is a Cu-Ni binary alloy layer, in which Ni accounts for 18% by mass and has a thickness of 1300 nm.

[0061] The second barrier layer is a Ti layer with a thickness of 200 nm.

[0062] The bonding layer is an Au layer with a thickness of 400nm.

[0063] Example 3

[0064] This embodiment provides a chip electrode, including an ohmic contact layer, a reflective layer, a first barrier layer, a composite layer, a second barrier layer and a bonding layer stacked in sequence, wherein the composite layer includes a first protective layer and a conductive layer stacked in sequence.

[0065] The ohmic contact layer is a Cr layer with a thickness of 3 nm.

[0066] The reflective layer is an Al layer with a thickness of 100 nm.

[0067] The first barrier layer is a Ti layer with a thickness of 200 nm.

[0068] The first protective layer is a Ni layer with a thickness of 100 nm.

[0069] The conductive layer is a Cu-Ni binary alloy layer, the mass proportion of Ni is 11%, and the thickness is 1300nm.

[0070] The second barrier layer is a Ti layer with a thickness of 200 nm.

[0071] The bonding layer is an Au layer with a thickness of 400nm.

[0072] Example 4

[0073] This embodiment provides a chip electrode, including an ohmic contact layer, a reflective layer, a first barrier layer, a composite layer, a second barrier layer and a bonding layer stacked in sequence, wherein the composite layer includes a first protective layer and a conductive layer stacked in sequence.

[0074] The ohmic contact layer is a Cr layer with a thickness of 3 nm.

[0075] The reflective layer is an Al layer with a thickness of 100 nm.

[0076] The first barrier layer is a Ti layer with a thickness of 200 nm.

[0077] The first protective layer is composed of a Ni layer and a Cr layer stacked in sequence, and the thickness of the Ni layer and the Cr layer are both 50 nm.

[0078] The conductive layer is a Cu-Ni binary alloy layer, the mass proportion of Ni is 11%, and the thickness is 1300nm.

[0079] The second barrier layer is a Ti layer with a thickness of 200 nm.

[0080] The bonding layer is an Au layer with a thickness of 400nm.

[0081] Example 5

[0082] This embodiment provides a chip electrode, including an ohmic contact layer, a reflective layer, a first barrier layer, a composite layer, a second barrier layer and a bonding layer stacked in sequence, wherein the composite layer includes a first protective layer and a conductive layer stacked in sequence.

[0083] The ohmic contact layer is a Cr layer with a thickness of 3 nm.

[0084] The reflective layer is an Al layer with a thickness of 100 nm.

[0085] The first barrier layer is a Ti layer with a thickness of 200 nm.

[0086] The first protective layer is composed of a Ni layer and a Cr layer stacked in sequence, and the thickness of the Ni layer and the Cr layer are both 100 nm.

[0087] The conductive layer is a Cu-Ni binary alloy layer, the mass proportion of Ni is 11%, and the thickness is 1300nm.

[0088] The second barrier layer is a Ti layer with a thickness of 200 nm.

[0089] The bonding layer is an Au layer with a thickness of 400nm.

[0090] Example 6

[0091] This embodiment provides a chip electrode, comprising an ohmic contact layer, a reflective layer, a first barrier layer, a composite layer, a second barrier layer and a bonding layer stacked in sequence, wherein the composite layer comprises a conductive layer and a second protective layer stacked in sequence.

[0092] The ohmic contact layer is a Cr layer with a thickness of 3 nm.

[0093] The reflective layer is an Al layer with a thickness of 100 nm.

[0094] The first barrier layer is a Ti layer with a thickness of 200 nm.

[0095] The conductive layer is a Cu-Ni binary alloy layer, the mass proportion of Ni is 11%, and the thickness is 1300nm.

[0096] The second protective layer is composed of a Ni layer and a Cr layer stacked in sequence, and the thickness of the Ni layer and the Cr layer are both 100 nm.

[0097] The second barrier layer is a Ti layer with a thickness of 200 nm.

[0098] The bonding layer is an Au layer with a thickness of 400nm.

[0099] Example 7

[0100] This embodiment provides a chip electrode, including an ohmic contact layer, a reflective layer, a first barrier layer, a composite layer, a second barrier layer and a bonding layer stacked in sequence, wherein the composite layer includes a first protective layer, a conductive layer and a second protective layer stacked in sequence.

[0101] The ohmic contact layer is a Cr layer with a thickness of 3 nm.

[0102] The reflective layer is an Al layer with a thickness of 100 nm.

[0103] The first barrier layer is a Ti layer with a thickness of 200 nm.

[0104] The first protective layer is composed of a Ni layer and a Cr layer stacked in sequence, and the thickness of the Ni layer and the Cr layer are both 100 nm.

[0105] The conductive layer is a Cu-Ni binary alloy layer, the mass proportion of Ni is 11%, and the thickness is 1300nm.

[0106] The second protective layer is composed of a Ni layer and a Cr layer stacked in sequence, and the thickness of the Ni layer and the Cr layer are both 100 nm.

[0107] The second barrier layer is a Ti layer with a thickness of 200 nm.

[0108] The bonding layer is an Au layer with a thickness of 400nm.

[0109] Comparative Example 1

[0110] This embodiment provides a chip electrode, including an ohmic contact layer, a reflective layer, a cladding layer and a bonding layer stacked in sequence.

[0111] The material of the ohmic contact layer is Cr, and the thickness is 3 nm.

[0112] The material of the reflective layer is Al, and the thickness is 100 nm.

[0113] The coating layer is composed of a Ti layer and a Pt layer that are periodically alternately stacked, the number of the alternating stacking periods is 3, the thickness of the Ti layer is 100 nm, and the thickness of the Pt layer is 80 nm.

[0114] The material of the bonding layer is Au, and the thickness is 1600nm.

[0115] The chip electrodes of Examples 1 to 7 and Comparative Example 1 were used in the upright LED chips. According to IEC 60068-2-67-2019, an aging test was performed at a temperature of 85°C, a humidity of 85%, and a current of 10mA, and the ratio of the number of failed chips to the total number of test chips was calculated. The results showed that the number of failed chips in the upright LED chips of Comparative Example 1 after 336h, 500h, and 1000h aging tests was 0.1%, 0.2%, and 0.5%, respectively. After 1000h aging tests, the number of failed chips in the upright LED chips of Examples 1 to 7 was 0. The chip electrodes of the embodiments of the present invention were used in upright LED chips and had excellent reliability under high temperature and high humidity.

[0116] The above is a preferred embodiment of the invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the invention. These improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A chip electrode, characterized in that: The invention comprises an ohmic contact layer, a reflective layer, a first barrier layer, a composite layer, a second barrier layer and a bonding layer which are stacked in sequence, wherein the composite layer comprises a conductive layer and a protective layer, wherein the protective layer is arranged between the first barrier layer and the conductive layer, and / or the protective layer is arranged between the conductive layer and the second barrier layer; The conductive layer is a Cu layer and / or a Cu alloy layer; the material of the protective layer is a metal whose standard electrode potential is lower than that of Cu.

2. The chip electrode according to claim 1, characterized in that: The thickness of the conductive layer is 1000nm-1500nm.

3. The chip electrode according to claim 1, characterized in that: In the Cu alloy, the alloy metal is a metal having a standard electrode potential lower than that of Cu; The alloy metal is one or more of Cr, Ti, Al, Ni, Zn, Sn, and Mg.

4. The chip electrode according to claim 3, characterized in that: The alloy metal accounts for 2% to 15% by mass.

5. The chip electrode according to claim 1, characterized in that: The protective layer includes any one or more combinations of a Cr layer, a Ti layer, an Al layer, a Ni layer, a Zn layer, a Sn layer, and a Mg layer.

6. The chip electrode according to claim 1, characterized in that: The thickness of the protective layer is 100nm to 300nm; the ratio of the thickness of the protective layer to the thickness of the conductive layer is 1:(3 to 6.5).

7. The chip electrode according to claim 1, characterized in that: The bonding layer includes any one or more combinations of Au layer, Al layer and Ag layer, and the thickness of the bonding layer is 3nm-500nm.

8. The chip electrode according to claim 1, characterized in that: The first barrier layer includes any one or more combinations of a Cr layer, a Ti layer, and a Ni layer, and the thickness of the first barrier layer is 100 nm to 800 nm; The second barrier layer includes any one or more combinations of a Cr layer, a Ti layer, and a Ni layer. The thickness of the second barrier layer is 100 nm to 800 nm.

9. The chip electrode according to claim 1, characterized in that: The ohmic contact layer includes any one or more combinations of a Cr layer, a Ti layer, and a Ni layer, and the thickness of the ohmic contact layer is 0.5 nm to 20 nm; The reflective layer includes any one or more combinations of an Al layer, an Ag layer, and a Mg layer, and the thickness of the reflective layer is 50 nm to 300 nm.

10. A front mounted LED chip, characterized in that: The front-mounted LED chip comprises the chip electrode as described in any one of claims 1 to 9.

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