Light-emitting chip, light-emitting substrate and display device

Abstract

The invention provides a light-emitting chip, a light-emitting substrate and a display device. The light-emitting chip comprises a pixel circuit layer, a light-emitting unit group located on one side of the pixel circuit layer and a plurality of conductive pads located on the side, away from the light-emitting units, of the pixel circuit layer. The pixel circuit layer comprises at least a part of structure of a pixel circuit and a plurality of signal lines. The light-emitting unit group comprises at least one light-emitting unit, and the light-emitting unit is electrically connected with the pixel circuit. And one conductive pad is electrically connected with one signal line. The light-emitting substrate comprises a plurality of light-emitting chips and a second driving circuit, and the plurality of conductive pads are connected with the second driving circuit. The display device comprises the light-emitting substrate.

Description

Light-emitting chip, light-emitting substrate, and display device Technical Field

[0001] The present application relates to the field of display technology, and in particular to a light-emitting chip, a light-emitting substrate and a display device. Background Art

[0002] Micro light-emitting diodes, including Mini LED and Micro LED, are approximately less than 500μm in size. Due to their smaller size, ultra-high brightness, long life and other advantages, their use in the display field has increased significantly.

[0003] Summary of the Invention

[0004] The present application provides a light-emitting chip, a light-emitting substrate, and a display device.

[0005] According to a first aspect of an embodiment of the present application, a light-emitting chip is provided, comprising:

[0006] a pixel circuit layer, the pixel circuit layer including at least a partial structure of a pixel circuit and a plurality of signal lines;

[0007] a light-emitting unit group located on one side of the pixel circuit layer, the light-emitting unit group including at least one light-emitting unit, the light-emitting unit being electrically connected to the pixel circuit;

[0008] A plurality of conductive pads are located on a side of the pixel circuit layer away from the light emitting unit, and one of the conductive pads is electrically connected to one of the signal lines.

[0009] In one embodiment, the light-emitting unit includes a first electrode and a second electrode, and the light-emitting chip further includes a first binding electrode and a second binding electrode located between the pixel circuit layer and the light-emitting unit; the first binding electrode is electrically connected to the pixel circuit and the first electrode; the second binding electrode is electrically connected to one of the signal lines and the second electrode.

[0010] In one embodiment, the light emitting chip further includes a first protective layer, wherein the first protective layer includes a first portion located on a side of the pixel circuit layer facing the light emitting unit and a second portion covering a side surface of the pixel circuit layer.

[0011] In one embodiment, the light-emitting chip further includes a first substrate located between the pixel circuit layer and the conductive pad, the first substrate being provided with a plurality of through holes, and one of the conductive pads being electrically connected to the signal line through one of the through holes;

[0012] The first protection layer further includes a third portion formed by the second portion extending toward one end of the first substrate and away from the pixel circuit layer, wherein the third portion contacts the first substrate.

[0013] In one embodiment, the light-emitting chip further includes a first substrate located between the pixel circuit layer and the conductive pad, the first substrate being provided with a plurality of through holes, and one of the conductive pads being electrically connected to the signal line through one of the through holes;

[0014] The light emitting chip further includes a second protective layer, and the second protective layer includes a fourth portion located on a side of the first substrate facing the conducting pad and a fifth portion covering a side surface of the first substrate.

[0015] In one embodiment, the pixel circuit layer is provided with an opening connected to the through hole, the light-emitting chip also includes a conductive structure located in the opening and the through hole, and the conductive pad is electrically connected to the signal line through the conductive structure; the second protective layer also includes a sixth part covering the side surface of the opening and the side surface of the through hole.

[0016] In one embodiment, the light-emitting chip further includes a first substrate located between the pixel circuit layer and the conductive pad, the first substrate being provided with a plurality of through holes, and one of the conductive pads being electrically connected to the signal line through one of the through holes; the first substrate includes a rigid substrate layer.

[0017] In one embodiment, the light-emitting chip further includes a first substrate located between the pixel circuit layer and the conductive pad, the substrate being provided with a plurality of through holes, one of the conductive pads being electrically connected to the signal line through one of the through holes; the first substrate includes at least two organic substrate layers.

[0018] In one embodiment, the light-emitting unit includes a first electrode and a second electrode, and the pixel circuit layer covers the first electrode and the second electrode; the pixel circuit layer includes a connecting wire, one end of the connecting wire is electrically connected to the pixel circuit, and the other end is overlapped with the first electrode.

[0019] In one embodiment, at least a portion of an orthographic projection of the structure of the pixel circuit on the light emitting unit is located between the first electrode and the second electrode.

[0020] In one embodiment, the orthographic projection of the structure of the pixel circuit in the pixel circuit on the plane where the surface of the first electrode is located at least partially falls within the surface of the first electrode; or, the orthographic projection of the structure of the pixel circuit in the pixel circuit on the plane where the surface of the second electrode is located at least partially falls within the surface of the second electrode.

[0021] In one embodiment, the pixel circuit layer includes a thin film transistor, and the thin film transistor includes an active layer;

[0022] When the orthographic projection of the pixel circuit on the plane where the surface of the first electrode is located at least partially falls within the surface of the first electrode, the orthographic projection of the active layer on the plane where the surface of the first electrode is located falls within the surface of the first electrode; when the orthographic projection of the pixel circuit on the plane where the surface of the second electrode is located at least partially falls within the surface of the second electrode, the orthographic projection of the active layer on the plane where the surface of the second electrode is located falls within the surface of the second electrode.

[0023] In one embodiment, the light emitting unit group includes at least two light emitting units emitting light of different colors, the second electrodes of at least two of the light emitting units are electrically connected, and the electrically connected second electrodes are electrically connected to one of the conducting pads.

[0024] In one embodiment, at least two of the light-emitting units share the second electrode.

[0025] In one embodiment, the light-emitting chip further includes a first driving circuit, the first driving circuit is configured to provide a driving signal to the pixel circuit, and the first driving circuit is electrically connected to the signal line.

[0026] In one embodiment, the light emitting unit includes a first electrode and a second electrode, and at least a portion of an orthographic projection of the structure of the pixel circuit in the pixel circuit layer on the light emitting unit is located between the first electrode and the second electrode.

[0027] In one embodiment, the light-emitting chip further includes a protective film layer located on a side of the light-emitting unit away from the pixel circuit layer.

[0028] In one embodiment, the light-emitting unit includes a light-emitting layer and an optical film layer located on a side of the light-emitting layer away from the pixel circuit layer.

[0029] In one embodiment, the light emitting unit is a Mini LED or a Micro LED.

[0030] According to a second aspect of an embodiment of the present application, a light-emitting substrate is provided. The light-emitting substrate includes a plurality of the above-mentioned light-emitting chips and a second driving circuit. The plurality of conductive pads are connected to the second driving circuit.

[0031] In one embodiment, the light-emitting substrate includes an encapsulation layer, and the encapsulation layer covers the side surfaces of each of the light-emitting chips and the light-emitting surfaces of the light-emitting chips.

[0032] According to a third aspect of the embodiments of the present application, a display device is provided, comprising the above-mentioned light-emitting substrate.

[0033] The light-emitting chip, light-emitting substrate and display device provided in the embodiments of the present application, the pixel circuit layer includes at least a partial structure of the pixel circuit and multiple signal lines, which can simplify the structure of the driving backplane used to drive the light-emitting chip and increase the selectivity of the driving backplane; the design of the driving backplane does not need to consider the density of the pixel circuit, which helps to improve the utilization rate of the substrate in the driving backplane. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] FIG1 is a cross-sectional view of a light-emitting chip provided by an exemplary embodiment of the present application;

[0035] FIG2 is a cross-sectional view of a light-emitting chip provided by another exemplary embodiment of the present application;

[0036] FIG3 is a cross-sectional view of a light-emitting chip provided by yet another exemplary embodiment of the present application;

[0037] FIG4 is a cross-sectional view of a light-emitting chip provided by another exemplary embodiment of the present application;

[0038] FIG5 is a block diagram of a light-emitting substrate provided by an exemplary embodiment of the present application;

[0039] FIG6 is a cross-sectional view of a light-emitting chip provided by another exemplary embodiment of the present application;

[0040] FIG7 is a schematic diagram of a partial structure of a light-emitting chip provided by an exemplary embodiment of the present application;

[0041] FIG8 is a cross-sectional view of a first intermediate structure of a light-emitting chip provided by an exemplary embodiment of the present application;

[0042] FIG9 is a cross-sectional view of a second intermediate structure of a light-emitting chip provided by an exemplary embodiment of the present application;

[0043] FIG10 is a cross-sectional view of a third intermediate structure of a light-emitting chip provided by an exemplary embodiment of the present application;

[0044] FIG11 is a cross-sectional view of a fourth intermediate structure of a light-emitting chip provided by an exemplary embodiment of the present application;

[0045] FIG12 is a cross-sectional view of a fifth intermediate structure of a light-emitting chip provided by an exemplary embodiment of the present application;

[0046] FIG13 is a cross-sectional view of a sixth intermediate structure of a light-emitting chip provided by an exemplary embodiment of the present application;

[0047] FIG14 is a cross-sectional view of a seventh intermediate structure of a light-emitting chip provided by an exemplary embodiment of the present application;

[0048] FIG15 is a cross-sectional view of an eighth intermediate structure of a light-emitting chip provided by an exemplary embodiment of the present application;

[0049] FIG16 is a cross-sectional view of a ninth intermediate structure of a light-emitting chip provided by an exemplary embodiment of the present application;

[0050] FIG17 is a cross-sectional view of a tenth intermediate structure of a light-emitting chip provided by an exemplary embodiment of the present application;

[0051] FIG18 is a cross-sectional view of an eleventh intermediate structure of a light-emitting chip provided by an exemplary embodiment of the present application;

[0052] FIG19 is a cross-sectional view of an eleventh intermediate structure of a light-emitting chip provided by another exemplary embodiment of the present application;

[0053] FIG20 is a cross-sectional view of a twelfth intermediate structure of a light-emitting chip provided by an exemplary embodiment of the present application;

[0054] FIG21 is a partial cross-sectional view of the twelfth intermediate structure shown in FIG20;

[0055] FIG22 is a cross-sectional view of a partial structure of a light-emitting substrate provided by an exemplary embodiment of the present application. DETAILED DESCRIPTION

[0056] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.

[0057] The terms used in this application are for the purpose of describing specific embodiments only and are not intended to limit this application. As used in this application and the appended claims, the singular forms "a," "an," "the," and "the" are intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0058] It should be understood that although the terms first, second, third, etc. may be used in this application to describe various information, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from each other. For example, without departing from the scope of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0059] The embodiments of the present application provide a light-emitting chip, a light-emitting substrate, and a display device. The light-emitting chip, light-emitting substrate, and display device in the embodiments of the present application are described in detail below with reference to the accompanying drawings. The features of the following embodiments may complement or be combined with each other unless they conflict.

[0060] The embodiment of the present application provides a light-emitting chip. As shown in FIG. 1 to FIG. 4 , the light-emitting chip includes a pixel circuit layer 10 , a light-emitting unit group, and a plurality of conductive pads 30 .

[0061] The pixel circuit layer 10 includes at least part of the structure of the pixel circuit and a plurality of signal lines 101. A light-emitting unit group is located on one side of the pixel circuit layer 10, and the light-emitting unit group includes at least one light-emitting unit 20, and the light-emitting unit 20 is electrically connected to the pixel circuit. The plurality of conductive pads 30 are located on the side of the pixel circuit layer 10 away from the light-emitting unit 20, and one conductive pad 30 is electrically connected to one signal line 101. The signal line 101 may include a constant voltage signal line and a driving signal line for providing a driving signal to the pixel circuit. For example, the constant voltage signal line may include a high-level power line, a low-level power line, a ground line, etc., and the driving signal line may include a scanning signal line, a data signal line, a reset signal line, a light-emitting control signal line, etc. The conductive pad 30 is used to electrically connect to the driving circuit in the driving backplane that drives the pixel circuit, so that the driving backplane can provide a signal to the signal line through the conductive pad 30.

[0062] The light-emitting chip provided in the embodiment of the present application includes a pixel circuit layer, which includes at least a partial structure of the pixel circuit and multiple signal lines. It can simplify the structure of the driving backplane used to drive the light-emitting chip and increase the selectivity of the driving backplane. The design of the driving backplane does not need to consider the density of the pixel circuit, which helps to improve the utilization rate of the substrate in the driving backplane.

[0063] In one embodiment, the light-emitting chip further includes a first driver circuit configured to provide a drive signal to the pixel circuit, the first driver circuit being electrically connected to the signal line. The first driver circuit may be, for example, a gate driver circuit, a source driver circuit, or the like. This configuration can reduce the number of conductive pads on the light-emitting chip.

[0064] In one embodiment, the pixel circuit includes a plurality of transistors and at least one capacitor. For example, the pixel circuit may be a 7T1C circuit, an 11T3C circuit, a 2T1C circuit, a 7T2C circuit, etc.

[0065] In one embodiment, the entire structure of the pixel circuit is located in the pixel circuit layer. In another embodiment, part of the structure of the pixel circuit is located in the pixel circuit layer, and the other part of the structure may be located in the driving backplane used to drive the light-emitting chip. When the light-emitting chip is transferred to the driving backplane, the structure of the pixel circuit located in the light-emitting chip is bonded to the structure of the pixel circuit located in the driving backplane. As shown in Figure 5, the light-emitting substrate 100 where the light-emitting chip is located includes a light-emitting chip 110 and a driving backplane 120. The pixel circuit used to drive the light-emitting unit 20 includes a first circuit structure 102 located in the light-emitting chip 110 and a second circuit structure 122 located in the driving backplane 120. The first circuit structure 102 and the second circuit structure 122 are electrically connected. The first circuit structure 102 and the second circuit structure 122 can both be connected to the conductive pad 30, so that the first circuit structure 102 and the second circuit structure 122 are electrically connected through the conductive pad 30. The driving backplane 120 includes a second driving circuit 121, which is electrically connected to the conductive pad 30 of the light-emitting chip 110 and is used to provide a driving signal to the conductive pad 30.

[0066] In one embodiment, the pixel circuits and the light emitting units may correspond one to one, and each pixel circuit drives the corresponding light emitting unit.

[0067] In one embodiment, as shown in Figures 1 to 4, the pixel circuit includes a thin film transistor 11, which includes an active layer 111, a gate 112, a first electrode 113, and a second electrode 114. One of the first electrode 113 and the second electrode 114 is a source electrode, and the other is a drain electrode. The first electrode 113 and the second electrode 114 are arranged in the same layer. The first electrode 113 is electrically connected to the first electrode 21 of the light-emitting unit 20. The material of the active layer 111 can be a low-temperature polysilicon material or a metal oxide semiconductor material.

[0068] In some implementations, the light emitting unit 20 may be a Mini LED or a Micro LED. The size of a Mini LED is approximately 100 μm to 500 μm, and the size of a Micro LED is less than 100 μm.

[0069] In one embodiment, as shown in Figures 1 and 2, the light-emitting unit 20 includes a first electrode 21 and a second electrode 22. The light-emitting chip also includes a first binding electrode 51 and a second binding electrode 52 located between the pixel circuit layer 10 and the light-emitting unit 20. The first binding electrode 51 is electrically connected to the pixel circuit, and the first electrode 21 is electrically connected to the first binding electrode 51. The second binding electrode 52 is electrically connected to one of the signal lines 101, and the second electrode 22 is electrically connected to the second binding electrode 52. One of the first electrode 21 and the second electrode 22 is an anode, and the other is a cathode. In this embodiment, during the process of manufacturing the light-emitting chip, an intermediate structure including the pixel circuit layer, the first binding electrode and the second binding electrode, and the light-emitting unit are first prepared. Then, the first electrode 21 of the light-emitting unit 20 is bonded to the first binding electrode 51 of the intermediate structure, and the second electrode 22 is bonded to the second binding electrode 52 of the intermediate structure, thereby obtaining the light-emitting chip.

[0070] In one embodiment, as shown in Figures 1 and 2, the gate 112 is located on the side of the active layer 111 facing the light-emitting unit 20. The pixel circuit layer 10 further includes a gate insulating layer 12 located between the active layer 111 and the gate 112, an interlayer dielectric layer 13 located on the side of the gate 112 facing away from the active layer 111, a passivation layer 14 located on the side of the interlayer dielectric layer 13 facing away from the active layer 111, and a planarization layer 15 located on the side of the passivation layer 14 facing away from the active layer 111. The first electrode 113 and the second electrode 114 are partially located between the planarization layer 15 and the passivation layer 14, and partially located within a through hole that penetrates the gate insulating layer 12, the interlayer dielectric layer 13, and the passivation layer 14, and contact the conductive active layer 111. One of the first electrode 113 and the second electrode 114 is a source electrode, and the other is a drain electrode. The first electrode 21 is electrically connected to the first electrode 113 via a through hole that penetrates the planarization layer 15.

[0071] 1 and 2 , the light emitting chip further includes a first substrate 40 located on a side of the pixel circuit layer 10 away from the light emitting unit 20 . The pixel circuit layer 10 is formed on one side of the first substrate 40 .

[0072] In one embodiment, as shown in FIG. 1 , the first substrate 40 is located between the pixel circuit layer 10 and the conductive pad 30 . The first substrate 40 is provided with a plurality of through holes 401 . One conductive pad 30 is electrically connected to the signal line 101 through one through hole 401 .

[0073] In one embodiment, as shown in FIG1 , the pixel circuit layer 10 is provided with an opening 16 connected to the through hole 401 , the light-emitting chip further includes a conductive structure 91 located within the opening 16 and the through hole 401 , and the conductive pad 30 is electrically connected to the signal line 101 through the conductive structure 91 .

[0074] In one embodiment, as shown in FIG1 , the pixel circuit layer 10 further includes a connection structure 17, which is located between the signal line 101 and the conductive structure 91. At least one signal line 101 is electrically connected to the conductive structure 91 via the connection structure 17. The connection structure 17 can be provided in the same layer as the conductive structure included in the pixel circuit, for example, can be provided in the same layer as the gate 112.

[0075] In one embodiment, as shown in FIG2 , the conductive pad 30 may be located within a through-hole 401 of the first substrate 40 , with the conductive pad 30 exposed to the through-hole 401 on a surface facing away from the light-emitting unit 20 . The light-emitting chip further includes a fan-out line 92 located between the first substrate 40 and the pixel circuit layer 10 . The fan-out line 92 overlaps the conductive pad 30 , and the signal line 101 is electrically connected to the fan-out line 92 , thereby electrically connecting the signal line 101 to the conductive pad 30 via the fan-out line 92 .

[0076] Furthermore, as shown in FIG. 2 , the light-emitting chip further includes an insulating layer 43 located between the fan-out line 92 and the first substrate 40 .

[0077] In one embodiment, as shown in FIG1 , the light-emitting chip further includes a first protective layer 60 . The first protective layer 60 includes a first portion 61 located on the side of the pixel circuit layer 10 facing the light-emitting unit 20 and a second portion 62 covering the side of the pixel circuit layer 10 . The first portion 61 is connected to the second portion 62 . The first protective layer 60 can prevent water and oxygen from invading the conductive structure of the pixel circuit in the pixel circuit layer 10 , thereby helping to improve the reliability of the light-emitting chip. The first portion 61 has an opening. The first binding electrode 51 is electrically connected to the first electrode 21 through the opening of the first portion 61 , and the second binding electrode 52 is electrically connected to the second electrode 22 through the opening of the first portion 61 .

[0078] In one embodiment, the first protective layer 60 is made of an inorganic material, for example, at least one of silicon oxide and silicon nitride. The thickness of the first protective layer 60 is greater than or equal to 1000 angstroms, which improves the barrier effect of the first protective layer 60 on water and oxygen. In some embodiments, the thickness of the first protective layer 60 can be greater than or equal to 3000 angstroms.

[0079] In one embodiment, the first protective layer 60 further includes a third portion 63 extending from the second portion 62 toward one end of the first substrate 40 and away from the pixel circuit layer 10. The third portion 63 is in contact with the first substrate 40. The third portion 63 effectively blocks water and oxygen from invading the conductive structure of the pixel circuit layer 10 through the gap between the first substrate 40 and the pixel circuit layer 10, further enhancing the water and oxygen blocking effect of the first protective layer 60.

[0080] Furthermore, the width of the third portion 63 may be greater than or equal to 1.7 μm. Due to process variations, during the preparation of the first protective layer 60, the second portion 62 may not fully cover the side surfaces of the pixel circuit layer 10. By setting the width of the third portion 63 to be greater than or equal to 1.7 μm, the first protective layer 60 can be ensured to fully cover the side surfaces of the pixel circuit layer 10 even under maximum process variations.

[0081] In one embodiment, as shown in FIG1 , the light-emitting chip further includes a second protective layer 70. The second protective layer 70 includes a fourth portion 71 located on the side of the first substrate 40 facing away from the light-emitting unit 20 and a fifth portion 72 covering the side of the first substrate 40. The fourth portion 71 is connected to the fifth portion 72. The second protective layer 70 prevents water and oxygen from invading the pixel circuit layer 10 through the first substrate 40, further improving the reliability of the light-emitting chip.

[0082] As shown in FIG1 , the conductive pad 30 is located on a side of the first substrate 40 facing away from the light-emitting unit 20, and the fourth portion 71 is located on a side of the first substrate 40 facing the conductive pad 30. The fourth portion 71 has an opening, and the conductive pad 30 is electrically connected to the conductive structure 91 through the opening of the fourth portion 71. When the conductive pad 30 is located within the through-hole 401 of the first substrate 40, the fourth portion 71 has an opening, and the surface of the conductive pad 30 is exposed through the opening of the fourth portion 71.

[0083] In one embodiment, as shown in FIG1 , the second protective layer 70 further includes a sixth portion 73 that covers the side surfaces of the opening 16 and the side surfaces of the through-hole 401. The sixth portion 73 prevents water and oxygen from invading the pixel circuit layer 10 through the gaps between the conductive structure 91 and the side surfaces of the opening 16 and the through-hole 401, thereby further enhancing the water and oxygen blocking effect of the second protective layer 70.

[0084] In one embodiment, the second protective layer 70 is made of an inorganic material, such as at least one of silicon oxide and silicon nitride. The thickness of the second protective layer 70 is greater than or equal to 1000 angstroms, which improves the barrier effect of the second protective layer 70 on water and oxygen. In some embodiments, the thickness of the second protective layer 70 can be greater than or equal to 3000 angstroms.

[0085] In one embodiment, as shown in FIG. 1 and FIG. 2 , the light emitting chip further includes a barrier layer 41 and a buffer layer 42 located between the first substrate 40 and the pixel circuit layer 10 . The buffer layer 42 is located on a side of the barrier layer 41 away from the first substrate 40 .

[0086] In one embodiment, as shown in FIG6 , a light-emitting chip is obtained by transferring a light-emitting unit to a pixel circuit layer 10 , and the first substrate 40 includes a rigid substrate layer 403 . After the light-emitting unit is transferred to the pixel circuit layer, die bonding is required. With this arrangement, the first substrate 40 has greater rigidity, providing better support for the structure above it during the bonding process, thereby improving the yield of the die bonding process. It also avoids the problem of uneven pressure on the first substrate during the die bonding process due to the low hardness of the first substrate, which in turn can cause failure of the pixel circuit structure of the pixel circuit layer.

[0087] In some embodiments, the rigid substrate layer includes any one of a glass substrate layer, a quartz substrate layer, a sapphire substrate layer, a silicon substrate, and the like.

[0088] In some embodiments, as shown in FIG6 , the first substrate 40 may further include a flexible substrate layer 402. The flexible substrate layer 402 may be located on the side of the rigid substrate layer 403 facing the light-emitting unit 20. The flexible substrate layer 402 may improve the adhesion between the pixel circuit layer 10 and the rigid substrate. The material of the flexible substrate layer 402 may include one or more of polyimide, polyethylene terephthalate, polycarbonate, and an organic resin material. The organic resin material may include epoxy resin, triazine, silicone resin, or polyimide.

[0089] To verify the die-bonding yield of light-emitting chips when the first substrate 40 comprises a rigid substrate, 30 light-emitting chips were tested. Fifteen of these chips had a rigid substrate layer as their first chip, while the remaining 15 chips had only a flexible substrate layer. The following test results were obtained: when the first substrate 40 comprised a rigid substrate layer, die-bonding met the requirements for 14 of the 15 chips; when the first substrate 40 comprised only a flexible substrate layer, only 9 of the 15 chips met the requirements. This indicates that a rigid substrate effectively improves the die-bonding yield of light-emitting chips.

[0090] In another embodiment, when the light-emitting chip is obtained by transferring the light-emitting unit to the pixel circuit layer 10, the first substrate 40 includes at least two organic substrate layers. After the light-emitting unit is transferred to the pixel circuit layer, die bonding is required. The inclusion of at least two organic substrate layers in the first substrate 40 increases the rigidity of the first substrate 40, improving the yield of the die bonding process while also avoiding failure of the pixel circuit structure of the pixel circuit layer during the die bonding process. Furthermore, compared to solutions in which the first substrate 40 includes a rigid substrate layer, it is easier to create through-holes in the first substrate 40, which helps reduce the difficulty of the manufacturing process and improves the toughness of the overall structure of the light-emitting chip.

[0091] In one embodiment, the pixel circuit layer can be formed on the light-emitting chip. As shown in Figures 3 and 4, the pixel circuit layer 10 covers the first electrode 21 and the second electrode 22; the pixel circuit layer 10 includes a connecting wire 93, one end of which is electrically connected to the pixel circuit, and the other end is overlapped with the first electrode 21. The connecting wire 93 can overlap the second electrode 114 of the thin-film transistor 11. In this arrangement, the first electrode 21 is electrically connected to the pixel circuit through the connecting wire 93, and no binding is required, so there is no need to set a binding electrode, which helps to improve the yield of the light-emitting chip and simplify the preparation process; since the pixel circuit layer 10 is formed on the light-emitting unit 20, there is no need to set the first substrate 40, which helps to reduce the thickness of the light-emitting chip. The connecting wire 93 can be set on the same layer as the second electrode 114, that is, the two are formed in the same process step, which helps to simplify the preparation process.

[0092] In one embodiment, as shown in FIG3 , at least a portion of the orthographic projection of the pixel circuit structure in the pixel circuit layer 10 on the light-emitting unit 20 is located between the first electrode 21 and the second electrode 22. In some embodiments, when the gap between the first electrode 21 and the second electrode 22 is sufficiently large, the orthographic projection of the pixel circuit structure in the pixel circuit layer on the light-emitting unit 20 can be entirely located between the first electrode 21 and the second electrode 22. This configuration helps reduce the overall thickness of the light-emitting chip.

[0093] In another embodiment, as shown in FIG4 , the orthographic projection of the pixel circuit structure in the pixel circuit layer 10 on the plane where the surface of the second electrode 22 is located at least partially falls within the surface of the second electrode 22. In other embodiments, the orthographic projection of the pixel circuit structure in the pixel circuit layer 10 on the plane where the surface of the first electrode 21 is located at least partially falls within the surface of the first electrode 21. This configuration helps reduce the size of the light-emitting chip and, given a given size of the light-emitting substrate on which the light-emitting chip is located, helps increase the number of light-emitting chips in the light-emitting substrate.

[0094] Furthermore, as shown in FIG4 , the orthographic projection of the pixel circuit on the plane where the surface of the second electrode 22 lies at least partially within the surface of the second electrode 22, and the orthographic projection of the active layer 111 of the thin-film transistor 11 on the plane where the surface of the second electrode 22 lies falls within the surface of the second electrode 22. In other embodiments, the orthographic projection of the pixel circuit on the plane where the surface of the first electrode 21 lies at least partially within the surface of the first electrode 21, and the orthographic projection of the active layer 111 of the thin-film transistor 11 on the plane where the surface of the first electrode 21 lies falls within the surface of the first electrode 21. This configuration prevents discontinuities between different portions of the active layer 111 from affecting the characteristics of the thin-film transistor. In some embodiments, when the first electrode 21 is sufficiently large, the orthographic projection of the pixel circuit structure in the pixel circuit layer 10 on the plane where the surface of the first electrode 21 lies can fall entirely on the surface of the first electrode 21; alternatively, when the second electrode 22 is sufficiently large, the orthographic projection of the pixel circuit structure in the pixel circuit layer 10 on the plane where the surface of the second electrode 22 lies can fall entirely on the surface of the second electrode 22.

[0095] In one embodiment, the light-emitting unit group includes at least two light-emitting units 20 emitting light of different colors, and the second electrodes 22 of at least two of the light-emitting units 20 are electrically connected, and the electrically connected second electrodes 22 are electrically connected to one of the conductive pads 30. This configuration can save the number of conductive pads 30, helping to simplify the manufacturing process. In some embodiments, the second electrodes 22 of each of the light-emitting units 20 in the light-emitting unit group are electrically connected to the same conductive pad 30, which can further reduce the number of conductive pads 30.

[0096] In one embodiment, at least two of the light-emitting units 20 share the second electrode 22. This reduces the number of second electrodes 22 on the conductive pad 30, helping to reduce the size of the light-emitting chip and simplifying the manufacturing process. In some embodiments, each light-emitting unit 20 in the light-emitting unit group shares a single second electrode 22. As shown in FIG7 , the light-emitting chip includes three light-emitting units, and the three light-emitting units share the second electrode 22.

[0097] In one embodiment, the light emitting unit group includes light emitting units 20 of three luminous colors, namely, a light emitting unit 20 of red luminous color, a light emitting unit 20 of green luminous color, and a light emitting unit 20 of blue luminous color.

[0098] In one embodiment, when the at least two light-emitting units 20 share the second electrode 22, at least a portion of the orthographic projection of the pixel circuit on the light-emitting unit is located between the first electrode 21 and the second electrode 22. When at least two light-emitting units 20 share the second electrode 22, the total area of ​​the second electrodes 22 of all light-emitting units 20 is reduced. Under the premise of a certain size of the light-emitting chip, the distance between the first electrode 21 and the second electrode 22 can be increased, so that at least a portion of the orthographic projection of the pixel circuit on the light-emitting unit can be located between the first electrode 21 and the second electrode 22.

[0099] In one embodiment, when the light-emitting unit group includes at least two light-emitting units 20 emitting light of different colors, the light-emitting chip further includes a first driving circuit. With this configuration, each light-emitting unit in the light-emitting unit group can share the first driving circuit, thereby reducing the number of conductive pads on the light-emitting chip without significantly increasing the size of the light-emitting chip.

[0100] In one embodiment, as shown in Figures 1 to 4, the light-emitting chip further includes a protective layer 80 located on the side of the light-emitting unit 20 away from the pixel circuit layer 10. The protective layer 80 can protect the light-emitting unit 20. The light transmittance of the protective layer 80 is relatively high, and most of the light emitted by the light-emitting unit 20 can be emitted through 80. The material of the protective layer 80 can be, for example, glass, or the material of the protective layer 80 includes PET (Polyethylene terephthalate), PC (Polycarbonate), etc. In this way, the light transmittance of the protective layer 80 can be relatively high, and the hardness of the protective layer 80 can be relatively high, thereby improving the pressure resistance and anti-collision ability of the light-emitting chip, and better protecting the underlying film layer and the light-emitting unit.

[0101] In one embodiment, the light emitting unit 20 is formed on the protective layer 80 . That is, the protective layer 80 serves as a substrate during the preparation of the light emitting unit 20 and can also protect the light emitting unit 20 .

[0102] In one embodiment, as shown in FIG6 , the light-emitting unit 20 further includes a light-emitting layer 23, which includes a first semiconductor layer 231, a quantum well layer 232 located on the side of the first semiconductor layer 231 facing away from the pixel circuit layer 10, and a second semiconductor layer 233 located on the side of the quantum well layer 232 facing away from the pixel circuit layer 10. The first electrode 21 contacts the second semiconductor layer 233, and the second electrode 22 contacts the first semiconductor layer 231. The first electrode 21 and the second electrode 22 are located on the same side of the second semiconductor layer 233. One of the first semiconductor layer 231 and the second semiconductor layer 233 is an N-type semiconductor layer, and the other is a P-type semiconductor layer. For example, when the first electrode 21 is a cathode and the second electrode 22 is an anode, the first semiconductor layer 231 is a P-type semiconductor layer, and the second semiconductor layer 233 is an N-type semiconductor layer.

[0103] In one embodiment, as shown in FIG6 , the first electrode 21 includes a first sub-electrode 211 and a second sub-electrode 212 located on the side of the first sub-electrode 211 facing the pixel circuit layer 10. The second electrode 22 includes a third sub-electrode 221 and a fourth sub-electrode 222 located on the side of the third sub-electrode 221 facing the pixel circuit layer 10. The light-emitting unit 20 also includes an insulating layer 26. The insulating layer 26 covers the first sub-electrode 211, the first semiconductor layer 231, the quantum well layer 232, and the side surfaces of the third sub-electrode 221, and covers the side of the second semiconductor layer 233 facing the pixel circuit layer 10. The second sub-electrode 212 is electrically connected to the first sub-electrode 211 through a via hole defined in the insulating layer 26. The fourth sub-electrode 222 is electrically connected to the third sub-electrode 221 through a via hole defined in the insulating layer 26. The second sub-electrode 212 is bound to the first binding electrode 51, and the fourth sub-electrode 222 is bound to the second binding electrode 52.

[0104] In one embodiment, as shown in FIG6 , the light emitting unit 20 further includes an optical film layer 27 located on a side of the light emitting layer 23 away from the pixel circuit layer 10 .

[0105] In one embodiment, the optical film layer 27 includes a quantum dot layer 271, which can change the color of the light emitted by the light-emitting layer 23. For example, the quantum dot layer 271 can convert the blue light emitted by the light-emitting layer 23 into green light or red light, thereby realizing color display of the display substrate where the light-emitting chip is located.

[0106] In one embodiment, the optical film layer 27 includes a scattering film layer 272 . The scattering film layer 272 can enhance the scattering degree of the light emitted by the light-emitting unit 20 and increase the viewing angle of the light-emitting chip.

[0107] In one embodiment, the light-emitting unit 20 includes a light-emitting region and a non-light-emitting region. The quantum dot layer 271 and the scattering film layer 272 are located in the light-emitting region. The optical film layer 27 also includes a light-regulating layer 273 located in the non-light-emitting region. The light-regulating layer 273 has low light transmittance and can be a black film layer. For example, the light-regulating layer 273 can be coated with a resin material with low transmittance. The light-regulating layer 273 effectively reduces the reflectivity of ambient light incident on the light-emitting chip, thereby improving the user experience.

[0108] In one embodiment, the light-emitting chip further includes a bonding layer 24 and a buffer film layer 25 located on a side of the bonding layer 24 facing away from the light-emitting layer 23. The optical film layer 27 is located on a side of the buffer film layer 25 facing away from the light-emitting layer 23. The buffer film layer 25 and the light-emitting layer 23 are bonded via the bonding layer 24. The bonding layer 24 may be a u-GaN bonding layer.

[0109] In one embodiment, at least a portion of the signal line 101 is disposed in the same layer as the structure of the pixel circuit in the pixel circuit layer, which helps to simplify the manufacturing process of the light-emitting chip.

[0110] In one embodiment, the material of the conductive pad 30 may include at least one of Sn, SnAg alloy, and In.

[0111] The present application also provides a method for preparing a light-emitting chip. The method is used to prepare a light-emitting chip as shown in FIG1 or FIG6. The method comprises the following steps:

[0112] First, a first intermediate structure as shown in FIG8 and a second intermediate structure as shown in FIG9 are formed. The first intermediate structure includes a second substrate 97, a first substrate 40 located on the second substrate 97, a pixel circuit layer 10 located on a side of the first substrate 40 facing away from the second substrate 97, and first and second binding electrodes 51 and 52 located on a side of the pixel circuit layer 10 facing away from the first substrate 40. The second intermediate structure includes a protective layer 80 and a light-emitting unit 20 located on one side of the protective layer 80.

[0113] Subsequently, the first intermediate structure is bonded to the second intermediate structure, so that the first electrode 21 is bonded to the first binding electrode 51 , and the second electrode 22 is bonded to the second binding electrode 52 , thereby obtaining a third intermediate structure as shown in FIG. 10 .

[0114] Subsequently, the second substrate 97 is peeled off to obtain the fourth intermediate structure shown in FIG. 11 .

[0115] Subsequently, a through hole 401 is formed on the first substrate 40, and a conductive structure in the through hole 401 and a conductive pad 30 on the side of the first substrate away from the pixel circuit layer 10 are prepared to obtain the light-emitting chip shown in FIG. 6 or FIG. 1 .

[0116] In one embodiment, in the process of preparing the first intermediate structure, a pixel circuit film layer can be first formed on the substrate, and the pixel circuit film layer includes at least a partial structure of multiple pixel circuits; then the insulating layer of the pixel circuit film layer is etched to obtain multiple spaced pixel circuit layers; then the first substrate is cut to obtain the first intermediate structure as shown in Figure 8.

[0117] In one embodiment, after etching the insulating layer of the pixel circuit film layer, a first protective layer may be formed, where the first protective layer covers a side of the pixel circuit layer facing away from the first substrate and a side portion of the pixel circuit layer.

[0118] In one embodiment, after forming the through hole 401 on the first substrate 40 , a second protective layer may be formed to cover the side of the first substrate 40 facing away from the first pixel circuit layer 10 , the side surface of the first substrate 40 and the side surface of the through hole 401 .

[0119] In one embodiment, the protective layer 80 in the second intermediate structure is relatively large, for example, 4 inches in size. The second intermediate structure may include multiple light-emitting unit groups located on the protective layer 80. After forming the conductive pad 30, the fifth intermediate structure shown in FIG12 is obtained. The protective layer 80 of the fifth intermediate structure is then thinned and cut to obtain the light-emitting chip shown in FIG1 and FIG6.

[0120] The present application also provides another method for preparing a light-emitting chip. The method for preparing a light-emitting chip is used to prepare the light-emitting chip shown in FIG1 or FIG6. The method for preparing the light-emitting chip comprises the following steps:

[0121] First, a sixth intermediate structure as shown in FIG13 and a seventh intermediate structure as shown in FIG14 are formed. The sixth intermediate structure includes a second substrate 97, a first substrate 40 located on the second substrate 97, a pixel circuit layer 10 located on the side of the first substrate 40 facing away from the second substrate 97, and a first binding electrode 51 and a second binding electrode 52 located on the side of the pixel circuit layer 10 facing away from the first substrate 40. The first substrate 40 is provided with a through hole 401, and a conductive structure 91 is formed in the through hole 401. The seventh intermediate structure includes a protective layer 80 and a light-emitting unit 20 located on one side of the protective layer 80.

[0122] Subsequently, the sixth intermediate structure is bonded to the seventh intermediate structure, so that the first electrode 21 is bonded to the first binding electrode 51 , and the second electrode 22 is bonded to the second binding electrode 52 , thereby obtaining the eighth intermediate structure shown in FIG. 15 .

[0123] Subsequently, the second substrate 97 is peeled off to obtain the ninth intermediate structure shown in FIG. 16 .

[0124] Subsequently, a conducting pad 30 is formed on the side of the first substrate 40 away from the pixel circuit layer 10 , thereby obtaining the light-emitting chip as shown in FIG. 6 or FIG. 1 .

[0125] In one embodiment, the seventh intermediate structure includes multiple light-emitting unit groups located on a protective layer 80. After forming the conductive pad 30, the fifth intermediate structure shown in FIG12 is obtained. After thinning the protective layer 80 of the fifth intermediate structure and cutting the protective layer 80, the light-emitting chip shown in FIG1 and FIG6 can be obtained.

[0126] The present application also provides another method for preparing a light-emitting chip, which is used to prepare the light-emitting chip shown in FIG3 or FIG4. The method for preparing the light-emitting chip includes the following steps:

[0127] First, the light emitting unit 20 is formed on the protective layer 80 , with the first electrode 21 and the second electrode 22 of the light emitting unit 20 facing away from the protective layer 80 , thereby obtaining a tenth intermediate structure as shown in FIG. 17 .

[0128] Subsequently, a pixel circuit layer 10 is formed on the side of the ninth intermediate structure facing away from the protective layer 80 , thereby obtaining an eleventh intermediate structure as shown in FIG. 18 or FIG. 19 .

[0129] Subsequently, a conducting pad 30 is formed on the side of the pixel circuit layer 10 facing away from the protective layer 80 to obtain a light-emitting chip as shown in FIG. 3 or FIG. 4 .

[0130] In one embodiment, the preparation process of the tenth intermediate structure may be as follows:

[0131] First, as shown in Figures 20 and 21 , multiple wafers 95 are mounted on the protective layer 80 , each wafer 95 including a light-emitting layer of each light-emitting unit in a light-emitting unit group. This step results in the twelfth intermediate structure shown in Figures 20 and 21 .

[0132] Subsequently, a first electrode 21 and a second electrode 22 are formed on the side of the wafer 95 facing away from the protective layer 80 to obtain the tenth intermediate structure shown in FIG17 . In the tenth intermediate structure, at least two light emitting units 20 in the same light emitting unit group can share the second electrode 22 .

[0133] The embodiment of the method for preparing the light-emitting substrate provided in the embodiment of the present application and the embodiment of the light-emitting substrate belong to the same inventive concept, and the description of relevant details and beneficial effects can be referred to each other, and will not be repeated here.

[0134] The present application also provides a light-emitting substrate comprising a plurality of light-emitting chips according to any of the above embodiments and a second driving circuit, wherein the plurality of conductive pads are connected to the second driving circuit. The second driving circuit is configured to provide a driving signal to a pixel circuit of the light-emitting chip.

[0135] In one embodiment, as shown in FIG22 , the light-emitting substrate further includes a driving backplane 120 , the second driving circuit is located on the driving backplane 120 , and the light-emitting chip is bonded to the driving backplane 120 , thereby electrically connecting the plurality of conductive pads to the second driving circuit.

[0136] In one embodiment, the light emitting substrate further includes a third substrate 96 , and the driving backplane 120 is located on the third substrate 96 .

[0137] In one embodiment, as shown in FIG22 , the light-emitting substrate includes an encapsulation layer 94 , which covers the side surfaces of each light-emitting chip and the light-emitting surface of the light-emitting chip. The encapsulation layer 94 can protect the light-emitting chip.

[0138] In one embodiment, as shown in FIG22 , the encapsulation layer 94 includes a first sub-encapsulation layer 941 that at least covers the side surfaces of the light-emitting chip, and a second sub-encapsulation layer 942 located on the side of the first sub-encapsulation layer 941 facing away from the driver backplane 120. The transmittance of the first sub-encapsulation layer 941 can be lower than that of the second sub-encapsulation layer 942. The first sub-encapsulation layer 941 can prevent light crosstalk between adjacent light-emitting chips. The first sub-encapsulation layer 941 can be black and may include a black film layer. The second sub-encapsulation layer 942 can be gray or black to enhance the blackness of the light-emitting substrate when not in use.

[0139] An embodiment of the present application further provides a display device, which includes the light-emitting substrate described in any of the above embodiments.

[0140] In some embodiments, the display device may be a liquid crystal display device, which includes a liquid crystal panel and a backlight source disposed on a non-display side of the liquid crystal panel, wherein the backlight source includes the above-mentioned light-emitting substrate.

[0141] In another embodiment, the light-emitting substrate in the display device is used as a display substrate. When the light-emitting substrate is used as a display substrate, each light-emitting chip serves as a sub-pixel.

[0142] In one embodiment, the display device further includes a housing, and the light-emitting substrate is embedded in the housing.

[0143] The display device provided in the embodiments of the present application may be any appropriate display device, including but not limited to mobile phones, tablet computers, televisions, monitors, laptop computers, digital photo frames, navigators, e-books, and any other products or components with display functions.

[0144] The display device provided in the embodiments of the present application may be any appropriate display device, including but not limited to mobile phones, tablet computers, televisions, monitors, laptop computers, digital photo frames, navigators, e-books, and any other products or components with display functions.

[0145] It should be noted that in the accompanying drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. It will also be understood that when an element or layer is referred to as being "on" another element or layer, it may be directly on the other element, or there may be an intermediate layer. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it may be directly under the other element, or there may be more than one intermediate layer or element. In addition, it will also be understood that when a layer or element is referred to as being "between" two layers or elements, it may be the only layer between the two layers or elements, or there may also be more than one intermediate layer or element. Similar reference numerals throughout the text indicate similar elements.

[0146] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the contents disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0147] It should be understood that the present application is not limited to the exact structures described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A light-emitting chip, characterized in that: The light emitting chip comprises: A pixel circuit layer, the pixel circuit layer including at least a partial structure of a pixel circuit and a plurality of signal lines; A light emitting unit group located at one side of the pixel circuit layer, the light emitting unit group comprising at least one light emitting unit, and the light emitting unit is electrically connected to the pixel circuit; A plurality of conducting pads are located on a side of the pixel circuit layer away from the light emitting unit, and one of the conducting pads is electrically connected to one of the signal lines.

2. The light-emitting chip according to claim 1, characterized in that: The light-emitting unit includes a first electrode and a second electrode, and the light-emitting chip also includes a first binding electrode and a second binding electrode located between the pixel circuit layer and the light-emitting unit; the first binding electrode is electrically connected to the pixel circuit and the first electrode; the second binding electrode is electrically connected to one of the signal lines and the second electrode.

3. The light-emitting chip according to claim 2, characterized in that: The light emitting chip further includes a first protection layer, wherein the first protection layer includes a first portion located on a side of the pixel circuit layer facing the light emitting unit and a second portion covering a side surface of the pixel circuit layer.

4. The light-emitting chip according to claim 3, characterized in that: The light emitting chip further comprises a first substrate located between the pixel circuit layer and the conducting pad, wherein the first substrate is provided with a plurality of through holes, and one of the conducting pads is electrically connected to the signal line through one of the through holes; The first protection layer further includes a third portion formed by the second portion extending toward one end of the first substrate and away from the pixel circuit layer, and the third portion is in contact with the first substrate.

5. The light emitting chip according to claim 1, characterized in that: The light emitting chip further comprises a first substrate located between the pixel circuit layer and the conducting pad, wherein the first substrate is provided with a plurality of through holes, and one of the conducting pads is electrically connected to the signal line through one of the through holes; The light emitting chip further comprises a second protective layer, the second protective layer comprising a The substrate includes a fourth portion facing the conductive pad and a fifth portion covering the side surface of the first substrate.

6. The light emitting chip according to claim 5, characterized in that: The pixel circuit layer is provided with an opening connected to the through hole, the light-emitting chip also includes a conductive structure located in the opening and the through hole, and the conductive pad is electrically connected to the signal line through the conductive structure; the second protective layer also includes a sixth part covering the side surface of the opening and the side surface of the through hole.

7. The light-emitting chip according to claim 2, characterized in that: The light emitting chip further comprises a first substrate located between the pixel circuit layer and the conducting pad, wherein the first substrate is provided with a plurality of through holes, and one of the conducting pads is electrically connected to the signal line through one of the through holes; the first substrate comprises a rigid substrate layer.

8. The light emitting chip according to claim 2, characterized in that: The light emitting chip further comprises a first substrate located between the pixel circuit layer and the conducting pad, wherein the substrate is provided with a plurality of through holes, and one conducting pad is electrically connected to the signal line through one of the through holes; the first substrate comprises at least two organic substrate layers.

9. The light-emitting chip according to claim 1, characterized in that: The light-emitting unit includes a first electrode and a second electrode, and the pixel circuit layer covers the first electrode and the second electrode; the pixel circuit layer includes a connecting wire, one end of the connecting wire is electrically connected to the pixel circuit, and the other end is overlapped with the first electrode.

10. The light emitting chip according to claim 9, characterized in that: In the pixel circuit, at least a portion of an orthographic projection of a structure of the pixel circuit on the light emitting unit is located between the first electrode and the second electrode.

11. The light emitting chip according to claim 9, characterized in that: The orthographic projection of the structure of the pixel circuit in the pixel circuit on the plane where the surface of the first electrode is located at least partially falls within the surface of the first electrode; or, the orthographic projection of the structure of the pixel circuit in the pixel circuit on the plane where the surface of the second electrode is located at least partially falls within the surface of the second electrode.

12. The light emitting chip according to claim 11, characterized in that: The pixel circuit layer includes a thin film transistor, and the thin film transistor includes an active layer; When the orthographic projection of the pixel circuit on the plane where the surface of the first electrode is located at least partially falls within the surface of the first electrode, the orthographic projection of the active layer on the plane where the surface of the first electrode is located falls within the surface of the first electrode; when the orthographic projection of the pixel circuit on the plane where the surface of the second electrode is located at least partially falls within the surface of the second electrode, the orthographic projection of the active layer on the plane where the surface of the second electrode is located falls within the surface of the second electrode.

13. The light emitting chip according to claim 1, characterized in that: The light emitting unit group includes at least two light emitting units emitting light of different colors, the second electrodes of at least two of the light emitting units are electrically connected, and the electrically connected second electrodes are electrically connected to one of the conducting pads.

14. The light emitting chip according to claim 13, characterized in that: At least two of the light emitting units share the second electrode.

15. The light emitting chip according to claim 13, characterized in that: The light-emitting chip further includes a first driving circuit, which is configured to provide a driving signal to the pixel circuit, and the first driving circuit is electrically connected to the signal line.

16. The light emitting chip according to claim 14, characterized in that: The light emitting unit includes a first electrode and a second electrode, and at least a portion of an orthographic projection of the structure of the pixel circuit in the pixel circuit layer on the light emitting unit is located between the first electrode and the second electrode.

17. The light emitting chip according to claim 1, characterized in that: The light emitting chip further comprises a protective film layer located on a side of the light emitting unit away from the pixel circuit layer.

18. The light emitting chip according to claim 1, characterized in that: The light-emitting unit includes a light-emitting layer and an optical film layer located on a side of the light-emitting layer away from the pixel circuit layer.

19. The light emitting chip according to claim 1, characterized in that: The light emitting unit is Mini LED or Micro LED.

20. A light-emitting substrate, characterized in that: The light-emitting substrate comprises a plurality of light-emitting chips according to any one of claims 1 to 19 and a second driving circuit, and the plurality of conductive pads are connected to the second driving circuit.

21. The light-emitting substrate according to claim 20, characterized in that: The light-emitting substrate comprises a packaging layer, and the packaging layer covers the side surfaces of each of the light-emitting chips and the light-emitting surfaces of the light-emitting chips.

22. A display device, characterized in that: The display device comprises the light-emitting substrate according to claim 20 or 21.

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