A trench type RC-IGBT device and its manufacturing method

Abstract

The present invention discloses a trench-type RC-IGBT device and a manufacturing method thereof, relating to the technical field of semiconductor devices, comprising: at least one unit cell, the unit cell comprising an IGBT region and an FRD region, the IGBT region comprising a first-type trench gate and a plurality of second-type trench gates without a gate-source isolation layer on top, and a hole injection region covering the plurality of second-type trench gates; the device of the present invention has a CT opening spanning the gate and the source, which reduces the aspect ratio of the opening, reduces process complexity, simplifies the metal filling layer process flow, does not require additional filling of Ti / TiN and W layers, and reduces process cost; reduces the drift of the device's threshold voltage, enhances the device's radiation resistance, and ensures that the threshold voltage remains unchanged when the device is performing lifetime control; reduces the ion implantation concentration at the bottom of the contact hole, reduces the reverse recovery energy Erec, and subjects the thin slice formed after substrate thinning to high-energy electron irradiation and annealing, thereby achieving higher consistency in the device threshold voltage, which is more conducive to the parallel use of RC-IGBTs and improves the overall performance of the packaging module.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and in particular to a trench type RC-IGBT device and a manufacturing method thereof. Background Art

[0002] With the development of power electronics technology, insulated-gate bipolar transistors (IGBTs) have gradually become core components in power electronics systems, combining the advantages of MOSFET voltage drive, easy control, and fast switching speed with the high withstand voltage, low on-state voltage, high output current, and low switching losses of bipolar transistors. However, IGBTs require an anti-parallel freewheeling diode (FRD), which increases their cost. The anti-parallel FRD also increases the package size, affecting the overall device reliability. Parasitic parameters also affect the overall device performance. Reverse-conducting IGBTs (RC-IGBTs) integrate both the IGBT and FRD on a single chip, eliminating the need for an additional parallel freewheeling diode. They balance the static and dynamic performance of both the IGBT and FRD, reducing chip thermal resistance and junction temperature fluctuations. Compared to the IGBT+FRD package, RC-IGBTs can save approximately one-third of the total chip area, significantly reducing chip manufacturing costs and packaging and testing costs. The reduction in parallel chips also improves device reliability, making them the mainstream IGBT application.

[0003] Carrier lifetime control technology is the key to achieving high-performance RC-IGBT. Currently, RC-IGBT carrier lifetime control technologies mainly include Pt diffusion technology, electron irradiation technology, and H ion or He ion implantation technology. Among them, electron irradiation technology uses electron irradiation to induce defects inside the semiconductor as recombination centers to achieve the purpose of controlling the minority carrier lifetime. Compared with H ion or He ion implantation technology, electron irradiation technology induces fewer deep energy level defects, the leakage current of the manufactured device is smaller, and the breakdown voltage of the device is not affected. Compared with Pt diffusion technology, electron irradiation technology can accurately control the concentration of induced defects by controlling the dose of high-energy electron irradiation. The defects formed inside the entire device are evenly distributed, and the device parameters are more consistent. At the same time, electron irradiation will not contaminate the production line. It is a clean minority carrier lifetime control method, and has therefore become a commonly used RC-IGBT lifetime control technology.

[0004] Currently, the two trench-type RC-IGBT devices known to the applicant are as follows: First, Figure 1As shown, the trench type RC-IGBT includes adjacent IGBT regions and FRD regions. The IGBT region includes a first type trench gate and four second type trench gates. The tops of the two types of trench gates are respectively formed with silicate glass (USG) or borophosphosilicate glass (BPSG) dielectric layers as gate-source isolation layers. The first type of trench gate includes two N+ type doped source regions on both sides, which are called true gates; the second type of trench gate does not include, and is called dummy gate or Dummy gate. The first type of trench gate becomes the gate of the IGBT, and the second type of trench gate is connected to the metal filling layer through different openings to become the emitter of the IGBT. The trenches of the two types of trench gates include gate oxide layers and polysilicon. The second type of trench gate is connected to the metal filling layer through small openings to maintain the potential grounded. With this structure, the P type body region is grounded, and the transistor in the P region works to form a hole current; second, as shown in FIG. Figure 2 As shown, the tops of the four second-type trench gates share a dielectric layer and are not connected to the metal filling layer, keeping the potential floating. With this structure, the P-type body region is floating and no current is generated in the P region.

[0005] However, the two trench-type RC-IGBT devices known to the applicant both have the following problems: when lifespan control is performed by high-dose electron irradiation, both exhibit a significant decrease in threshold voltage Vth. The decrease in device threshold voltage may, in severe cases, lead to erroneous activation of the device, making the device difficult to use. The main reason is that high-energy electron irradiation excites electron-hole pairs in the SiO2 dielectric layer (the gate-source isolation layer and the gate oxide layer are both SiO2 dielectric layers, and the two are connected). The electrons will quickly migrate out of the SiO2 dielectric layer, and some of the holes will migrate out of the SiO2 dielectric layer due to their slow movement speed. Another portion is captured by hole traps in the SiO2 dielectric layer, becoming positively charged oxide trap charges. These trapped charges concentrate, and when they accumulate to a certain concentration, they cause the semiconductor surface to invert, forming interface state charges. The oxide trap charges dominate, causing the device threshold voltage to shift negatively. Interface state charges, however, shift the device threshold voltage positively, but the interface state charges are relatively small. Therefore, after high-energy electron irradiation, the device threshold voltage decreases significantly, shifting negatively. This shift cannot be corrected by subsequent annealing after high-energy electron irradiation. To restore the device threshold voltage to its normal value, the Pbody implant concentration can be increased, raising the impurity concentration in the trench region. However, this approach significantly increases the reverse recovery energy (Erec) of the FRD in the RC-IGBT, increasing device losses. Another approach is to reduce the high-energy electron irradiation dose, which also results in a loss of key device performance. While a dose that is too low will not cause the threshold voltage to shift after annealing, it will make it difficult to achieve lifetime control, resulting in the device failing to meet product requirements due to substandard key parameters.

[0006] Therefore, people are in urgent need of a trench RC-IGBT device that can effectively solve the threshold voltage drift problem caused by high-energy electron irradiation lifetime control and reduce the overall loss of the device. Summary of the Invention

[0007] The purpose of the present invention is to provide a trench-type RC-IGBT device and a method for manufacturing the same, so as to solve the problems existing in the above-mentioned prior art, eliminate the gate-source isolation layer on the top of the second-type trench gate, and set a hole injection region covering multiple second-type trench gates, which can effectively solve the threshold voltage drift problem caused by high-energy electron irradiation lifetime control and reduce the overall loss of the device.

[0008] To achieve the above-mentioned objectives, the present invention provides the following solution: The present invention provides a trench-type RC-IGBT device, comprising at least one cell, wherein the cell includes an IGBT region and an FRD region, the IGBT region includes a first-type trench gate with a gate-source isolation layer on the top and multiple second-type trench gates without a gate-source isolation layer on the top, the second-type trench gates are located on the side of the first-type trench gate close to the FRD region, the IGBT region and the FRD region share a hole injection region, and the hole injection region covers multiple second-type trench gates.

[0009] Preferably, the IGBT region includes a metal collector, a p+ doped region, an n+ field stop layer, an n-drift region, an n-type carrier storage layer, a P-type doped region, the hole injection region and a metal filling layer arranged in sequence; the FRD region includes a metal collector, an n-type doped region, an n+ field stop layer, an n-drift region, an n-type carrier storage layer, a P-type doped region, the hole injection region and a metal filling layer arranged in sequence.

[0010] Preferably, the first type of trench gate includes a trench, a gate-source isolation layer and an N+ source region, and the second type of trench gate includes a trench, the trenches of the first type of trench gate and the second type of trench gate are both arranged in the n-drift region, the n-type carrier storage layer and the P-type doped region, the N+ source region is arranged on both sides of the trench of the first type of trench gate, and the gate-source isolation layer is arranged on the top of the trench of the first type of trench gate; the trenches of the first type of trench gate and the second type of trench gate both include a gate oxide layer and polysilicon.

[0011] The present invention also provides a method for manufacturing the above-mentioned trench type RC-IGBT device, comprising the following steps:

[0012] S1: forming a MOS structure on a semiconductor substrate, wherein an IGBT region and an FRD region in the MOS structure share a hole injection region, the hole injection region covers a plurality of second-type trench gates, and during the formation of the MOS structure, a metal filling layer is directly formed on the hole injection region;

[0013] S2: forming a passivation layer and a protective layer on the front side of the MOS structure;

[0014] S3: forming the anode of the IGBT, the n-type region of the FRD, the field stop layer and the metal collector on the back side of the MOS structure;

[0015] S4: Perform high-energy electron irradiation. After the high-energy electron irradiation is completed, perform thermal annealing treatment to complete the production of the trench type RC-IGBT device.

[0016] Preferably, in step S1, a dielectric oxide layer is formed on the top of the completed first-type trench gate and the second-type trench gate, and then a gate-source isolation layer is formed on the top dielectric oxide layer at the top of the first-type trench gate and a CT opening spanning the gate and the source. Finally, B and BF2 ion implantation is performed at the bottom of the contact hole at the CT opening spanning the gate and the source to form a hole implantation region. The energy of the B and BF2 ion implantation is 20KeV to 100KeV, and the dosage is 2E11 to 5E14.

[0017] Preferably, the size of the CT opening is adjusted according to the distance between the trench gates of the RC-IGBT, and the size of the CT opening is greater than 1.5 times the distance between the trench gates in the active area.

[0018] Preferably, in step S1, the metal filling layer of the MOS structure is filled with AlSiCu alloy by a magnetron sputtering process, with a thickness of

[0019] Preferably, in step S3, the energy of high-energy electron irradiation is 5 MeV to 20 MeV, the irradiation dose is 30 Kgy to 100 Kgy, the annealing time is 30 to 90 min, and the annealing temperature is 200 to 400°C.

[0020] Preferably, the semiconductor substrate is an N-type single crystal silicon or a wide bandgap semiconductor. When the semiconductor substrate is a single crystal silicon substrate, the single crystal silicon substrate serves as the N-drift region of the MOS structure.

[0021] Preferably, when the semiconductor substrate is a single crystal silicon substrate, before step S3, the substrate is thinned to form a thin slice.

[0022] Compared with the prior art, the present invention mainly achieves the following technical effects:

[0023] The gate-source isolation layer on the top of the second type of trench gate is removed, and a hole injection region is set to cover multiple second type trench gates, which effectively reduces the area of the gate-source isolation layer, and the overall SiO2 dielectric layer of the device (the overall area of the gate-source isolation layer and the gate oxide layer connected thereto) is reduced, which prevents the accumulation of more trapped charges induced by electron irradiation, effectively reduces the drift of the threshold voltage Vth of the device, and enhances the radiation resistance of the device. Moreover, based on the reduction of the gate-source isolation layer, under normal process flow, subsequent annealing after high-energy electron irradiation will also repair part of the trapped charges, and at the same time generate a large amount of interface state charges, so that the threshold voltage is adjusted back, which can realize the repair of a small amount of threshold voltage drift caused by high-energy electron irradiation, and can ensure the trench type RC-IGBT device is passed. The threshold voltage remains unchanged when lifetime control is performed by high-energy electron irradiation. In addition, the trench RC-IGBT is provided with a large CT opening spanning the gate and source electrodes, which reduces the aspect ratio of the opening and reduces process complexity. At the same time, the process complexity in forming the metal filling layer is reduced, reducing process costs. The metal filling layer forms a good ohmic contact with the underlying Si substrate, which can reduce the concentration of ion implantation at the bottom of the contact hole, further reduce the reverse recovery energy Erec of the device, reduce the overall loss of the device, help reduce the reverse recovery charge of the FRD, reduce the reverse recovery current, shorten the reverse recovery time, and, due to the high consistency of the device threshold voltage, it can be more conducive to the parallel use of RC-IGBTs and improve the overall performance of the packaging module. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0025] Figure 1 A schematic structural diagram of a trench-type RC-IGBT device known to the applicant of the present invention;

[0026] Figure 2 A schematic structural diagram of another trench-type RC-IGBT device known to the applicant of the present invention;

[0027] Figure 3 Schematic diagram of the structure of a trench RC-IGBT device in an embodiment of the present invention;

[0028] Among them, 1. Metal collector; 2. First type trench gate; 3. Second type trench gate; A0, IGBT region; B0, FRD region; 10, p+ doped region; 11, n-type doped region; 20, n+ field stop layer; 30, n- drift region; 40, n-type carrier storage layer; 41, polysilicon; 42, gate oxide layer; 50, P-type doped region; 51, N+ source region; 52, hole injection region; 60, gate-source isolation layer; 70, metal filling layer; 80, high-energy electron irradiation. DETAILED DESCRIPTION

[0029] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0030] The purpose of the present invention is to provide a trench-type RC-IGBT device and a method for manufacturing the same, so as to solve the problems existing in the prior art. The gate-source isolation layer on the top of the second-type trench gate is eliminated, and a hole injection region is provided to cover multiple second-type trench gates. This can effectively solve the problem of threshold voltage drift caused by lifetime control due to high-energy electron irradiation and reduce the overall loss of the device.

[0031] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0032] Please refer to Figure 3As shown, a trench type RC-IGBT device is provided, including at least one cell, the cell including an IGBT region A0 and an FRD region B0, the IGBT region A0 includes a first type trench gate 2 with a gate-source isolation layer 60 (SiO2) set on the top and a plurality of second type trench gates 3 without a gate-source isolation layer 60 on the top, the second type trench gate 3 is located on the side of the first type trench gate 2 close to the FRD region B0, the FRD region B0 and the IGBT region A0 are separated by the second type trench gate 3 farthest from the first type trench gate 2, the IGBT region A0 and the FRD region B0 share a hole injection region 52, the hole injection region 52 covers the plurality of second type trench gates 3, so that the emitter of the IGBT region A0 and the FRD region B0 are connected. The front P region of the D region B0 is completely connected, which reduces the additional mask required for the separate CT openings of the IGBT region A0 and the FRD region B0; since the top of the second-type trench gate 3 no longer has the gate-source isolation layer 60, the area of the gate-source isolation layer 60 is effectively reduced, so that the SiO2 dielectric layer of the overall trench type RC-IGBT device is reduced, that is, the overall area of the gate-source isolation layer and the gate oxide layer connected thereto is reduced, which prevents the accumulation of more trapped charges induced by electron irradiation, effectively reduces the drift of the threshold voltage Vth of the device, and enhances the device's radiation resistance. Moreover, based on the reduction of the gate-source isolation layer 60, even if there is a certain threshold voltage drift, under normal process flow , the subsequent annealing process of high-energy electron irradiation 80 will also repair this part of the trapped charge, and at the same time generate a large amount of interface state charge, so that the threshold voltage is adjusted back, which can realize the repair of the small amount of threshold voltage drift generated after high-energy electron irradiation 80, and can ensure that the threshold voltage of the trench type RC-IGBT device remains unchanged when the lifetime is controlled by high-energy electron irradiation 80; in addition, the gate-source isolation layer 60 on the top of the second type trench gate 3 is eliminated, and the hole injection region 52 is provided to cover multiple second type trench gates 3, so that the trench type RC-IGBT has a CT opening spanning the gate and source great, which reduces the aspect ratio of the opening, and reduces the inadequate etching caused by the excessive aspect ratio. Sufficient, or in order to overcome the problem of over-etching caused by insufficient etching of the opening, which in turn leads to a bow problem on the hole wall, the process complexity is reduced; at the same time, the process complexity when forming the metal filling layer 70 is reduced, and the process cost is reduced. The metal filling layer 70 forms a good ohmic contact with the Si substrate below, which can reduce the concentration of ion implantation at the bottom of the contact hole, further reduce the reverse recovery energy Erec of the device, reduce the overall loss of the device, help to reduce the reverse recovery charge of the FRD, reduce the reverse recovery current, shorten the reverse recovery time, and due to the high consistency of the device threshold voltage, it can be more conducive to the parallel use of RC-IGBT, thereby improving the overall performance of the packaging module.

[0033] The principle of setting multiple second-type trench gates 3 is: since the cell density of trench IGBT is much higher than that of planar gate and the current path is shorter, a reasonable proportion of dummy gates is often used to control the channel current density to ensure the short-circuit safe working area of the device.

[0034] The specific structure of the trench RC-IGBT device in the present invention is as follows: the IGBT region A0 includes a metal collector 1, a p+ doped region 10, an n+ field stop layer 20, an n- drift region 30, an n-type carrier storage layer 40, a P-type doped region 50, a hole injection region 52 and a metal filling layer 70 arranged in sequence; the FRD region B0 includes a metal collector 1, an n-type doped region 11, an n+ field stop layer 20, an n- drift region 30, an n-type carrier storage layer 40, a P-type doped region 50, a hole injection region 52 and a metal filling layer 70 arranged in sequence.

[0035] The first type trench gate 2 includes a trench, a gate-source isolation layer 60 and an N+ source region 51, and the second type trench gate 3 includes a trench. The trenches of the first type trench gate 2 and the second type trench gate 3 are both arranged in the n-drift region 30, the n-type carrier storage layer 40 and the P-type doped region 50. N+ source regions 51 are arranged on both sides of the trench of the first type trench gate 2, and a gate-source isolation layer 60 is arranged on the top of the trench of the first type trench gate 2; the trenches of the first type trench gate 2 and the second type trench gate 3 both include a gate oxide layer 42 (SiO2) and polysilicon 41, and the gate oxide layer 42 is connected to the gate-source isolation layer 60, both of which are SiO2 dielectric layers.

[0036] The present invention also provides a method for manufacturing the above-mentioned trench type RC-IGBT device, comprising the following steps:

[0037] S1: forming a MOS structure on a semiconductor substrate, wherein the IGBT region A0 and the FRD region B0 in the MOS structure share a hole injection region 52, the hole injection region 52 covers a plurality of second-type trench gates 3, and during the formation of the MOS structure, a metal filling layer is directly formed on the hole injection region;

[0038] S2: Form a passivation layer and a protective layer on the front of the MOS structure to provide protection;

[0039] S3: forming the anode of the IGBT and the n-type region of the FRD, the field stop layer and the metal collector 1 on the back side of the MOS structure;

[0040] S4: performing high energy electron irradiation 80. After the high energy electron irradiation 80 is completed, performing thermal annealing treatment, and the trench type RC-IGBT device is completed.

[0041] The semiconductor substrate is an N-type single crystal silicon or a wide bandgap semiconductor. The wide bandgap semiconductor can be a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, a silicon germanium substrate, a gallium arsenide substrate, etc.

[0042] In this embodiment, a single crystal silicon substrate is selected as the semiconductor substrate. The single crystal silicon substrate can be used as the n-drift region 30 of the MOS structure, saving steps.

[0043] In step S1, the specific process of the MOS structure is as follows: an N-type single crystal silicon substrate is used as an n-drift region 30, an N-type doped region is formed on the Si substrate by high-energy P ion implantation, and then the carrier storage layer is pushed to a suitable position by high-temperature annealing, and finally an n-type carrier storage layer 40 is formed;

[0044] The thickness of the deposited layer on the front side of the substrate is The SiO2 is used as a hard mask layer for the subsequent trench gate etching, and then a photoresist is spin-coated on the hard mask layer. After baking, exposure, and development, the SiO2 is etched. The n-drift region 30 is then etched using the SiO2 as a hard mask to form a trench with a depth of about 5 microns in a portion of the n-drift region 30. After removing the sacrificial oxide layer, a high-quality silicon oxide layer is grown by thermal oxidation to serve as the gate oxide layer 42. A layer of thickness is deposited using the LPCVD process. After the polysilicon 41 is etched, a trench-type polysilicon 41 is formed.

[0045] A P-type doped region 50 is formed by B ion implantation and high temperature push-in junction.

[0046] By using As ion implantation and high temperature push-in junction method, N+ source regions 51 are formed on both sides of the first type trench gate 2;

[0047] Tetraethyl orthosilicate and boron-phosphorus-doped silicon dioxide (TEOS+BPSG) are deposited on the P-type doped region 50 to grow The USG and BPSG layers are formed, that is, a dielectric oxide layer is formed on the top of the first type trench gate 2 and the second type trench gate 3, and then photolithography is performed to etch the USG and BPSG layers, leaving only the USG and BPSG on the top of the first type trench gate 2, forming a gate-source isolation layer 60 on the top of the first type trench gate 2, and forming a large CT opening across the gate and source;

[0048] By using B ion and BF2 implantation and high temperature push-in method, ion implantation is performed at the bottom of the contact hole at the CT opening across the gate and source to form a hole implantation region 52. The hole implantation is performed in two steps, with an implantation energy of 20 KeV to 100 KeV and a dose of 2E11 to 5E14. Specifically, in this embodiment, the implantation energy and dose are BF2 / 20 KeV / 5E14 and B / 100 KeV / 5E12.

[0049] The AlSiCu alloy layer is deposited by magnetron sputtering, and a metal filling layer 70 is formed after metal etching. The thickness of the metal filling layer 70 is The manufacturing of the MOS structure is now completed.

[0050] When the metal filling layer 70 is formed, the small CT openings in the known trench-type RC-IGBT device need to be filled with metal W. At the same time, before the W is deposited, a Ti / TiN layer needs to be deposited first to prevent the W layer from falling off, and then an AlCu layer is deposited to form the metal filling layer 70. However, in the trench-type RC-IGBT device, the CT opening spanning the gate and source electrodes does not require additional filling with Ti / TiN and W layers, which simplifies the process flow and saves costs.

[0051] Before step S3, when an N-type single crystal silicon substrate is selected, the substrate is first thinned to an appropriate thickness by the Taiko process while ensuring the voltage resistance of the chip. Then, the anode (p+ doped region 10) of the IGBT and the n-type region (n-type doped region 11) of the FRD are formed respectively by back-side photolithography and P ion and B ion implantation, and laser annealing. The field stop layer (n+ field stop layer 20) on the back side of the trench RC-IGBT device is formed by P ion or proton implantation (H ion He ion) and high-temperature push-in junction method. The metal collector 11 on the back side of the trench RC-IGBT device is formed by depositing metal Al / Ti / NiV / Ag.

[0052] By thinning the substrate and placing the high-energy electron irradiation step (80°) at the end of the overall process, more thin wafers can be irradiated simultaneously compared to thicker wafers, improving efficiency and reducing costs. Furthermore, electron irradiation annealing has a lower temperature and shorter duration. After electron irradiation of thick wafers, backside annealing inevitably affects the defect concentration distribution caused by electron irradiation. In extreme cases, it can even repair defects caused by electron irradiation, making it difficult to achieve lifetime control. Therefore, this method can relatively avoid the impact of other processes on the defect concentration distribution caused by electron irradiation, resulting in higher threshold voltage consistency for devices. Although electron irradiation and thermal annealing on the backside of a thinned substrate may increase the risk of substrate warpage, due to the lower temperature and shorter duration of electron irradiation annealing, this problem can be effectively avoided through process optimization.

[0053] In step S3, the energy of high-energy electron irradiation 80 is 5MeV to 20MeV, the irradiation dose is 30Kgy to 100Kgy, the annealing time is 30 to 90min, and the annealing temperature is 200 to 400°C. In this embodiment, the energy of high-energy electron irradiation 80 is 10MeV, the irradiation dose is 100Kgy, the annealing time is 60min, and the annealing temperature is 350°C.

[0054] Attachment Figure 1 and attached Figure 2 The known structure shown and the attached Figure 3 The power device provided by the structure of the present invention was tape-out and packaged for testing, including testing of the device threshold voltage Vth and diode reverse recovery energy Erec. The results are as follows:

[0055] A trench RC-IGBT provided by an embodiment of the present invention is irradiated with high-energy electrons for 80 min at an energy of 10 MeV and a dose of 100 kGy. After electron irradiation, the annealing temperature is 350°C and the annealing time is 60 min. A control group uses the same structure and process without electron irradiation. Packaging results show that the threshold voltage of the control trench RC-IGBT is 5.8 V and the device Erec is 10.4 mJ. The threshold voltage of the trench RC-IGBT provided by the embodiment of the present invention is 5.8 V, the standard deviation (Stdev) of the threshold voltage is 0.045, and the device Erec is 6.5 mJ. The comparison results show that the embodiment of the present invention solves the problem of threshold voltage drop of the trench RC-IGBT after 80 min of high-energy electron irradiation. At the same time, the reduction in Erec also reflects the effect of lifetime control.

[0056] Compare with Figure 1 and attached Figure 2 The trench RC-IGBT provided by the structure adopts the same high-energy electron irradiation energy and dose of 80 to ensure the same annealing temperature and time. The packaging results show that the attached Figure 1 The threshold voltage of the trench RC-IGBT with the structure is 4.6V, the standard deviation of the threshold voltage is 0.092, and the device Erec is 8.0mJ. Figure 2 The threshold voltage of the trench RC-IGBT with this structure is 4.3V, the standard deviation of the threshold voltage is 0.087, and the device Erec is 8.5mJ. Figure 1 and attached Figure 2 The threshold voltage of the trench RC-IGBT with the structure is significantly reduced. Figure 1 The threshold voltage is slightly higher than the Figure 2 , which is consistent with the smaller area of the gate-source isolation layer 60 at the top of the gate; compared with the trench RC-IGBT provided by the present invention, its reverse recovery energy Erec is higher, which is consistent with the hole injection concentration at the bottom of the opening and the filling method of the metal filling layer 70. In addition, compared with the attached Figure 1 and attached Figure 2 The trench RC-IGBT provided by the present invention has a smaller threshold voltage standard deviation and higher threshold voltage consistency.

[0057] The size of the large CT opening across the gate and source formed in this embodiment is adjusted according to the trench pitch size (the distance between the trench gates) of the RC-IGBT, and is generally greater than 1.5 times the pitch size of the trench gate in the active area. For example, for a trench gate with an umpitch size of 1.0 μm, the opening size should be greater than 1.5 μm; for a trench gate with an umpitch size of 1.6 μm, the opening size should be greater than 2.4 μm; for a trench gate with an umpitch size of 2.4 μm, the opening size should be greater than 3.6 μm; and so on for trench gate structures with smaller or larger pitch sizes.

[0058] Adaptive changes based on actual needs are all within the scope of protection of the present invention.

[0059] It should be noted that it will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention. Therefore, the embodiments should be considered in all respects as illustrative and non-restrictive, and the scope of the present invention is defined by the appended claims, not the foregoing description, and it is intended that all variations within the meaning and range of equivalents of the claims be encompassed within the present invention. Any reference signs in the claims should not be construed as limiting the claim to which they relate.

[0060] The present invention uses specific examples to illustrate the principles and implementation methods of the present invention. The above examples are only intended to help understand the method and core concept of the present invention. At the same time, those skilled in the art will find that the specific implementation methods and application scopes may vary based on the concept of the present invention. In summary, the contents of this specification should not be construed as limiting the present invention.

Claims

1. A method for manufacturing a trench type RC-IGBT device, characterized in that: The following steps are involved: S1: forming a MOS structure on a semiconductor substrate, wherein an IGBT region and an FRD region in the MOS structure share a hole injection region, the hole injection region covers a plurality of second-type trench gates, and during the formation of the MOS structure, a metal filling layer is directly formed on the hole injection region; S2: forming a passivation layer and a protective layer on the front side of the MOS structure; S3: forming the anode of the IGBT, the n-type region of the FRD, the field stop layer and the metal collector on the back side of the MOS structure; S4: Perform high-energy electron irradiation. After the high-energy electron irradiation is completed, perform thermal annealing treatment to complete the production of the trench type RC-IGBT device.

2. The method for manufacturing a trench type RC-IGBT device according to claim 1, wherein: In step S1, a dielectric oxide layer is formed on the top of the completed first-type trench gate and the second-type trench gate, and then a gate-source isolation layer is formed on the top dielectric oxide layer at the top of the first-type trench gate and a CT opening spanning the gate and the source. Finally, B and BF2 ion implantation is performed at the bottom of the contact hole at the CT opening spanning the gate and the source to form a hole implantation region. The energy of the B and BF2 ion implantation is 20KeV to 100KeV, and the dosage is 2E11 to 5E14.

3. The method for manufacturing a trench type RC-IGBT device according to claim 2, wherein: The size of the CT opening is adjusted according to the distance between the trench gates of the RC-IGBT, and the size of the CT opening is greater than 1.5 times the distance between the trench gates in the active area.

4. The method for manufacturing a trench type RC-IGBT device according to claim 1, wherein: In step S1, the metal filling layer of the MOS structure is filled with AlSiCu alloy by magnetron sputtering process, with a thickness of 5. The method for manufacturing a trench type RC-IGBT device according to claim 1, wherein: In step S3 , the energy of high-energy electron irradiation is 5 MeV to 20 MeV, the irradiation dose is 30 Kgy to 100 Kgy, the annealing time is 30 to 90 min, and the annealing temperature is 200 to 400° C.

6. The method for manufacturing a trench type RC-IGBT device according to claim 1, wherein: The semiconductor substrate is an N-type single crystal silicon or a wide bandgap semiconductor. When the semiconductor substrate is a single crystal silicon substrate, the single crystal silicon substrate serves as an N-drift region of the MOS structure.

7. The method for manufacturing a trench type RC-IGBT device according to claim 6, wherein: When the semiconductor substrate is a single crystal silicon substrate, before step S3 , the substrate is thinned to form a thin slice.

8. A trench RC-IGBT device, characterized in that: A trench RC-IGBT device is manufactured using the manufacturing method according to any one of claims 1 to 7, comprising at least one cell, wherein the cell includes an IGBT region and an FRD region, the IGBT region includes a first-type trench gate with a gate-source isolation layer on the top and multiple second-type trench gates without a gate-source isolation layer on the top, the second-type trench gate is located on a side of the first-type trench gate close to the FRD region, the IGBT region and the FRD region share a hole injection region, and the hole injection region covers multiple second-type trench gates.

9. The trench type RC-IGBT device according to claim 8, characterized in that: The IGBT region includes a metal collector, a p+ doped region, an n+ field stop layer, an n-drift region, an n-type carrier storage layer, a p-type doped region, the hole injection region and a metal filling layer arranged in sequence; the FRD region includes a metal collector, an n-type doped region, an n+ field stop layer, an n-drift region, an n-type carrier storage layer, a p-type doped region, the hole injection region and a metal filling layer arranged in sequence.

10. The trench type RC-IGBT device according to claim 9, characterized in that: The first type of trench gate includes a trench, a gate-source isolation layer and an N+ source region, and the second type of trench gate includes a trench. The trenches of the first type of trench gate and the second type of trench gate are both arranged in the n-drift region, the n-type carrier storage layer and the P-type doped region. The N+ source region is arranged on both sides of the trench of the first type of trench gate, and the gate-source isolation layer is arranged on the top of the trench of the first type of trench gate; the trenches of the first type of trench gate and the second type of trench gate both include a gate oxide layer and polysilicon.

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