Multi-segment temperature compensation circuit
Patent Information
- Application Number
- CN202411985897.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2025-04-15
Smart Images

Figure CN119828837A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of integrated circuits, and in particular to a multi-segment temperature compensation circuit. Background Art
[0002] The voltage reference in the integrated circuit is generally generated by the bandgap reference module, which is an important module in analog, digital, and mixed signal circuit devices. The stability of the reference voltage plays a very important role in the performance of the chip. The common bandgap reference module uses a first-order temperature compensation circuit to reduce the temperature drift coefficient of the bandgap reference module. The stability of the reference voltage plays a very important role in the performance of the chip. Traditional temperature compensation circuits such as Figure 1 However, the traditional temperature compensation circuit has a large temperature drift coefficient, a small temperature range, a weak load capacity, and the transistors used have poor heat resistance. Summary of the invention
[0003] In view of this, the present invention provides a multi-segment temperature compensation circuit to solve the problem of large temperature drift coefficient of the traditional temperature compensation circuit.
[0004] The present invention provides a multi-segment temperature compensation circuit, comprising: a temperature coefficient current module and a segment compensation module, wherein a power supply voltage is input to the input end of the temperature coefficient current module, an output end of the temperature coefficient current module is connected to the input end of the segment compensation module, and the temperature coefficient current module is used to output a positive temperature coefficient current and a negative temperature coefficient current; the segment compensation module is used to superimpose the positive temperature coefficient current and the negative temperature coefficient current to obtain a compensated reference voltage.
[0005] The present invention generates a positive temperature coefficient current and a negative temperature coefficient current based on a power supply voltage, and superimposes the positive temperature coefficient current and the negative temperature coefficient current, thereby generating a bandgap reference voltage with a small temperature drift coefficient within a certain temperature range.
[0006] In an optional embodiment, the temperature coefficient current module includes: a positive temperature coefficient current module and a negative temperature coefficient current module, wherein the input end of the positive temperature coefficient current module inputs the power supply voltage, the output end of the positive temperature coefficient is connected to the input end of the segmented compensation module, and the positive temperature coefficient current module is used to output the positive temperature coefficient current; the input end of the negative temperature coefficient current module inputs the power supply voltage, the output end of the negative temperature coefficient is connected to the input end of the segmented compensation module, and the negative temperature coefficient current module is used to output the negative temperature coefficient current.
[0007] In an optional implementation, the positive temperature coefficient current module includes: a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a seventh MOS tube, an eighth MOS tube, a ninth MOS tube, a tenth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a thirteenth MOS tube, a first resistor, a second resistor, and a first capacitor, wherein the source of the first MOS tube inputs a power supply voltage, the drain of the first MOS tube is connected to the first end of the first resistor and the gate of the second MOS, the gate of the first MOS tube is connected to the gate of the third MOS tube, the gate of the fourth MOS tube, the drain of the ninth MOS tube, the drain of the eleventh MOS tube, the first end of the first capacitor, and the input end of the segmented compensation module; the source of the second MOS tube inputs a power supply voltage, the drain of the second MOS tube is connected to the drain of the fourth MOS tube, the gate of the fifth MOS tube, the gate of the sixth MOS tube, the drain of the sixth MOS tube, and the gate of the eleventh MOS tube; the third The source of the MOS tube inputs a power supply voltage, the drain of the third MOS tube is connected to the drain of the fifth MOS tube and the gate of the twelfth MOS tube; the source of the fourth MOS tube inputs a power supply voltage; the source of the fifth MOS tube is connected to the drain of the seventh MOS tube; the source of the sixth MOS tube is connected to the input end of the segmented compensation module, the gate of the seventh MOS tube, the drain of the eighth MOS tube, the gate of the eighth MOS tube, and the gate of the thirteenth MOS tube; the source of the seventh MOS tube is connected to the first end of the second resistor; the source of the eighth MOS tube is grounded; the source of the ninth MOS tube inputs a power supply voltage, the gate of the ninth MOS tube is connected to the gate of the tenth MOS tube, the drain of the tenth MOS tube, and the drain of the twelfth MOS tube; the source of the tenth MOS tube inputs a power supply voltage; the source of the eleventh MOS tube is connected to the source of the twelfth MOS tube and the drain of the thirteenth MOS tube; the source of the thirteenth MOS tube is grounded; the second end of the first resistor, the second end of the second resistor, and the second end of the first capacitor are all grounded.
[0008] In an optional implementation, the negative temperature coefficient current module includes: a fourteenth MOS tube, a fifteenth MOS tube, a sixteenth MOS tube, a seventeenth MOS tube, an eighteenth MOS tube, a third resistor, and a sixth capacitor, wherein a source of the fourteenth MOS tube inputs a power supply voltage, a gate of the fourteenth MOS tube is connected to the gate of the first MOS tube, and a drain of the fourteenth MOS tube is grounded through the sixth capacitor; a source of the fifteenth MOS tube inputs a power supply voltage, a gate of the fifteenth MOS tube is connected to its drain, a gate of the sixteenth MOS tube, and an input end of the segmented compensation module, and a drain of the fifteenth MOS tube is connected to the drain of the seventeenth MOS tube; a source of the sixteenth MOS tube inputs a power supply voltage, a drain of the sixteenth MOS tube is connected to the gate of the eighteenth MOS tube, and the drain of the sixteenth MOS tube is grounded through the third resistor; a gate of the seventeenth MOS tube is connected to the drain of the eighteenth MOS tube, a gate of the seventeenth MOS tube is grounded through the sixth capacitor, and a source of the seventeenth MOS tube is grounded; and a source of the eighteenth MOS tube is grounded.
[0009] In an optional implementation, the segmented compensation module includes: a nineteenth MOS tube, a twentieth MOS tube, a twenty-first MOS tube, a twenty-second MOS tube, a twenty-third MOS tube, a twenty-fourth MOS tube, a twenty-fifth MOS tube, a twenty-sixth MOS tube, a twenty-seventh MOS tube, a twenty-eighth MOS tube, a twenty-ninth MOS tube, a thirtieth MOS tube, a thirty-first MOS tube, a thirty-second MOS tube, a thirty-third MOS tube, a thirty-fourth MOS tube, a thirty-fifth MOS tube, a thirty-sixth MOS tube, a thirty-seventh MOS tube, a thirty-eighth MOS tube, a thirty-ninth MOS tube, a fourth resistor and a second capacitor, wherein the source of the nineteenth MOS tube inputs a power supply voltage, and the gate of the nineteenth MOS tube is connected to the The gate of the fifteenth MOS tube, the gate of the twenty-third MOS tube, and the gate of the thirty-fourth MOS tube are connected, the drain of the nineteenth MOS tube is connected to the drain of the twenty-first MOS tube and the gate of the twenty-first MOS tube; the source of the twentieth MOS tube inputs the power supply voltage, the gate of the twentieth MOS tube is connected to the gate of the first MOS tube, the drain of the twentieth MOS tube is connected to the source of the twenty-first MOS tube, the first end of the fourth resistor, the first end of the second capacitor, the drain of the twenty-fourth MOS tube, and the drain of the twenty-eighth MOS tube, and the drain of the twentieth MOS tube outputs the compensated power supply voltage; the source of the twenty-second MOS tube inputs the power supply voltage, the gate of the twenty-second MOS tube is connected to the gate of the first MOS tube, and the drain of the twenty-second MOS tube is connected to the gate of the twenty-first MOS tube. The drain of the second MOS tube is connected to the drain of the twenty-sixth MOS tube, the gate of the twenty-sixth MOS tube, and the gate of the twenty-seventh MOS tube; the source of the twenty-third MOS tube inputs the power supply voltage, the drain of the twenty-third MOS tube is connected to the gate of the twenty-fourth MOS tube, the gate of the twenty-fifth MOS tube, the drain of the twenty-fifth MOS tube, and the drain of the twenty-seventh MOS tube; the source of the twenty-fourth MOS tube is connected to the source of the twenty-fifth MOS tube, the source of the twenty-sixth MOS tube, the source of the twenty-seventh MOS tube, the source of the twenty-eighth MOS tube, the source of the twenty-ninth MOS tube, the source of the thirtieth MOS tube, the source of the thirty-first MOS tube, the source of the thirty-second MOS tube, the source of the thirty-eighth MOS tube, and the source of the thirty-third MOS tube. The source of the ninth MOS, the second end of the fourth resistor, and the second end of the second capacitor are connected and then grounded; the gate of the thirty-second MOS tube is connected to the source of the sixth MOS tube; the source of the thirty-third MOS tube inputs a power supply voltage, the gate of the thirty-third MOS tube is connected to the gate of the first MOS tube, the drain of the thirty-third MOS tube is connected to the gate of the twenty-eighth MOS tube, the gate of the twenty-ninth MOS tube, the drain of the twenty-ninth MOS tube, and the drain of the thirtieth MOS tube; the source of the thirty-fourth MOS tube inputs a power supply voltage, the gate of the thirty-fourth MOS tube is connected to the gate of the fifteenth MOS tube, and the drain of the thirty-fourth MOS tube is connected to the gate of the thirtieth MOS tube, the gate of the thirty-first MOS tube, and the drain of the thirty-first MOS tube;The source of the 35th MOS tube inputs the power supply voltage, the gate of the 35th MOS tube is connected to its drain, the gate of the 36th MOS tube, and the gate of the 37th MOS tube, and the drain of the 35th MOS tube is connected to the drain of the 32nd MOS tube; the source of the 36th MOS tube inputs the power supply voltage, the drain of the 36th MOS tube is connected to the drain of the 38th MOS tube, the gate of the 38th MOS tube, and the gate of the 39th MOS tube; the source of the 37th MOS tube inputs the power supply voltage, and the drain of the 37th MOS tube is connected to the drain of the 39th MOS tube. ;
[0010] In an optional embodiment, the multi-segment temperature compensation circuit also includes: a buffer module, wherein the input end of the buffer module is connected to the output end of the segmented compensation module, and the buffer module is used to dynamically adjust the compensated reference voltage when the load increases so that the compensated reference voltage is stably output.
[0011] The buffer module of the present invention dynamically adjusts the output voltage, thereby increasing the load capacity and stability.
[0012] In an optional implementation, the buffer module includes: a 40th MOS tube, a 41st MOS tube, a 42nd MOS tube, a 43rd MOS tube, a 44th MOS tube, a 45th MOS tube, a 46th MOS tube, a 47th MOS tube, a 48th MOS tube, a 49th MOS tube, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a third capacitor, a fourth capacitor and a fifth capacitor, wherein the drain of the 40th MOS tube is connected to the gate of the 38th MOS tube, the gate of the 40th MOS tube is connected to the source of the 49th MOS tube, the source of the 40th MOS tube is connected to the second end of the third capacitor, the second end of the sixth resistor, the source of the 46th MOS tube, the source of the 47th MOS tube, the source of the 48th MOS tube, the second end of the fifth capacitor and the second end of the seventh resistor; the source of the 41st MOS tube is input with a power supply voltage, the gate of the 41st MOS tube is connected with its drain, the gate of the 42nd MOS tube and the gate of the 43rd MOS tube, and the drain of the 41st MOS tube is connected with the first end of the sixth resistor; the source of the 42nd MOS tube is input with a power supply voltage, the gate of the 42nd MOS tube is connected with the drain ... The drain of the 44th MOS tube is connected to the source of the 44th MOS tube and the source of the 45th MOS tube; the source of the 43rd MOS tube inputs the power supply voltage, the drain of the 43rd MOS tube is connected to the gate of the 49th MOS tube, the first end of the 11th resistor, and the drain of the 48th MOS tube; the gate of the 44th MOS tube is connected to the first end of the fifth capacitor and the first end of the ninth resistor, the drain of the 44th MOS tube is connected to the drain of the 46th MOS tube, the gate of the 46th MOS tube, and the gate of the 47th MOS tube; the gate of the 45th MOS tube is connected to the first end of the third capacitor, the first end of the fifth resistor, and the drain of the 46th MOS tube. The first and second ends of the first and second MOS tubes are connected, the drain of the forty-fifth MOS tube is connected to the second end of the fourth capacitor, the gate of the forty-eighth MOS tube, and the drain of the forty-seventh MOS tube; the drain of the forty-ninth MOS tube inputs the power supply voltage, the source of the forty-ninth MOS tube is connected to the first end of the tenth resistor, and the gate of the fortieth MOS tube; the second end of the fifth resistor is connected to the drain of the twentieth MOS tube; the second end of the ninth resistor is connected to the first end of the seventh resistor through the eighth resistor; the second end of the tenth resistor is connected to the first end of the ninth resistor and the first end of the fifth capacitor; the second end of the eleventh resistor is connected to the first end of the fourth capacitor.
[0013] In an optional implementation manner, the first MOS tube, the second MOS tube, the third MOS tube, the fourth MOS tube, the ninth MOS tube, the tenth MOS tube, the fourteenth MOS tube, the fifteenth MOS tube, the sixteenth MOS tube, the nineteenth MOS tube, the twentieth MOS tube, the twenty-second MOS tube, the twenty-third MOS tube, the thirty-third MOS tube, the thirty-fourth MOS tube, the thirty-fifth MOS tube, the thirty-sixth MOS tube, the thirty-seventh MOS tube, the forty-first MOS tube, the forty-second MOS tube, the forty-third MOS tube, the forty-fourth MOS tube, and the forty-fifth MOS tube are all PMOS tubes; the fifth MOS tube, the second MOS tube, the third MOS tube, the fourth MOS tube, the fourth MOS tube, and the fifth MOS tube are all PMOS tubes; The sixth MOS tube, the seventh MOS tube, the eighth MOS tube, the eleventh MOS tube, the twelfth MOS tube, the thirteenth MOS tube, the seventeenth MOS tube, the eighteenth MOS tube, the twenty-first MOS tube, the twenty-fourth MOS tube, the twenty-fifth MOS tube, the twenty-sixth MOS tube, the twenty-seventh MOS tube, the twenty-eighth MOS tube, the twenty-ninth MOS tube, the thirtieth MOS tube, the thirty-first MOS tube, the thirty-second MOS tube, the thirty-eighth MOS tube, the thirty-ninth MOS tube, the fortieth MOS tube, the forty-sixth MOS tube, the forty-seventh MOS tube, the forty-eighth MOS tube and the forty-ninth MOS tube are all NMOS tubes. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0015] Figure 1 It is a temperature compensation circuit of the related art;
[0016] Figure 2 is a composition diagram of a multi-segment temperature compensation circuit according to an embodiment of the present invention;
[0017] Figure 3 is a composition diagram of another multi-segment temperature compensation circuit according to an embodiment of the present invention;
[0018] Figure 4(a) to Figure 4(c) is a specific circuit structure diagram of a composition diagram of a multi-segment temperature compensation circuit according to an embodiment of the present invention;
[0019] Figure 5 4 is a composition diagram of another multi-segment temperature compensation circuit according to an embodiment of the present invention. DETAILED DESCRIPTION
[0020] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.
[0021] In this embodiment, a multi-segment temperature compensation circuit is provided, such as Figure 2 As shown, it includes: a temperature coefficient current module and a segmented compensation module.
[0022] like Figure 2 As shown, the input end of the temperature coefficient current module inputs the power supply voltage, the output end of the temperature coefficient current module is connected to the input end of the segmented compensation module, and the temperature coefficient current module is used to output positive temperature coefficient current and negative temperature coefficient current; the segmented compensation module is used to superimpose the positive temperature coefficient current and the negative temperature coefficient current to obtain a compensated reference voltage.
[0023] Specifically, at high temperatures, the current with a positive temperature coefficient is larger than the current with a negative temperature coefficient, at low temperatures, the current with a negative temperature coefficient is larger than the current with a positive temperature coefficient, and at room temperature, the two are the same. Therefore, by utilizing this feature, a positive temperature coefficient current and a negative temperature coefficient current are obtained, and the positive temperature coefficient current and the negative temperature coefficient current are combined to suppress temperature drift, and a reference voltage with a small temperature drift coefficient is obtained.
[0024] In some optional embodiments, such as Figure 3 As shown, the temperature coefficient current module includes: a positive temperature coefficient current module and a negative temperature coefficient current module.
[0025] like Figure 3 As shown, the input end of the positive temperature coefficient current module inputs the power supply voltage, the output end of the positive temperature coefficient is connected to the input end of the segmented compensation module, and the positive temperature coefficient current module is used to output a positive temperature coefficient current.
[0026] like Figure 3 As shown, the input end of the negative temperature coefficient current module inputs the power supply voltage, the output end of the negative temperature coefficient is connected to the input end of the segmented compensation module, and the negative temperature coefficient current module is used to output a negative temperature coefficient current.
[0027] In some optional embodiments, such as Figure 4(a) to Figure 4(c)As shown, the positive temperature coefficient current module includes: a first MOS tube M1, a second MOS tube M2, a third MOS tube M3, a fourth MOS tube M4, a fifth MOS tube M5, a sixth MOS tube M6, a seventh MOS tube M7, an eighth MOS tube M8, a ninth MOS tube M9, a tenth MOS tube M10, an eleventh MOS tube M11, a twelfth MOS tube M12, a thirteenth MOS tube M13, a first resistor R1, a second resistor R2, and a first capacitor C1.
[0028] Figure 4(a) to Figure 4(c) In the middle, terminals ①③⑤⑦⑨ Connect to terminals ②④⑥⑧⑩ respectively Corresponding connection.
[0029] like Figure 4(a) to Figure 4(c) As shown, the source of the first MOS tube M1 inputs the power supply voltage VIN, the drain of the first MOS tube M1 is connected to the first end of the first resistor R1 and the gate of the second MOS, the gate of the first MOS tube M1 is connected to the gate of the third MOS tube M3, the gate of the fourth MOS tube M4, the drain of the ninth MOS tube M9, the drain of the eleventh MOS tube M11, the first end of the first capacitor C1, and the input end of the segmented compensation module (i.e., the gates of M20, M22, and M33); the source of the second MOS tube M2 inputs the power supply voltage, the drain of the second MOS tube M2 is connected to the drain of the fourth MOS tube M4, the gate of the fifth MOS tube M5, the gate of the sixth MOS tube M6, the drain of the sixth MOS tube M6, and the gate of the eleventh MOS tube M11; the source of the third MOS tube M3 inputs the power supply voltage, the drain of the third MOS tube M3 is connected to the drain of the fifth MOS tube M5 and the gate of the twelfth MOS tube M12; the source of the fourth MOS tube M4 inputs the power supply voltage voltage; the source of the fifth MOS tube M5 is connected to the drain of the seventh MOS tube M7; the source of the sixth MOS tube M6 is connected to the input end of the segmented compensation module, the gate of the seventh MOS tube M7, the drain of the eighth MOS tube M8, the gate of the eighth MOS tube M8, and the gate of the thirteenth MOS tube M13; the source of the seventh MOS tube M7 is connected to the first end of the second resistor R2; the source of the eighth MOS tube M8 is grounded; the source of the ninth MOS tube M9 inputs the power supply voltage, the gate of the ninth MOS tube M9 is connected to the gate of the tenth MOS tube M10, the drain of the tenth MOS tube M10, and the drain of the twelfth MOS tube M12; the source of the tenth MOS tube M10 inputs the power supply voltage; the source of the eleventh MOS tube M11 is connected to the source of the twelfth MOS tube M12 and the drain of the thirteenth MOS tube M13; the source of the thirteenth MOS tube M13 is grounded; the second end of the first resistor R1, the second end of the second resistor R2, and the second end of the first capacitor C1 are all grounded.
[0030] Specifically, the positive temperature coefficient current module is composed of multiple current mirror circuits, among which the drain-source voltage V GS The difference ΔV GS is a voltage with a positive temperature coefficient, so ΔV GS The ratio to R2 is also a positive temperature coefficient, where ΔV GS The ratio to R2 is the output current of the positive temperature coefficient current module, that is, the positive temperature coefficient current.
[0031] In some optional embodiments, such as Figure 4(a) to Figure 4(c) As shown, the negative temperature coefficient current module includes: a fourteenth MOS tube M14, a fifteenth MOS tube M15, a sixteenth MOS tube M16, a seventeenth MOS tube M17, an eighteenth MOS tube M18, a third resistor R3, and a sixth capacitor C6.
[0032] As shown in FIG4 , the source of the fourteenth MOS tube M14 inputs the power supply voltage, the gate of the fourteenth MOS tube M14 is connected to the gate of the first MOS tube M1, and the drain of the fourteenth MOS tube M14 is grounded through the sixth capacitor C6; the source of the fifteenth MOS tube M15 inputs the power supply voltage, the gate of the fifteenth MOS tube M15 is connected to its drain, the gate of the sixteenth MOS tube M16, and the input end of the segmented compensation module (i.e., the gates of M19, M23, and M34), and the drain of the fifteenth MOS tube M15 is connected to the gate of the sixteenth MOS tube M16. The drain of the seventeenth MOS tube M17 is connected; the source of the sixteenth MOS tube M16 inputs the power supply voltage, the drain of the sixteenth MOS tube M16 is connected to the gate of the eighteenth MOS tube M18, and the drain of the sixteenth MOS tube M16 is grounded through the third resistor R3; the gate of the seventeenth MOS tube M17 is connected to the drain of the eighteenth MOS tube M18, the gate of the seventeenth MOS tube M17 is grounded through the sixth capacitor C6, and the source of the seventeenth MOS tube M17 is grounded; the source of the eighteenth MOS tube M18 is grounded.
[0033] Specifically, the negative temperature coefficient current module is composed of multiple current mirror circuits. The drain-source voltage V GS is a negative temperature coefficient, so V GS The ratio with R3 is also a negative temperature coefficient, where V GS The ratio with R3 is the output current of the negative temperature coefficient current module, that is, the negative temperature coefficient current.
[0034] Specifically, the function of M17 and C6 is to prevent the negative temperature coefficient current module from being in a zero state.
[0035] In some optional embodiments, such as Figure 4(a) to Figure 4(c)As shown, the segmented compensation module includes: a nineteenth MOS tube M19, a twentieth MOS tube M20, a twenty-first MOS tube M21, a twenty-second MOS tube M22, a twenty-third MOS tube M23, a twenty-fourth MOS tube M24, a twenty-fifth MOS tube M25, a twenty-sixth MOS tube M26, a twenty-seventh MOS tube M27, a twenty-eighth MOS tube M28, a twenty-ninth MOS tube M29, a thirtieth MOS tube M30, a thirty-first MOS tube M31, a thirty-second MOS tube M32, a thirty-third MOS tube M33, a thirty-fourth MOS tube M34, a thirty-fifth MOS tube M35, a thirty-sixth MOS tube M36, a thirty-seventh MOS tube M37, a thirty-eighth MOS tube M38, a thirty-ninth MOS tube M39, a fourth resistor R4 and a second capacitor C2.
[0036] like Figure 4(a) to Figure 4(c)As shown, the source of the nineteenth MOS tube M19 inputs the power supply voltage, the gate of the nineteenth MOS tube M19 is connected to the gate of the fifteenth MOS tube M15, the gate of the twenty-third MOS tube M23, and the gate of the thirty-fourth MOS tube M34, the drain of the nineteenth MOS tube M19 is connected to the drain of the twenty-first MOS tube M21, and the gate of the twenty-first MOS tube M21 is connected; the source of the twentieth MOS tube M20 inputs the power supply voltage, the gate of the twentieth MOS tube M20 is connected to the gate of the first MOS tube M1, the drain of the twentieth MOS tube M20 is connected to the source of the twenty-first MOS tube M21, the first end of the fourth resistor R4, the first end of the second capacitor C2, the twenty-fourth MOS tube M34, and the drain of the twentieth MOS tube M20 is connected to the drain of the twenty-first MOS tube M21. The drain of the 28th MOS tube M28 is connected, and the drain of the 20th MOS tube M20 outputs the compensated reference voltage; the source of the 22nd MOS tube M22 inputs the power supply voltage, the gate of the 22nd MOS tube M22 is connected to the gate of the first MOS tube M1, and the drain of the 22nd MOS tube M22 is connected to the drain of the 26th MOS tube M26, the gate of the 26th MOS tube M26, and the gate of the 27th MOS tube M27; the source of the 23rd MOS tube M23 inputs the power supply voltage, and the drain of the 23rd MOS tube M23 is connected to the gate of the 24th MOS tube M24, the gate of the 25th MOS tube M25, and the gate of the 25th MOS tube M26. The drain of the twenty-fourth MOS tube M24 is connected to the drain of the twenty-fifth MOS tube M25 and the drain of the twenty-seventh MOS tube M27; the source of the twenty-fourth MOS tube M24 is connected to the source of the twenty-fifth MOS tube M25, the source of the twenty-sixth MOS tube M26, the source of the twenty-seventh MOS tube M27, the source of the twenty-eighth MOS tube M28, the source of the twenty-ninth MOS tube M29, the source of the thirtieth MOS tube M30, the source of the thirty-first MOS tube M31, the source of the thirty-second MOS, the source of the thirty-eighth MOS tube M38, the source of the thirty-ninth MOS, the second end of the fourth resistor R4, and the second end of the second capacitor C2, and then grounded; the gate of the thirty-second MOS tube M32 is connected to the source of the sixth MOS tube M6 The source of the thirty-third MOS tube M33 inputs the power supply voltage, the gate of the thirty-third MOS tube M33 is connected to the gate of the first MOS tube M1, the drain of the thirty-third MOS tube M33 is connected to the gate of the twenty-eighth MOS tube M28, the gate of the twenty-ninth MOS, the drain of the twenty-ninth MOS tube M29, and the drain of the thirtieth MOS tube M30; the source of the thirty-fourth MOS tube M34 inputs the power supply voltage, the gate of the thirty-fourth MOS tube M34 is connected to the gate of the fifteenth MOS tube M15, and the drain of the thirty-fourth MOS tube M34 is connected to the gate of the thirtieth MOS tube M30, the gate of the thirty-first MOS tube M31, and the drain of the thirty-first MOS tube M31;The source of the thirty-fifth MOS tube M35 inputs the power supply voltage, the gate of the thirty-fifth MOS tube M35 is connected to its drain, the gate of the thirty-sixth MOS tube M36, and the gate of the thirty-seventh MOS tube M37, and the drain of the thirty-fifth MOS tube M35 is connected to the drain of the thirty-second MOS tube M32; the source of the thirty-sixth MOS tube M36 inputs the power supply voltage, the drain of the thirty-sixth MOS tube M36 is connected to the drain of the thirty-eighth MOS tube M38, the gate of the thirty-eighth MOS tube M38, and the gate of the thirty-ninth MOS tube M39; the source of the thirty-seventh MOS tube M37 inputs the power supply voltage, and the drain of the thirty-seventh is connected to the drain of the thirty-ninth MOS tube M39. ;
[0037] The currents in M20, M22, M33 and M19, M23, M34 in the segmented compensation module are superimposed through the tubes M24 to M31 to generate a reference voltage at the drain of M20.
[0038] Specifically, refer to Figure 4(a) to Figure 4(c) At high temperature, the drain current of M33 is equal to the sum of the drain current of M30 and the drain current of M29. Because M33 copies the positive temperature coefficient current and M34 copies the negative temperature coefficient current, the drain current of M29 is equal to the current with positive temperature coefficient minus the current with negative temperature coefficient. Since M28 and M29 form a current mirror structure, the drain current of M28 is equal to the drain current of M29. The current flowing into R4 includes the negative temperature coefficient current copied by M19 and the positive temperature coefficient current copied by M20. At high temperature, the current flowing into resistor R4 is less than the drain current of M28. In summary, the temperature coefficient is small at high temperature.
[0039] Specifically, refer to Figure 4(a) to Figure 4(c) At low temperatures, the current with a negative temperature coefficient is greater than the current with a positive temperature coefficient. M22 copies the positive temperature coefficient current, and M23 copies the negative temperature coefficient current. The drain current of M25 is equal to the drain current of M23 minus the drain current of M22. Since M24 and M25 form a current mirror structure, the drain current of M24 is equal to the drain current of M25. At low temperatures, the current flowing into R4 reduces the drain current of M24, so the temperature coefficient is small at low temperatures.
[0040] To sum up, at high and low temperatures, the current flowing into R4 changes little, so the voltage at the upper end of R4 changes little, so the temperature drift coefficient is small.
[0041] In some optional embodiments, such as Figure 5 As shown, the multi-segment temperature compensation circuit also includes: a buffer module, wherein the input end of the buffer module is connected to the output end of the segmented compensation module, and the buffer module is used to dynamically adjust the compensated reference voltage when the load increases so that the compensated reference voltage can be stably output.
[0042] Specifically, the buffer module has an adaptive feedback regulation circuit inside. When the output voltage of the segmented compensation module changes, a stable voltage output is achieved based on closed-loop adaptive regulation, or when the load changes, the voltage is dynamically adjusted to increase the load capacity.
[0043] In some optional embodiments, such as Figure 4(a) to Figure 4(c) As shown, the buffer module includes: a 40th MOS tube M40, a 41st MOS tube M41, a 42nd MOS tube M42, a 43rd MOS tube M43, a 44th MOS tube M44, a 45th MOS tube M45, a 46th MOS tube M46, a 47th MOS tube M47, a 48th MOS tube M48, a 49th MOS tube M49, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a third capacitor C3, a fourth capacitor C4 and a fifth capacitor C5.
[0044] like Figure 4(a) to Figure 4(c)As shown, the drain of the 40th MOS tube M40 is connected to the gate of the 38th MOS tube M38, the gate of the 40th MOS tube M40 is connected to the source of the 49th MOS tube M49, the source of the 40th MOS tube M40 is connected to the second end of the third capacitor C3, the second end of the sixth resistor R6, the source of the 46th MOS tube M46, the source of the 47th MOS tube M47, the source of the 48th MOS tube M48, the second end of the fifth capacitor C5, and the second end of the seventh resistor R7; the source of the 41st MOS tube M41 is input with the power supply voltage, and the 41st MOS tube M49 is connected with .... The gate of the forty-second MOS tube M42 is connected to its drain, the gate of the forty-second MOS tube M42, and the gate of the forty-third MOS tube M43, and the drain of the forty-first MOS tube M41 is connected to the first end of the sixth resistor R6; the source of the forty-second MOS tube M42 inputs the power supply voltage, and the drain of the forty-second MOS tube M42 is connected to the source of the forty-fourth MOS tube M44 and the source of the forty-fifth MOS tube M45; the source of the forty-third MOS tube M43 inputs the power supply voltage, and the drain of the forty-third MOS tube M43 is connected to the gate of the forty-ninth MOS tube M49, the first end of the eleventh resistor R11, The drain of the forty-eighth MOS tube M48 is connected; the gate of the forty-fourth MOS tube M44 is connected to the first end of the fifth capacitor C5 and the first end of the ninth resistor R9, the drain of the forty-fourth MOS tube M44 is connected to the drain of the forty-sixth MOS tube M46, the gate of the forty-sixth MOS tube M46, and the gate of the forty-seventh MOS tube M47; the gate of the forty-fifth MOS tube M45 is connected to the first end of the third capacitor C3 and the first end of the fifth resistor R5, the drain of the forty-fifth MOS tube M45 is connected to the second end of the fourth capacitor C4, the gate of the forty-eighth MOS tube M48, the gate of the forty-seventh MOS tube M47 The drain of the seventh MOS tube M47 is connected; the drain of the forty-ninth MOS tube M49 inputs the power supply voltage, the source of the forty-ninth MOS tube M49 is connected to the first end of the tenth resistor R10 and the gate of the fortieth MOS tube M40; the second end of the fifth resistor R5 is connected to the drain of the twentieth MOS tube M20; the second end of the ninth resistor R9 is connected to the first end of the seventh resistor R7 through the eighth resistor R8; the second end of the tenth resistor R10 is connected to the first end of the ninth resistor R9 and the first end of the fifth capacitor C5; the second end of the eleventh resistor R11 is connected to the first end of the fourth capacitor C4.
[0045] Figure 4(a) to Figure 4(c)In the example, the gate voltage of M45 is connected to the upper voltage of R4. When V1 decreases, the gate voltage of M44 decreases, so the drain current of M44 increases and the drain current of M45 decreases (this is because the sum of the currents of M44 and M45 is a constant, namely the drain current of M42). Therefore, the drain voltage of M47 decreases, causing the drain voltage of M48 to increase, and the gate voltage of M49 to increase, so the source voltage of M49 increases, which leads to an increase in the voltage of V1. When the voltage of V1 increases, the gate voltage of N44 increases, the drain current of M44 decreases, the drain current of M45 increases, the drain voltage of M47 increases, and the drain voltage of M48 decreases, so the gate voltage of M49 decreases, so the source voltage of M49 decreases, which leads to a decrease in V1.
[0046] Figure 4(a) to Figure 4(c) In the example, when the load increases, the output voltages V1, V2, and V3 will change. Because there is a feedback structure, the output voltage can be dynamically adjusted to reduce its change. Increasing the number of M49 or the aspect ratio can also increase the load capacity.
[0047] Optionally, Figure 4(a) to Figure 4(c) Among them, the first MOS tube M1, the second MOS tube M2, the third MOS tube M3, the fourth MOS tube M4, the ninth MOS tube M9, the tenth MOS tube M10, the fourteenth MOS tube M14, the fifteenth MOS tube M15, the sixteenth MOS tube M16, the nineteenth MOS tube M19, the twentieth MOS tube M20, the twenty-second MOS tube M22, the twenty-third MOS tube M23, the thirty-third MOS tube M33, the thirty-fourth MOS tube M34, the thirty-fifth MOS tube M35, the thirty-sixth MOS tube M36, the thirty-seventh MOS tube M37, the forty-first MOS tube M41, the forty-second MOS tube M42, the forty-third MOS tube M43, the forty-fourth MOS tube M44, and the forty-fifth MOS tube M45 are all PMOS tubes; the fifth MOS tube M5, the sixth MOS tube M6, The seventh MOS tube M7, the eighth MOS tube M8, the eleventh MOS tube M11, the twelfth MOS tube M12, the thirteenth MOS tube M13, the seventeenth MOS tube M17, the eighteenth MOS tube M18, the twenty-first MOS tube M21, the twenty-fourth MOS tube M24, the twenty-fifth MOS tube M25, the twenty-sixth MOS tube M26, the twenty-seventh MOS tube M27, the twenty-eighth MOS tube M28, the twenty-ninth MOS tube M29, the thirtieth MOS tube M30, the thirty-first MOS tube M31, the thirty-second MOS tube M32, the thirty-eighth MOS tube M38, the thirty-ninth MOS tube M39, the fortieth MOS tube M40, the forty-sixth MOS tube M46, the forty-seventh MOS tube M47, the forty-eighth MOS tube M48, and the forty-ninth MOS tube M49 are all NMOS tubes.
[0048] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.
Claims
1. A multi-segment temperature compensation circuit, characterized in that: include: Temperature coefficient current module, segmented compensation module, among which, The input end of the temperature coefficient current module inputs the power supply voltage, the output end of the temperature coefficient current module is connected to the input end of the segmented compensation module, and the temperature coefficient current module is used to output a positive temperature coefficient current and a negative temperature coefficient current; The segmented compensation module is used to superimpose the positive temperature coefficient current and the negative temperature coefficient current to obtain a compensated reference voltage.
2. The multi-segment temperature compensation circuit according to claim 1, characterized in that: The temperature coefficient current module includes: a positive temperature coefficient current module and a negative temperature coefficient current module, wherein: The input end of the positive temperature coefficient current module inputs the power supply voltage, the output end of the positive temperature coefficient is connected to the input end of the segmented compensation module, and the positive temperature coefficient current module is used to output a positive temperature coefficient current; The input end of the negative temperature coefficient current module inputs the power supply voltage, the output end of the negative temperature coefficient is connected to the input end of the segmented compensation module, and the negative temperature coefficient current module is used to output a negative temperature coefficient current.
3. The multi-segment temperature compensation circuit according to claim 2, characterized in that: The positive temperature coefficient current module includes: a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a seventh MOS tube, an eighth MOS tube, a ninth MOS tube, a tenth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a thirteenth MOS tube, a first resistor, a second resistor, and a first capacitor, wherein: The source of the first MOS tube inputs a power supply voltage, the drain of the first MOS tube is connected to the first end of the first resistor and the gate of the second MOS, and the gate of the first MOS tube is connected to the gate of the third MOS tube, the gate of the fourth MOS tube, the drain of the ninth MOS tube, the drain of the eleventh MOS tube, the first end of the first capacitor, and the input end of the segmented compensation module; The source of the second MOS tube inputs the power supply voltage, and the drain of the second MOS tube is connected to the drain of the fourth MOS tube, the gate of the fifth MOS tube, the gate of the sixth MOS tube, the drain of the sixth MOS tube, and the gate of the eleventh MOS tube; The source of the third MOS tube inputs the power supply voltage, and the drain of the third MOS tube is connected to the drain of the fifth MOS tube and the gate of the twelfth MOS tube; The source of the fourth MOS tube inputs a power supply voltage; The source of the fifth MOS tube is connected to the drain of the seventh MOS tube; The source of the sixth MOS tube is connected to the input end of the segmented compensation module, the gate of the seventh MOS tube, the drain of the eighth MOS tube, the gate of the eighth MOS tube, and the gate of the thirteenth MOS tube; The source of the seventh MOS tube is connected to the first end of the second resistor; The source of the eighth MOS tube is grounded; The source of the ninth MOS tube inputs a power supply voltage, and the gate of the ninth MOS tube is connected to the gate of the tenth MOS tube, the drain of the tenth MOS tube, and the drain of the twelfth MOS tube; The source of the tenth MOS tube inputs a power supply voltage; The source of the eleventh MOS tube is connected to the source of the twelfth MOS tube and the drain of the thirteenth MOS tube; The source of the thirteenth MOS tube is grounded; The second end of the first resistor, the second end of the second resistor, and the second end of the first capacitor are all grounded.
4. The multi-segment temperature compensation circuit according to claim 3, characterized in that: The negative temperature coefficient current module includes: a fourteenth MOS tube, a fifteenth MOS tube, a sixteenth MOS tube, a seventeenth MOS tube, an eighteenth MOS tube, a third resistor, and a sixth capacitor, wherein: The source of the fourteenth MOS tube is input with a power supply voltage, the gate of the fourteenth MOS tube is connected with the gate of the first MOS tube, and the drain of the fourteenth MOS tube is grounded through the sixth capacitor; The source of the fifteenth MOS tube inputs the power supply voltage, the gate of the fifteenth MOS tube is connected to its drain, the gate of the sixteenth MOS tube, and the input end of the segmented compensation module, and the drain of the fifteenth MOS tube is connected to the drain of the seventeenth MOS tube; The source of the sixteenth MOS tube inputs the power supply voltage, the drain of the sixteenth MOS tube is connected to the gate of the eighteenth MOS tube, and the drain of the sixteenth MOS tube is grounded through the third resistor; The gate of the seventeenth MOS tube is connected to the drain of the eighteenth MOS tube, the gate of the seventeenth MOS tube is grounded through the sixth capacitor, and the source of the seventeenth MOS tube is grounded; The source of the eighteenth MOS tube is grounded.
5. The multi-segment temperature compensation circuit according to claim 4, characterized in that: The segmented compensation module includes: a nineteenth MOS tube, a twentieth MOS tube, a twenty-first MOS tube, a twenty-second MOS tube, a twenty-third MOS tube, a twenty-fourth MOS tube, a twenty-fifth MOS tube, a twenty-sixth MOS tube, a twenty-seventh MOS tube, a twenty-eighth MOS tube, a twenty-ninth MOS tube, a thirtieth MOS tube, a thirty-first MOS tube, a thirty-second MOS tube, a thirty-third MOS tube, a thirty-fourth MOS tube, a thirty-fifth MOS tube, a thirty-sixth MOS tube, a thirty-seventh MOS tube, a thirty-eighth MOS tube, a thirty-ninth MOS tube, a fourth resistor and a second capacitor, wherein: The source of the nineteenth MOS tube inputs the power supply voltage, the gate of the nineteenth MOS tube is connected to the gate of the fifteenth MOS tube, the gate of the twenty-third MOS tube, and the gate of the thirty-fourth MOS tube, and the drain of the nineteenth MOS tube is connected to the drain of the twenty-first MOS tube and the gate of the twenty-first MOS tube; The source of the 20th MOS tube inputs the power supply voltage, the gate of the 20th MOS tube is connected to the gate of the first MOS tube, the drain of the 20th MOS tube is connected to the source of the 21st MOS tube, the first end of the fourth resistor, the first end of the second capacitor, the drain of the 24th MOS tube, and the drain of the 28th MOS tube, and the drain of the 20th MOS tube outputs the compensated power supply voltage; A power supply voltage is input to the source of the 22nd MOS tube, a gate of the 22nd MOS tube is connected to the gate of the first MOS tube, and a drain of the 22nd MOS tube is connected to the drain of the 26th MOS tube, the gate of the 26th MOS tube, and the gate of the 27th MOS tube; A power supply voltage is input to the source of the twenty-third MOS tube, and a drain of the twenty-third MOS tube is connected to the gate of the twenty-fourth MOS tube, the gate of the twenty-fifth MOS tube, the drain of the twenty-fifth MOS tube, and the drain of the twenty-seventh MOS tube; The source of the 24th MOS tube is connected to the source of the 25th MOS tube, the source of the 26th MOS tube, the source of the 27th MOS tube, the source of the 28th MOS tube, the source of the 29th MOS tube, the source of the 30th MOS tube, the source of the 31st MOS tube, the source of the 32nd MOS tube, the source of the 38th MOS tube, the source of the 39th MOS tube, the second end of the fourth resistor, and the second end of the second capacitor, and then grounded; The gate of the thirty-second MOS tube is connected to the source of the sixth MOS tube; The source of the thirty-third MOS tube inputs the power supply voltage, the gate of the thirty-third MOS tube is connected to the gate of the first MOS tube, and the drain of the thirty-third MOS tube is connected to the gate of the twenty-eighth MOS tube, the gate of the twenty-ninth MOS tube, the drain of the twenty-ninth MOS tube, and the drain of the thirtieth MOS tube; The source of the thirty-fourth MOS tube inputs the power supply voltage, the gate of the thirty-fourth MOS tube is connected to the gate of the fifteenth MOS tube, and the drain of the thirty-fourth MOS tube is connected to the gate of the thirtieth MOS tube, the gate of the thirty-first MOS tube, and the drain of the thirty-first MOS tube; The source of the thirty-fifth MOS tube inputs the power supply voltage, the gate of the thirty-fifth MOS tube is connected to its drain, the gate of the thirty-sixth MOS tube, and the gate of the thirty-seventh MOS tube, and the drain of the thirty-fifth MOS tube is connected to the drain of the thirty-second MOS tube; The source of the thirty-sixth MOS tube inputs the power supply voltage, and the drain of the thirty-sixth MOS tube is connected to the drain of the thirty-eighth MOS tube, the gate of the thirty-eighth MOS tube, and the gate of the thirty-ninth MOS tube; The source of the thirty-seventh MOS tube inputs the power supply voltage, and the drain of the thirty-seventh MOS tube is connected to the drain of the thirty-ninth MOS tube.
6. The multi-segment temperature compensation circuit according to claim 5, characterized in that: Also includes: Buffer module, where The input end of the buffer module is connected to the output end of the segmented compensation module. The buffer module is used to dynamically adjust the compensated reference voltage when the load increases, so that the compensated reference voltage can be output stably.
7. The multi-segment temperature compensation circuit according to claim 6, characterized in that: The buffer module includes: a 40th MOS tube, a 41st MOS tube, a 42nd MOS tube, a 43rd MOS tube, a 44th MOS tube, a 45th MOS tube, a 46th MOS tube, a 47th MOS tube, a 48th MOS tube, a 49th MOS tube, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a third capacitor, a fourth capacitor and a fifth capacitor, wherein: The drain of the 40th MOS tube is connected to the gate of the 38th MOS tube, the gate of the 40th MOS tube is connected to the source of the 49th MOS tube, the source of the 40th MOS tube is connected to the second end of the third capacitor, the second end of the sixth resistor, the source of the 46th MOS tube, the source of the 47th MOS tube, the source of the 48th MOS tube, the second end of the fifth capacitor, and the second end of the seventh resistor; The source of the forty-first MOS tube inputs the power supply voltage, the gate of the forty-first MOS tube is connected to its drain, the gate of the forty-second MOS tube, and the gate of the forty-third MOS tube, and the drain of the forty-first MOS tube is connected to the first end of the sixth resistor; The source of the 42nd MOS tube is input with a power supply voltage, and the drain of the 42nd MOS tube is connected with the source of the 44th MOS tube and the source of the 45th MOS tube; The source of the forty-third MOS tube inputs the power supply voltage, and the drain of the forty-third MOS tube is connected to the gate of the forty-ninth MOS tube, the first end of the eleventh resistor, and the drain of the forty-eighth MOS tube; The gate of the forty-fourth MOS tube is connected to the first end of the fifth capacitor and the first end of the ninth resistor, and the drain of the forty-fourth MOS tube is connected to the drain of the forty-sixth MOS tube, the gate of the forty-sixth MOS tube, and the gate of the forty-seventh MOS tube; The gate of the forty-fifth MOS tube is connected to the first end of the third capacitor and the first end of the fifth resistor, and the drain of the forty-fifth MOS tube is connected to the second end of the fourth capacitor, the gate of the forty-eighth MOS tube, and the drain of the forty-seventh MOS tube; The drain of the 49th MOS tube is input with a power supply voltage, the source of the 49th MOS tube is connected to the first end of the tenth resistor, and the gate of the 40th MOS tube is connected; The second end of the fifth resistor is connected to the drain of the twentieth MOS transistor; The second end of the ninth resistor is connected to the first end of the seventh resistor through the eighth resistor; The second end of the tenth resistor is connected to the first end of the ninth resistor and the first end of the fifth capacitor; The second end of the eleventh resistor is connected to the first end of the fourth capacitor.
8. The multi-segment temperature compensation circuit according to claim 7, characterized in that: The first MOS tube, the second MOS tube, the third MOS tube, the fourth MOS tube, the ninth MOS tube, the tenth MOS tube, the fourteenth MOS tube, the fifteenth MOS tube, the sixteenth MOS tube, the nineteenth MOS tube, the twentieth MOS tube, the twenty-second MOS tube, the twenty-third MOS tube, the thirty-third MOS tube, the thirty-fourth MOS tube, the thirty-fifth MOS tube, the thirty-sixth MOS tube, the thirty-seventh MOS tube, the forty-first MOS tube, the forty-second MOS tube, the forty-third MOS tube, the forty-fourth MOS tube, and the forty-fifth MOS tube are all PMOS tubes; The fifth MOS tube, the sixth MOS tube, the seventh MOS tube, the eighth MOS tube, the eleventh MOS tube, the twelfth MOS tube, the thirteenth MOS tube, the seventeenth MOS tube, the eighteenth MOS tube, the twenty-first MOS tube, the twenty-fourth MOS tube, the twenty-fifth MOS tube, the twenty-sixth MOS tube, the twenty-seventh MOS tube, the twenty-eighth MOS tube, the twenty-ninth MOS tube, the thirtieth MOS tube, the thirty-first MOS tube, the thirty-second MOS tube, the thirty-eighth MOS tube, the thirty-ninth MOS tube, the fortieth MOS tube, the forty-sixth MOS tube, the forty-seventh MOS tube, the forty-eighth MOS tube and the forty-ninth MOS tube are all NMOS tubes.