A method for implementing telephone audio mixing using FPGA

By implementing telephone audio mixing through FPGA chips and utilizing serial-to-parallel conversion and lookup table transformation, the problem of noise accumulation during the cascading of optical transmission equipment was solved, achieving efficient and low-latency audio processing and improving the audio quality and system stability of the fire telephone system.

CN119832918BActive Publication Date: 2026-07-17SHENZHEN FANHAI SANJIANG ELECTRONICS CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SHENZHEN FANHAI SANJIANG ELECTRONICS CO LTD
Filing Date
2025-01-14
Publication Date
2026-07-17

AI Technical Summary

Technical Problem

In existing technologies, when optical transmission equipment is cascaded, the analog mixing method leads to the accumulation of audio signal noise, which reduces call quality and makes it difficult to achieve efficient and low-latency telephone audio mixing.

Method used

Telephone audio mixing is implemented using an FPGA chip. Through serial-to-parallel conversion, lookup table conversion, and timing control, multi-channel audio data addition is performed. Audio data conversion and verification are performed in accordance with the ITU-T G.711 standard. The parallel processing capability and resources of the FPGA are used to efficiently achieve audio mixing.

Benefits of technology

It reduces hardware design complexity and system cost, and provides high-quality, low-latency audio processing, making it suitable for audio signal transmission and processing in fire telephone systems.

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Abstract

This invention relates to a method for implementing telephone audio mixing using an FPGA, comprising the use of an FPGA chip, and the method including the following steps: S10: The FPGA chip receives data frames sent by an external encoder and extracts the serial PCM code stream therein; S20: The FPGA chip converts the serial PCM code stream obtained in S10 into parallel linear PCM code; S30: Under the control of a timing control logic module, the multi-path linear PCM data is added using a multi-path adder to obtain a new parallel linear PCM code, thereby achieving the mixing effect; S40: The FPGA chip then converts the new parallel linear PCM code obtained in S30 into a new serial PCM code stream and sends the new serial PCM code stream to the external encoder. This method is ingeniously designed. Implementing the telephone audio signal mixing function within an FPGA can greatly reduce the complexity of hardware design and lower system costs. Furthermore, through research on digital audio signals and mastery of related technologies, more functional applications of digital audio can be developed.
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Description

Technical Field

[0001] This invention relates to the field of audio processing technology, and more specifically, to a method for implementing telephone audio mixing using an FPGA. Background Technology

[0002] In practical applications of fire telephone systems, analog audio is generally used. When multiple telephone extensions are talking to the main telephone line, the audio signals of each extension and the main telephone line can be directly superimposed on the analog telephone bus to achieve the effect of analog mixing.

[0003] When using optical transmission technology to extend the distance of a fire telephone system, analog audio signals need to be converted into digital audio signals, and then combined into data frames according to data protocols using timing logic circuits to achieve interconnection and interoperability of optical transmission. If the optical transmission equipment uses a point-to-point connection, analog mixing can still be completed on the analog telephone bus side, thus enabling simultaneous calls between multiple fire telephone extensions. However, when cascading these optical transmission devices, it may be necessary to implement mixing functionality at each stage of the optical transmission equipment. Commercially available mixing methods generally use analog mixing, which combines the CODEC chip on the optical transmission equipment with an operational amplifier to build an additive circuit for mixing. However, when multiple stages of mixing are required, the accumulation of audio signal noise will degrade call quality. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a method for implementing telephone audio mixing using FPGA, in view of the above-mentioned defects of the prior art.

[0005] The technical solution adopted by this invention to solve its technical problem is: a method for implementing telephone audio mixing using an FPGA chip, wherein the method includes the following steps:

[0006] S10: The FPGA chip receives data frames sent by an external encoder and extracts the serial PCM code stream from them;

[0007] S20: The FPGA chip converts the serial PCM code stream obtained in S10 into a parallel linear PCM code;

[0008] S30: The converted parallel linear PCM code is stored in the register group. Multiple registers in the register group correspond to the audio data of different sub-units. Under the control of the timing control logic module, the multi-line linear PCM data is added by a multi-channel adder to obtain a new parallel linear PCM code, so as to achieve the mixing effect.

[0009] S40: The FPGA chip then converts the new parallel linear PCM code obtained in S30 into a new serial PCM code stream; and sends the new serial PCM code stream to the external encoder.

[0010] The method for implementing telephone audio mixing using FPGA according to the present invention, wherein in step S20, the FPGA chip performs serial-to-parallel conversion on the serial PCM code stream, converting the serial PCM code stream into an 8-bit parallel PCM code.

[0011] The method for implementing telephone audio mixing using FPGA described in this invention involves transmitting multiple audio data in a time-division multiplexing manner within a serial data frame. The timing control logic module within the FPGA extracts a segment of audio data at different times and generates an 8-bit parallel PCM code corresponding to different extensions.

[0012] The present invention describes a method for implementing telephone audio mixing using an FPGA, wherein the FPGA chip internally has a first lookup table for converting PCM code to linear code and a second lookup table for converting linear code to PCM code; the address contents of the first lookup table and the second lookup table are both target code types, and when parallel PCM codes are connected to the address signal of the first lookup table, the first lookup table outputs the target code type;

[0013] The method for implementing telephone audio mixing using FPGA described in this invention includes step S40, in which the new parallel linear PCM code is converted from linear code to PCM code and from parallel signal to serial signal to obtain a new serial linear PCM code.

[0014] The method for implementing telephone audio mixing using FPGA described in this invention involves the FPGA receiving data from the RD port of an optical module, first detecting and locating the frame synchronization header, then finding new serial linear PCM code data based on the data frame structure, and finally sending the serial linear PCM code data to an external encoder after processing.

[0015] The method for implementing telephone audio mixing using FPGA as described in this invention includes the following steps for the FPGA chip to perform serial-to-parallel conversion on a serial PCM bitstream:

[0016] S21: Clock and data synchronization. The PLL or DLL of the FPGA chip is used to multiply and adjust the phase of the input serial clock to generate a sampling clock that is synchronized with the serial data.

[0017] S22: Serial data reception, receiving serial PCM code stream through the FPGA's serial receiver and matching the serial data rate with the FPGA's internal clock rate;

[0018] S23: Serial-to-parallel conversion. In each clock cycle, the next bit in the data stream is shifted into the register, while all other bits in the register are shifted one bit to the right. The FPGA uses a frame synchronization signal to reset the shift register, ensuring that the parallel output data is aligned. When the shift register is full of data, the data in the entire register can be output in parallel within one clock cycle to obtain parallel linear PCM code, thus completing the serial-to-parallel conversion.

[0019] The method for implementing telephone audio mixing using FPGA according to the present invention further includes the following steps:

[0020] S24: Data verification and processing. After the parallel linear PCM code is output, data verification (such as parity check) and format conversion are performed to ensure the correctness of the data.

[0021] The beneficial effects of this invention are as follows: the method of implementing telephone audio mixing using FPGA is ingeniously designed. Implementing the telephone audio signal mixing function within the FPGA can greatly reduce the complexity of hardware design and reduce system costs. On the other hand, through the research on digital audio signals and the mastery of related technologies, more functional applications of digital audio can be developed. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the present invention will be further described below in conjunction with the accompanying drawings and embodiments. The drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort:

[0023] Figure 1 This is a block diagram illustrating the principle of a preferred embodiment of the telephone audio mixing method using FPGA.

[0024] Figure 2 This is the first lookup table for PCM code to linear code conversion in a preferred embodiment of the present invention;

[0025] Figure 3 This is the second lookup table for the linear code to PCM code conversion in a preferred embodiment of the present invention;

[0026] Figure 4 This is a flowchart of a preferred embodiment of the present invention for implementing a telephone audio mixing method using an FPGA. Detailed Implementation

[0027] The terms "first," "second," "third," and "fourth," etc., used in the specification, claims, and accompanying drawings of this invention are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0028] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0029] "Multiple" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. The character " / " generally indicates that the preceding and following related objects have an "or" relationship.

[0030] Furthermore, the terms indicating orientation, such as "up, down, front, back, left, right, upper end, lower end, longitudinal," etc., are all based on the posture and position of the device or equipment described in this solution during normal use.

[0031] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, a clear and complete description will be provided below in conjunction with the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the protection scope of the present invention.

[0032] A preferred embodiment of the present invention provides a method for implementing telephone audio mixing using an FPGA, such as... Figure 1-4 As shown, an FPGA chip is used. In this embodiment, the FPGA is a domestically produced FPGA with an embedded M3 core, which realizes fire telephone protocol processing, digital audio signal processing, digital signal transmission and reception processing, etc.

[0033] The method includes the following steps:

[0034] S10: The FPGA chip receives data frames sent by an external encoder and extracts the serial PCM code stream from them;

[0035] S20: The FPGA chip converts the serial PCM code stream obtained in S10 into a parallel linear PCM code;

[0036] In step S20, the FPGA chip performs serial-to-parallel conversion on the serial PCM code stream, converting the serial PCM code stream into an 8-bit parallel PCM code.

[0037] Multiple audio data streams are transmitted in a time-division multiplexing manner within a serial data frame. The timing control logic module within the FPGA extracts a segment of audio data at different times and generates an 8-bit parallel PCM code corresponding to different extensions.

[0038] The conversion relationship between PCM and linear codes conforms to the ITU-T G.711 standard. PCM code is the standard digital audio data used by all CODEC chips currently on the market. It is a standard data for digitizing analog audio signals at an 8K sampling rate according to the classic Shannon sampling theorem in information theory and communication and signal processing. Audio data conversion can be performed efficiently and quickly using a lookup table.

[0039] By using FPGA to convert serial to parallel PCM streams and convert audio data according to the G.711 standard, we can provide an efficient, low-latency, standards-compliant, and flexible audio processing solution, which is very suitable for telephone audio mixing and other real-time audio processing applications.

[0040] The steps of the FPGA chip to perform serial-to-parallel conversion on the serial PCM code stream are as follows:

[0041] S21: Clock and data synchronization. The PLL or DLL of the FPGA chip is used to multiply and adjust the phase of the input serial clock to generate a sampling clock synchronized with the serial data. This can reduce data sampling errors and improve the accuracy of data reception. At the same time, it ensures the stability of data during transmission and improves data processing speed and efficiency.

[0042] S22: Serial data reception. The serial PCM code stream is received through the serial receiver of the FPGA, and the rate of the serial data is matched with the internal clock rate of the FPGA for easy subsequent processing.

[0043] S23: Serial-to-parallel conversion. In each clock cycle, the next bit in the data stream is shifted into the register, while all other bits in the register are shifted one bit to the right. The FPGA uses a frame synchronization signal to reset the shift register, ensuring that the parallel output data is aligned. When the shift register is full of data, the entire register's data can be output in parallel within one clock cycle to obtain parallel linear PCM code, thus completing the serial-to-parallel conversion. The parallel processing capability of the FPGA can be utilized to improve data processing speed. The frame synchronization signal is used to reset the shift register to ensure parallel data alignment and avoid data misalignment.

[0044] S24: Data verification and processing. After the parallel linear PCM code is output, data verification (such as parity check) and format conversion are performed on it. This can detect and correct errors that may occur during data transmission to ensure the correctness of the data.

[0045] Furthermore, the FPGA chip internally includes a first lookup table (LUT1) for converting PCM code to linear code and a second lookup table (LUT2) for converting linear code to PCM code. The address contents of both the first and second lookup tables are the target code type. When a parallel PCM code is connected to the address signal of the first lookup table, the first lookup table outputs the target code type. The contents of the first lookup table are as follows: Figure 2 As shown; the contents of the second lookup table are as follows: Figure 3 As shown. Using lookup tables can reduce the logic resources required in an FPGA. Lookup tables are an efficient hardware implementation method that does not require complex logic circuits; they can reduce data processing latency, which is especially important for real-time audio processing; using lookup tables for PCM code to linear code conversion and reverse conversion can provide a fast, accurate, low-latency and resource-efficient audio data processing solution, making it very suitable for the use of FPGAs in audio processing applications.

[0046] S30: The converted parallel linear PCM code is stored in a register group. Multiple registers in the register group correspond to audio data from different sub-units. Under the control of the timing control logic module, the multi-line linear PCM data is added using a multi-channel adder to obtain a new parallel linear PCM code, thus achieving the mixing effect. Linear encoding has a high dynamic range and accuracy. The mixing achieved in this way not only provides high-quality audio processing effects, but also makes full use of the FPGA's parallel processing capabilities and hardware resources to achieve efficient and real-time audio mixing functions.

[0047] In this embodiment, the FPGA has an internal adder core, and the adder function can be easily used by calling the module. It should be noted that, in order to ensure call quality, the output of the adder cannot be used directly. Instead, range, amplitude, and other parameters must be determined, and appropriate attenuation should be applied according to the number of mixing channels.

[0048] S40: The FPGA chip then converts the new parallel linear PCM code obtained in S30 into a new serial PCM code stream; and sends the new serial PCM code stream to the external encoder.

[0049] In step S40, the new parallel linear PCM code is further converted from linear code to PCM code and from parallel signal to serial signal to obtain a new serial linear PCM code.

[0050] The FPGA receives data from the RD port of the optical module. First, it detects and locates the frame synchronization header. Then, based on the data frame structure, it finds the new serial linear PCM code data. This serial linear PCM code data is processed and sent to the external encoder. Detecting the frame synchronization header ensures correct data alignment during transmission, preventing data misalignment. Accurately locating the serial linear PCM code data according to the data frame structure improves the accuracy of data processing. The converted serial PCM code stream is compatible with the standard interfaces of external encoders or other devices, facilitating system integration.

[0051] On the one hand, the FPGA chip sends the required calculation results to the local encoder circuit to realize the conversion of digital audio to analog audio, thereby enabling audio reception by the local device. On the other hand, the FPGA sends the corresponding calculation results to the upper-level host, optical transmission equipment, or lower-level optical transmission equipment via data frames, where each device performs the corresponding processing. It has strong adaptability, versatility, and portability. Through these steps, the FPGA can not only effectively process and convert audio data, but also ensure that the data is sent to the external encoder in the correct manner, thereby maintaining a high standard of audio quality and system stability throughout the communication link.

[0052] This method of using FPGA to implement telephone audio mixing achieves good sound quality while processing and transmitting audio signals with deterministic and extremely low latency. It improves the application scenarios of traditional fire telephone systems and meets specific requirements such as dispersed terminal deployment, long distances, and telephone host networking.

[0053] It should be understood that those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A method for implementing telephone audio mixing using an FPGA, comprising employing an FPGA chip, characterized in that, The method includes the following steps: S10: The FPGA chip receives data frames sent by an external encoder and extracts the serial PCM code stream from them; S20: The FPGA chip converts the serial PCM code stream obtained in S10 into a parallel linear PCM code; S30: The converted parallel linear PCM code is stored in the register group. Multiple registers in the register group correspond to the audio data of different sub-units. Under the control of the timing control logic module, the multi-line linear PCM data is added by a multi-channel adder to obtain a new parallel linear PCM code, so as to achieve the mixing effect. S40: The FPGA chip then converts the new parallel linear PCM code obtained in S30 into a new serial PCM code stream; and sends the new serial PCM code stream to the external encoder. In step S20, the FPGA chip performs serial-to-parallel conversion on the serial PCM code stream, converting the serial PCM code stream into an 8-bit parallel PCM code. Multiple audio data streams are transmitted in a time-division multiplexing manner within a serial data frame. The timing control logic module within the FPGA extracts a segment of audio data at different times and generates an 8-bit parallel PCM code corresponding to different extensions. The FPGA chip has a first lookup table for converting PCM code to linear code and a second lookup table for converting linear code to PCM code. The address contents of both the first and second lookup tables are the target code type. When the parallel PCM code is connected to the address signal of the first lookup table, the first lookup table outputs the target code type.

2. The method for implementing telephone audio mixing using FPGA according to claim 1, characterized in that, In step S40, the new parallel linear PCM code is further converted from linear code to PCM code and from parallel signal to serial signal to obtain a new serial linear PCM code.

3. The method for implementing telephone audio mixing using FPGA according to claim 2, characterized in that, The FPGA receives data from the RD port of the optical module, first detects and locates the frame synchronization header, and then finds the new serial linear PCM code data according to the data frame structure. The serial linear PCM code data is then processed and sent to the external encoder.

4. The method for implementing telephone audio mixing using FPGA according to claim 1, characterized in that, The steps for using an FPGA chip to perform serial-to-parallel conversion on a serial PCM bitstream are as follows: S21: Clock and data synchronization. The PLL or DLL of the FPGA chip is used to multiply and adjust the phase of the input serial clock to generate a sampling clock that is synchronized with the serial data. S22: Serial data reception, receiving serial PCM code stream through the FPGA's serial receiver and matching the serial data rate with the FPGA's internal clock rate; S23: Serial-to-parallel conversion. In each clock cycle, the next bit in the data stream is shifted into the register, while all other bits in the register are shifted one bit to the right. The FPGA uses a frame synchronization signal to reset the shift register, ensuring that the parallel output data is aligned. When the shift register is full of data, the data in the entire register can be output in parallel within one clock cycle to obtain parallel linear PCM code, thus completing the serial-to-parallel conversion.

5. The method for implementing telephone audio mixing using FPGA according to claim 4, characterized in that, It also includes the following steps: S24: Data verification and processing. After the parallel linear PCM code is output, data verification and format conversion are performed to ensure the correctness of the data.