Chemical mechanical polishing method of semiconductor wafer and semiconductor device

CN119858109BActive Publication Date: 2026-08-07GTA SEMICON CO LTD
View PDF 3 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
GTA SEMICON CO LTD
Filing Date
2025-01-13
Publication Date
2026-08-07

Smart Images

  • Figure CN119858109B_ABST
    Figure CN119858109B_ABST
Patent Text Reader

Abstract

The application provides a chemical mechanical polishing method of semiconductor wafer and semiconductor device. The polishing method comprises at least one sub-polishing step, which comprises: polishing the surface to be polished of the semiconductor wafer; cleaning the semiconductor wafer after polishing by using a cleaning process; drying the surface of the semiconductor wafer; the cleaning process comprises: flushing the surface of the semiconductor wafer by using O3 / H2O2 solution, and generating an oxide film on the surface of the semiconductor wafer by the oxidation of O3. The chemical polishing method of the application comprises flushing the surface of the semiconductor wafer after chemical polishing by using O3 / H2O2 solution, generating an oxide film on the surface of the semiconductor wafer by the oxidation of O3, and obtaining the required structure by multiple chemical mechanical polishing, so as to improve the defects generated in the whole chemical mechanical polishing process, and improve the performance and yield of semiconductor products.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of semiconductor device technology, and more specifically, to a chemical mechanical polishing method for semiconductor wafers and a semiconductor device. Background Technology

[0002] Controlling defects in the ALCMP process is crucial to the performance and yield of high-k metal gate (HKMG) devices. Therefore, controlling defects in the ALCMP process is a key factor in improving semiconductor device yield, especially controlling micro-scratches and damage. In existing chemical polishing processes, the top aluminum film cannot be protected during deionized water rinsing after polishing. This leads to scratches and damage during the transfer to the next polishing pad and cleaning chamber. Optimizing the chemical polishing process to reduce defects and improve product performance and yield is a pressing technical problem in this field.

[0003] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of the present invention, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0004] To address the problems in the prior art, the present invention aims to provide a chemical mechanical polishing method for semiconductor wafers and a semiconductor device. This chemical mechanical polishing method uses an O3 / H2O2 solution in the surface cleaning process after chemical polishing of semiconductor wafers to generate an oxide film on the surface of the semiconductor wafer, thereby reducing the generation of defects during the polishing process and improving product performance and yield.

[0005] Specifically, a first aspect of the present invention provides a chemical mechanical polishing method for semiconductor wafers, the polishing method comprising at least one sub-polishing step, the sub-polishing step comprising:

[0006] Chemical mechanical polishing of the surface to be polished on semiconductor wafers;

[0007] After grinding, the semiconductor wafers are cleaned using a cleaning process.

[0008] Dry the surface of the semiconductor wafer;

[0009] The cleaning process includes:

[0010] The surface of the semiconductor wafer is rinsed with an O3 / H2O2 solution, and an oxide film is generated on the surface of the semiconductor wafer through the oxidation effect of O3.

[0011] According to a first aspect of the present invention, the surface to be polished in the chemical mechanical polishing of a semiconductor wafer is an aluminum film layer.

[0012] According to a first aspect of the invention, the concentration of O3 in the O3 / H2O2 solution is between 30 ppm and 80 ppm.

[0013] According to a first aspect of the invention, the surface of the semiconductor wafer is rinsed with an O3 / H2O2 solution for 1 to 10 minutes.

[0014] According to a first aspect of the invention, the cleaning process further includes cleaning the chemically mechanically polished semiconductor wafer with deionized water before the step of rinsing the surface of the semiconductor wafer with an O3 / H2O2 solution.

[0015] According to a first aspect of the invention, the grinding method includes a plurality of the said sub-grinding steps.

[0016] According to a first aspect of the invention, the thickness of the surface of the semiconductor wafer in the subsequent sub-grinding step is less than the thickness of the surface of the semiconductor wafer in the preceding sub-grinding step.

[0017] A second aspect of the present invention provides a semiconductor device comprising an aluminum film layer obtained by a chemical mechanical polishing method for a semiconductor wafer.

[0018] According to a second aspect of the invention, the semiconductor device includes an array of NMOS transistors and PMOS transistors;

[0019] The aluminum film layer is the P-type metal gate of the PMOS transistor.

[0020] According to a second aspect of the present invention, the grinding method includes a first sub-grinding step, a second sub-grinding step, and a third sub-grinding step;

[0021] In the first sub-grinding step, the thickness of the surface to be ground in the chemical mechanical polishing of the semiconductor wafer is 2500 angstroms to 3500 angstroms;

[0022] In the second sub-grinding step, the thickness of the surface to be ground on the semiconductor wafer in the chemical mechanical polishing process is 400 angstroms to 600 angstroms.

[0023] Compared with the prior art, the chemical polishing method of the present invention includes rinsing the surface of the semiconductor wafer after chemical polishing with an O3 / H2O2 solution, generating an oxide film on the surface of the semiconductor wafer through the oxidation effect of O3, and obtaining the desired structure through multiple chemical mechanical polishing processes, thereby improving the defects generated in the entire chemical mechanical polishing process and improving the performance and yield of semiconductor products. Attached Figure Description

[0024] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. Other features, objects, and advantages of the invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings. It is obvious that the drawings described below are merely some embodiments of the invention, and those skilled in the art can obtain other drawings based on these drawings without inventive effort. Furthermore, the drawings are merely illustrative diagrams of this disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities.

[0025] Figure 1 A flowchart illustrating a sub-polishing step in a chemical mechanical polishing method for semiconductor wafers according to an embodiment of the present invention; and

[0026] Figure 2 This is a schematic diagram of the structure of a semiconductor device according to an embodiment of the present invention;

[0027] Figures 3 to 5 The semiconductor wafers were polished using a chemical mechanical polishing method according to an embodiment of the present invention. Figure 2 The semiconductor device in the embodiment is shown in the structural diagram after each step. Detailed Implementation

[0028] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed herein. The present invention can also be implemented or applied through other different specific embodiments, and various details in the present invention can be modified or changed according to different viewpoints and application systems without departing from the spirit of the present invention. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of the present invention can be combined with each other.

[0029] The present invention will now be described in detail with reference to the accompanying drawings, so that those skilled in the art can readily implement it. The present invention can be embodied in many different forms and is not limited to the embodiments described herein.

[0030] In the representation of this invention, the terms "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics represented in connection with that embodiment or example, which are included in at least one embodiment or example of the invention. Furthermore, the specific features, structures, materials, or characteristics represented may be combined in any suitable manner in one or more embodiments or examples. Moreover, those skilled in the art can combine and integrate different embodiments or examples represented in this invention, as well as features of different embodiments or examples, without contradiction.

[0031] To clearly illustrate the present invention, components unrelated to the description are omitted, and the same or similar constituent elements throughout the specification are given the same reference numerals.

[0032] Throughout this specification, when it is said that a device is "connected" to another device, this includes not only "direct connection" but also "indirect connection" by placing other components in between. Furthermore, when it is said that a device "comprises" a certain constituent element, unless otherwise stated otherwise, this does not exclude other constituent elements, but rather implies that other constituent elements may be included.

[0033] When we say that a device is "above" another device, this can mean that it is directly above the other device, or it can mean that other devices are present in between. Conversely, when we say that a device is "directly" "above" another device, there are no other devices present in between.

[0034] Although the terms first, second, etc., are used in some instances herein to refer to various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, first interface and second interface, etc., are used. Furthermore, as used herein, the singular forms “a,” “an,” and “the” are intended to also include the plural forms unless the context indicates otherwise. It should be further understood that the terms “comprising,” “including,” indicate the presence of features, steps, operations, elements, components, items, kinds, and / or groups, but do not exclude the presence, occurrence, or addition of one or more other features, steps, operations, elements, components, items, kinds, and / or groups. The terms “or” and “and / or” as used herein are interpreted as inclusive, or mean any one or any combination thereof. Thus, “A, B, or C” or “A, B, and / or C” means “any one of: A; B; C; A and B; A and C; B and C; A, B, and C.” Exceptions to this definition will only occur if the combination of elements, functions, steps, or operations is inherently mutually exclusive in some way.

[0035] The technical terms used herein are for reference only to specific embodiments and are not intended to limit the invention. The singular form used herein includes the plural form unless the statement explicitly indicates otherwise. The word "comprising" as used in this specification means to specify a particular characteristic, region, integer, step, operation, element, and / or component, and does not exclude the presence or addition of other characteristics, regions, integers, steps, operations, elements, and / or components.

[0036] Although not explicitly defined, all terms, including technical and scientific terms used herein, shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. Terms defined in commonly used dictionaries shall be further interpreted as having a meaning consistent with relevant technical literature and the content of this present instruction, and shall not be over-interpreted as having an ideal or overly formulaic meaning unless otherwise defined.

[0037] To overcome the aforementioned technical problems, this invention provides a chemical mechanical polishing (CMP) method for semiconductor wafers and a semiconductor device. The polishing method includes at least one sub-polishing step, which includes: chemically polishing the surface of the semiconductor wafer to be polished; cleaning the semiconductor wafer after polishing using a cleaning process; and drying the surface of the semiconductor wafer. The cleaning process involves rinsing the surface of the semiconductor wafer with an O3 / H2O2 solution, thereby generating an oxide film on the surface of the semiconductor wafer through the oxidation effect of O3. The chemical polishing method of this invention includes rinsing the surface of the semiconductor wafer with an O3 / H2O2 solution, generating an oxide film on the surface of the semiconductor wafer through the oxidation effect of O3, and obtaining the desired structure through multiple CMP polishing processes, thereby improving defects generated during the entire CMP polishing process and improving the performance and yield of semiconductor products.

[0038] The chemical mechanical polishing method for semiconductor wafers and semiconductor devices of the present invention are further described below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments are not intended to limit the scope of protection of the present invention.

[0039] In chemical mechanical polishing (CMP) processes, a polishing head is often used to hold the semiconductor wafer to be polished in contact with a polishing pad and perform relative movement for CMP polishing. The following example uses polishing a p-type metal gate in a semiconductor device; the p-type metal gate can be an aluminum film layer. In this embodiment, the CMP equipment can be equipped with multiple polishing pads. CMP polishing of the aluminum film layer can be divided into multiple sub-polishing steps. After polishing a certain thickness on a polishing pad at one location, the surface is cleaned, and the polishing head holds the semiconductor wafer to be polished to a polishing pad at another location for further polishing. In other words, the polishing process of the aluminum film layer includes switching the polishing head between polishing pads at different locations.

[0040] Figure 1This is a flowchart of a sub-polishing step in a chemical mechanical polishing method for semiconductor wafers according to an embodiment of the present invention. Specifically, the polishing method includes the following sub-polishing steps:

[0041] Step S100: Chemical mechanical polishing of the surface to be polished of the semiconductor wafer; preferably, the surface to be polished of the semiconductor wafer is an aluminum film layer.

[0042] Step S200: After grinding, the semiconductor wafer is cleaned using a cleaning process;

[0043] Step S300: Dry the surface of the semiconductor wafer.

[0044] The cleaning process in step S200 includes:

[0045] S210: The surface of the semiconductor wafer is rinsed with an O3 / H2O2 solution, forming an oxide film on the wafer surface through the oxidation effect of O3. During the O3 / H2O2 cleaning process, both O3 (ozone) and H2O2 (hydrogen peroxide) are strong oxidants. The atoms on the surface of the semiconductor wafer are highly reactive due to their high energy state. O3 / H2O2 reacts with the metal atoms (taking metals as an example) on the surface of the material being cleaned. Furthermore, the semiconductor wafer surface may contain microscopic defects such as lattice vacancies and dislocations, where atoms are more likely to contact and react with the oxidant, thus promoting oxide film formation. For example, for aluminum (Al) thin films, ozone and hydrogen peroxide react with aluminum atoms, causing them to lose electrons and become aluminum ions (Al). 3+ Oxygen atoms in the solution gain electrons and combine with metal ions to form metal oxides. The reaction can be simply represented as:

[0046] 4Al+3O3+3H2O2=2Al2O3+3H2O+3O2;

[0047] Al2O3 is the oxide film formed.

[0048] The oxide film formed can have a dense structure. A dense oxide film can effectively prevent oxygen, moisture and other substances from further contacting the metal substrate, thus playing a protective role.

[0049] Simultaneously, during the rinsing of semiconductor wafer surfaces with O3 / H2O2 solution, organic contaminants are oxidized and decomposed, transforming them into small, water-soluble substances, thus achieving the purpose of cleaning the semiconductor wafer surface. Furthermore, the O3 / H2O2 mixed solution exhibits a synergistic effect. Hydrogen peroxide acts as an initiator for ozone decomposition, accelerating the generation of more hydroxyl radicals (·OH). Hydroxyl radicals are highly reactive oxidants with an oxidation potential as high as 2.80V, second only to fluorine (2.87V). They can react rapidly with most organic substances without selection, resulting in better cleaning. In other words, O3 / H2O2 solution cleaning can effectively remove these contaminants while forming an oxide film, without damaging the silicon wafer surface.

[0050] In the O3 / H2O2 cleaning process of step S200, the appropriate concentrations of O3 and H2O2 are crucial to the structure (density, etc.) of the generated oxide film and the cleaning effect. When the O3 concentration is high, more ozone molecules can undergo oxidation reactions with the material surface. Ozone molecules have a delocalized π bond, with the central oxygen atom in the +0 oxidation state. This structure gives ozone a strong tendency to gain electrons, making it easy to acquire electrons from atoms on the material surface. High concentrations of O3 accelerate the oxidation process of metal atoms (such as aluminum atoms), promoting faster formation of metal oxide (such as Al2O3) films on their surfaces. As the O3 concentration increases, the oxidation reaction rate accelerates, and the thickness of the generated oxide film may increase. However, when the O3 concentration is too high, it may lead to uneven oxide film growth because the intense oxidation reaction may cause localized excessively high temperatures on the material surface, affecting the crystallization process of the oxide film and potentially triggering over-oxidation, making the oxide film structure porous. Preferably, the O3 concentration in the O3 / H2O2 solution in step S200 is between 30 ppm and 80 ppm.

[0051] Similarly, a suitable H2O2 concentration contributes to the uniform formation of the oxide film. H2O2 can decompose in solution to generate hydroxyl radicals (·OH). Hydroxyl radicals are highly reactive oxidants. When the H2O2 concentration increases, more hydroxyl radicals are generated, and these radicals participate in the oxidation reaction on the material surface. When the H2O2 concentration is too high, the large number of free radicals generated by its decomposition may etch the already formed oxide film, damaging its integrity. Excessively high concentrations of H2O2 may cause tiny pores in the oxide film, affecting its quality. Preferably, the volume fraction of hydrogen peroxide in the O3 / H2O2 solution in step S200 can be between 1% and 10%.

[0052] When cleaning begins, O3 / H2O2 reacts with the surface of the semiconductor wafer to induce an oxidation reaction. Within a short period (e.g., the first few minutes), an oxide film begins to form. As the cleaning time increases, the growth rate of the oxide film gradually changes until it reaches an equilibrium state. Preferably, the O3 / H2O2 solution rinses the surface of the semiconductor wafer for 1 to 10 minutes.

[0053] Of course, the reaction conditions such as temperature and pH of the O3 / H2O2 solution also affect the oxide formation process. Generally, as the temperature rises, the rate at which H2O2 decomposes to produce hydroxyl radicals accelerates, and more active oxygen species participate in the oxidation reaction, thereby accelerating the growth of the oxide film. However, excessively high temperatures may lead to overly rapid oxide film growth and quality problems. Preferably, the temperature of the O3 / H2O2 solution in step S200 is between 30℃ and 40℃. Similarly, the pH of the solution affects the stability and oxidizing power of O3 and H2O2. Under acidic conditions, the oxidizing power of H2O2 is relatively strong because the acidic environment is conducive to the decomposition of hydrogen peroxide to produce more active oxygen species. For example, in an acidic range of pH 3-5, the decomposition reaction of H2O2 is accelerated, thereby promoting the growth of the oxide film. In an alkaline environment, the stability of ozone decreases, the decomposition rate accelerates, and more active oxygen species participate in the oxidation reaction. However, if the pH is too high, the oxide film formed on the surface of some metal materials may be dissolved by the alkali, thus affecting the growth of the oxide film. For amphoteric metals such as aluminum, a pH value of around 9-11 may be more conducive to the formation of an oxide film with good protective properties. Taking aluminum as an example, the alumina oxide film formed in an alkaline solution has a relatively stable structure and can effectively improve the corrosion resistance of aluminum.

[0054] The cleaning process in step S200 also includes step S201, which is before step S210, where the surface of the semiconductor wafer is rinsed with O3 / H2O2 solution. Step S201 involves cleaning the chemically mechanically polished semiconductor wafer with deionized water.

[0055] In practice, the polishing method of the present invention includes multiple sub-polishing steps, and the thickness of the surface of the semiconductor wafer in a later sub-polishing step is less than the thickness of the surface of the semiconductor wafer in a previous sub-polishing step, which is further described below.

[0056] In high-k / metal gate (HKMG) technology, Al films (aluminum films) are primarily used for metal interconnects or as part of the metal gate structure. During integrated circuit manufacturing, the quality and properties of the Al film have a significant impact on the overall device performance. In multilayer metal interconnect structures, when aluminum films are used as interconnect materials, the chemical mechanical polishing method of this invention is particularly suitable for achieving planarization between different metal layers.

[0057] The present invention also provides a semiconductor device comprising an aluminum film layer, the aluminum film layer being obtained by the chemical mechanical polishing method of the semiconductor wafer. Figure 2 This is a schematic diagram of a semiconductor device according to an embodiment of the present invention. Specifically, the semiconductor device may include an array of NMOS transistors and PMOS transistors, i.e., the semiconductor device is a complementary metal-oxide-semiconductor (CMOS) device. After depositing multiple layers of materials (such as metal layers, dielectric layers, etc.) in the CMOS device, where the aluminum film layer 10 is the P-type metal gate of the PMOS transistor, the surface of the wafer will be uneven. The polishing method of this semiconductor device includes a first sub-polishing step, a second sub-polishing step, and a third sub-polishing step. All three sub-polishing steps include the steps S100 to S300 described above, and the cleaning process in step S200 uses an O3 / H2O2 solution to rinse the surface of the semiconductor wafer, generating an oxide film on the surface of the semiconductor wafer through the oxidation effect of O3. The difference lies in the slightly different chemical mechanical polishing process of the semiconductor wafer surface to be polished in step S100 of the three sub-polishing steps, such as the pressure of the polishing head, the roughness of the polishing pad, the rotation speed of the polishing pad, the composition or ratio of the polishing slurry, and the polishing time, thereby controlling the thickness of the chemical mechanical polishing. In one embodiment, the thickness of the surface to be polished in the first sub-polishing step of the chemical mechanical polishing of the semiconductor wafer is 2500 angstroms to 3500 angstroms, and the thickness of the surface of the semiconductor wafer in the second sub-polishing step is 400 angstroms to 600 angstroms. For example, compared to Figure 2 The aluminum film layer 10 to be ground, after the first sub-grinding step, Figure 3 The thickness of the aluminum film layer 11 to be ground was reduced by 3000 angstroms; after the second sub-grinding step, compared to Figure 3 The aluminum film layer 11 to be ground Figure 4 The thickness of the aluminum film layer 12 to be ground was reduced by 500 angstroms; finally, after the third sub-grinding step, the desired result was obtained. Figure 5 Semiconductor devices.

[0058] In summary, the chemical polishing method of the present invention uses an O3 / H2O2 solution to rinse the surface of a semiconductor wafer after chemical polishing. An oxide film is generated on the surface of the semiconductor wafer through the oxidation effect of O3, and the desired structure is obtained through multiple chemical mechanical polishing processes. This improves the defects generated during the entire chemical mechanical polishing process and ultimately improves the performance and yield of the prepared semiconductor device.

[0059] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

[0060] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A chemical mechanical polishing method for semiconductor wafers, characterized in that, The grinding method includes multiple sub-grinding steps, the sub-grinding steps including: Chemical mechanical polishing of the surface to be polished on a semiconductor wafer, wherein the surface to be polished is an aluminum film layer; After grinding, the semiconductor wafers are cleaned using a cleaning process. Dry the surface of the semiconductor wafer; The cleaning process includes: The surface of the semiconductor wafer is rinsed with an O3 / H2O2 solution, and an oxide film is generated on the surface of the semiconductor wafer through the oxidation effect of O3. The thickness of the semiconductor wafer surface in the subsequent sub-grinding step is less than the thickness of the semiconductor wafer surface in the previous sub-grinding step.

2. The chemical mechanical polishing method for semiconductor wafers according to claim 1, characterized in that, The concentration of O3 in the O3 / H2O2 solution is between 30 ppm and 80 ppm.

3. The chemical mechanical polishing method for semiconductor wafers according to claim 1, characterized in that, The surface of the semiconductor wafer is rinsed with O3 / H2O2 solution for 1 to 10 minutes.

4. The chemical mechanical polishing method for semiconductor wafers according to claim 1, characterized in that, The cleaning process further includes cleaning the chemically mechanically polished semiconductor wafer with deionized water before the step of rinsing the surface of the semiconductor wafer with O3 / H2O2 solution.

5. A semiconductor device, characterized in that, The semiconductor device includes an aluminum film layer, which is obtained by the chemical mechanical polishing method for semiconductor wafers as described in any one of claims 1 to 4.

6. The semiconductor device according to claim 5, characterized in that, The semiconductor device includes an array of NMOS transistors and PMOS transistors; The aluminum film layer is the P-type metal gate of the PMOS transistor.

7. The semiconductor device according to claim 6, characterized in that, The grinding method includes a first sub-grinding step, a second sub-grinding step, and a third sub-grinding step; In the first sub-grinding step, the thickness of the surface to be ground on the semiconductor wafer in the chemical mechanical polishing process is 2500 angstroms to 3500 angstroms; In the second sub-grinding step, the thickness of the surface to be ground on the semiconductor wafer in the chemical mechanical polishing process is 400 angstroms to 600 angstroms.

Citation Information

Patent Citations

  • Manufacturing method of semiconductor device

    CN105336690A

  • Chemical mechanical polishing and cleaning method and device for semiconductor wafer

    CN111360686A

  • System and its method for high efficiency ozone water cleaning semiconductor wafer

    CN1649100A