Display panel

Abstract

The application provides a display panel, which comprises: an array substrate having a first side and a second side arranged oppositely; a display area; a bending area; a bonding area bent to the second side through the bending area, wherein the bending area is located between the display area and the bonding area, and the bonding area comprises at least a first part; an adhesive area, at least part of the adhesive area is located between the bonding area and the display area after the bending area is bent, and the adhesive area is adhered to the second side and the bonding area; a conductive part penetrating the adhesive area and connected to the first part and a first designated metal layer of the first side; and a plurality of negative voltage signal lines, wherein at least part of the negative voltage signal lines is connected to the first part. The above scheme can slow down or avoid cracks in the bending area, and improve the display reliability of the display panel.

Description

Technical Field

[0001] This invention relates to the field of display technology, and more particularly to a display panel. Background Technology

[0002] With the development of science and technology, more and more display devices are being widely used in people's daily lives and work, bringing great convenience and becoming an indispensable tool for people today. The main component of a display device that enables its display function is the display panel.

[0003] To reduce the bezel width of the display panel, the bonding portion containing the control chip is typically folded to the back of the display panel. This folded area is also called the bending area. Over time, cracks can easily appear in this bending area, affecting the normal display performance. Summary of the Invention

[0004] The technical problem solved by the embodiments of the present invention is that cracks are prone to appear in the bending area of ​​the display panel, thereby affecting the normal display of the display panel.

[0005] To address the aforementioned technical problems, embodiments of the present invention provide a display panel, comprising: an array substrate having a first side and a second side disposed opposite to each other; a display area; a bending area; a bonding area bent through the bending area toward the second side, wherein the bending area is located between the display area and the bonding area, and the bonding area includes at least a first portion; an adhesive area, wherein after the bending area is bent, at least a portion of the adhesive area is located between the bonding area and the display area, and is bonded to the second side and the bonding area; a conductive portion penetrating the adhesive area and connected to a first designated metal layer of the first portion and the first side; and a plurality of negative voltage signal lines, wherein at least a portion of the negative voltage signal lines are connected to the first portion.

[0006] Optionally, the bonding area includes a cutout portion, wherein the conductive portion passes through the cutout portion.

[0007] Optionally, in the direction from the second side to the first side, the bonding area includes: a first support film layer, a first adhesive layer, a second adhesive layer and a second support film layer stacked in sequence.

[0008] Optionally, the first designated metal layer includes a first metal layer.

[0009] Optionally, the display panel further includes a first via, through which the first metal layer and the conductive portion are electrically connected.

[0010] Optionally, along the direction from the second side to the first side, the array substrate includes a first protective layer, a first barrier layer, a second protective layer, a second barrier layer, and a buffer layer, with the first metal layer embedded in the buffer layer.

[0011] Optionally, the display panel further includes a second via, a third via, a second metal layer, and a polysilicon layer, wherein the second via connects the first metal layer and the second metal layer, the third via connects the second metal layer and the polysilicon layer, the second metal layer is an internal negative voltage metal trace of the display area, and the polysilicon layer is connected to the panel control signal generation circuit.

[0012] Optionally, along the direction from the second side to the first side, the display area further includes a gate insulating layer, a capacitor dielectric layer, an insulating dielectric layer, and a planarization layer stacked sequentially on the buffer layer, wherein the second metal layer is embedded in the planarization layer, and the polysilicon layer is embedded in the gate insulating layer.

[0013] Optionally, a portion of the multiple negative voltage signal lines are connected to the first portion, and another portion of the multiple negative voltage signal lines enter the display area via the second designated metal layer of the bending area.

[0014] Optionally, from the inner surface to the outer surface of the bending area, the bending area includes a first protective layer, a first barrier layer, a second protective layer, a second barrier layer, a buffer layer, and an organic layer stacked sequentially. Compared to the outer surface of the bending area, the second designated metal layer is closer to the inner surface of the bending area, wherein, after the bending area is bent, the inner surface faces the adhesive area.

[0015] Optionally, the second designated metal layer is either a first metal layer or a zeroth metal layer, wherein the first metal layer is embedded in the buffer layer, and the zeroth metal layer is embedded in the second protective layer.

[0016] Optionally, the display panel further includes a shielding structure that encloses the second designated metal layer.

[0017] Optionally, the shielding structure is connected to the GND signal.

[0018] Optionally, from the inner surface to the outer surface of the bending area, the bending area includes a first protective layer, a first blocking layer, a second protective layer, a second blocking layer, a buffer layer, a fourth metal layer, an organic layer, a third metal layer, a planarization layer, a pixel definition layer, a touch screen buffer layer, a touch screen metal layer, and a touch screen protective layer stacked sequentially, wherein the second designated metal layer is the third metal layer.

[0019] Optionally, the touchscreen metal layer and the fourth metal layer form the shielding structure.

[0020] Optionally, the shielding structure is ring-shaped.

[0021] Optionally, all negative voltage signal lines are connected to the first part.

[0022] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0023] After the bending area of ​​the display panel is bent, at least a portion of the adhesive area is located between the bonding area and the display area. The conductive portion penetrates the adhesive area and connects to the first portion of the bonding area and the first designated metal layer on the first side. At least a portion of the multiple negative voltage signal lines are connected to the first portion of the bonding area. Thus, at least a portion of the negative voltage signal lines do not pass through the bending area but directly connect to the first designated metal layer through the adhesive area. In other words, at least a portion of the negative voltage signals are input from the control chip into the screen body of the display area through back bonding. In this way, cracks in the bending area can be mitigated or avoided, improving the display reliability of the display panel. Attached Figure Description

[0024] Figure 1 This is a partial structural diagram of a display panel according to an embodiment of the present invention;

[0025] Figure 2 It is a cross-sectional view of a portion of a display panel after it has been bent.

[0026] Figure 3 It is a cross-sectional view of the display panel;

[0027] Figure 4 yes Figure 2 A cross-sectional view along section line AA in one embodiment;

[0028] Figure 5 yes Figure 2 A cross-sectional view along section line AA in another embodiment;

[0029] Figure 6 yes Figure 2 A cross-sectional view along section line AA in yet another embodiment;

[0030] Figure 7 yes Figure 6 A sectional view along section line BB;

[0031] Figure 8 This is a partial structural schematic diagram of another display panel in an embodiment of the present invention;

[0032] Figure 9This is a cross-sectional view of a portion of a display panel after it has been bent.

[0033] Figure 10 yes Figure 9 A cross-sectional view along the section line CC in one embodiment;

[0034] Figure 11 yes Figure 9 A cross-sectional view along the section line CC in another embodiment;

[0035] Figure 12 This is a partial structural schematic diagram of another display panel in an embodiment of the present invention;

[0036] Figure 13 yes Figure 12 A sectional view along the section line DD;

[0037] Figure 14 yes Figure 13 A sectional view along the section line EE.

[0038] Figure label:

[0039] 100 - Display panel; 10 - Display area; 103 - First metal layer; 104 - First via; 105 - First protective layer; 106 - First barrier layer; 107 - Second protective layer; 108 - Second barrier layer; 109 - Buffer layer; 110 - Second via; 111 - Third via; 112 - Second metal layer; 113 - Polysilicon layer; 114 - Gate insulating layer; 115 - Capacitor dielectric layer; 116 - Insulating dielectric layer; 117 - Planarization layer; 20 - Bending area; 21 - Organic layer; 22 - Zero metal layer; 23 - Fourth metal layer; 24 - Third metal layer; 25 - Pixel definition layer; 26 - Touch 27-Touchscreen buffer layer; 28-Touchscreen metal layer; 30-Touchscreen protective layer; 31-Knockout area; 32-First support film layer; 33-First adhesive layer; 34-Second adhesive layer; 35-Second support film layer; 40-Bonding area; 41-Pad; 50-Conductive part; 60-Negative voltage signal line; 70-Shielding structure; 81-VSR circuit; 82-Control chip; 83-Positive voltage signal line; 84-Cover plate; 85-Array substrate; 851-First side; 852-Second side; 86-Optical adhesive; 87-Polarizer; 88-Bending area protective adhesive; L1-Screen central axis; L2-Bending area axis. Detailed Implementation

[0040] As mentioned above, to reduce the bezel width of the display panel, the bonding portion containing the control chip is typically folded to the back of the display panel. This folded area is also called the bending zone. With use, cracks are prone to appearing in this zone, affecting the display's performance. Research has found that the root cause of cracks in the bending zone is bending stress. Stress exceeding the material's tolerance limits or material degeneration and aging during reliability testing can lead to cracks, causing open circuits in the product's signal lines (metal traces), resulting in no display or abnormal display.

[0041] Currently, the following methods are commonly used to address the cracking problem: Method 1, increasing the thickness of the organic film layer in the bending zone to reduce the probability of crack formation; Method 2, replacing materials or optimizing processes to reduce the probability of crack formation. However, Method 1 increases costs. Method 2 requires verification of the reliability and feasibility of the new materials or optimized processes, increasing verification costs and risks.

[0042] To address the aforementioned issues, after the bending area of ​​the display panel is bent, at least a portion of the bonding area is located between the bonding area and the display area. The conductive portion penetrates the bonding area and connects to a first portion of the bonding area and a first designated metal layer on the first side. At least a portion of the multiple negative voltage signal lines are connected to the first portion of the bonding area. Thus, at least a portion of the voltage signal lines bypass the bending area and directly connect to the first designated metal layer through the bonding area. This means that the negative voltage signal is input from the control chip into the display area's screen via back-side bonding. This effectively reduces the probability that transition metals (such as palladium) in high-refractive organic compounds (OC) materials, such as those in microlens patterns (MLP), are attracted into the organic material of the bending area under the negative voltage of the negative voltage signal lines. It also reduces the catalytic probability of the transition metal on the CF groups in the organic material, slowing down the denaturation and aging of the bending area material, thereby mitigating or preventing cracking in the bending area and improving the display panel's reliability. Furthermore, this method reduces costs and risks compared to increasing the thickness of the organic film layer, replacing materials, or optimizing the process.

[0043] To make the above-mentioned objectives, features, and beneficial effects of the embodiments of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The described embodiments are merely some embodiments of this application, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0044] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the embodiments provided in this application can be combined with each other without contradiction.

[0045] This invention provides a display panel. Figure 1 This is a partial structural diagram of a display panel according to an embodiment of the present invention. Figure 2 This is a cross-sectional view of a portion of a display panel after it has been bent. (Combined with...) Figure 1 and Figure 2 The specific structure of the display panel 100 will be described below. It should be noted that... Figure 1 and Figure 2 The diagram only shows a portion of the display panel's structure to provide a clear visual representation of the relevant components; some other structures are not shown in the diagram.

[0046] In a specific implementation, the display panel 100 includes: an array substrate 85, a display area 10, a bending area 20, a bonding area 40, an adhesive area 30, a conductive portion 50, and multiple negative voltage signal lines 60. The array substrate 85 has a first side 851 and a second side 852 disposed opposite to each other. The first side 851 may be the side of the display panel 100 on which light-emitting elements are disposed. The bonding area 40 is bent through the bending area 20 toward the second side 852, wherein the bending area 20 is located between the display area 10 and the bonding area 40, and the bonding area 40 includes at least a first portion. After the adhesive area 30 is bent through the bending area 20, at least a portion of the adhesive area 30 is located between the bonding area 40 and the display area 10, and is bonded to the second side 852 and the bonding area 40. The conductive portion 50 penetrates the adhesive area 30 and is connected to a first designated metal layer of the first portion and the first side 851. At least a portion of the multiple negative voltage signal lines 60 are connected to the first portion.

[0047] Multiple negative voltage signal lines 60 can be connected to the control chip 82. The control chip 82 can be an integrated circuit (IC) chip.

[0048] For example, when the display panel 100 is bent, the bending area 20 bends along the bending area axis L2.

[0049] In some non-limiting embodiments, the bending region axis L2 is parallel to the width direction of the display panel 100.

[0050] As can be seen from the above scheme, the conductive part 50 penetrates the bonding area 30 and connects to the first part of the bonding area 40 and the first designated metal layer of the first side 851. At least a portion of the multiple negative voltage signal lines 60 are connected to the first part of the bonding area 40. Thus, at least a portion of the negative voltage signal lines 60 pass through the bonding area 30 and directly connect to the first designated metal layer of the first side 851, without passing through the bending area 20. That is, the negative voltage signal is input from the control chip to the screen of the display area 10 through back bonding. In this way, the probability that the transition metal (such as palladium) in the high-refractive organic compound (OC) material in the microlens pattern (MLP) can be attracted into the organic material of the organic film layer of the bending area 20 under the negative voltage of the negative voltage signal line 60 can be effectively reduced. This reduces the catalytic probability of the transition metal on the CF groups in the organic material, slows down the material degradation and aging of the bending area 20, and thus slows down or avoids the formation of cracks in the bending area 20, improving the display reliability of the display panel 100. In addition, this method can reduce costs and risks compared to increasing the thickness of the organic film layer, replacing new materials, or optimizing the process.

[0051] In practical implementation, the negative voltage signal transmitted by the negative voltage signal line 60 can always be a negative voltage signal, or it can be a signal that is negative for most of the time (e.g., greater than or equal to 50% of the time). The negative voltage signal can be one or more of the following: Gate Off Voltage (VGL), ELVSS, Voltage Reference (Vref), Electromotive Force (EM), etc. Among them, ELVSS is an abbreviation for Extra Low Voltage Supply, which is commonly used to describe the negative voltage supplying power to the screen display pixel circuitry.

[0052] At least a portion of the negative voltage signal lines 60 that do not pass through the bending area 20 can exit through the left and right sides of the control chip 82. Here, the left and right direction refers to the width direction of the display panel, that is, the direction perpendicular to the central axis L1 of the screen body, which is parallel to the length direction of the display panel.

[0053] In some embodiments, the conductive portion 50 may be anisotropic conductive film (ACF) or silver paste. The conductive portion 50 is used to connect the first designated metal layer and the first portion.

[0054] In some non-limiting embodiments, bonding pads 41 are provided on both the first designated metal layer and the first portion, where bonding pads 41 can also be referred to as bonding points, etc. The two ends of the conductive portion 50 are respectively connected to the bonding pads 41 on the first designated metal layer and the bonding pads 41 on the first portion.

[0055] In a specific implementation, the number of conductive parts 50 can be set according to the number of negative voltage signal lines 60 that enter the display area 10 through the adhesive area 30, and is not limited to the number shown in the figure.

[0056] In some implementations, combined Figure 1 and Figure 2 The bonding area 30 may include a cutout portion 31. The conductive portion 50 passes through the cutout portion 31.

[0057] In some non-limiting embodiments, a hollowed-out portion 31 can be formed at the corresponding position of the bonding area 30.

[0058] In some embodiments, along the direction X from the second side 852 to the first side 851, the bonding area 30 includes: a first support film layer 32, a first adhesive layer 33, a second adhesive layer 34 and a second support film layer 35 stacked sequentially.

[0059] In some non-limiting embodiments, the second support film layer 35 is connected to the second side 852, for example, by adhesive bonding. The second support film layer 35, the second adhesive layer 34, the first adhesive layer 33, and the first support film layer 32 are sequentially bonded to each other. The second support film layer 35 and the first support film layer 32 provide support for the bonding region 40. The first adhesive layer 33 and the second adhesive layer 34 serve an adhesive function, used to bond the second support film layer 35 and the first support film layer 32.

[0060] The first support film layer 32, the first adhesive layer 33, the second adhesive layer 34, and the second support film layer 35 can be a whole or can be set separately and independently. Alternatively, two or three adjacent parts of the first support film layer 32, the first adhesive layer 33, the second adhesive layer 34, and the second support film layer 35 can be a whole.

[0061] The first adhesive layer 33 and the second adhesive layer 34 can be structures with adhesive functions, such as tape. The first adhesive layer 33 and the second adhesive layer 34 can be the same type of adhesive layer or different types of adhesive layers.

[0062] In a specific implementation, the first designated metal layer of the first side 851 includes a first metal layer 103. Currently, most display panels 100 (such as flexible displays) have a first metal layer. Using the existing first metal layer 103 as the first designated metal layer can reduce modifications to the display panel 100 and lower costs. The first metal layer 103 can be made of metals such as molybdenum, aluminum, copper, silver, and titanium, or a composite metal including one or more of the above metals.

[0063] See Figure 3 The given cross-sectional view of the display panel is shown in the reference diagram. Figures 1 to 3The display panel 100 also includes a first via 104, through which the first metal layer 103 and the conductive portion 50 are electrically connected.

[0064] Along a direction X from the second side 852 to the first side 851, the array substrate 85 may include a flexible substrate (PI) and a buffer layer 109. Along a direction X from the second side 852 to the first side 851, the flexible substrate may include a first protective layer (PI layer 1) 105, a first barrier layer 106, a second protective layer (PI layer 2) 107, and a second barrier layer 108. A first metal layer 103 is embedded in the buffer layer 109. Furthermore, the first metal layer 103 is embedded in the buffer layer 109 and is close to the second barrier layer 108.

[0065] The flexible substrate can be formed from any suitable insulating material that is flexible. For example, the flexible substrate can be formed from polymeric materials such as polyimide (PI), polycarbonate (PC), polyethersulfone (PES), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyaryl compounds (PAR), or glass fiber reinforced plastic (FRP).

[0066] The buffer layer 109 covers the entire upper surface of the flexible substrate, that is, the entire upper surface of the second barrier layer 108.

[0067] The buffer layer 109 can be formed of inorganic or organic materials such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy), aluminum oxide (AlOx) or aluminum nitride (AlNx), to block oxygen and moisture, prevent moisture or impurities from diffusing through the flexible substrate, and provide a flat surface on the upper surface of the flexible substrate.

[0068] In a specific implementation, the display panel 100 further includes a second via 110, a third via 111, a second metal layer 112, and a polysilicon layer 113. The second via 110 connects the first metal layer 103 and the second metal layer 112, the third via 111 connects the second metal layer 112 and the polysilicon layer 113, the second metal layer 112 is the internal negative voltage metal trace of the display area 10, and the polysilicon layer 113 is connected to the panel control signal generation circuit. The panel control signal generation circuit can be a vertical shift register (VSR) circuit 81.

[0069] Along the direction X from the second side 852 to the first side 851, the array substrate 85 further includes a gate insulating layer 114, a capacitor dielectric layer 115, an insulating dielectric layer 116, and a planarization layer 117 sequentially stacked on the buffer layer 109, wherein the second metal layer 112 is embedded in the planarization layer 117, and the polysilicon layer 113 is embedded in the gate insulating layer 114.

[0070] In some non-limiting embodiments, the second metal layer 112 is embedded within the planarization layer 117 and is close to the insulating dielectric layer 116.

[0071] In some non-limiting embodiments, the polysilicon layer 113 is embedded within the gate insulating layer 114 and is close to the buffer layer 109.

[0072] In some non-limiting embodiments, the gate insulating layer 114 may include an inorganic layer of silicon oxide, silicon nitride, or metal oxide, and may include a single layer or multiple layers.

[0073] In some non-limiting embodiments, the capacitor dielectric layer 115 may be formed of an insulating inorganic layer such as silicon oxide or silicon nitride.

[0074] In some non-limiting embodiments, the insulating dielectric layer (also referred to as the interlayer insulating layer) 116 is used to insulate the layers stacked together. The insulating dielectric layer 116 may be formed of an insulating inorganic layer such as silicon oxide or silicon nitride.

[0075] In some non-limiting embodiments, the planarization layer 117 includes an organic layer such as acrylic, polyimide (PI), or benzocyclobutene (BCB).

[0076] In some embodiments, a portion of the plurality of negative voltage signal lines 60 are connected to the first portion, and another portion of the plurality of negative voltage signal lines 60 enter the display area 10 via the second designated metal layer of the bending region 20.

[0077] In some implementations, combined Figure 1 , Figure 4 and Figure 5 From the inner surface to the outer surface of the bending region 20, the bending region 20 includes a flexible substrate, a buffer layer 109, and an organic layer 21 stacked sequentially. From the inner surface to the outer surface of the bending region 20, the flexible substrate includes a first protective layer 105, a first barrier layer 106, a second protective layer 107, and a second barrier layer 108.

[0078] Compared to the outer surface of the bending region 20, the second designated metal layer is closer to the bending region 20 in the direction from the inner surface, and the second designated metal layer is away from the organic layer 21, wherein, after the bending region 20 is bent, the inner surface faces the adhesive region 30.

[0079] Combination Figure 4 The second designated metal layer is the first metal layer 103. Alternatively, in combination with... Figure 5 The second designated metal layer is the zero metal layer 22. The first metal layer 103 is embedded in the buffer layer 109, and the zero metal layer 22 is embedded in the second protective layer 107. Using either the first metal layer 103 or the zero metal layer 22 as the trace design for the negative voltage signal has several advantages. First, it increases the distance between the negative voltage signal and the organic layer on the upper surface, reducing the influence of the negative electric field on the transition metal in the organic layer. Second, it keeps the negative voltage signal trace away from the stress center of the bending area. Third, it lengthens the path of cracks or corrosion, thus prolonging the time before the negative voltage signal trace fails.

[0080] Combination Figure 1 , Figure 2 , Figure 6 and Figure 7 The display panel 100 may further include a shielding structure 70, which encapsulates the second designated metal layer. The shielding structure 70 shields the negative voltage of the negative voltage signal line, preventing residual Pd and other transition metal ions on the surface of the TP protective layer from being attracted to the underlying organic film.

[0081] In some embodiments, the shielding structure 70 is connected to the ground (GND) signal.

[0082] From the inner surface to the outer surface of the bending area 20, the bending area 20 includes a first protective layer 105, a first barrier layer 106, a second protective layer 107, a second barrier layer 108, a buffer layer 109, a fourth metal layer 23, an organic layer 21, a third metal layer 24, a planarization layer 117, a pixel definition layer 25, a touch screen buffer layer 26, a touch screen metal layer 27, and a touch screen protective layer 28, wherein the second designated metal layer is the third metal layer 24.

[0083] The touchscreen metal layer 27 and the fourth metal layer 23 form the shielding structure 70.

[0084] The shielding structure 70 is annular. The shielding structure 70 may also be quadrilateral or other suitable shapes.

[0085] In some embodiments, all negative voltage signal lines 60 are connected to the first portion. That is, all negative voltage signal lines 60 transmit negative voltage signals from the control chip to the interior of the display area 10 via back-side bonding.

[0086] In some embodiments, the positive voltage signal line 83 can enter the display area 10 via the bending area 20. For example, the positive voltage signal line 83 can exit through the top edge of the control chip 82 and enter the display area 10 via the bending area 20, that is, enter the internal circuitry of the screen. Here, the top edge of the control chip 82 refers to the edge of the control chip 82 near the top of the display panel 100 along the length of the display panel 100.

[0087] The bending area protective adhesive 88 is applied to the bending portion of the display panel 100 to reduce bending stress.

[0088] This invention also provides another display panel, combined with Figures 8 to 11 The display panel 100 includes an array substrate 85, a display area 10, a bending area 20, a bonding area 40, an adhesive area 30, and multiple negative voltage signal lines 60. The array substrate 85 has a first side 851 and a second side 852 disposed opposite to each other, wherein the first side 851 may be the side of the display panel 100 on which light-emitting elements are disposed. The bonding area 40 is bent through the bending area 20 toward the second side 852, wherein the bending area 20 is located between the display area 10 and the bonding area 40. After the bonding area 30 is bent through the bending area 20, at least a portion of the adhesive area 30 is located between the bonding area 40 and the display area 10, and is bonded to the second side 852 and the bonding area 40. At least a portion of the multiple negative voltage signal lines 60 enter the display area 10 via the second designated metal layer of the bending region 20; from the inner surface to the outer surface of the bending region 20, the bending region 20 includes a first protective layer 105, a first barrier layer 106, a second protective layer 107, a second barrier layer 108, a buffer layer 109, and an organic layer 21 stacked sequentially. Compared to the outer surface of the bending region 20, the second designated metal layer is closer to the inner surface of the bending region 20, wherein, after the bending region 20 is bent, the inner surface faces the adhesive area 30.

[0089] In some implementations, combined Figure 10 The second designated metal layer is the first metal layer 103. The first metal layer 103 is embedded in the buffer layer 109.

[0090] In other embodiments, combined Figure 11 The second designated metal layer is the zero metal layer 22. The zero metal layer 22 is embedded in the second protective layer 107.

[0091] Designing either the first metal layer 103 or the zeroth metal layer 22 as the trace for the negative voltage signal has several advantages. Firstly, it increases the distance between the negative voltage signal and the organic layer on the upper surface, reducing the influence of the negative electric field on the transition metal in the organic layer. Secondly, it keeps the negative voltage signal trace away from the stress center of the bending area. Thirdly, it lengthens the path of cracks or corrosion, thus prolonging the time before the negative voltage signal trace fails. This reduces the probability of the transition metal catalyzing the CF groups in the organic material, slowing down the material degradation and aging in the bending area 20, thereby mitigating or preventing crack formation in the bending area 20 and improving the display reliability of the display panel 100. Furthermore, compared to increasing the thickness of the organic film layer, replacing it with new materials, or optimizing the process, this method also reduces costs and risks.

[0092] It should be noted that, Figures 8 to 11 The detailed description of the structure of the display panel 100 provided in the given embodiments, as well as other structures that may also be included, can be found in the above description. Figures 1 to 7 The descriptions in the corresponding embodiments will not be repeated here.

[0093] This invention also provides another type of display panel, see [link to previous article]. Figure 8 , Figures 12 to 14 The display panel 100 includes an array substrate 85, a display area 10, a bending area 20, a bonding area 40, an adhesive area 30, and multiple negative voltage signal lines 60. The array substrate 85 has a first side 851 and a second side 852 disposed opposite to each other. The first side 851 is the side of the display panel 100 on which light-emitting elements are disposed. The bonding area 40 is bent through the bending area 20 to face the second side 852, wherein the bending area 20 is located between the display area 10 and the bonding area 40. After the bonding area 30 is bent through the bending area 20, at least a portion of the adhesive area 30 is located between the bonding area 40 and the display area 10, and is bonded to the second side 852 and the bonding area 40. At least a portion of the multiple negative voltage signal lines 60 enter the display area 10 via the second designated metal layer of the bending area 20; a shielding structure 70 is provided, which encloses the second designated metal layer.

[0094] By shielding the negative voltage of the negative voltage signal line through the shielding structure 70, residual Pd and other transition metal ions on the surface of the touch screen (TP) protective layer are prevented from being attracted to the underlying organic film layer. This reduces the probability of the transition metal catalyzing the CF groups in the organic material, slows down the material degradation and aging of the bending area 20, and thus slows down or prevents cracking in the bending area 20, improving the display reliability of the display panel 100. Furthermore, compared to increasing the thickness of the organic film layer, replacing it with new materials, or optimizing the process, this method can reduce costs and risks.

[0095] In some embodiments, from the inner surface to the outer surface of the bending region 20, the bending region 20 includes a first protective layer 105, a first barrier layer 106, a second protective layer 107, a second barrier layer 108, a buffer layer 109, a fourth metal layer 23, an organic layer 21, a third metal layer 24, a planarization layer 117, a pixel definition layer 25, a touch screen buffer layer 26, a touch screen metal layer 27, and a touch screen protective layer 28, wherein the second designated metal layer is the third metal layer 24.

[0096] The touchscreen metal layer 27 and the fourth metal layer 23 form the shielding structure 70.

[0097] The shielding structure 70 is annular. The shielding structure 70 may also be quadrilateral or other suitable shapes.

[0098] It should be noted that, Figures 12 to 14 The detailed description of the structure of the display panel 100 provided in the given embodiments, as well as other structures that may also be included, can be found in the above description. Figures 1 to 7 The descriptions in the corresponding embodiments will not be repeated here.

[0099] It should be noted that the bending area 20 and the bonding area 40 are non-display areas of the display panel 100. These non-display areas do not display information. The display area 10, bending area 20, and bonding area 40 can be integrated, meaning that some areas of the display area 10 and bending area 20 can have the same structure. However, depending on the function of different areas, the display area 10 and bending area 20 can also have some structural differences during manufacturing, which can be configured according to specific requirements.

[0100] It should be noted that the display panel 100 may also include a cover plate 84, optically clear adhesive (OCA) 86, a polarizer 87, and a bending protection layer (BPL) 88, etc.

[0101] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A display panel, characterized in that, include: An array substrate has a first side and a second side disposed opposite to each other; Display area; Bending area; The bonding area is bent through the bending area to face the second side, wherein the bending area is located between the display area and the bonding area, and the bonding area includes at least a first portion; The bonding area, after the bending area is bent, is at least partially located between the bonding area and the display area, and is bonded to the second side and the bonding area; The conductive portion penetrates the adhesive area and is connected to the first designated metal layer of the first portion and the first side, wherein the first designated metal layer includes a first metal layer. Multiple negative voltage signal lines, wherein at least a portion of the negative voltage signal lines are connected to the first portion; at least a portion of the negative voltage signal lines do not pass through the bending area, but pass through the bonding area and are directly connected to the first designated metal layer; Along the direction from the second side to the first side, the array substrate further includes a buffer layer, a gate insulating layer, a capacitor dielectric layer, an insulating dielectric layer, and a planarization layer stacked sequentially, with the first metal layer embedded in the buffer layer.

2. The display panel as described in claim 1, characterized in that, The bonding area includes a hollow portion, wherein the conductive portion passes through the hollow portion.

3. The display panel as described in claim 2, characterized in that, Along the direction from the second side to the first side, the bonding area includes: a first support film layer, a first adhesive layer, a second adhesive layer and a second support film layer stacked in sequence.

4. The display panel as described in claim 1, characterized in that, It also includes a first via, through which the first metal layer and the conductive portion are electrically connected.

5. The display panel as described in claim 1, characterized in that, Along the direction from the second side to the first side, the array substrate includes a first protective layer, a first barrier layer, a second protective layer, a second barrier layer, and the buffer layer.

6. The display panel as described in claim 5, characterized in that, It also includes a second via, a third via, a second metal layer, and a polysilicon layer, wherein the second via connects the first metal layer and the second metal layer, the third via connects the second metal layer and the polysilicon layer, the second metal layer is the internal negative voltage metal trace of the display area, and the polysilicon layer is connected to the panel control signal generation circuit.

7. The display panel as described in claim 6, characterized in that, The second metal layer is embedded in the planarization layer, and the polysilicon layer is embedded in the gate insulating layer.

8. The display panel as described in any one of claims 1 to 7, characterized in that, A portion of the multiple negative voltage signal lines are connected to the first portion, while another portion of the multiple negative voltage signal lines enter the display area via the second designated metal layer of the bending area.

9. The display panel as described in claim 8, characterized in that, From the inner surface to the outer surface of the bending area, the bending area includes a first protective layer, a first barrier layer, a second protective layer, a second barrier layer, a buffer layer, and an organic layer stacked sequentially. Compared to the outer surface of the bending area, the second designated metal layer is closer to the inner surface of the bending area, wherein, after the bending area is bent, the inner surface faces the bonding area.

10. The display panel as claimed in claim 9, characterized in that, The second designated metal layer is either the first metal layer or the zeroth metal layer, wherein the first metal layer is embedded in the buffer layer and the zeroth metal layer is embedded in the second protective layer.

11. The display panel as claimed in claim 8, characterized in that, It also includes a shielding structure that encloses the second designated metal layer.

12. The display panel as claimed in claim 11, characterized in that, The shielding structure is connected to the GND signal.

13. The display panel as claimed in claim 12, characterized in that, From the inner surface to the outer surface of the bending area, the bending area includes a first protective layer, a first barrier layer, a second protective layer, a second barrier layer, a buffer layer, a fourth metal layer, an organic layer, a third metal layer, a planarization layer, a pixel definition layer, a touch screen buffer layer, a touch screen metal layer, and a touch screen protective layer stacked sequentially, wherein the second designated metal layer is the third metal layer.

14. The display panel as claimed in claim 13, characterized in that, The touchscreen metal layer and the fourth metal layer form the shielding structure.

15. The display panel as claimed in claim 11, characterized in that, The shielding structure is ring-shaped.

16. The display panel as claimed in any one of claims 1 to 7, characterized in that, All negative voltage signal lines are connected to the first part.

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