Column switching circuit, image sensor, electronic apparatus, and vehicle

Abstract

The invention discloses a column switching circuit, an image sensor, an electronic device and a vehicle, the image sensor comprises N columns of pixel units, the column switching circuit comprises N switch units and a plurality of connecting lines, the N switch units are suitable for being correspondingly connected with the N columns of pixel units, each switch unit comprises an input switch and an output switch, and the input switch is connected with the N columns of pixel units. The first end of the input switch is suitable for being connected with a corresponding column of pixel units; each connecting line is connected with the second end of the input switch in at least one switch unit, each connecting line is connected with the first end of the output switch in the multiple switch units, and only one input and output path in the input switch and the output switch connected to the same connecting line is controlled to be switched on at the same moment; and the image signal of the column pixel unit connected with the input switch is transmitted. According to the column switching circuit, the difference of pixel signals between the column pixel units can be dispersed, and the visibility of CFPN between different column pixel units is greatly reduced.

Description

[0001] This application claims priority to a prior application (application number: 202311843397.6, title: column switching circuit, image sensor, electronic device and vehicle). Technical Field

[0002] The present invention relates to the field of image sensing technology, and in particular to a column switching circuit, and an image sensor, electronic equipment and vehicle using the same. Background Art

[0003] In the related art, in order to reduce the differences between columns of a pixel array in an image sensor and reduce the visibility of CFPN (Column Fixed Pattern Noise) between different columns, the positions of pixel signals of pixel units in different columns are exchanged through a column exchange circuit.

[0004] For example, in some schemes, the order of column swapping of pixel signals in the pixel array is read out sequentially from left to right, and each column of pixel signals is outputted backward by one column, with the last column swapped to the first column. This column swapping only changes the position of the pixel signal and does not disrupt the relative position between columns. As a result, the differences between columns are not sufficiently dispersed, and this column swapping order cannot significantly reduce the visibility of CFPN between different columns. Summary of the invention

[0005] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, one object of the present invention is to provide a column switching circuit, which can disperse the differences in pixel signals between column pixel units and significantly reduce the visibility of CFPN between different column pixel units.

[0006] A second embodiment of the present invention provides an image sensor.

[0007] A third aspect of the present invention provides an electronic device.

[0008] A fourth aspect of the present invention provides a vehicle.

[0009] In order to achieve the above-mentioned purpose, a column switching circuit of an embodiment of the first aspect of the present invention is used for an image sensor, wherein the image sensor includes N columns of pixel units, N>1, and the column switching circuit includes: N switch units, wherein the first ends of the N switch units are suitable for being connected one-to-one with the N columns of pixel units, each of the switch units includes an input switch and an output switch, and the first end of the input switch is suitable for being connected with the corresponding column of pixel units; a plurality of connecting lines, wherein each of the connecting lines is connected to the second end of the input switch in at least one of the switch units, and each of the connecting lines is connected to the first end of the output switch in a plurality of the switch units; wherein, among the input switches and output switches selectively connected to the same connecting line, only one input-output path is turned on at the same time to transmit the image signal of the column of pixel units connected to the input switch.

[0010] In the column exchange circuit according to the embodiment of the present invention, connecting lines are set in the switch unit to form two signal transmission stages from the input switch to the connecting line and from the connecting line to the output switch, so that different transmission paths of pixel signals can be realized. Each connecting line is connected to at least one input switch and output switches in multiple switch units, and the signal transmission path can be selectively controlled so that the image signal input by the input switch can be selectively output through the output switches in different switch units, thereby realizing the exchange of pixel signals in different columns, and the column exchange is more random, so that the difference in pixel signals between column pixel units can be more fully dispersed, thereby reducing the visibility of CFPN between different column pixel units.

[0011] In some embodiments, the N switch units are located in a plurality of switch groups; within the same switch group, the input switch is connected to the output switch through the connecting line.

[0012] In some embodiments, each of the switch units includes at least one of the input switches and at least one of the output switches; the at least one input switch is connected to different of the connection lines; and the at least one output switch is connected to different of the connection lines.

[0013] In some embodiments, each of the switch units includes a plurality of input switches and a plurality of output switches, and the plurality of input switches and the plurality of output switches are arranged in an array; wherein each column of switches in the array includes one input switch and one output switch. In some embodiments, within the switch group, the input switches of the corresponding columns of all the switch units are controlled synchronously, and the output switches of the corresponding columns of all the switch units are controlled synchronously.

[0014] In some embodiments, within the switch unit, only one of the plurality of input switches is turned on at any time, and only one of the plurality of output switches is turned on at any time.

[0015] In some embodiments, in the same switch group, the number of the switch units is the same as the number of the connection lines.

[0016] In some embodiments, the second end of the input switch in the switch unit corresponding to the odd-numbered column pixel unit and the first end of the output switch in the switch unit corresponding to the even-numbered column pixel unit are connected to the same connection line; the second end of the input switch in the switch unit corresponding to the even-numbered column pixel unit and the first end of the output switch in the switch unit corresponding to the odd-numbered column pixel unit are connected to the same connection line.

[0017] In some embodiments, in the same switch group, the image signal of the input switch in the switch unit corresponding to the odd-numbered columns of pixel units can be selectively output through the output switch in the different switch unit corresponding to the even-numbered columns of pixel units.

[0018] In some embodiments, each of the switch units includes a first input switch, a second input switch, a first output switch, and a second output switch; in the switch group, all of the first input switches are controlled synchronously, all of the second input switches are controlled synchronously, and the first input switch and the second input switch are not turned on at the same time; in the switch group, all of the first output switches are controlled synchronously, all of the second output switches are controlled synchronously, and the first output switch and the second output switch are not turned on at the same time.

[0019] In some embodiments, each of the switch groups includes four switch units; in each of the switch units, the first input switch, the second input switch, the first output switch and the second output switch are respectively connected to the four connection lines.

[0020] In some embodiments, the four switch units include a first switch unit and a second switch unit; the four connection lines include a first connection line, a second connection line, a third connection line and a fourth connection line; in the first switch unit, the second end of the first input switch is connected to the first connection line, the second end of the second input switch is connected to the third connection line, the first end of the first output switch is connected to the second connection line, and the first end of the second output switch is connected to the fourth connection line; in the second switch unit, the second end of the first input switch is connected to the fourth connection line, the second end of the second input switch is connected to the second connection line, the first end of the first output switch is connected to the third connection line, and the first end of the second output switch is connected to the first connection line.

[0021] In some embodiments, the four switch units further include a third switch unit and a fourth switch unit; in the third switch unit, the second end of the first input switch is connected to the third connection line, the second end of the second input switch is connected to the first connection line, the first end of the first output switch is connected to the fourth connection line, and the first end of the second output switch is connected to the second connection line; in the fourth switch unit, the second end of the first input switch is connected to the second connection line, the second end of the second input switch is connected to the fourth connection line, the first end of the first output switch is connected to the third connection line, and the first end of the second output switch is connected to the first connection line.

[0022] In some embodiments, each of the switch units includes a first input switch, a second input switch, a third input switch and a fourth input switch, a first output switch, a second output switch, a third output switch and a fourth output switch; within the switch group, all the first input switches are synchronously controlled, all the second input switches are synchronously controlled, all the third input switches are synchronously controlled, and all the fourth input switches are synchronously controlled, and at any time, only one of the first input switch, the second input switch, the third input switch and the fourth input switch is turned on; within the switch group, all the first output switches are synchronously controlled, all the second output switches are synchronously controlled, all the third output switches are synchronously controlled, and all the fourth output switches are synchronously controlled, and at any time, only one of the first output switch, the second output switch, the third output switch and the fourth output switch is turned on.

[0023] In some embodiments, each of the switch groups includes four switch units; in each of the switch units, the first input switch, the second input switch, the third input switch and the fourth input switch are respectively connected to four connecting lines; in each of the switch units, the first output switch, the second output switch, the third output switch and the fourth output switch are respectively connected to four connecting lines.

[0024] In some embodiments, in each of the switch units, the input switches and the output switches in the same column are connected to the same connection line.

[0025] In some embodiments, the four switch units include a first switch unit and a second switch unit; the four connection lines include a first connection line, a second connection line, a third connection line and a fourth connection line; in the first switch unit, the second end of the first input switch and the first end of the first output switch are both connected to the first connection line, the second end of the second input switch and the first end of the second output switch are both connected to the second connection line, the second end of the third input switch and the first end of the third output switch are both connected to the third connection line, and the second end of the fourth input switch and the first end of the fourth output switch are both connected to the fourth connection line; in the second switch unit, the second end of the first input switch and the first end of the first output switch are both connected to the fourth connection line, the second end of the second input switch and the first end of the second output switch are both connected to the first connection line, the second end of the third input switch and the first end of the third output switch are both connected to the second connection line, and the second end of the fourth input switch and the first end of the fourth output switch are both connected to the third connection line.

[0026] In some embodiments, the four switch units further include a third switch unit and a fourth switch unit; in the third switch unit, the second end of the first input switch and the first end of the first output switch are both connected to the third connection line, the second end of the second input switch and the first end of the second output switch are both connected to the fourth connection line, the second end of the third input switch and the first end of the third output switch are both connected to the first connection line, and the second end of the fourth input switch and the first end of the fourth output switch are both connected to the second connection line; in the fourth switch unit, the second end of the first input switch and the first end of the first output switch are both connected to the second connection line, the second end of the second input switch and the first end of the second output switch are both connected to the third connection line, the second end of the third input switch and the first end of the third output switch are both connected to the fourth connection line, and the second end of the fourth input switch and the first end of the fourth output switch are both connected to the first connection line.

[0027] In some embodiments, the four switch units include a first switch unit and a second switch unit; in the first switch unit, the second end of the first input switch and the first end of the first output switch are both connected to the first connection line, the second end of the second input switch and the first end of the second output switch are both connected to the fourth connection line, the second end of the third input switch and the first end of the third output switch are both connected to the third connection line, and the second end of the fourth input switch and the first end of the fourth output switch are both connected to the second connection line; in the second switch unit, the second end of the first input switch is connected to the second connection line, the first end of the first output switch is connected to the fourth connection line, the second end of the second input switch and the first end of the second output switch are both connected to the first connection line, the second end of the third input switch is connected to the fourth connection line, the first end of the third output switch is connected to the second connection line, and the second end of the fourth input switch and the first end of the fourth output switch are both connected to the third connection line.

[0028] In some embodiments, the four switch units further include a third switch unit and a fourth switch unit; in the third switch unit, the second end of the first input switch and the first end of the first output switch are both connected to the third connection line, the second end of the second input switch and the first end of the second output switch are both connected to the second connection line, the second end of the third input switch and the first end of the third output switch are both connected to the first connection line, and the second end of the fourth input switch and the first end of the fourth output switch are both connected to the fourth connection line; in the fourth switch unit, the second end of the first input switch is connected to the fourth connection line, the first end of the first output switch is connected to the second connection line, the second end of the second input switch and the first end of the second output switch are both connected to the third connection line, the second end of the third input switch is connected to the second connection line, the first end of the third output switch is connected to the fourth connection line, and the second end of the fourth input switch and the first end of the fourth output switch are both connected to the first connection line.

[0029] In order to achieve the above-mentioned purpose, the image sensor of the second aspect of the embodiment of the present invention includes: a pixel array, the pixel array includes N columns of pixel units, N>1; the column exchange circuit, the column exchange circuit is connected to the pixel array.

[0030] According to the image sensor of the embodiment of the present invention, by adopting the column exchange circuit of the above embodiment, the column fixed pattern noise of the pixel signals of each column can be averaged into each time period of the exchange cycle, so as to more fully disperse the differences of the pixel signals of different columns and reduce the visibility of the column FPN.

[0031] In some embodiments, the image sensor further includes: a column analog-to-digital converter, which is connected to the column switching circuit and is used to convert the pixel signal into a digital signal.

[0032] In some embodiments, the image sensor further includes: a linear shift register, connected to the output ends of the column exchange circuit and the column analog-to-digital converter, respectively, for generating a pseudo-random code; a controller, connected to the linear shift register, for controlling the on and off of switches in a switch unit in the column exchange circuit according to the pseudo-random code, and restoring the initial order of pixel signals output by the column analog-to-digital converter according to the pseudo-random code.

[0033] In order to achieve the above objective, a third aspect of the present invention provides an electronic device, which includes the image sensor of the above embodiment.

[0034] The electronic device according to the embodiment of the present invention can disperse the differences in pixel signals between column pixel units by adopting the image sensor of the above embodiment, greatly reduce the visibility of CFPN between different column pixel units, and improve the image acquisition performance of the device.

[0035] In order to achieve the above objective, a fourth aspect of the present invention provides a vehicle, which includes the image sensor of the above embodiment.

[0036] The vehicle of the embodiment of the present invention, by adopting the image sensor of the above embodiment, can disperse the differences in pixel signals between column pixel units, greatly reduce the visibility of CFPN between different column pixel units, provide a data basis for the vehicle's image-based control strategy, and improve the safety of vehicle driving.

[0037] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which: Figure 1 is a schematic diagram of a column switching circuit structure according to an embodiment of the present invention; Figure 2 is a schematic diagram of a column switching circuit structure according to another embodiment of the present invention; Figure 3 is a schematic diagram of corresponding connection relationships among input switches, output switches and connection lines according to an embodiment of the present invention; Figure 4is a comparative schematic diagram of pixel signal transmission paths according to Embodiment 2 and Embodiment 3 of the present invention; Figure 5 is a schematic diagram of a column switching circuit structure according to another embodiment of the present invention; Figure 6 is a block diagram of an image sensor according to an embodiment of the present invention; Figure 7 is a block diagram of an image sensor according to another embodiment of the present invention; Figure 8 is a schematic diagram of an image sensor using a three-dimensional stacking structure according to an embodiment of the present invention; Fig. 9 Schematic diagram of a transmission process of a pixel column of an image sensor according to an embodiment of the present invention.

[0039] Fig.10 is a block diagram of an electronic device according to an embodiment of the present invention; Fig.11 is a block diagram of a vehicle according to one embodiment of the present invention.

[0040] Reference numerals: Vehicles 2000; Electronic equipment 1000; Image sensor 1; Column exchange circuit 100, pixel array 200, column analog-to-digital conversion circuit 300, linear shift register 400 and controller 500, connection line 10, switch unit 20, input switch 21 and output switch 22; A first switch unit 201, a second switch unit 202, a third switch unit 203, and a fourth switch unit 204; A first input switch S11, a second input switch S12, a third input switch S13 and a fourth input switch S14, a first output switch S21 and a second output switch S22, a third output switch S23 and a fourth output switch S24; Connecting lines: n1, n2, n3, n4; control lines: Sel1, Sel2, Sel3, Sel4, Sel5, Sel6, Sel7 and Sel8. DETAILED DESCRIPTION

[0041] Embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. Embodiments of the present invention are described in detail below.

[0042] The noise in CMOS image sensors is divided into random noise and pattern noise. Pattern noise is spatially distributed noise that has the same effect on all frames and cannot be eliminated by adjusting the frame rate. Pattern noise is further divided into fixed pattern noise and light response inconsistency. Light response inconsistency is of low order of magnitude and has little effect on image quality.

[0043] For fixed pattern noise (FPN), due to the deviations in the size, doping concentration, contamination during the production process, and parameters of the MOS field effect tube of each pixel structure, the output signals of each pixel under uniform illumination conditions are different. The interference caused by this deviation is called fixed pattern noise. It is called "fixed" pattern noise because this noise is fixed for a single pixel, but it is different for different pixels.

[0044] Among them, FPN can be further divided into pixel FPN and CFPN (Column Fixed Pattern Noise). On a frame of image, pixel FPN usually appears as uniformly distributed noise, while CFPN appears as vertical stripe noise on a frame of image. CFPN is caused by the difference in the data readout circuit of each column of the sensor. Since the human eye is more sensitive to vertical stripes, CFPN has the greatest impact.

[0045] The column exchange circuit of the embodiment of the present invention is aimed at reducing the visibility of CFPN between columns.

[0046] Reference below Figure 1-Figure 5 A column switching circuit according to an embodiment of the present invention is described.

[0047] The column exchange circuit of the embodiment of the present invention is used for an image sensor. The image sensor includes a pixel array. The pixel array includes N columns of pixel units, wherein N>1, that is, the pixel array includes multiple columns of pixel units.

[0048] Figure 1 FIG. 1 is a schematic diagram of a column switching circuit structure according to an embodiment of the present invention. Figure 1 As shown, the column switching circuit 100 according to the embodiment of the present invention includes a connecting line 10 and a switch unit 20 .

[0049] Among them, the number of switch units 20 is N, that is, the number of switch units 20 is the same as the number of columns of the pixel array, and the first ends of the N switch units 20 are suitable for one-to-one connection with the N columns of pixel units. For example, the input end of each switch unit 20 is connected to the column bus of the corresponding column of pixel units to input the pixel signal of the corresponding pixel unit.

[0050] Each switch unit 20 includes an input switch 21 and an output switch 22 .

[0051] The first end of the input switch 21 is suitable for being connected to the corresponding column of pixel units to input the image signal of the corresponding column of pixel units, and the second end of the output switch 22 is used to output the image signal of the column of pixel units.

[0052] The connection line 10 serves as an intermediate node of the switch unit 20 and is used to connect the input and output switches in the switch unit 20 .

[0053] There are multiple connection lines 10, each of which is connected to the second end of the input switch 21 in at least one switch unit 20, and each of which is connected to the first end of the output switch 22 in multiple switch units 20, and the second end of the output switch 22 is suitable for outputting image signals. That is, each connection line 10 can be connected to the second end of the input switch 21 in one switch unit 20 or to the input switches in multiple switch units 20, so that the signal output path of the column pixel unit can be selectively controlled, that is, the output signals of the column pixel units are randomly exchanged.

[0054] In the embodiment, only one input / output path of the input switch 21 and the output switch 22 connected to the same connection line 10 can be selectively controlled to be turned on at the same time to transmit the image signal of the column pixel unit connected to the input switch 21. Thus, the image signal of the column pixel unit can be randomly output from the output end of different switch units, so as to achieve the purpose of randomly exchanging the output signal of the column pixel unit.

[0055] That is, the input switch 21 can be selectively connected to any one of the multiple output switches through the connection line 10 to realize different image signal transmission paths, thereby greatly increasing the dispersion and randomness of the exchange of column pixel units. Among them, as for the number of connection lines 10, connection lines less than the number of pixel array columns can be used and combined with the control of the input switch and the output switch in the switch unit to realize the exchange of any column of pixel units. More preferably, by using the same number of connection lines as the number of pixel array columns, the purpose of switching the output of pixel signals of different columns of pixel units can be achieved, and the situation of interruption of pixel signal transmission of a certain column of pixel units can be avoided.

[0056] Specifically, the second end of the input switch 21 is connected to the connecting line 20, the pixel signal of the corresponding column pixel unit is input to the input switch 21, and further transmitted to the connecting line 20, the output switch 22 is also connected to the connecting line 20, and the input switch 21 and the output switch 22 connected to the same connecting line 20 are selectively turned on, so that the transmission of the pixel signal can be realized.

[0057] In an embodiment, the input switch and the output switch in the same switch unit 20 can be connected to the same connection line 10, and the input switches and the output switches of different related units 20 can also be connected to the same connection line 20, and then by controlling the on and off of the related input switches 21 and the output switches 22, the image signal input by the input switch 21 can be selectively output through the output switches 22 in different switch units 20, so that the column pixel signals can be exchanged, and based on connecting different connection lines, different switches are controlled to be on and off. Compared with sequential exchange, the present application is based on the setting of the above-mentioned column exchange circuit 100, and the readout of the column pixel signals can be exchanged more randomly, so that the differences between columns can be more sufficiently dispersed, and the visibility of CFPN between different columns can be reduced to a greater extent.

[0058] In the column exchange circuit 100 according to the embodiment of the present invention, the switch unit 20 is provided with a connecting line 10 to form two signal transmission stages from the input switch 21 to the connecting line 10 and from the connecting line to the output switch 22, so that different transmission paths of pixel signals can be realized. Each connecting line is connected to at least one input switch and output switches in multiple switch units, so that the image signal input by the input switch can be selectively output through the output switches in different switch units 20, thereby realizing the exchange of pixel signals of different columns, and the column exchange is more random, so that the difference of pixel signals between column pixel units can be more fully dispersed, and the visibility of CFPN between pixel units of different columns can be reduced.

[0059] Furthermore, the pixel array of the image sensor includes N columns of pixel units. In order to improve the imaging clarity, a relatively large pixel array will be used, that is, N may be relatively large. In the embodiment of the present invention, the column exchange circuit 100 can realize the random exchange of pixel signals of different columns by setting the connecting line 10 as the input and output node. However, in this case, the structure of the column exchange circuit 100 is relatively complex and the control logic is also relatively cumbersome. Therefore, in the embodiment of the present invention, the N switch units 20 can be grouped to realize the image signal exchange of the switch units in the group.

[0060] In some embodiments, the N switch units 20 are located in multiple switch groups, for example, divided into L switch groups, L>1, for example, L is 3, 4, 5 or more, and no specific limitation is given here.

[0061] Among them, in the same switch group, the input switch 21 is connected to the output switch 22 through the connecting line 10, and the image signal input by the input switch 21 can be selectively output through the output switch 22 in different switch units 20 in the same switch group, that is, pixel signal transmission between different switch units 20 in the switch group is realized.

[0062] For example, Figure 1The figure shows a switch group, which includes four switch units 20. Each switch unit 20 includes an input switch 21 and an output switch 22. The first end of the input switch 21 is connected to the column bus of the corresponding column pixel unit to input the pixel signal of the corresponding column pixel unit, and the connecting line 10 is used as the intermediate node between the input switch 21 and the output switch 22 so that the pixel signals of the column pixel units can be exchanged between different switch units 20 in the switch group.

[0063] By grouping N switch units 20, the input and output connections between different switch units 20 in the switch group are realized through the connecting lines 10 in the switch group, and the random exchange of pixel signals of the corresponding column pixel units of the switches in the group can also be realized. In this way, the structure of the column exchange circuit 100 is simpler and the control logic of the column exchange is simpler.

[0064] Further, regarding the number of switches in the switch unit 20, in some embodiments, each switch unit 20 may include at least one input switch 21 and at least one output switch 22. That is, each switch unit 20 may be provided with a single input and output switch or multiple input and output switches.

[0065] In the switch unit 20, at least one input switch 21 is connected to different connection lines 10, and at least one output switch 22 is connected to different connection lines 10. In this way, the input and output combinations between different switch units 20 can be better performed, and more random exchange of column pixel signals can be achieved.

[0066] In some embodiments, a plurality of input switches 21 and a plurality of output switches 22 are provided in each switch unit 20. In the same switch unit 20, the plurality of input switches 21 and the plurality of output switches 22 are arranged in an array, and each column in the array includes one input switch and one output switch. For example, P input switches 21 and P output switches 22 are arranged in P columns, P>1, and each column of switches includes one input switch 21 and one output switch 22.

[0067] For example, two input switches 21 and two output switches 22 are provided in each switch unit 20. Figure 1 As shown, two input switches 21 and two output switches 22 are arranged in two columns, and each column of switches includes one input switch 21 and one output switch 22 .

[0068] For another example, Figure 2 FIG. 4 is a schematic diagram of a column exchange circuit according to another embodiment of the present invention. Figure 2 As shown, four input switches 21 and four output switches 22 are provided in each switch unit 20 . The four input switches 21 and the four output switches 22 are arranged in four columns, and each column of switches includes one input switch 21 and one output switch 22 .

[0069] It is understandable that one input switch 21 and one output switch 22 may be provided in each switch unit 20, or three input switches 21 and three output switches 22 may be provided, or more input switches and output switches may be provided in each switch unit 20, without any specific limitation, so as to enable the input signal of the input switch 21 to be selectively output through the output switches 22 of different switch units 20.

[0070] In an embodiment, within the same switch group, the input switches 21 of corresponding columns of all switch units 20 are synchronously controlled, and the corresponding output switches 22 of all switch units 20 are synchronously controlled.

[0071] For example, Figure 1 As shown, in order from left to right in the figure, the control ends of the input switches 21 in the first column of the four switch units 20 are all connected to the control line Sel1, the control ends of the output switches 22 in the first column are all connected to the control line Sel3, the control ends of the input switches 21 in the second column of the four switch units 20 are all connected to the control line Se2, and the control ends of the output switches 22 in the second column are all connected to the control line Sel4.

[0072] Moreover, in the switch unit 20, only one of the multiple input switches 21 is turned on at any time, and only one of the multiple output switches 22 is turned on at any time. In this way, a random combination of the input switches 21 and the output switches 22 in different switch units 20 can be achieved, column exchange of pixel signals can be achieved, and signal conflicts can be avoided.

[0073] In the embodiment of the present invention, the number of the switch units 20 is the same as the number of the connecting lines 10. For example, in the switch group, Figure 1 There are four switch units 20 and four connecting wires 20. Figure 2 There are also four switch units 20 and four connecting lines 20. Such an arrangement can not only meet the requirements of pixel signal exchange between different switch units 20, but also has a simple circuit structure.

[0074] In the embodiment of the present invention, the input switch 21 and the output switch 22 are connected to different connection lines 10, so that different input and output connection modes can be realized, which are described below with different embodiments.

[0075] Embodiment 1: In the embodiment, the second end of the input switch 21 in the switch unit corresponding to the odd-numbered column pixel unit and the first end of the output switch 22 in the switch unit corresponding to the even-numbered column pixel unit are connected to the same 2 connection lines 10; the second end of the input switch 21 in the switch unit corresponding to the even-numbered column pixel unit and the first end of the output switch 22 in the switch unit corresponding to the odd-numbered column pixel unit are connected to the same 2 connection lines 10. That is, within the switch group, the exchange output of the image signals of the adjacent odd and even-numbered column pixel units can be realized.

[0076] In the same switch group, the image signal of the input switch 21 in the switch unit corresponding to the odd-numbered columns of pixel units can be selectively output through the output switch 22 in the different switch unit 20 corresponding to the even-numbered columns of pixel units.

[0077] like Figure 1 As shown, in this embodiment, the switch group includes four switch units 20 and four connecting lines 10, each switch unit 20 is connected between the corresponding column pixel unit and the column analog-to-digital conversion circuit, and each switch unit 20 includes four transistors, namely two input switches 21 and two output switches 22. The input switches 21 of the corresponding columns of the four switch units 20 are respectively connected to the control lines Sel1 and Sel2, and the output switches 22 of the corresponding columns of the four switch units 20 are respectively connected to the control lines Sel3 and Sel4, and the control lines have the same control effect on each column of pixel units. Each control line controls the conduction and closing of a switch in each switch unit 20, and the control signal of the control line can be generated by a linear shift register (Linear-Feedback Shift Register, LFSR).

[0078] Specifically, Figure 1 As shown, each column of pixel signals is connected to the middle connection line 10, namely n1, n2, n3, n4, through two different input paths, and the pixel signal is selectively coupled to the output through one of the two output channels from the middle connection line 10. Among them, considering the representativeness and scalability of the implementation scheme, this implementation scheme takes a dynamic column switching circuit unit of four columns of pixels as an example, but its theoretical idea can be applied to a dynamic column switching circuit of 2a (a=1,2,3...) columns. Therefore, this implementation scheme has four inputs and four outputs, and the pixel signal has four different ways to be transmitted from the input to the output.

[0079] Further, each switch unit includes a first input switch S11, a second input switch S12, a first output switch S21, and a second output switch S22. In the switch group, all first input switches S11 are synchronously controlled, all second input switches S12 are synchronously controlled, and the first input switches S11 and the second input switches S12 are not turned on at the same time; in the switch group, all first output switches S21 are synchronously controlled, all second output switches S22 are synchronously controlled, and the first output switches S21 and the second output switches S22 are not turned on at the same time. That is, no matter when the signal is observed, the pixel signal can only be transmitted from the input to the intermediate connection line 10 of the dynamic column switching circuit through one path, and can be transmitted from the intermediate connection line to the output in different ways.

[0080] And, in an embodiment, as Figure 1 As shown, each switch group includes four switch units 20; in each switch unit 20, the first input switch S11, the second input switch S12, the first output switch S21 and the second output switch S22 are respectively connected to four connecting lines 10, that is, in each switch unit 20, each switch is connected to a different connecting line 10.

[0081] The four switch units 20 include a first switch unit 201 and a second switch unit 202 ; the four connection lines 10 include a first connection line n1 , a second connection line n2 , a third connection line n3 and a fourth connection line n4 .

[0082] In the first switch unit 201, the second end of the first input switch S11 is connected to the first connection line n1, the second end of the second input switch S12 is connected to the third connection line n3, the first end of the first output switch S21 is connected to the second connection line n2, and the first end of the second output switch S22 is connected to the fourth connection line n4.

[0083] In the second switch unit 202, the second end of the first input switch S11 is connected to the fourth connection line n4, the second end of the second input switch S12 is connected to the second connection line n2, the first end of the first output switch S21 is connected to the third connection line n3, and the first end of the second output switch S22 is connected to the first connection line n1.

[0084] The four switch units 20 also include a third switch unit 203 and a fourth switch unit 204; in the third switch unit 203, the second end of the first input switch S11 is connected to the third connection line n3, the second end of the second input switch S12 is connected to the first connection line n1, the first end of the first output switch S21 is connected to the fourth connection line n4, and the first end of the second output switch S22 is connected to the second connection line n2; in the fourth switch unit 204, the second end of the first input switch S11 is connected to the second connection line n2, the second end of the second input switch S12 is connected to the fourth connection line n4, the first end of the first output switch S21 is connected to the third connection line n3, and the first end of the second output switch S22 is connected to the first connection line n1.

[0085] It should be noted that the above only takes four switch units 20 and four switches in each switch unit 20 as an example. Other similar variations, such as more switch units and other numbers of switches in each switch unit, also fall within the scope of protection of the present application.

[0086] Specifically, Figure 1 As shown, in order to complete the column exchange operation, each switch unit 20 is provided with four transistors. The gates of the transistors in the switch units corresponding to the four columns of pixel units of each dynamic column exchange circuit unit are connected to the same control line. The transistors at the two input ends are used to connect the column bus and the connection line 10. This operation can only control one transistor to be turned on at any time through the control lines (Sel1, Sel2). Therefore, there are two different ways to connect the input and the intermediate connection line 10. The other two transistors included in each switch unit 20 couple the intermediate connection line 10 and the output of the dynamic column exchange unit together through the control lines (Sel3, Sel4). Similarly, only one transistor can be in the on state at each time. There are two different coupling modes from the intermediate connection line 10 to the output. Therefore, in this embodiment, the pixel signal of each column of pixel units can be transmitted from the input in the switch unit 20 to the output through four different connection modes.

[0087] like Figure 1As shown, the transistors controlled by the control line Sel1 are coupled to the intermediate connection lines n1, n4, n3, and n2 in sequence, and the transistors controlled by the control line Sel2 are coupled to the intermediate connection lines n3, n2, n1, and n4 in sequence. In the process of inputting the pixel signal to the intermediate connection line 10, the odd column signal is coupled to the odd number of intermediate connection lines, and the even column signal is coupled to the even number of intermediate connection lines. In the process of transmitting the pixel signal from the intermediate connection line to the output, the control line Sel3 transmits the signals on the intermediate connection lines n2, n3, n4, and n1 to the output end in sequence, and the control line Sel4 transmits the signals on the intermediate connection lines n4, n1, n2, and n3 to the output end in sequence. When the pixel signal is output, the pixel signals on the odd number of intermediate connection lines are connected to the output of the even number of columns, and the pixel signals on the even number of intermediate connection lines are connected to the output of the odd number of columns.

[0088] From the above, by exchanging the columns between the odd-numbered columns and the even-numbered columns, the situation of exchanging to the original order is avoided, the randomness between the columns is increased, and the circuit components are relatively simple, which can effectively reduce the complexity of the circuit.

[0089] Embodiment 2: like Figure 2 As shown, each switch unit 20 includes a first input switch S11, a second input switch S12, a third input switch S13 and a fourth input switch S14, a first output switch S21, a second output switch S22, a third output switch S23 and a fourth output switch S24.

[0090] Among them, in the switch group, all first input switches S12 are controlled synchronously, all second input switches S12 are controlled synchronously, all third input switches S13 are controlled synchronously, and all fourth input switches S14 are controlled synchronously. At any time, only one of the first input switch S11, the second input switch S12, the third input switch S13 and the fourth input switch S14 is turned on.

[0091] Also, within the switch group, all first output switches S21 are controlled synchronously, all second output switches S22 are controlled synchronously, all third output switches S23 are controlled synchronously, and all fourth output switches S24 are controlled synchronously. At any time, only one of the first output switch S21, the second output switch S22, the third output switch S23, and the fourth output switch S24 is turned on.

[0092] In the embodiment, each switch group includes four switch units 20; in each switch unit 20, the first input switch S11, the second input switch S12, the third input switch S13 and the fourth input switch S14 are respectively connected to the four connecting lines n1, n2, n3 and n4; in each switch unit 20, the first output switch S21, the second output switch S22, the third output switch S23, the fourth output switch S24 are respectively connected to the four connecting lines n1, n2, n3 and n4.

[0093] In an embodiment, in each switch unit, the input switches and output switches in the same column are connected to the same connection line. This arrangement is simple in arrangement and control logic.

[0094] In some embodiments, taking the example of each switch group including four switch units, the four switch units 20 include a first switch unit 201 and a second switch unit 202 .

[0095] Among them, in the first switch unit 201, the second end of the first input switch S11 and the first end of the first output switch S21 are both connected to the first connection line n1, the second end of the second input switch S12 and the first end of the second output switch S21 are both connected to the second connection line n2, the second end of the third input switch S13 and the first end of the third output switch S23 are both connected to the third connection line n3, and the second end of the fourth input switch S14 and the first end of the fourth output switch S24 are both connected to the fourth connection line n4.

[0096] In the second switch unit 202, the second end of the first input switch S11 and the first end of the first output switch S21 are both connected to the fourth connection line n4, the second end of the second input switch S12 and the first end of the second output switch S22 are both connected to the first connection line n1, the second end of the third input switch S13 and the first end of the third output switch S23 are both connected to the second connection line n2, and the second end of the fourth input switch S14 and the first end of the fourth output switch S24 are both connected to the third connection line n3.

[0097] The four switch units 20 further include a third switch unit 203 and a fourth switch unit 204 .

[0098] In the third switch unit 203, the second end of the first input switch S11 and the first end of the first output switch S21 are both connected to the third connection line n3, the second end of the second input switch S12 and the first end of the second output switch S22 are both connected to the fourth connection line n4, the second end of the third input switch S13 and the first end of the third output switch S23 are both connected to the first connection line n1, and the second end of the fourth input switch S14 and the first end of the fourth output switch S24 are both connected to the second connection line n2.

[0099] In the fourth switch unit 204, the second end of the first input switch S11 and the first end of the first output switch S21 are both connected to the second connection line s2, the second end of the second input switch S12 and the first end of the second output switch S22 are both connected to the third connection line s3, the second end of the third input switch S13 and the first end of the third output switch S23 are both connected to the fourth connection line s4, and the second end of the fourth input switch S14 and the first end of the fourth output switch S24 are both connected to the first connection line s1.

[0100] Specifically, Figure 2 As shown, each column of pixel signals is connected to the intermediate connection lines n1, n2, n3 and n4 through four different input paths, and the pixel signal is selectively coupled to the output through one of the four output channels from the intermediate connection line 10. Considering the representativeness and scalability of the implementation scheme, this implementation scheme takes a dynamic column switching circuit unit of four columns of pixels as an example, but its theoretical idea can be applied to a dynamic column switching circuit of 2a (a=1,2,3…) columns. Therefore, this implementation scheme has four inputs and four outputs, and the pixel signal has sixteen different ways to be transmitted from the input to the output.

[0101] In order to complete the column exchange operation, such as Figure 2 As shown, each switch unit 20 is provided with eight transistors. The gates of the transistors in the same column in each switch unit are connected to the same control line. Four transistors are used to connect the column bus and the connecting line 10. This operation can only control one transistor to be turned on at any time through the control lines Sel1, Sel2, Sel3 and Sel4. Therefore, there are four different ways to connect the input end and the connecting line 10. The other four transistors included in each switch unit couple the intermediate connecting line 10 and the output of the column switching circuit 100 together through the control lines Sel5, Sel6, Sel7 and Sel8. Similarly, only one transistor can be in the on state at each time. Therefore, there are four different coupling methods from the intermediate connecting line 10 to the output, and the pixel signal can be connected from the input to the output in sixteen different ways.

[0102] Figure 31 is a schematic diagram of the corresponding connection relationship between the input switch, the output switch and the connection line according to an embodiment of the present invention. As shown in Table 1, the transistors controlled by the control line Sel1 in each column are sequentially coupled to the connection lines n1, n4, n3, and n2, the transistors controlled by the control line Sel2 are sequentially coupled to the connection lines n2, n1, n4, and n3, the transistors controlled by the control line Sel3 are sequentially coupled to the connection lines n3, n2, n1, and n4, and the transistors controlled by the control line Sel4 are sequentially coupled to the connection lines n4, n3, n2, and n1. In the process of transmitting the pixel signal from the connecting line to the output, the control line Sel5 sequentially transmits the signals on the connecting lines n4, n3, n2, and n1 to the output end, the control line Sel6 sequentially transmits the signals on the connecting lines n3, n2, n1, and n4 to the output end, the control line Sel7 sequentially transmits the signals on the connecting lines n2, n1, n4, and n3 to the output end, and the control line Sel8 sequentially transmits the signals on the connecting lines n1, n4, n3, and n2 to the output end.

[0103] In the above process, each column of pixel signals is transmitted to different connecting lines 10 through different transistors, and randomly coupled from the connecting lines 10 to the output channels. Unlike the first embodiment, the pixel columns are not classified into odd and even numbers and their positions are swapped. In this way, more random combinations from input to output can be achieved, thereby more fully dispersing the differences in pixel signals between different columns.

[0104] like Figure 3 As shown in the figure, by analyzing the sixteen transmission situations of pixel signals from input to output, when only the input and output ports are considered, there are four ways to exchange column pixel signals, namely Figure 4 As shown in Example 2, Figure 4 : is a comparative schematic diagram of the pixel signal transmission path of the second embodiment and the third embodiment according to the present invention. The reason for this is that, although the input and output order of each column in the four repeated exchange modes is the same, the intermediate nodes passed are different, resulting in repeated calculations during statistics. The randomness of column exchange in the second embodiment is further improved compared with the first embodiment.

[0105] Embodiment three: In order to increase the number of ways to exchange column pixel signals, the connection method between the input and output switches and the connection lines is further optimized in the embodiment of the present application.

[0106] like Figure 5 As shown, in some embodiments, each switch group includes four switch units 10 , and the four switch units 20 include a first switch unit 201 , a second switch unit 202 , a third switch unit 203 and a fourth switch unit 204 .

[0107] Among them, in the first switch unit 201, the second end of the first input switch S11 and the first end of the first output switch S21 are both connected to the first connection line n1, the second end of the second input switch S12 and the first end of the second output switch S22 are both connected to the fourth connection line n4, the second end of the third input switch S13 and the first end of the third output switch S23 are both connected to the third connection line n3, and the second end of the fourth input switch S14 and the first end of the fourth output switch S24 are both connected to the second connection line n2.

[0108] In the second switch unit 202, the second end of the first input switch S11 is connected to the second connection line, the first end of the first output switch S21 is connected to the fourth connection line n4, the second end of the second input switch S12 and the first end of the second output switch S22 are both connected to the first connection line n1, the second end of the third input switch S13 is connected to the fourth connection line, the first end of the third output switch S23 is connected to the second connection line n2, and the second end of the fourth input switch S14 and the first end of the fourth output switch S24 are both connected to the third connection line n3.

[0109] In the third switch unit 203, the second end of the first input switch S11 and the first end of the first output switch S21 are both connected to the third connection line n3, the second end of the second input switch S12 and the first end of the second output switch S22 are both connected to the second connection line n2, the second end of the third input switch S13 and the first end of the third output switch S23 are both connected to the first connection line n1, and the second end of the fourth input switch S14 and the first end of the fourth output switch S24 are both connected to the fourth connection line n4.

[0110] In the fourth switch unit 204, the second end of the first input switch S11 is connected to the fourth connection line n4, the first end of the first output switch S21 is connected to the second connection line n2, the second end of the second input switch S12 and the first end of the second output switch S22 are both connected to the third connection line n3, the second end of the third input switch S13 is connected to the second connection line n2, the first end of the third output switch S23 is connected to the fourth connection line n4, and the second end of the fourth input switch S14 and the first end of the fourth output switch S24 are both connected to the first connection line n1.

[0111] Specifically, Figure 5As shown, each column pixel signal is transmitted to the connection lines 10 in the switch unit 20 through four different input paths, namely n1, n2, n3 and n4, and the column pixel signal is selectively coupled to the output from the connection line 10 through one of the four output channels. Considering the representativeness and scalability of the implementation scheme, this implementation scheme takes a column switching circuit of four columns of pixels as an example, but its theoretical idea can be applied to a column switching circuit of 2a (a=1,2,3...) columns. Therefore, in the column switching circuit 100 of this embodiment, each switch unit 20 has four inputs and four outputs, and the column pixel signal has sixteen different ways to be transmitted from the input to the output.

[0112] In order to complete the column exchange operation, each switch unit 20 is provided with eight transistors. The gates of the transistors at the corresponding positions of the four columns of pixels of each column exchange circuit are connected to the same control line. Among them, the four transistors in each switch unit 20 are used to connect the column bus and the connecting line 10. This operation can only control one transistor to be turned on at any time through the control lines Sel1, Sel2, Sel3, and Sel4. Therefore, there are four different ways to connect the input and the middle connecting line 10. The other four transistors included in each switch unit 20 couple the middle node and the output of the column exchange circuit 100 together through the control lines Sel5, Sel6, Sel7, and Sel8. Similarly, only one transistor can be in the on state at each time. Therefore, there are four different coupling methods from the connecting line 10 to the output, and the column pixel signal can be connected from the input to the output in sixteen different ways.

[0113] like Figure 5 As shown, the transistors controlled by the control line Sel1 in each column are sequentially coupled to the connection lines n1, n2, n3, and n4, the transistors controlled by the control line Sel2 are sequentially coupled to the connection lines n4, n1, n2, and n3, the transistors controlled by the control line Sel3 are sequentially coupled to the connection lines n3, n4, n1, and n2, and the transistors controlled by the control line Sel4 are sequentially coupled to the connection lines n2, n3, n4, and n1. In the process of transmitting the pixel signal from the connection line to the output, the control line Sel5 sequentially transmits the signals on the connection lines n1, n4, n3, and n2 to the output end, the control line Sel6 sequentially transmits the signals on the connection lines n4, n1, n2, and n3 to the output end, the control line Sel7 sequentially transmits the signals on the connection lines n3, n2, n1, and n4 to the output end, and the control line Sel8 sequentially transmits the signals on the connection lines n2, n3, n4, and n1 to the output end.

[0114] In this embodiment, the coupling relationship between different transistor pairs of connection lines is changed to adjust and add 4 column switching modes from input to output, such as Figure 4 As shown. It can be seen that the column exchange method included in the third embodiment is twice that of the second embodiment. Therefore, compared with the second embodiment, it has higher randomness and can make the column FPN of each column pixel signal better averaged to all columns involved in the exchange, including but not limited to the mutual exchange of 4 columns described in this embodiment.

[0115] For the underlying logic of the column exchange circuit 100 of the embodiment of the present invention to implement the exchange of column pixel signals, taking the third embodiment as an example, statistics are made on the sixteen situations of pixel signals from input to output, and it is found that when only the input and output ports are taken into account, there are eight ways of exchanging columns, as shown in the above Table 2. For example, the eight ways of exchanging columns controlled by the linear shift register are named as state A, state B, state C, state D, state E, state F, state G and state H respectively; and it is assumed that the column fixed pattern noise carried by the first column input signal is the reference noise, and the column fixed pattern noise of the second column, the third column and the fourth column input signals relative to the first column are respectively 、+ , .

[0116] In state A, the total output noise of the four columns is ; In state B, the total output noise of the four columns is ; In state C, the total output noise of the four columns is ; In state D, the total output noise of the four columns is ; In state E, the total output noise of the four columns is ; In state F, the total output noise of the four columns is ; In state G, the total output noise of the four columns is ; In state H, the total output noise of the four columns is .

[0117] The temporal average of the total output noise of the four-column pixel signal in one exchange cycle can be expressed as: ; The total output noise of the four columns without dynamic column switching circuit processing is: ; The column switching circuit 100 of the embodiment of the present invention can realize a variety of different combinations by setting the connecting line 10 and setting each switch unit 20 to two stages: input to the connecting line 10 and connecting the line 10 to the output. The column fixed pattern noise of each column pixel signal can be averaged to each time period of the switching cycle, which greatly eliminates the inconsistency between pixel signal columns and reduces the visibility of column FPN. Based on the column exchange circuit of the above embodiment, a second embodiment of the present invention provides an image sensor.

[0118] like Figure 6 As shown, the image sensor 1 includes a pixel array 200 and the column switching circuit 100 of the above embodiment.

[0119] The pixel array 200 includes N columns of pixel units, N>1, and the column switching circuit 100 is connected to the pixel array 200. For example, the N switch units of the column switching circuit 100 are correspondingly connected to the N columns of pixel units to input corresponding column pixel signals.

[0120] According to the image sensor 1 of the embodiment of the present invention, by adopting the column exchange circuit 100 of the above embodiment, the column fixed pattern noise of the pixel signals of each column can be averaged into each time period of the exchange cycle, so as to more fully disperse the differences of the pixel signals of different columns and reduce the visibility of the column FPN.

[0121] In an embodiment, Figure 6 As shown, the image sensor 1 further includes a column analog-to-digital conversion circuit 300 , which is connected to the column switching circuit 100 and is used to convert pixel signals into digital signals.

[0122] In an embodiment, Figure 7 As shown, the image sensor 1 further includes a linear shift register 400 and a controller 500. The linear shift register 400 is connected to the output ends of the column exchange circuit 100 and the column analog-to-digital conversion circuit 300, respectively, for generating a pseudo-random code; the controller 500 is connected to the linear shift register 400, for controlling the on and off of switches in the switch unit in the column exchange circuit 100 according to the pseudo-random code, and restoring the pixel signal output by the column analog-to-digital conversion circuit 300 to the initial order according to the pseudo-random code. Different from the prior art, each readout process must first couple the sampling and holding circuit to the corresponding output stage before reading out, and the data after the column dynamic exchange is restored to the original pixel column in advance, so that the readout process is continuous and uninterrupted.

[0123] Figure 8 FIG. 1 is a schematic diagram of an image sensor using a three-dimensional stacking structure according to an embodiment of the present invention. Figure 8As shown, the pixel signals in the pixel array are input vertically downward to the logic circuit part through the column bus, and then pass through the pixel tail current source, column switching circuit 100 and column analog-to-digital conversion circuit 300 of the logic circuit in sequence, and finally the initial order of the pixel column is restored and output through the control of the controller 500.

[0124] Fig. 9 FIG. 1 is a schematic diagram of a transmission process of a pixel column unit of an image sensor according to an embodiment of the present invention. Fig. 9 As shown, the column pixel signals of the pixel array are transmitted to the column exchange circuit 100, and the column exchange circuit 100 outputs the column pixel signals to the column analog-to-digital conversion circuit 300 through column exchange, and converts them into digital signals for output. Among them, a pseudo-random code is generated by the linear shift register 400 and sent to the column exchange circuit 100 and the column analog-to-digital conversion circuit 300, so that the randomness of the column exchange can be achieved, and the data after the column dynamic exchange is restored to the original pixel column before output, so that the pixel signal readout process is continuous and uninterrupted.

[0125] Based on the image sensor of the above embodiment, a third aspect of the present invention provides an electronic device.

[0126] Fig.10 is a block diagram of an electronic device according to an embodiment of the present invention, such as Fig.10 As described above, the electronic device 1000 includes the image sensor 1 of the above embodiment. The structure of the image sensor 1 can refer to the description of the above embodiment and will not be described in detail here.

[0127] In an embodiment, the electronic device 1000 may include a mobile phone, a tablet, an image acquisition device, etc.

[0128] According to the electronic device 1000 of the embodiment of the present invention, by adopting the image sensor 1 of the above embodiment, the difference of pixel signals between column pixel units can be dispersed, the visibility of CFPN between different column pixel units can be greatly reduced, and the image acquisition performance of the device can be improved.

[0129] Based on the image sensor of the above embodiment, a fourth aspect of the present invention provides a vehicle.

[0130] Fig.11 is a block diagram of a vehicle according to an embodiment of the present invention, such as Fig.11 As shown, the vehicle 2000 includes the image sensor 1 of the above embodiment, and the image sensor 1 can be an environment acquisition camera, a reversing image camera, a driving assistance camera, etc.

[0131] The vehicle 2000 of the embodiment of the present invention, by adopting the image sensor 1 of the above embodiment, can disperse the differences in pixel signals between column pixel units, greatly reduce the visibility of CFPN between different column pixel units, provide a data basis for the vehicle's image-based control strategy, and improve the safety of vehicle driving.

[0132] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example.

[0133] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. A column switching circuit, characterized in that: Used for an image sensor, the image sensor includes N columns of pixel units, N>1, and the column switching circuit includes: N switch units 20, wherein the first ends of the N switch units are suitable for being connected to the N columns of pixel units in a one-to-one correspondence, and each of the switch units comprises an input switch 21 and an output switch 22, and the first end of the input switch 21 is suitable for being connected to the corresponding column of pixel units; A plurality of connection lines 10, each of which is connected to a second end of an input switch 21 in at least one of the switch units 20, and each of which is connected to a first end of an output switch 22 in a plurality of the switch units 20, wherein the second end of the output switch is suitable for outputting an image signal; The input switch and the output switch connected to the same connection line are selectively controlled so that only one input-output path is turned on at the same time to transmit the image signal of the column of pixel units connected to the input switch.

2. The column switching circuit according to claim 1, characterized in that: The N switch units are located in a plurality of switch groups; In the same switch group, the input switch is connected to the output switch through the connection line.

3. The column switching circuit according to claim 2, characterized in that: Each of the switch units includes at least one input switch and at least one output switch; The at least one input switch is respectively connected to different connecting lines; The at least one output switch is respectively connected to different connecting lines.

4. The column switching circuit according to claim 3, characterized in that: Each of the switch units includes a plurality of input switches and a plurality of output switches, and the plurality of input switches and the plurality of output switches are arranged in an array; Wherein, each column of switches in the array includes one input switch and one output switch.

5. The column switching circuit according to claim 4, characterized in that: In the switch group, the input switches of the corresponding columns of all the switch units are controlled synchronously, and the output switches of the corresponding columns of all the switch units are controlled synchronously.

6. The column switching circuit according to claim 5, characterized in that: In the switch unit, only one of the plurality of input switches is turned on at any time, and only one of the plurality of output switches is turned on at any time.

7. The column switching circuit according to any one of claims 1 to 6, characterized in that: The number of the switch units is the same as the number of the connecting lines.

8. The column switching circuit according to claim 7, characterized in that: The second end of the input switch in the switch unit corresponding to the odd-numbered column pixel unit and the first end of the output switch in the switch unit corresponding to the even-numbered column pixel unit are connected to the same connection line; The second end of the input switch in the switch unit corresponding to the even-numbered column pixel unit and the first end of the output switch in the switch unit corresponding to the odd-numbered column pixel unit are connected to the same connection line.

9. The column switching circuit according to claim 8, characterized in that: The image signal inputted by the input switch in the switch unit correspondingly connected to the odd-numbered columns of pixel units can be selectively outputted through the output switch in the different switch unit correspondingly connected to the even-numbered columns of pixel units.

10. The column switching circuit according to claim 2, characterized in that: Each of the switch units includes a first input switch, a second input switch, a first output switch, and a second output switch; In the switch group, all the first input switches are controlled synchronously, all the second input switches are controlled synchronously, and the first input switches and the second input switches are not turned on at the same time; In the switch group, all the first output switches are controlled synchronously, all the second output switches are controlled synchronously, and the first output switches and the second output switches are not turned on at the same time.

11. The column switching circuit according to claim 10, characterized in that: Each of the switch groups includes four switch units; In each of the switch units, the first input switch, the second input switch, the first output switch, and the second output switch are respectively connected to the four connection lines.

12. The column switching circuit according to claim 11, characterized in that: The four switch units include a first switch unit and a second switch unit; The four connecting lines include a first connecting line, a second connecting line, a third connecting line and a fourth connecting line; In the first switch unit, the second end of the first input switch is connected to the first connection line, the second end of the second input switch is connected to the third connection line, the first end of the first output switch is connected to the second connection line, and the first end of the second output switch is connected to the fourth connection line; In the second switch unit, the second end of the first input switch is connected to the fourth connection line, the second end of the second input switch is connected to the second connection line, the first end of the first output switch is connected to the third connection line, and the first end of the second output switch is connected to the first connection line.

13. The column switching circuit according to claim 12, characterized in that: The four switch units further include a third switch unit and a fourth switch unit; In the third switch unit, the second end of the first input switch is connected to the third connection line, the second end of the second input switch is connected to the first connection line, the first end of the first output switch is connected to the fourth connection line, and the first end of the second output switch is connected to the second connection line; In the fourth switch unit, the second end of the first input switch is connected to the second connection line, the second end of the second input switch is connected to the fourth connection line, the first end of the first output switch is connected to the third connection line, and the first end of the second output switch is connected to the first connection line.

14. The column switching circuit according to claim 2, characterized in that: Each of the switch units includes a first input switch, a second input switch, a third input switch, a fourth input switch, a first output switch, a second output switch, a third output switch and a fourth output switch; In the switch group, all the first input switches are synchronously controlled, all the second input switches are synchronously controlled, all the third input switches are synchronously controlled, and all the fourth input switches are synchronously controlled. At any time, only one of the first input switch, the second input switch, the third input switch, and the fourth input switch is turned on; In the switch group, all the first output switches are controlled synchronously, all the second output switches are controlled synchronously, all the third output switches are controlled synchronously, and all the fourth output switches are controlled synchronously. At any time, only one of the first output switch, the second output switch, the third output switch and the fourth output switch is turned on.

15. The column switching circuit according to claim 14, characterized in that: Each of the switch groups includes four switch units; In each of the switch units, the first input switch, the second input switch, the third input switch and the fourth input switch are respectively connected to four connection lines; in each of the switch units, the first output switch, the second output switch, the third output switch and the fourth output switch are respectively connected to four connection lines.

16. The column switching circuit according to claim 15, characterized in that: In each of the switch units, the input switches and the output switches in the same column are connected to the same connection line.

17. The column switching circuit according to claim 16, characterized in that: The four switch units include a first switch unit and a second switch unit; The four connecting lines include a first connecting line, a second connecting line, a third connecting line and a fourth connecting line; In the first switch unit, the second end of the first input switch and the first end of the first output switch are both connected to the first connection line, the second end of the second input switch and the first end of the second output switch are both connected to the second connection line, the second end of the third input switch and the first end of the third output switch are both connected to the third connection line, and the second end of the fourth input switch and the first end of the fourth output switch are both connected to the fourth connection line; In the second switch unit, the second end of the first input switch and the first end of the first output switch are both connected to the fourth connection line, the second end of the second input switch and the first end of the second output switch are both connected to the first connection line, the second end of the third input switch and the first end of the third output switch are both connected to the second connection line, and the second end of the fourth input switch and the first end of the fourth output switch are both connected to the third connection line.

18. The column switching circuit according to claim 17, characterized in that: The four switch units further include a third switch unit and a fourth switch unit; In the third switch unit, the second end of the first input switch and the first end of the first output switch are both connected to the third connection line, the second end of the second input switch and the first end of the second output switch are both connected to the fourth connection line, the second end of the third input switch and the first end of the third output switch are both connected to the first connection line, and the second end of the fourth input switch and the first end of the fourth output switch are both connected to the second connection line; In the fourth switch unit, the second end of the first input switch and the first end of the first output switch are both connected to the second connection line, the second end of the second input switch and the first end of the second output switch are both connected to the third connection line, the second end of the third input switch and the first end of the third output switch are both connected to the fourth connection line, and the second end of the fourth input switch and the first end of the fourth output switch are both connected to the first connection line.

19. The column switching circuit according to claim 15, characterized in that: The four switch units include a first switch unit and a second switch unit; The four connecting lines include a first connecting line, a second connecting line, a third connecting line and a fourth connecting line; In the first switch unit, the second end of the first input switch and the first end of the first output switch are both connected to the first connection line, the second end of the second input switch and the first end of the second output switch are both connected to the fourth connection line, the second end of the third input switch and the first end of the third output switch are both connected to the third connection line, and the second end of the fourth input switch and the first end of the fourth output switch are both connected to the second connection line; In the second switch unit, the second end of the first input switch is connected to the second connection line, the first end of the first output switch is connected to the fourth connection line, the second end of the second input switch and the first end of the second output switch are both connected to the first connection line, the second end of the third input switch is connected to the fourth connection line, the first end of the third output switch is connected to the second connection line, and the second end of the fourth input switch and the first end of the fourth output switch are both connected to the third connection line.

20. The column switching circuit according to claim 19, characterized in that: The four switch units further include a third switch unit and a fourth switch unit; In the third switch unit, the second end of the first input switch and the first end of the first output switch are both connected to the third connection line, the second end of the second input switch and the first end of the second output switch are both connected to the second connection line, the second end of the third input switch and the first end of the third output switch are both connected to the first connection line, and the second end of the fourth input switch and the first end of the fourth output switch are both connected to the fourth connection line; In the fourth switch unit, the second end of the first input switch is connected to the fourth connection line, the first end of the first output switch is connected to the second connection line, the second end of the second input switch and the first end of the second output switch are both connected to the third connection line, the second end of the third input switch is connected to the second connection line, the first end of the third output switch is connected to the fourth connection line, and the second end of the fourth input switch and the first end of the fourth output switch are both connected to the first connection line.

21. An image sensor, characterized in that: include: A pixel array, the pixel array comprising N columns of pixel units, N>1; The column switching circuit according to any one of claims 1 to 20, wherein the column switching circuit is connected to the pixel array.

22. The image sensor according to claim 21, characterized in that The image sensor further comprises: A column analog-to-digital converter is connected to the column switching circuit and is used to convert the pixel signal output by the column switching circuit into a digital signal.

23. The image sensor according to claim 22, characterized in that The image sensor further comprises: A linear shift register, connected to the output ends of the column exchange circuit and the column analog-to-digital converter, respectively, for generating a pseudo-random code; A controller is connected to the linear shift register and is used to control the on and off of switches in the switch unit in the column exchange circuit according to the pseudo-random code, and to restore the initial sequence of pixel signals output by the column analog-to-digital converter according to the pseudo-random code.

24. An electronic device, characterized in that: An image sensor comprising any one of claims 21-23.

25. A vehicle, characterized in that: An image sensor comprising any one of claims 21-23.

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