Optical signal processing circuit and image sensor

Abstract

The invention discloses an optical signal processing circuit and an image sensor, and relates to the field of electronic information, a first compensation switch is correspondingly connected with a compensation pixel, a second compensation switch is correspondingly connected with a photosensitive pixel, and a controller controls the first compensation switch and the second compensation switch to perform time division multiplexing. The first compensation switch and the second compensation switch are turned on at different times, so that the reading module can respectively read a first voltage signal corresponding to the compensation pixel and a second voltage signal corresponding to the photosensitive pixel, and the current illumination information is obtained by utilizing the difference value of the voltage signals read twice. The resistance value of the compensation pixel is consistent with that of the photosensitive pixel when the photosensitive pixel is not irradiated by light, and meanwhile, the first end of the compensation pixel and the first end of the photosensitive pixel are connected to the same potential, so that the photosensitive pixel and the compensation pixel are realized by adopting the same circuit architecture, and the compensation error caused by inconsistent circuit structures is avoided; the characteristic consistency of the photosensitive pixel and the compensation pixel is increased, and the compensation effect of the compensation pixel is improved.

Description

Technical Field

[0001] The present invention relates to the field of electronic information, and in particular to a light signal processing circuit and an image sensor. Background Art

[0002] As an important device for obtaining visual information, image sensors can convert perceived light signals into electrical signals for output, and can be used in photography, videography, imaging and other fields. With the continuous development and widespread application of image sensors, users' requirements for their performance are also increasing. For resistance modulation photosensitive devices, it is necessary to measure the resistance change caused by light on the device resistance to obtain light information. Therefore, it is necessary to obtain the device resistance without the influence of light and the device resistance after light exposure. Among them, how to obtain the device resistance without the influence of light has become a technical problem that needs to be solved urgently. Summary of the invention

[0003] The purpose of the present invention is to provide a light signal processing circuit and an image sensor, in which the first end of the compensation pixel and the first end of the photosensitive pixel are connected to the same potential, so that the photosensitive pixel and the compensation pixel are implemented using the same circuit architecture, avoiding compensation errors caused by inconsistent circuit structures, increasing the consistency of the characteristics of the photosensitive pixel and the compensation pixel, and improving the compensation effect of the compensation pixel.

[0004] In order to solve the above technical problems, the present invention provides an optical signal processing circuit, comprising:

[0005] A compensation pixel, wherein the first end is connected to the same potential as the first end of the photosensitive pixel, and the resistance of the compensation pixel is fixed and equal to the resistance of the photosensitive pixel when not irradiated with light;

[0006] a first compensation switch, a first end of which is connected to the second end of the compensation pixel;

[0007] a second compensation switch, a first end of which is connected to the second end of the photosensitive pixel;

[0008] a controller, wherein a first output terminal is connected to a control terminal of the first compensation switch, and a second output terminal is connected to a control terminal of the second compensation switch, and is used to control the conduction of the first compensation switch and the conduction of the second compensation switch in non-overlapping time periods;

[0009] A readout module, whose input end is respectively connected to the second end of the first compensation switch and the second end of the second compensation switch, and is used to convert the compensation current flowing through the compensation pixel into a first voltage signal when the first compensation switch is turned on, and to convert the photocurrent flowing through the photosensitive pixel into a second voltage signal when the second compensation switch is turned on.

[0010] Optionally, the image sensor includes a pixel array composed of a plurality of photosensitive pixels, i photosensitive pixels in the pixel array share one compensation pixel; i is a positive integer;

[0011] The controller is also used to control the conduction of the first compensation switch connected to the shared compensation pixel and the conduction of the second compensation switches connected to i compensation pixels respectively in non-overlapping time periods.

[0012] Optionally, the i photosensitive pixels are symmetrically arranged around the shared compensation pixel with the shared compensation pixel as the center.

[0013] Optionally, the readout module includes:

[0014] A logarithmic conversion module, whose input end is connected to a photosensitive pixel, and is used to perform logarithmic conversion on a photocurrent flowing through the photosensitive pixel to generate a voltage signal having a logarithmic relationship with the photocurrent;

[0015] An output buffer module, whose input end is connected to the output end of the logarithmic conversion module, is used for buffering the voltage signal and then outputting it.

[0016] Optionally, the output buffer module includes:

[0017] A source follower, whose control end is connected to the output end of the logarithmic conversion module, and is used to amplify and output the voltage signal output by the logarithmic conversion module;

[0018] The first current bias module has an output end connected to one end of the source follower and serves as the output end of the output buffer module, and is used to provide a bias current for the source follower.

[0019] Optionally, the image sensor includes a pixel array composed of a plurality of photosensitive pixels; the output buffer module further includes:

[0020] A selection switch, the control end of which is connected to an output selection signal, the first end of which is connected to one end of the source follower, and the second end of which is connected to the output end of the first current bias module, is used to turn on when the photosensitive pixel is selected for output, and to turn off when the photosensitive pixel is not selected for output.

[0021] Optionally, the first end of the photosensitive pixel is connected to a first power supply, and the second end is connected to an input end of the logarithmic conversion module, and the logarithmic conversion module includes:

[0022] A-level first amplification unit;

[0023] For any first amplifying unit, the first amplifying unit includes a first conversion switch tube and a first amplifying switch tube, the control end of the first amplifying switch tube is connected to the first end of the first conversion switch tube and serves as the first input end of the first amplifying unit, the first end of the first amplifying switch tube serves as the second input end of the first amplifying unit, the second end of the first conversion switch tube serves as the first output end of the first amplifying unit, and the control end of the first conversion switch tube is connected to the second end of the first amplifying switch tube and serves as the second output end of the first amplifying unit;

[0024] The first input end of the first amplifier unit of the first stage is connected to the second end of the photosensitive pixel, the second input end of the first amplifier unit of the first stage is connected to the second power supply, the first output end of the A-th first amplifier unit is grounded, the first output end of the i-th first amplifier unit is connected to the first input end of the i+1-th first amplifier unit, and the second output end of the i-th first amplifier unit is connected to the second input end of the i+1-th first amplifier unit; A is a positive integer, and i is a positive integer less than A;

[0025] The second current bias module has an output end connected to the second output end of the A-th level first amplification unit and serves as the output end of the logarithmic conversion module.

[0026] Optionally, the first end of the photosensitive pixel is grounded, and the second end is connected to the input end of the logarithmic conversion module, and the logarithmic conversion module includes:

[0027] Class B second amplifier unit;

[0028] For any second amplifying unit, the second amplifying unit includes a fifth conversion switch tube and a fourth amplifying switch tube, the control end of the fourth amplifying switch tube is connected to the first end of the fifth conversion switch tube and serves as the first input end of the second amplifying unit, the first end of the fourth amplifying switch tube serves as the second input end of the second amplifying unit, the second end of the fifth conversion switch tube serves as the first output end of the second amplifying unit, and the control end of the fifth conversion switch tube is connected to the second end of the fourth amplifying switch tube and serves as the second output end of the second amplifying unit;

[0029] The first input end of the second amplifying unit of the first stage is connected to the second end of the photosensitive pixel, the second input end of the second amplifying unit of the first stage is grounded, the first output end of the second amplifying unit of the Bth stage is connected to the second power supply, the first output end of the second amplifying unit of the jth stage is connected to the first input end of the second amplifying unit of the j+1th stage, and the second output end of the second amplifying unit of the jth stage is connected to the second input end of the second amplifying unit of the j+1th stage; B is a positive integer, and j is a positive integer less than B;

[0030] The fifth current bias module has an output end connected to the second output end of the second amplifying unit of the Bth stage and serves as the output end of the logarithmic conversion module.

[0031] To solve the above technical problems, the present invention also provides an image sensor, comprising a photosensitive pixel and a light signal processing circuit as described above, wherein the input end of the light signal processing circuit is connected to the photosensitive pixel for converting the light signal captured by the photosensitive pixel into an electrical signal.

[0032] The present invention provides a processing circuit for an optical signal, including a compensation pixel, a first compensation switch, a second compensation switch tube, a controller and a readout module, wherein the first compensation switch is connected to the compensation pixel correspondingly, and the second compensation switch is connected to the photosensitive pixel correspondingly, and the controller controls the first compensation switch and the second compensation switch to perform time-division multiplexing, and turns on the first compensation switch and the second compensation switch at different times, so that the readout module can respectively read out a first voltage signal corresponding to the compensation pixel and a second voltage signal corresponding to the photosensitive pixel, thereby using the difference between the two readout voltage signals to obtain the current illumination information. The compensation pixel is not only consistent in resistance with the photosensitive pixel when it is not irradiated with light, but also the first end and the first end of the photosensitive pixel are connected to the same potential, so that the photosensitive pixel and the compensation pixel are implemented using the same circuit architecture, avoiding compensation errors caused by inconsistent circuit structures, increasing the characteristic consistency of the photosensitive pixel and the compensation pixel, and improving the compensation effect of the compensation pixel.

[0033] The present invention also provides an image sensor having the same beneficial effects as the above-mentioned optical signal processing circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the prior art and the drawings required for use in the embodiments are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0035] Figure 1 A schematic diagram of the structure of an optical signal processing circuit provided by the present invention;

[0036] Figure 2 A schematic diagram of the structure of another optical signal processing circuit provided by the present invention;

[0037] Figure 3 A schematic diagram of an arrangement of a pixel array provided by the present invention;

[0038] Figure 4 A schematic diagram of another arrangement of a pixel array provided by the present invention;

[0039] Figure 5 A schematic diagram of the structure of a light signal processing circuit using a pixel array provided by the present invention;

[0040] Figure 6 A schematic diagram of a control signal waveform of a pixel array provided by the present invention;

[0041] Figure 7 A schematic diagram of a readout circuit for a light signal when a photosensitive pixel is connected to a high bias voltage provided by the present invention;

[0042] Figure 8 A schematic diagram of the structure of a readout circuit of a light signal when a photosensitive pixel is connected to a low bias voltage provided by the present invention;

[0043] Fig. 9 A schematic diagram of the structure of another optical signal readout circuit provided by the present invention;

[0044] Fig.10 A schematic diagram of a configuration method of an output buffer circuit provided by the present invention;

[0045] Fig.11 A schematic diagram of another configuration of an output buffer circuit provided by the present invention;

[0046] Fig.12 A schematic diagram of the structure of a logarithmic conversion module when the first photosensitive pixel provided by the present invention is connected to a high bias voltage;

[0047] Fig.13 A structural schematic diagram of a logarithmic conversion module when a second photosensitive pixel provided by the present invention is connected to a high bias voltage;

[0048] Fig.14 A schematic diagram of the structure of a logarithmic conversion module when a third photosensitive pixel provided by the present invention is connected to a high bias voltage;

[0049] Fig.15 A structural schematic diagram of a logarithmic conversion module when a fourth photosensitive pixel provided by the present invention is connected to a high bias voltage;

[0050] Fig.16 A schematic diagram of the structure of a logarithmic conversion module when the first photosensitive pixel provided by the present invention is connected to a low bias voltage;

[0051] Fig.17 A structural schematic diagram of a logarithmic conversion module when a second photosensitive pixel provided by the present invention is connected to a low bias voltage;

[0052] Fig.18 A schematic diagram of the structure of a logarithmic conversion module when a third photosensitive pixel provided by the present invention is connected to a low bias voltage;

[0053] Fig.19This is a structural schematic diagram of a logarithmic conversion module when a fourth photosensitive pixel provided by the present invention is connected to a low bias voltage. DETAILED DESCRIPTION

[0054] The core of the present invention is to provide a light signal processing circuit and an image sensor, in which the first end of the compensation pixel and the first end of the photosensitive pixel are connected to the same potential, so that the photosensitive pixel and the compensation pixel are implemented using the same circuit architecture, avoiding compensation errors caused by inconsistent circuit structures, increasing the consistency of the characteristics of the photosensitive pixel and the compensation pixel, and improving the compensation effect of the compensation pixel.

[0055] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0056] Please refer to Figure 1 , Figure 1 A schematic diagram of the structure of an optical signal processing circuit provided by the present invention; please refer to Figure 2 , Figure 2 A schematic diagram of the structure of another optical signal processing circuit provided by the present invention; To solve the above technical problems, the present invention provides an optical signal processing circuit, comprising:

[0057] The first end of the compensation pixel 11 is connected to the same potential as the first end of the photosensitive pixel, and the resistance of the compensation pixel 11 is fixed and equal to the resistance of the photosensitive pixel when not irradiated with light;

[0058] A first compensation switch SW, a first end of which is connected to the second end of the compensation pixel 11;

[0059] A second compensation switch SL, a first end of which is connected to the second end of the photosensitive pixel;

[0060] A controller 12, a first output terminal connected to a control terminal of a first compensation switch SW, a second output terminal connected to a control terminal of a second compensation switch SL, for controlling the conduction of the first compensation switch SW and the conduction of the second compensation switch SL in non-overlapping time periods, respectively;

[0061] The readout module 13 has an input end connected to the second end of the first compensation switch SW and the second end of the second compensation switch SL, respectively, and is used to convert the compensation current flowing through the compensation pixel 11 into a first voltage signal when the first compensation switch SW is turned on, and to convert the photocurrent flowing through the photosensitive pixel into a second voltage signal when the second compensation switch SL is turned on.

[0062] It is understandable that when the readout module 13 reads the electrical signal corresponding to the light signal captured by the photosensitive pixel, it is also necessary to obtain the electrical signal corresponding to the photosensitive pixel when there is no light irradiation. Therefore, the present invention sets a compensation pixel 11 in the light signal processing circuit. The compensation pixel 11 is a non-photosensitive / weakly photosensitive pixel unit that can characterize the resistance and other characteristics of the photosensitive pixel when it is not irradiated with light. Therefore, when the readout module 13 needs to determine the illumination condition corresponding to the second voltage signal of the photosensitive pixel currently read out, the first voltage signal of the compensation pixel 11 can be read out separately to determine the resistance and other characteristics of the photosensitive pixel when there is no light, thereby determining the light signal such as the light intensity captured by the current photosensitive pixel by comparing the two voltage signals.

[0063] It is not difficult to understand that, since the compensation pixel 11 itself serves as the reference of the photosensitive pixel, the circuit architecture and other implementation methods of the compensation pixel 11 when applied are preferably consistent with the photosensitive pixel. Therefore, the first end of the compensation pixel 11 and the first end of the photosensitive pixel need to be connected to the same potential, such as both connected to the power supply, or both grounded, and the second end is connected to the input end of the readout module 13, so that the compensation pixel 11 and the photosensitive pixel maintain the uniformity of the circuit structure to avoid the pixel characteristic difference caused by the circuit structure difference and ensure the compensation effect; at the same time, considering that in the sensor production process, the characteristics of the pixel are non-uniform, the farther the pixels are arranged, the greater the difference in characteristics such as resistance. Therefore, when designing the photosensitive pixel and the compensation pixel 11, the compensation pixel 11 will be set near the photosensitive pixel, and as close as possible to avoid the influence of the pixel characteristic difference caused by the position difference on the compensation effect. The compensation pixel 11 and the photosensitive pixel are connected to the analog readout module 13 at the back end via their corresponding compensation switches, and the analog readout module 13 can have a logarithmic conversion function. The first compensation switch SW and the second compensation switch SL are turned on at different times, respectively, so that the back-end circuit reads out the compensation pixel 11 and the photosensitive pixel respectively, and uses the difference between the two readout signals as the optical signal.

[0064] It should be noted that, in order to ensure the compensation effect, the compensation pixel 11 and the photosensitive pixel are designed to be consistent in all aspects as much as possible, so the signal readout of the two needs to be completely independent. The present invention independently realizes the signal readout of the compensation pixel 11 and the photosensitive pixel by setting the first compensation switch SW and the second compensation switch SL. When the first compensation switch SW is turned on, the readout module 13 reads the signal of the compensation pixel 11, and when the second compensation switch SL is turned on, the readout module 13 reads the signal of the photosensitive pixel. Therefore, the on-time of the first compensation switch SW and the on-time of the second compensation switch SL must be two completely non-overlapping time periods. If the first compensation switch SW starts to be turned on at the first moment, stops being turned on at the second moment, and switches to the off state; the second compensation switch SL starts to be turned on at the third moment, stops being turned on at the fourth moment, and switches to the off state; then any moment between the first moment and the second moment (including the first moment and the second moment) and any moment between the third moment and the fourth moment (including the third moment and the fourth moment) do not overlap. The reading of the compensation pixel 11 may be performed before the reading of the corresponding photosensitive pixel, or may be performed after the reading of the corresponding photosensitive pixel, and the present application does not make any special limitation thereto.

[0065] It is understandable that the present invention uses non-photosensitive / weakly photosensitive compensation pixels 11 near photosensitive pixels, and controls the readout module 13 to read out signals respectively in a time-division multiplexing manner, thereby improving the matching degree between the photosensitive pixels and the compensation pixels 11. The present application does not specifically limit the specific type and implementation of the compensation pixel 11. Taking a photosensitive pixel using a two-dimensional sheet material (graphene or molybdenum disulfide) as an example, this type of photosensitive pixel includes two nodes, an electrode end and a signal readout end, and its photosensitive part is composed of a two-dimensional material graphene distributed between the two nodes and quantum dots connected to the graphene. The material of the quantum dots can be cadmium sulfide, cadmium selenide, cadmium telluride, zinc selenide, lead sulfide, lead selenide, indium phosphide, etc. By using quantum dots as photosensitive materials, the wavelength of the absorbed light can be optimized. For example, using PbS can absorb and measure light in the short-wave infrared band, and using non-photosensitive pixels or weakly photosensitive pixels of the same material as the two-dimensional sheet material in the aforementioned photosensitive pixels as compensation pixels 11. This can be achieved by removing the quantum dots on the two-dimensional material from the photosensitive pixel, or by placing a light-blocking layer (for example, using wiring metal as a light-blocking layer) above the photosensitive pixel. For example, photosensitive quantum dots can be manufactured on the two-dimensional material to realize the photosensitive pixel, and the corresponding quantum dots are not manufactured on the same two-dimensional material to realize the compensation pixel 11.

[0066] It should be noted that the present application does not make any special restrictions on the specific types and implementation methods of the first compensation switch SW, the second compensation switch SL, the controller 12 and the readout module 13. The first compensation switch SW and the second compensation switch SL can be implemented by various types of controllable switches, such as MOS tubes (Metal-Oxide-Semiconductor Field-Effect Transistor), and the controller 12 can be implemented by various types of control chips and processors.

[0067] It is not difficult to understand that for resistance modulation type photosensitive devices, especially new materials represented by two-dimensional sheet materials (graphene or molybdenum disulfide) + quantum dots as sensors of photosensitive devices, pixels are sensitive to light through changes in resistance values, and the changes in device resistance caused by light are measured to obtain light information. Therefore, it is necessary to know the change in resistance when there is light and when there is no light, that is, it is necessary to obtain the device resistance without the influence of light and the resistance of the device after being illuminated, and the more accurate the measurement of the change, the better. The present invention uses photosensitive pixels and compensation pixels 11 with the same circuit architecture to avoid compensation errors caused by inconsistent device structures, so that the compensation effect is better. At the same time, the positions of compensation pixels 11 and photosensitive pixels are also placed in nearby positions during design, further increasing the consistency of the characteristics of photosensitive pixels and compensation pixels 11, so that the compensation effect is better. The consistency of various performances of the device is guaranteed from the two aspects of layout distance and circuit architecture. At the same time, on the basis of setting up non-photosensitive / weakly photosensitive devices near the photosensitive device, it is also possible to adopt a method of using multiple photosensitive pixels to share compensation pixels, thereby reducing the area occupied by the non-photosensitive / weakly photosensitive devices while obtaining resistance changes.

[0068] The present invention provides a processing circuit for an optical signal, including a compensation pixel 11, a first compensation switch SW, a second compensation switch SL, a controller 12 and a readout module 13. The first compensation switch SW is connected to the compensation pixel 11, and the second compensation switch SL is connected to the photosensitive pixel. The controller 12 controls the first compensation switch SW and the second compensation switch SL to perform time-division multiplexing, and turns on the first compensation switch SW and the second compensation switch SL at different times, so that the readout module 13 can read out the first voltage signal corresponding to the compensation pixel 11 and the second voltage signal corresponding to the photosensitive pixel, respectively, thereby using the difference between the two read voltage signals to obtain the current illumination information. The compensation pixel 11 is not only consistent with the resistance value of the photosensitive pixel when it is not irradiated with light, but also the first end and the first end of the photosensitive pixel are connected to the same potential, so that the photosensitive pixel and the compensation pixel 11 are implemented using the same circuit architecture, avoiding compensation errors caused by inconsistent circuit structures, increasing the characteristic consistency of the photosensitive pixel and the compensation pixel 11, and improving the compensation effect of the compensation pixel 11.

[0069] Based on the above embodiments:

[0070] Please refer to Figure 3 , Figure 3 A schematic diagram of the arrangement of a pixel array provided by the present invention; please refer to Figure 4 , Figure 4 A schematic diagram of another arrangement of a pixel array provided by the present invention; as an optional embodiment, the image sensor includes a pixel array composed of a plurality of photosensitive pixels, i photosensitive pixels in the pixel array share a compensation pixel 11; i is a positive integer;

[0071] The controller 12 is further used to control the conduction of the first compensation switch SW connected to the shared compensation pixel 11 and the conduction of the second compensation switches SL connected to i compensation pixels 11 in non-overlapping time periods.

[0072] It is not difficult to understand that in order to reduce the volume of the entire image sensor, when multiple photosensitive pixels are used in the image sensor, the same compensation pixel 11 can be used by multiple photosensitive pixels. In general, the image sensor uses a pixel array to realize photosensitivity, so it can be pre-set that i photosensitive pixels share one compensation pixel 11. At this time, in order to share the same compensation pixel 11, the signal reading of each photosensitive pixel also needs to be performed separately to avoid the situation where the compensation switches corresponding to the compensation pixel 11 and the photosensitive pixel are turned on at the same time or the compensation switches corresponding to the two photosensitive pixels are turned on at the same time, and the potentials connected to the first ends of the two are consistent, resulting in the voltage signal cannot be output normally. That is, when i photosensitive pixels share one compensation pixel 11, for this group of pixels, the controller 12 needs to set at least i+1 non-overlapping time periods to realize the signal output of the group of pixels. A preferred embodiment is that each time the photosensitive pixel is read out, the compensation pixel 11 is read out again. At this time, the controller 12 needs to set 2xi non-overlapping time periods to realize the signal output of the group of pixels.

[0073] Specifically, by sharing the compensation pixels 11, the number of compensation pixels 11 required to be provided in the image sensor can be effectively reduced, thereby reducing the light information loss generated when capturing light signals, and reducing the cost and volume of the entire processing circuit and the image sensor.

[0074] As an optional embodiment, i photosensitive pixels are symmetrically arranged around the shared compensation pixel 11 with the shared compensation pixel 11 as the center.

[0075] It is understandable that when designing a pixel array, it is necessary to consider the arrangement distance between the compensation pixel 11 and the corresponding photosensitive pixel, and arrange the compensation pixel 11 adjacent to the corresponding photosensitive pixel. Therefore, when i photosensitive pixels share one compensation pixel 11, the corresponding photosensitive pixels can be symmetrically arranged around the compensation pixel 11. The present application does not make any special restrictions on the specific symmetrical arrangement method, and an asymmetrical arrangement is also possible, as long as the arrangement distance between each photosensitive pixel and the corresponding compensation pixel 11 is kept at a small value. This can be achieved by array arrangement and other methods to achieve a regular pixel array, and can also be achieved by other arrangement methods. A preferred embodiment is that i photosensitive pixels are centrally symmetrical with the compensation pixel 11 as the center.

[0076] As a specific embodiment, taking the array arrangement as an example, it is possible to adopt a method in which 8 photosensitive pixels in every 3x3=9 pixels share one compensation pixel 11, and the 8 photosensitive pixels and the compensation pixel 11 are arranged as follows: Figure 3 The 3x3 nine-square grid is arranged in an array. It is also possible to use a method in which three photosensitive pixels share one compensation pixel 11, and the three photosensitive pixels and the compensation pixel 11 are arranged as follows: Figure 4 The 2x2 quadrilateral shape shown is arranged in an array. Due to pixel multiplexing, the time-sharing multiplexing between the corresponding photosensitive pixels and the compensation pixels 11 needs to be considered when reading out data.

[0077] Please refer to Figure 5 , Figure 5 This is a schematic diagram of a circuit for processing optical signals using a pixel array provided by the present invention; please refer to Figure 6 , Figure 6 A schematic diagram of a control signal waveform of a pixel array provided by the present invention; taking three photosensitive pixels sharing one compensation pixel 11 as an example, Figure 5As shown, the first compensation switch includes SWA corresponding to the photosensitive pixel A, SWB corresponding to the photosensitive pixel B, and SWC corresponding to the photosensitive pixel C, and the second compensation switch includes SLA corresponding to the photosensitive pixel A, SLB corresponding to the photosensitive pixel B, and SLC corresponding to the photosensitive pixel C. The compensation switches in the array can be controlled in a 2x2 repetitive cycle. Since four pixels in a group of 2x2 pixels need to be time-division multiplexed, a group of pixels includes photosensitive pixel A, photosensitive pixel B, photosensitive pixel C, and compensation pixel, the selection switch SEL is a row selection switch, that is, the controller 12 selects the row through the row selection signal Row. Sel controls the corresponding enable switch SEL. Each time, the enable switch SEL corresponding to a row of photosensitive pixels is turned on in units of rows to realize the simultaneous reading of a row of data. When a row parallel readout circuit is used to read and convert the light signal after Log transformation into analog-to-digital, a set of horizontal control signal groups is required for every 2 rows. The horizontal control signal group includes three independent row selection signals RowSelA, RowSelB, and RowSelC for photosensitive pixel A, photosensitive pixel B, and photosensitive pixel C, a compensation pixel selection signal SWComp, and a photosensitive pixel selection signal SWLight. And every two columns share a set of analog-to-digital conversion circuits. The signal waveform of a driving method of the horizontal control signal is as follows: Figure 6 As shown, for a group of pixels in these two rows, it is necessary to read out the photosensitive pixel A, the photosensitive pixel B, and the photosensitive pixel C three times respectively. When RowSelA is at a high level, the controller 12 first reads out the compensation pixel corresponding to the photosensitive pixel A by setting SWComp1A high. After the readout is completed, the gate switches of all photosensitive pixels A in the first row of the pixel array are controlled to be turned on, and the readout module 13 reads out all the photosensitive pixels A in the first row. When RowSelB is at a high level, the controller 12 first reads out the compensation pixel corresponding to the photosensitive pixel B by setting SWComp1B high. After the readout is completed, the gate switches of all photosensitive pixels B in the first row of the pixel array are controlled to be turned on, and the readout module 13 reads out all the photosensitive pixels B in the first row. When RowSelC is at a high level, the controller 12 first reads out the compensation pixel corresponding to the photosensitive pixel C by setting SWComp1C high. After the readout is completed, the gate switches of all photosensitive pixels C in the second row of the pixel array are controlled to be turned on, and the readout module 13 reads out all photosensitive pixels C in the second row. This process is repeated to realize the readout of all pixels in the 2Nx2M (row x column) pixel array.

[0078] Specifically, when there is shared compensation pixels, it is necessary to take the layout of the compensation pixels into consideration when designing the pixel array, and to design the pixel array by comprehensively considering the layout distance between the compensation pixels and the corresponding photosensitive pixels. At the same time, when designing the control logic of the pixel array, it is also necessary to consider the time-sharing multiplexing between each pixel in the same group of pixels, and then combine row selection or column selection to realize the readout of all pixels in the entire pixel array, thereby improving the pixel readout efficiency.

[0079] As an optional embodiment, the readout module includes:

[0080] A logarithmic conversion module 1, whose input end is connected to a photosensitive pixel, is used to perform logarithmic conversion on a photocurrent flowing through the photosensitive pixel to generate a voltage signal having a logarithmic relationship with the photocurrent;

[0081] The output buffer module 2 has an input end connected to the output end of the logarithmic conversion module 1 and is used to buffer the voltage signal before outputting it.

[0082] It is not difficult to understand that in order to achieve more accurate and reliable reading of the light signal, the present invention sets a logarithmic conversion module 1 in the light signal reading module, and the logarithmic conversion module 1 generates a corresponding voltage signal after logarithmic conversion of the photocurrent flowing through the photosensitive pixel, and realizes the reading of the light signal based on the voltage signal. The logarithmic conversion module 1 is connected in series with the photosensitive pixel. When the photosensitive pixel is exposed to light, its resistance value will change with the change of the light signal, and the resistance value is exponentially related to the radiation illumination of the light; when the power supply connected to the photosensitive pixel remains unchanged, the photocurrent flowing through the photosensitive pixel is inversely proportional to the resistance value of the photosensitive pixel, so the photocurrent flowing through the photosensitive pixel can also effectively represent the light signal received by the photosensitive pixel, and is exponentially related to the radiation illumination of the light. After the photocurrent flowing through the photosensitive pixel is input into the logarithmic conversion module 1, the logarithmic conversion module 1 performs logarithmic conversion on it to obtain a voltage signal that is linearly related to the radiation illumination of the light. Thus, the mechanism of exponential transformation in the photosensitive pixel is offset by logarithmic transformation, and linear compensation of light intensity is efficiently achieved.

[0083] It is understandable that, considering that the voltage signal obtained after the conversion by the logarithmic conversion module 1 may have abnormal jitter due to noise and interference signals, and considering that the voltage signal read by the readout module needs to be input into the analog-to-digital conversion circuit and the upper computer circuit for further processing to realize functions such as image generation, in the optical signal readout module, the present invention further sets an output buffer module 2, and the voltage signal output by the logarithmic conversion module 1 will pass through the output buffer module 2 to realize the final reading of the electrical signal. The output buffer module 2 can not only play the role of signal isolation, avoid mutual interference of signals between other circuit modules and the logarithmic conversion module 1, and prevent the voltage signal from being affected by noise, interference signals, etc. that may appear in the subsequent circuit, but also absorb abnormal reverse current and back electromotive force, protect the logarithmic conversion module 1, and ensure the safety and reliability of the entire readout module. At the same time, by setting the output buffer module 2, the signal quality of the voltage signal can be further improved. The output buffer module can shape the voltage signal, realize the level matching of the voltage signal, improve the driving ability of the voltage signal, etc., ensure the complete transmission of the voltage signal, and reduce the jitter of the signal; improve the stability and reliability of the entire readout module.

[0084] It should be noted that the specific type and implementation of the logarithmic conversion circuit and the output buffer module 2 are not specifically limited in this application. The circuit architecture composed of MOS tubes, triodes and other devices can be used for implementation. The specific type and implementation of the photosensitive pixel can also be set and adjusted according to the actual application situation. This application does not make any special restrictions here. Please refer to Figure 7 , Figure 7 This is a structural schematic diagram of a light signal readout module provided by the present invention in which a photosensitive pixel is connected to a high bias voltage; please refer to Figure 8 , Figure 8 A structural schematic diagram of a readout module for light signals when a photosensitive pixel is connected to a low bias voltage provided by the present invention; VDD is the power supply voltage, and Rpix represents the resistance of the photosensitive pixel; there are two possibilities in the application of the photosensitive pixel, one is that the photosensitive pixel needs to be connected to a high bias voltage for application implementation (Vdd is used to represent the high bias voltage in this embodiment), and the other is that the pixel needs to be connected to a low bias voltage for application implementation (GND is used to represent the low bias voltage in this embodiment).

[0085] It is not difficult to understand that the present invention can be applied to various types of image sensors and other devices using resistive modulation type photosensitive pixels. Fig. 9 , Fig. 9A schematic diagram of the structure of another optical signal readout module provided by the present invention; the node of the electrode end in the photosensitive pixel is connected to a bias voltage, and the node of the signal readout end is connected to a logarithmic conversion module 1, which converts the photocurrent into a voltage signal, and the magnitude of the voltage signal is logarithmically related to the magnitude of the photocurrent. Then, after the voltage is buffered and the signal is amplified by the source follower SF of the output buffer module 2, it is connected to the signal readout line shared by the pixel array through the selection switch SEL, thereby realizing the readout and conversion of the optical signal. The photocurrent of the photosensitive pixel is processed by the logarithmic conversion module 1 to generate a voltage signal with better linearity and dynamic range. By using the logarithmic conversion module 1, the compression of the exponential signal is realized, so that the relationship between the output voltage signal and the input light intensity signal is returned to a linear relationship. Thereby solving the problems of poor linearity of the readout signal and limited dynamic range.

[0086] Please refer to Fig.10 , Fig.10 A schematic diagram of the configuration of an output buffer circuit provided by the present invention; please refer to Fig.11 , Fig.11 A schematic diagram of another configuration of an output buffer circuit provided by the present invention; as an optional embodiment, the output buffer module 2 includes:

[0087] The source follower SF has a control end connected to the output end of the logarithmic conversion module 1 and is used to amplify the voltage signal output by the logarithmic conversion module 1 and then output it;

[0088] The first current bias module Q31 has an output end connected to one end of the source follower SF and serves as an output end of the output buffer module 2 to provide a bias current for the source follower SF.

[0089] It is not difficult to understand that the transformed voltage signal needs to be further buffered and amplified before being read out. The output buffer module 2 can be specifically implemented by a source follower SF. The voltage signal output by the logarithmic conversion module 1 acts on the gate of the source follower SF, causing the potential of the source of the source follower SF to change with the change of the voltage signal, thereby realizing the voltage following function. At the same time, the input impedance of the source follower SF itself is relatively high, and can effectively buffer the voltage signal. Considering that the source follower SF needs to work in a specific state, generally in the saturation region to achieve buffering and amplification of the input signal, a first current bias module Q31 needs to be set in the output buffer module 2 to provide the source follower SF with a bias current that supports it to work in the saturation region, ensuring that the source follower SF can effectively achieve buffering and amplification of the voltage signal. The specific type and implementation method of the source follower SF and the first current bias module Q31 are not particularly limited in this application.

[0090] As a specific embodiment, Fig.10 As shown, the source follower SF can be implemented by a PMOS tube with a drain grounded, and the first current bias module Q31 can be implemented by a PMOS tube with a source connected to a power supply and a gate connected to a preset fixed bias voltage Vbias_peri, and a fixed bias current is generated by using the fixed bias voltage to provide to the source follower SF; the specific value and implementation method of the bias voltage connected to the first current bias module Q31 are not particularly limited in this application. Fig.11 As shown, the source follower SF can be implemented by an NMOS tube whose drain is connected to the power supply, and the first current bias module Q31 can be implemented by an NMOS tube whose source is grounded and whose gate is connected to a preset fixed bias voltage Vbias_peri. The source of the source follower is connected to the analog-to-digital conversion circuit after passing through the selection switch SEL, so as to further convert the voltage signal of the read voltage output into a digital signal, which is convenient for subsequent processing by a processor and other equipment. Fig.10 The figure shows the implementation method when the conversion switch tube in the logarithmic conversion module, the current bias module in the logarithmic conversion module and the output buffer module use the same power supply and common ground. In actual applications, the power supply and grounding point implementation methods used by the conversion switch tube in the logarithmic conversion module, the current bias module in the logarithmic conversion module and the output buffer module can be different, that is, the VDD connected to the fifth conversion switch tube Q15, the VDD connected to the fifth current bias module Q35 and the VDD connected to the first current bias module Q31 can be implemented with different power supplies, and the grounding point of the photosensitive pixel, the grounding point of the fourth amplifying switch tube Q24 and the grounding point of the source follower SF can also be implemented in different ways.

[0091] Specifically, by adopting the source follower SF to implement the output buffer module 2, the converted voltage signal can be effectively buffered and amplified. At the same time, the first current bias module Q31 is set to ensure the accurate application of the source follower SF, thereby improving the accuracy and stability of the final output voltage signal and ensuring the accuracy and reliability of the entire read-out module.

[0092] As an optional embodiment, the image sensor includes a pixel array composed of a plurality of photosensitive pixels; the readout module further includes:

[0093] The selection switch SEL has a control end connected to an output selection signal, a first end connected to one end of the source follower SF, and a second end connected to the output end of the first current bias module Q31, and is used to be turned on when the photosensitive pixel is selected for output, and turned off when the photosensitive pixel is not selected for output.

[0094] It is understandable that a plurality of photosensitive pixels are generally arranged in an array in an image sensor, so that a detailed, comprehensive and complete image presentation can be achieved through a pixel array. At this time, the light signal readout module needs to realize the signal readout of all photosensitive pixels in the pixel array. Therefore, in order to facilitate management and realize the accurate readout of each photosensitive pixel, a plurality of gate switches SEL connected one by one to a plurality of photosensitive pixels in the pixel array will also be arranged in the readout module. The gate switch SEL is connected in series between the source of the source follower SF and the output end of the readout module, and can control the output of the voltage signal finally obtained by the readout module. When a certain gate switch SEL is turned on, the readout module outputs the voltage signal converted by the corresponding photosensitive pixel. When a certain gate switch SEL is turned off, the voltage signal corresponding to the conversion of the photosensitive pixel will not be output to the subsequent circuit; thereby realizing the accurate readout of the voltage signal corresponding to each different photosensitive pixel. The specific type and implementation of the gate switch SEL are not specifically limited in this application. The specific type and implementation of the output selection signal that controls its action can be set and connected according to the actual application situation, and the specific type and implementation of the output selection signal that controls its action can be set and connected according to the actual application situation, and the application is not specifically limited in this application. like Fig.10 and Fig.11 As shown, the gate switch SEL can be directly implemented by a PMOS tube or an NMOS tube connected in series with the source follower SF.

[0095] It is understandable that, for different bias modes of photosensitive pixels, it is necessary to set up corresponding logarithmic conversion modules 1 and different output buffer modules 2, and use different source followers SF and other methods to cover each photosensitive pixel in the image sensor, so as to realize the reading of the light signal obtained by the entire image sensor, so as to realize functions such as image display.

[0096] Specifically, the selection switch SEL can be set to achieve accurate readout of the corresponding signal of each photosensitive pixel in the pixel array application scenario, and the simultaneous readout of the corresponding signals of multiple photosensitive pixels can be achieved through row selection signals or column selection signals, thereby improving the readout speed of the light signal, effectively reducing the number of circuit connections, and simplifying the circuit structure; further considering the setting method of the readout module in the case of a pixel array, the flexibility of the readout module is improved and the scope of application is expanded.

[0097] Please refer to Fig.12 , Fig.12 This is a structural diagram of the logarithmic conversion module when the first photosensitive pixel provided by the present invention is connected to a high bias voltage; please refer to Fig.13 , Fig.13 A schematic diagram of the structure of a logarithmic conversion module when a second photosensitive pixel provided by the present invention is connected to a high bias voltage; as an optional embodiment, a first end of the photosensitive pixel is connected to a first power supply, and a second end is connected to an input end of a logarithmic conversion module 1, and the logarithmic conversion module 1 includes:

[0098] A-level first amplification unit;

[0099] For any first amplifying unit, the first amplifying unit includes a first conversion switch tube Q11 and a first amplifying switch tube Q21, the control end of the first amplifying switch tube Q21 is connected to the first end of the first conversion switch tube Q11 and serves as the first input end of the first amplifying unit, the first end of the first amplifying switch tube Q21 serves as the second input end of the first amplifying unit, the second end of the first conversion switch tube Q11 serves as the first output end of the first amplifying unit, and the control end of the first conversion switch tube Q11 is connected to the second end of the first amplifying switch tube Q21 and serves as the second output end of the first amplifying unit;

[0100] The first input end of the first-stage first amplifying unit is connected to the second end of the photosensitive pixel, the second input end of the first-stage first amplifying unit is connected to the second power supply, the first output end of the A-th-stage first amplifying unit is grounded, the first output end of the i-th-stage first amplifying unit is connected to the first input end of the i+1-th-stage first amplifying unit, and the second output end of the i-th-stage first amplifying unit is connected to the second input end of the i+1-th-stage first amplifying unit; A is a positive integer, and i is a positive integer less than A;

[0101] The second current bias module Q32 has an output end connected to the second output end of the first amplifying unit of the Ath stage and serves as the output end of the logarithmic conversion module 1 .

[0102] It is not difficult to understand that when the photosensitive pixel is in a state of being connected to a high bias voltage, the logarithmic conversion module 1 can be implemented by using a first amplifying unit of class A. For the first amplifying unit of any level, it includes a first conversion switch tube Q11 and a first amplifying switch tube Q21. The first conversion switch tube Q11 and the first amplifying switch tube Q21 cooperate to perform logarithmic conversion and signal amplification on the photocurrent corresponding to the second terminal voltage Vsens of the photosensitive pixel, and then convert it into a voltage signal Vsig_log for output. The first conversion switch tube Q11 plays a role in logarithmic conversion, and the first amplifying switch tube Q21 plays a role in signal amplification. The specific types and implementation methods of the first conversion switch tube Q11 and the first amplifying switch tube Q21 are not particularly limited in this application. They can be implemented by switching devices such as MOS tubes and triodes, or by other methods. Considering that the first conversion switch tube Q11 and the first amplifying switch tube Q21 in the first amplifying unit need to work in a specific working state to achieve the corresponding logarithmic conversion and signal amplification functions, a second current bias module Q32 is also provided in the logarithmic conversion module 1 to provide a stable bias current for the first conversion switch tube Q11 and the first amplifying switch tube Q21. The specific type of the second current bias module Q32 and the specific value of the bias current provided by it are not specifically limited in this application. The specific type and implementation of the first power supply and the second power supply are not specifically limited in this application. The same power supply can be used for implementation, or different power supplies can be selected according to actual application requirements.

[0103] As a specific embodiment, Fig.12 As shown, the logarithmic conversion module 1 includes a first-stage amplification unit, and the second current bias module Q32 is implemented by an NMOS tube with a source grounded and a gate connected to a preset fixed bias voltage Vbias. Fig.13 As shown, the logarithmic conversion module 1 includes two stages of first amplifying units, and the second current bias module Q32 is implemented by an NMOS tube with a source grounded and a gate connected to a preset fixed bias voltage Vbias.

[0104] Specifically, a logarithmic conversion module 1 composed of a first conversion switch tube Q11, a first amplifying switch tube Q21 and a second current bias module Q32 can be used to realize the logarithmic conversion of the photocurrent flowing through the photosensitive pixel. The entire circuit structure is simple and easy to implement, which is conducive to the simple implementation of the entire readout module.

[0105] Please refer to Fig.14 , Fig.14 A schematic diagram of the structure of a logarithmic conversion module when a third photosensitive pixel provided by the present invention is connected to a high bias voltage; as an optional embodiment, a first end of the photosensitive pixel is connected to a first power supply, and a second end is connected to an input end of a logarithmic conversion module 1, and the logarithmic conversion module 1 includes:

[0106] A second amplifying switch tube Q22, a first end of which is connected to a second power supply;

[0107] A second conversion switch tube Q12, a first end of which is respectively connected to a control end of the second amplifying switch tube Q22 and a second end of the photosensitive pixel;

[0108] A third conversion switch tube Q13, a first end of which is respectively connected to the second end of the second conversion switch tube Q12 and the control end of the second conversion switch tube Q12, and a second end of which is grounded;

[0109] The output end of the third current bias module Q33 is respectively connected to the control end of the third conversion switch tube Q13 and the second end of the second amplification switch tube Q22 , and serves as the output end of the logarithmic conversion module 1 .

[0110] It can be understood that when the photosensitive pixel is in a state of being connected to a high bias voltage, the logarithmic conversion module 1 may specifically include a second amplifying switch tube Q22, a second conversion switch tube Q12, a third conversion switch tube Q13 and a third current bias module Q33, the second conversion switch tube Q12 and the third conversion switch tube Q13 play a role in logarithmic conversion, and the second amplifying switch tube Q22 plays a role in signal amplification. The specific types and implementation methods of the second amplifying switch tube Q22, the second conversion switch tube Q12 and the third conversion switch tube Q13 are not particularly limited in this application, and they may be implemented using switch devices such as MOS tubes and triodes, or may be implemented in other ways. Considering that the second amplifying switch tube Q22, the second conversion switch tube Q12 and the third conversion switch tube Q13 all need to work in a specific working state to achieve the corresponding logarithmic conversion and signal amplification functions, the logarithmic conversion module 1 is also provided with a third current bias module Q33 to provide a stable bias current for the second amplifying switch tube Q22, the second conversion switch tube Q12 and the third conversion switch tube Q13. The specific type of the third current bias module Q33 and the specific value of the bias current it provides and other implementation methods are not specifically limited in this application. Fig.14 As shown, the third current bias module Q33 is implemented by an NMOS tube with a source grounded and a gate connected to a preset fixed bias voltage Vbias.

[0111] Specifically, the logarithmic conversion module 1 composed of the second amplifying switch tube Q22, the second conversion switch tube Q12, the third conversion switch tube Q13 and the third current bias module Q33 can be used to realize the logarithmic conversion of the signal. The entire circuit structure is simple and easy to implement, which is conducive to the simple implementation of the entire readout module.

[0112] Please refer to Fig.15 , Fig.15A schematic diagram of the structure of a logarithmic conversion module when a fourth photosensitive pixel provided by the present invention is connected to a high bias voltage; as an optional embodiment, a first end of the photosensitive pixel is connected to a first power supply, and a second end is connected to an input end of a logarithmic conversion module 1, and the logarithmic conversion module 1 includes:

[0113] A third amplifying switch tube Q23, a first end of which is connected to the second power supply;

[0114] The fourth conversion switch tube Q14 has a first end connected to the control end of the third amplifying switch tube Q23 and the second end of the photosensitive pixel respectively, and the control end is connected to the first preset bias voltage;

[0115] The output end of the fourth current bias module Q34 is respectively connected to the second end of the fourth conversion switch tube Q14 and the second end of the third amplification switch tube Q23 , and serves as the output end of the logarithmic conversion module 1 .

[0116] It is not difficult to understand that when the photosensitive pixel is in a state of being connected to a high bias voltage, the logarithmic conversion module 1 may specifically include a third amplifying switch tube Q23, a fourth conversion switch tube Q14, and a fourth current bias module Q34, wherein the fourth conversion switch tube Q14 plays a role in logarithmic conversion, and the third amplifying switch tube Q23 plays a role in signal amplification. The specific types and implementation methods of the third amplifying switch tube Q23 and the fourth conversion switch tube Q14 are not particularly limited in this application, and they may be implemented using switch devices such as MOS tubes and triodes, or may be implemented using other methods. Considering that the third amplifier switch tube Q23 needs to work in a specific working state to realize the corresponding signal amplification function, the logarithmic conversion module 1 is also provided with a fourth current bias module Q34 to provide a stable bias current for the third amplifier switch tube Q23. At the same time, the control end of the fourth conversion switch tube Q14 is connected to the first preset bias voltage to ensure its stable bias and ensure its logarithmic conversion function. The specific type of the fourth current bias module Q34 and the specific value of the bias current it provides and other implementation methods are not specifically limited in this application. The specific value and implementation method of the first preset bias voltage are not specifically limited in this application, and can be set and adjusted according to the actual application of the fourth conversion switch. Fig.15 As shown, the fourth current bias module Q34 is implemented by an NMOS tube with a source grounded and a gate connected to a preset fixed bias voltage Vbias2.

[0117] Specifically, a logarithmic conversion module 1 composed of a third amplifying switch tube Q23, a fourth conversion switch tube Q14 and a fourth current bias module Q34 can be used to realize the logarithmic conversion of the photocurrent flowing through the photosensitive pixel. The entire circuit structure is simple and easy to implement, which is conducive to the simple implementation of the entire readout module.

[0118] It can be understood that when the photosensitive pixel is in a state of being connected to a low bias, the bias connected to the first end of the photosensitive pixel changes from a high bias to a low bias, and the setting method of the logarithmic conversion module 1 can refer to the setting method when the photosensitive pixel is connected to a high bias, and be symmetrical with it.

[0119] Please refer to Fig.16 , Fig.16 This is a structural diagram of the logarithmic conversion module when the first photosensitive pixel provided by the present invention is connected to a low bias voltage; please refer to Fig.17 , Fig.17 A structural schematic diagram of a logarithmic conversion module when a second photosensitive pixel provided by the present invention is connected to a low bias voltage; as an optional embodiment, a first end of the photosensitive pixel is grounded, and a second end is connected to an input end of a logarithmic conversion module 1, and the logarithmic conversion module 1 includes: a Class B second amplification unit and a fifth current bias module Q35; for any second amplification unit, the second amplification unit includes a fifth conversion switch tube Q15 and a fourth amplification switch tube Q24, the control end of the fourth amplification switch tube Q24 is connected to a first end of the fifth conversion switch tube Q15 and serves as a first input end of the second amplification unit, the first end of the fourth amplification switch tube Q24 serves as a second input end of the second amplification unit, and the fifth conversion switch tube Q15 is connected to a first end of the fourth amplification switch tube Q24. The second end of the tube Q15 serves as the first output end of the second amplifier unit, the control end of the fifth conversion switch tube Q15 is connected to the second end of the fourth amplifier switch tube Q24 and serves as the second output end of the second amplifier unit; the first input end of the first-stage second amplifier unit is connected to the second end of the photosensitive pixel, the second input end of the first-stage second amplifier unit is grounded, the first output end of the B-stage second amplifier unit is connected to the second power supply, the first output end of the j-stage second amplifier unit is connected to the first input end of the j+1-stage second amplifier unit, and the second output end of the j-stage second amplifier unit is connected to the second input end of the j+1-stage second amplifier unit; B is a positive integer, and j is a positive integer less than B;

[0120] The output end of the fifth current bias module Q35 is connected to the second output end of the second amplifier unit of the Bth stage and serves as the output end of the logarithmic conversion module 1. Fig.16 As shown, the logarithmic conversion module 1 includes a first-stage second amplification unit, and the fifth current bias module Q35 is implemented by an NMOS tube with a source grounded and a gate connected to a preset fixed bias voltage Vbias. Fig.17 As shown, the logarithmic conversion module 1 includes two stages of second amplifying units, and the fifth current bias module Q35 is implemented by an NMOS tube with a source grounded and a gate connected to a preset fixed bias voltage Vbias.

[0121] Please refer to Fig.18 , Fig.18A schematic diagram of the structure of a logarithmic conversion module when a third photosensitive pixel provided by the present invention is connected to a low bias voltage; as an optional embodiment, a first end of the photosensitive pixel is grounded, and a second end is connected to an input end of the logarithmic conversion module 1, and the logarithmic conversion module 1 includes:

[0122] A fifth amplifying switch tube Q25, a first end of which is grounded;

[0123] A sixth conversion switch tube Q16, a first end of which is respectively connected to the control end of the fifth amplifying switch tube Q25 and the second end of the photosensitive pixel;

[0124] A seventh conversion switch tube Q17, a first end of which is respectively connected to the second end of the sixth conversion switch tube Q16 and the control end of the sixth conversion switch tube Q16, and a second end of which is connected to the second power supply;

[0125] The output end of the sixth current bias module Q36 is respectively connected to the control end of the seventh conversion switch tube Q17 and the second end of the fifth amplifying switch tube Q25, and serves as the output end of the logarithmic conversion module 1. Fig.18 As shown, the sixth current bias module Q36 is implemented by an NMOS tube with a source grounded and a gate connected to a preset fixed bias voltage Vbias.

[0126] Please refer to Fig.19 , Fig.19 A schematic diagram of the structure of the logarithmic conversion module when the fourth photosensitive pixel provided by the present invention is connected to a low bias voltage. As an optional embodiment, the first end of the photosensitive pixel is grounded, and the second end is connected to the input end of the logarithmic conversion module 1, and the logarithmic conversion module 1 includes:

[0127] A sixth amplifying switch tube Q26, a first end of which is grounded;

[0128] The eighth conversion switch tube Q18, the first end of which is respectively connected to the second end of the photosensitive pixel and the control end of the sixth amplifying switch tube Q26, and the control end is connected to the second preset bias voltage;

[0129] The output end of the seventh current bias module Q37 is respectively connected to the second end of the eighth conversion switch tube Q18 and the second end of the sixth amplification switch tube Q26, and serves as the output end of the logarithmic conversion module 1. Fig.19 As shown, the seventh current bias module Q37 can be implemented by an NMOS tube with a source grounded and a gate connected to a preset fixed bias voltage Vbias2.

[0130] To solve the above technical problems, the present invention also provides an image sensor, comprising a photosensitive pixel and a light signal processing circuit as described above, wherein the input end of the light signal processing circuit is connected to the photosensitive pixel for converting the light signal captured by the photosensitive pixel into an electrical signal.

[0131] For an introduction to an image sensor provided by the present invention, please refer to the embodiment of the above-mentioned optical signal processing circuit, and the present invention will not be described in detail here.

[0132] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same and similar parts between the embodiments can be referred to each other. In this specification, relational terms such as first and second, etc. are only used to distinguish an entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the term "include", "comprise" or any other variant thereof is intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements not only includes those elements, but also includes other elements that are not clearly listed, or also includes elements inherent to such process, method, article or equipment. In the absence of more restrictions, the elements limited by the sentence "including one..." do not exclude the existence of other identical elements in the process, method, article or equipment including the elements.

[0133] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A circuit for processing an optical signal, characterized in that: include: A compensation pixel, wherein the first end is connected to the same potential as the first end of the photosensitive pixel, and the resistance of the compensation pixel is fixed and equal to the resistance of the photosensitive pixel when not irradiated with light; a first compensation switch, a first end of which is connected to the second end of the compensation pixel; a second compensation switch, a first end of which is connected to the second end of the photosensitive pixel; a controller, wherein a first output terminal is connected to a control terminal of the first compensation switch, and a second output terminal is connected to a control terminal of the second compensation switch, and is used to control the conduction of the first compensation switch and the conduction of the second compensation switch in non-overlapping time periods; A readout module, whose input end is respectively connected to the second end of the first compensation switch and the second end of the second compensation switch, and is used to convert the compensation current flowing through the compensation pixel into a first voltage signal when the first compensation switch is turned on, and to convert the photocurrent flowing through the photosensitive pixel into a second voltage signal when the second compensation switch is turned on.

2. The optical signal processing circuit according to claim 1, characterized in that: The image sensor includes a pixel array composed of a plurality of photosensitive pixels, wherein i photosensitive pixels in the pixel array share a compensation pixel; i is a positive integer; The controller is also used to control the conduction of the first compensation switch connected to the shared compensation pixel and the conduction of the second compensation switches connected to i compensation pixels respectively in non-overlapping time periods.

3. The optical signal processing circuit according to claim 2, characterized in that: The i photosensitive pixels are symmetrically arranged around the shared compensation pixel with the shared compensation pixel as the center.

4. The optical signal processing circuit according to any one of claims 1 to 3, characterized in that: The readout module comprises: A logarithmic conversion module, whose input end is connected to a photosensitive pixel, and is used to perform logarithmic conversion on a photocurrent flowing through the photosensitive pixel to generate a voltage signal having a logarithmic relationship with the photocurrent; An output buffer module, whose input end is connected to the output end of the logarithmic conversion module, is used for buffering the voltage signal and then outputting it.

5. The optical signal processing circuit according to claim 4, characterized in that: The output buffer module comprises: A source follower, whose control end is connected to the output end of the logarithmic conversion module, and is used to amplify and output the voltage signal output by the logarithmic conversion module; The first current bias module has an output end connected to one end of the source follower and serves as the output end of the output buffer module, and is used to provide a bias current for the source follower.

6. The optical signal processing circuit according to claim 5, characterized in that: The image sensor includes a pixel array composed of a plurality of photosensitive pixels; the output buffer module also includes: A selection switch, the control end of which is connected to an output selection signal, the first end of which is connected to one end of the source follower, and the second end of which is connected to the output end of the first current bias module, is used to turn on when the photosensitive pixel is selected for output, and to turn off when the photosensitive pixel is not selected for output.

7. The optical signal processing circuit according to claim 4, characterized in that: The first end of the photosensitive pixel is connected to the first power supply, and the second end is connected to the input end of the logarithmic conversion module, and the logarithmic conversion module includes: A-level first amplification unit; For any first amplifying unit, the first amplifying unit includes a first conversion switch tube and a first amplifying switch tube, the control end of the first amplifying switch tube is connected to the first end of the first conversion switch tube and serves as the first input end of the first amplifying unit, the first end of the first amplifying switch tube serves as the second input end of the first amplifying unit, the second end of the first conversion switch tube serves as the first output end of the first amplifying unit, and the control end of the first conversion switch tube is connected to the second end of the first amplifying switch tube and serves as the second output end of the first amplifying unit; The first input end of the first amplifier unit of the first stage is connected to the second end of the photosensitive pixel, the second input end of the first amplifier unit of the first stage is connected to the second power supply, the first output end of the A-th first amplifier unit is grounded, the first output end of the i-th first amplifier unit is connected to the first input end of the i+1-th first amplifier unit, and the second output end of the i-th first amplifier unit is connected to the second input end of the i+1-th first amplifier unit; A is a positive integer, and i is a positive integer less than A; The second current bias module has an output end connected to the second output end of the A-th level first amplification unit and serves as the output end of the logarithmic conversion module.

8. The optical signal processing circuit according to claim 4, characterized in that: The first end of the photosensitive pixel is grounded, and the second end is connected to the input end of the logarithmic conversion module, and the logarithmic conversion module includes: Class B second amplifier unit; For any second amplifying unit, the second amplifying unit includes a fifth conversion switch tube and a fourth amplifying switch tube, the control end of the fourth amplifying switch tube is connected to the first end of the fifth conversion switch tube and serves as the first input end of the second amplifying unit, the first end of the fourth amplifying switch tube serves as the second input end of the second amplifying unit, the second end of the fifth conversion switch tube serves as the first output end of the second amplifying unit, and the control end of the fifth conversion switch tube is connected to the second end of the fourth amplifying switch tube and serves as the second output end of the second amplifying unit; The first input end of the second amplifying unit of the first stage is connected to the second end of the photosensitive pixel, the second input end of the second amplifying unit of the first stage is grounded, the first output end of the second amplifying unit of the Bth stage is connected to the second power supply, the first output end of the second amplifying unit of the jth stage is connected to the first input end of the second amplifying unit of the j+1th stage, and the second output end of the second amplifying unit of the jth stage is connected to the second input end of the second amplifying unit of the j+1th stage; B is a positive integer, and j is a positive integer less than B; The fifth current bias module has an output end connected to the second output end of the second amplifying unit of the Bth stage and serves as the output end of the logarithmic conversion module.

9. An image sensor, characterized in that: It comprises a photosensitive pixel and a light signal processing circuit as described in any one of claims 1 to 8, wherein the input end of the light signal processing circuit is connected to the photosensitive pixel and is used to convert the light signal captured by the photosensitive pixel into an electrical signal.

Images