Epitaxial preparation method of gallium nitride HEMT device

Abstract

The invention relates to the technical field of semiconductors, and discloses an epitaxial preparation method of a gallium nitride HEMT device, and the method comprises the steps: providing a temporary substrate, forming a buffer layer on the temporary substrate, forming a sacrificial layer on the buffer layer, and forming an etching barrier layer on the sacrificial layer; forming a barrier layer on the etching barrier layer; forming a semiconductor layer on the barrier layer; forming a seed-adhesion layer on the semiconductor layer, and forming a diamond substrate on the seed-adhesion layer; and etching to remove the temporary substrate, the buffer layer and the sacrificial layer. The diamond-based gallium nitride epitaxial structure is obtained through one-time etching, the preparation cost of the gallium nitride HEMT device is reduced, and meanwhile the heat dissipation efficiency of the gallium nitride HEMT device is improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to an epitaxial preparation method for a gallium nitride HEMT device. Background Art

[0002] In the semiconductor and integrated circuit manufacturing process, thanks to high breakdown voltage (10 times higher than silicon), high switching speed (over GHz), small size and adjustable electronic structure, III-V nitride semiconductors are becoming one of the best candidate materials for high-power electronic devices, which can achieve higher power density and high conversion efficiency. Gallium nitride high electron mobility transistors (GaNHEMT) have entered the medium and high power market and play a core role in RF and millimeter wave applications. When working under high power conditions, it is challenging for GaN HEMT devices to have better heat dissipation capabilities, because such huge power will generate a lot of heat in the channel layer of the device, forming local hot spots. If the heat cannot be effectively conducted away, it will lead to increased channel resistance, increased channel temperature, and reduced electron mobility in the channel, so that the reliability of the device will drop rapidly or even be damaged. This situation needs to be changed. Summary of the invention

[0003] In view of this, the present application provides an epitaxial preparation method of a gallium nitride HEMT device, so as to improve the heat dissipation efficiency of the gallium nitride HEMT device and reduce the preparation cost of the gallium nitride HEMT device.

[0004] To achieve the above objectives, the technical solutions adopted are:

[0005] A method for epitaxially preparing a gallium nitride HEMT device, comprising:

[0006] providing a temporary substrate, forming a buffer layer on the temporary substrate, forming a sacrificial layer on the buffer layer, and forming an etching stop layer on the sacrificial layer;

[0007] forming a barrier layer on the etch stop layer;

[0008] forming a semiconductor layer on the barrier layer;

[0009] forming a seed-adhesion layer on the semiconductor layer, and forming a diamond substrate on the seed-adhesion layer;

[0010] The temporary substrate, the buffer layer and the sacrificial layer are removed by etching.

[0011] The present application is further configured as follows: forming a seed-adhesion layer on the semiconductor layer, and forming a diamond substrate on the seed-adhesion layer, comprising:

[0012] forming a diamond seed layer on the semiconductor layer, and depositing a diamond substrate on the diamond seed layer; or,

[0013] A first adhesion layer is formed on the semiconductor layer, a second adhesion layer is formed on the diamond substrate, and the first adhesion layer and the second adhesion layer are bonded face to face.

[0014] The present application is further configured as follows: forming a semiconductor layer on the barrier layer comprises:

[0015] A spacer layer is formed on the barrier layer, and the semiconductor layer is formed on the spacer layer.

[0016] The present application is further configured as follows: the material forming the spacer layer includes at least one of AlN, Al2O3, AlGaN, InGaO or diamond; and the thickness range of the spacer layer includes 1nm-5nm.

[0017] The present application is further configured as follows: the gallium nitride HEMT device is in an on state when there is no gate voltage input, and the gallium nitride HEMT device is a depletion-type device.

[0018] The present application is further configured as follows: the temporary substrate is formed of a material including Si, SiC or sapphire; the buffer layer is formed of a material including at least one of Si3N4, AlN, AlGaN or GaN; the sacrificial layer or the semiconductor layer is formed of a material including at least one of GaN, AlGaN, InGaN, Ga2O3 or SiC; the etching stop layer is formed of a material including at least one of Si3N4, SiO2, HfO or SrTiO3; the barrier layer is formed of a material including at least one of AlN, Al2O3, AlGaN, InGaO or diamond; the diamond seed layer is formed of a material including at least one of Si, Ge or SiGe; the first adhesion layer or the second adhesion layer is formed of a material including at least one of Si3N4, AlN, Ti, Au, Pt or Ni; the diamond substrate is formed of a material including at least one of single crystal diamond, polycrystalline diamond or microcrystalline diamond.

[0019] The present application is further configured as follows: the thickness range of the temporary substrate includes 200μm-2000μm; the thickness range of the buffer layer includes 100nm-1000nm; the thickness range of the sacrificial layer or the semiconductor layer includes 1μm-10μm; the thickness range of the etching stop layer includes 5nm-200nm; the thickness range of the barrier layer includes 10nm-30nm; the thickness range of the seed-adhesion layer includes 5nm-100nm; the thickness range of the diamond substrate includes 20μm-300μm.

[0020] The present application is further configured as follows: forming a barrier layer on the etching stop layer comprises:

[0021] A doping layer is formed on the etching stop layer, and the barrier layer is formed on the doping layer.

[0022] The present application is further configured as follows: the material forming the doping layer includes at least one of GaN, AlGaN, InGaN, Ga2O3 or SiC; and the thickness range of the doping layer includes 0.1 μm-2 μm.

[0023] The present application is further configured as follows: the gallium nitride HEMT device is in an off state when there is no gate voltage input, and the gallium nitride HEMT device is an enhancement mode device.

[0024] In summary, compared with the prior art, the present application discloses an epitaxial preparation method for a gallium nitride HEMT device, comprising providing a temporary substrate, forming a buffer layer on the temporary substrate, forming a sacrificial layer on the buffer layer, and forming an etching stop layer on the sacrificial layer; forming a barrier layer on the etching stop layer; forming a semiconductor layer on the barrier layer; forming a seed-adhesion layer on the semiconductor layer, and forming a diamond substrate on the seed-adhesion layer; etching and removing the temporary substrate, the buffer layer, and the sacrificial layer, thereby obtaining a diamond-based gallium nitride epitaxial structure through one etching, reducing the preparation cost of the gallium nitride HEMT device, and improving the heat dissipation efficiency of the gallium nitride HEMT device. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0026] Figure 1 This is the first process flow chart of the epitaxial preparation method of the gallium nitride HEMT device of the present application;

[0027] Figure 2 This is a second process flow chart of the epitaxial preparation method of the gallium nitride HEMT device of the present application;

[0028] Figure 3a This is a schematic diagram of the first structure of the gallium nitride HEMT device of the present application;

[0029] Figure 3b This is a second structural schematic diagram of the gallium nitride HEMT device of the present application;

[0030] Figure 3c This is a third structural schematic diagram of the gallium nitride HEMT device of the present application;

[0031] Figure 3d This is a fourth structural schematic diagram of the gallium nitride HEMT device of the present application;

[0032] Figure 3e This is a fifth structural schematic diagram of the gallium nitride HEMT device of the present application;

[0033] Figure 3f This is a sixth structural schematic diagram of the gallium nitride HEMT device of the present application;

[0034] Figure 3g This is the seventh structural schematic diagram of the gallium nitride HEMT device of the present application;

[0035] Figure 3h This is the eighth structural schematic diagram of the gallium nitride HEMT device of the present application;

[0036] Figure 3i This is a ninth structural schematic diagram of the gallium nitride HEMT device of the present application;

[0037] Figure 3j This is the tenth structural schematic diagram of the gallium nitride HEMT device of the present application;

[0038] Figure 4a This is the eleventh structural schematic diagram of the gallium nitride HEMT device of the present application;

[0039] Figure 4b This is the twelfth structural schematic diagram of the gallium nitride HEMT device of the present application. DETAILED DESCRIPTION

[0040] Here, exemplary embodiments will be described in detail, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are only examples of devices and methods consistent with some aspects of the present application as detailed in the attached claims.

[0041] It should be noted that, in this article, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element. In addition, components, features, and elements with the same name in different embodiments of the present application may have the same meaning or different meanings, and their specific meanings need to be determined by their explanation in the specific embodiment or further combined with the context of the specific embodiment.

[0042] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0043] In the subsequent description, the suffixes such as "module", "component" or "unit" used to represent elements are only used to facilitate the description of the present application, and have no specific meanings. Therefore, "module", "component" or "unit" can be used in a mixed manner.

[0044] In the description of the present application, it should be noted that the terms "upper", "lower", "left", "right", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0045] The technical solutions shown in this application will be described in detail below through specific embodiments. It should be noted that the description order of the following embodiments is not intended to limit the priority order of the embodiments.

[0046] Please refer to Figure 1 And combined Figure 3a-3d The epitaxial preparation method of the gallium nitride HEMT device of the first embodiment of the present application includes:

[0047] S11 , providing a temporary substrate 111 , forming a buffer layer 112 on the temporary substrate 111 , forming a sacrificial layer 113 on the buffer layer 112 , and forming an etching stopper layer 108 on the sacrificial layer 113 .

[0048] In this step, a buffer layer 112 , a sacrificial layer 113 and an etching stopper layer 108 are sequentially stacked on the temporary substrate 111 .

[0049] The temporary substrate 111 may be formed of a material including Si, SiC or sapphire;

[0050] The buffer layer 112 is formed of at least one of Si3N4, AlN, AlGaN or GaN;

[0051] The material forming the sacrificial layer 113 may include at least one of GaN, AlGaN, InGaN, Ga2O3 or SiC;

[0052] The etching stop layer 108 is formed of a material including at least one of Si 3 N 4 , SiO 2 , HfO or SrTiO 3 .

[0053] Wherein, the thickness of the temporary substrate 111 ranges from 200 μm to 2000 μm;

[0054] The thickness of the buffer layer 112 ranges from 100 nm to 1000 nm;

[0055] The thickness of the sacrificial layer 113 ranges from 1 μm to 10 μm;

[0056] The thickness of the etching stop layer 108 ranges from 5 nm to 200 nm;

[0057] Preferably, the thickness of the temporary substrate 111 is 1100 μm, the thickness of the buffer layer 112 is 550 nm, the thickness of the sacrificial layer 113 is 5 μm, and the thickness of the etching stop layer 108 is 80 nm.

[0058] It can be understood that the temporary substrate 111 provides mechanical support for the epitaxial preparation method of this embodiment during the manufacturing process, and is preferably prepared from Si. The buffer layer 112 forms a transition between the temporary substrate 111 and the subsequent device layer, which can alleviate the stress difference between the crystals, and the sacrificial layer 113 and the buffer layer 112 are removed in the subsequent etching process, thereby realizing the separation of the device from the temporary substrate 111, and the etching stop layer 108 protects the underlying material from being accidentally etched, thereby ensuring the accuracy of etching. Therefore, this embodiment provides a stable foundation for the preparation of GaN HEMT devices by reasonably selecting the materials and thicknesses of the temporary substrate 111, the buffer layer 112, the sacrificial layer 113 and the etching stop layer 108. The layered design can effectively manage the stress of the device while optimizing the heat dissipation performance and mechanical strength.

[0059] S12 , forming a barrier layer 106 on the etching stop layer 108 .

[0060] In this step, a buffer layer 112 , a sacrificial layer 113 , an etching stop layer 108 and a barrier layer 106 are sequentially stacked on the temporary substrate 111 .

[0061] The barrier layer 106 is formed of at least one of AlN, Al2O3, AlGaN, InGaO and diamond.

[0062] Also, the barrier layer 106 has a thickness ranging from 10 nm to 30 nm.

[0063] Preferably, the barrier layer 106 has a thickness of 20 nm.

[0064] It should be noted that a thicker barrier layer 106 helps to form a higher barrier, so that the device has a higher breakdown voltage and a lower leakage current. On the contrary, a too thin barrier layer 106 may cause a larger leakage current but help to reduce the turn-on voltage of the device. Based on this, the thickness of the barrier layer 106 in this embodiment is 10nm-30nm, which can maintain a sufficiently high barrier height while ensuring that the turn-on voltage of the device is not too high.

[0065] S13 , forming a semiconductor layer 103 on the barrier layer 106 .

[0066] In this step, a buffer layer 112 , a sacrificial layer 113 , an etching stop layer 108 , a barrier layer 106 and a semiconductor layer 103 are sequentially stacked on the temporary substrate 111 .

[0067] The semiconductor layer 103 is formed of at least one of GaN, AlGaN, InGaN, Ga2O3 or SiC.

[0068] Preferably, the semiconductor layer 103 is formed of GaN.

[0069] Also, the thickness of the semiconductor layer 103 ranges from 1 μm to 10 μm.

[0070] Preferably, the thickness of the semiconductor layer 103 is 6 μm.

[0071] Among them, a reasonable thickness range of the semiconductor layer 103 has an important influence on the electron migration performance, thermal management and current density of the device. The thickness range of the semiconductor layer 103 in this embodiment is 1μm-10μm, which can provide sufficient conductivity and thermal diffusion performance, and improve the breakdown voltage and power handling capacity of the device.

[0072] S14 , forming a seed-adhesion layer 102 on the semiconductor layer 103 , and forming a diamond substrate 101 on the seed-adhesion layer 102 .

[0073] In this step, a buffer layer 112 , a sacrificial layer 113 , an etching stop layer 108 , a barrier layer 106 , a semiconductor layer 103 , a seed-adhesion layer 102 and a diamond substrate 101 are sequentially stacked on the temporary substrate 111 .

[0074] The diamond substrate 101 is formed of at least one of single crystal diamond, polycrystalline diamond or microcrystalline diamond.

[0075] Also, the thickness of the seed-adhesion layer 102 ranges from 5 nm to 100 nm; the thickness of the diamond substrate 101 ranges from 20 μm to 300 μm.

[0076] Preferably, the thickness of the seed-adhesion layer 102 is 60 nm, and the thickness of the diamond substrate 101 is 160 μm.

[0077] It should be noted that the diamond substrate 101 is made of single crystal diamond, polycrystalline diamond or microcrystalline diamond material, and its thermal conductivity reaches 2000 W / mK, that is, the diamond substrate 101 of this embodiment has excellent heat dissipation performance.

[0078] In an optional embodiment, in combination Figure 4a , forming a seed-adhesion layer 102 on the semiconductor layer 103, and forming a diamond substrate 101 on the seed-adhesion layer 102, which may specifically include:

[0079] A diamond seed layer 102 a is formed on the semiconductor layer 103 , and a diamond substrate 101 is deposited on the diamond seed layer 102 a .

[0080] The diamond seed layer 102 a may be regarded as the seed-adhesion layer 102 , and the material forming the diamond seed layer 102 a includes at least one of Si, Ge or SiGe.

[0081] It should be noted that the diamond substrate 101 can be formed on the diamond seed layer 102a by deposition. In combination with the high temperature environment conditions required for deposition, taking into account the differences in thermal expansion coefficients or thermal contraction coefficients of the diamond substrate 101, the seed-adhesion layer 102, and the semiconductor layer 103, in order to avoid the risk of the gallium nitride HEMT device being degraded due to deformation of the above-mentioned film layers after cooling, in another optional embodiment, Figure 4b , forming a seed-adhesion layer 102 on the semiconductor layer 103, and forming a diamond substrate 101 on the seed-adhesion layer 102, which may specifically include:

[0082] A first adhesion layer 102b is formed on the semiconductor layer 103, and a second adhesion layer 102c is formed on the diamond substrate 101, and the first adhesion layer 102b and the second adhesion layer 102c are bonded face to face.

[0083] The material of the first adhesion layer 102b or the second adhesion layer 102c includes at least one of Si3N4, AlN, Ti, Au, Pt or Ni.

[0084] That is, through this wafer bonding process, the above-mentioned film layers do not have to be affected by the high temperature conditions required for deposition, avoiding possible stress deformation and defects of each film layer, thereby improving the reliability of GaN HEMT devices.

[0085] S15 , etching and removing the temporary substrate 111 , the buffer layer 112 and the sacrificial layer 113 .

[0086] In this step, the temporary substrate 111 is removed by chemical etching or plasma etching, and the buffer layer 112 and the sacrificial layer 113 are removed by plasma etching, so as to obtain a diamond-based gallium nitride epitaxial structure based on the diamond substrate 101 and including the seed-adhesion layer 102, the semiconductor layer 103, the barrier layer 106 and the etching stop layer 108 in sequence, that is, the temporary substrate 111 as the initial preparation substrate is removed, and the subsequently formed diamond substrate 101 can be used as the target substrate. In this embodiment, the diamond substrate 101 is obtained by a "reverse" structure formation process, and a diamond-based gallium nitride epitaxial structure is obtained after the structure is flipped, and a gallium nitride HEMT device based on the diamond substrate is formed thereby, thereby improving the rapid heat dissipation capability of the gallium nitride device.

[0087] It can be understood that the barrier layer 106 and the semiconductor layer 103 form a two-dimensional electron gas (2DEG) 104, and the gallium nitride HEMT device of this embodiment can quickly conduct the excess heat generated by the two-dimensional electron gas (2DEG) 104 during normal operation through the diamond substrate 101. In an application scenario, the diamond substrate 101 can conduct this heat to a heat sink (not shown) connected thereto, thereby utilizing the ultra-high thermal conductivity of the diamond substrate 101 to improve the heat dissipation efficiency of the gallium nitride HEMT device.

[0088] And the present embodiment can obtain the diamond-based gallium nitride epitaxial structure through one etching. Compared with the substrate transfer method in the related art which requires etching both the temporary substrate and the temporary carrier layer, the present application significantly reduces the preparation cost of the gallium nitride HEMT device and improves the preparation efficiency.

[0089] In a specific implementation process, the gallium nitride HEMT device of this embodiment is based on a diamond substrate 101, on which a seed-adhesion layer 102, a semiconductor layer 103, a barrier layer 106 and an etching stop layer 108 are sequentially provided. The gallium nitride HEMT device obtained thereby is in an on state when there is no gate voltage input, that is, the gallium nitride HEMT device is a depletion-type device, so as to be applied to high-power application scenarios of continuous and efficient switching.

[0090] Continue to combine Figure 3e, which is different from the previous embodiment, the gallium nitride HEMT device of the second embodiment of the present application has a spacer layer 120, that is, based on the first embodiment, the step S13, forming a semiconductor layer 103 on the barrier layer 106, may specifically include:

[0091] The spacer layer 120 is formed on the barrier layer 106 , and the semiconductor layer 103 is formed on the spacer layer 120 .

[0092] The spacer layer 120 is formed of at least one of AlN, Al2O3, AlGaN, InGaO and diamond.

[0093] Also, the thickness of the spacer layer 120 ranges from 1 nm to 5 nm.

[0094] Preferably, the thickness of the spacer layer 120 is 3 nm.

[0095] That is, in this embodiment, the spacer layer 120 separates the charges of the two-dimensional electron gas (2DEG) 104 from the barrier layer 106 to increase the charge mobility and charge density of the two-dimensional electron gas (2DEG) 104, thereby improving the performance of the GaN HEMT device.

[0096] Please refer to Figure 2 And combined Figure 3f-Figure 3i , which is different from the above-mentioned embodiment, the gallium nitride HEMT device of the third embodiment of the present application has a doping layer 107. Specifically, the epitaxial preparation method of the gallium nitride HEMT device of the third embodiment of the present application includes:

[0097] S21 , providing a temporary substrate 111 , forming a buffer layer 112 on the temporary substrate 111 , forming a sacrificial layer 113 on the buffer layer 112 , and forming an etching stopper layer 108 on the sacrificial layer 113 .

[0098] In this step, this embodiment may have the same material setting and size setting as the first embodiment, that is, the material forming the temporary substrate 111 may include Si, SiC or sapphire, the material forming the buffer layer 112 includes at least one of Si3N4, AlN, AlGaN or GaN, the material forming the sacrificial layer 113 may include at least one of GaN, AlGaN, InGaN, Ga2O3 or SiC, and the material forming the etching stop layer 108 includes at least one of Si3N4, SiO2, HfO or SrTiO3.

[0099] Furthermore, the thickness of the temporary substrate 111 ranges from 200 μm to 2000 μm, the thickness of the buffer layer 112 ranges from 100 nm to 1000 nm, the thickness of the sacrificial layer 113 ranges from 1 μm to 10 μm, and the thickness of the etching stop layer 108 ranges from 5 nm to 200 nm.

[0100] S22 , forming a doping layer 107 on the etching stop layer 108 , and forming a barrier layer 106 on the doping layer 107 .

[0101] In this step, a buffer layer 112 , a sacrificial layer 113 , an etching stop layer 108 , a doping layer 107 and a barrier layer 106 are sequentially stacked on the temporary substrate 111 .

[0102] The material forming the doping layer 107 includes at least one of GaN, AlGaN, InGaN, Ga2O3 or SiC.

[0103] Also, the thickness of the doping layer 107 ranges from 0.1 μm to 2 μm.

[0104] Preferably, the thickness of the doping layer 107 is 1 μm.

[0105] The barrier layer 106 is formed of at least one of AlN, Al2O3, AlGaN, InGaO and diamond.

[0106] Also, the barrier layer 106 has a thickness ranging from 10 nm to 30 nm.

[0107] Preferably, the barrier layer 106 has a thickness of 20 nm.

[0108] S23 , forming a semiconductor layer 103 on the barrier layer 106 .

[0109] The semiconductor layer 103 is formed of at least one of GaN, AlGaN, InGaN, Ga2O3 or SiC.

[0110] Also, the thickness of the semiconductor layer 103 ranges from 1 μm to 10 μm.

[0111] Preferably, the thickness of the semiconductor layer 103 is 6 μm.

[0112] S24 , forming a seed-adhesion layer 102 on the semiconductor layer 103 , and forming a diamond substrate 101 on the seed-adhesion layer 102 .

[0113] The diamond substrate 101 is formed of at least one of single crystal diamond, polycrystalline diamond or microcrystalline diamond.

[0114] Also, the thickness of the seed-adhesion layer 102 ranges from 5 nm to 100 nm; the thickness of the diamond substrate 101 ranges from 20 μm to 300 μm.

[0115] Preferably, the thickness of the seed-adhesion layer 102 is 60 nm, and the thickness of the diamond substrate 101 is 160 μm.

[0116] The same as the first embodiment is that Figure 4a , forming a seed-adhesion layer 102 on the semiconductor layer 103, and forming a diamond substrate 101 on the seed-adhesion layer 102, which may specifically include:

[0117] A diamond seed layer 102 a is formed on the semiconductor layer 103 , and a diamond substrate 101 is deposited on the diamond seed layer 102 a .

[0118] The diamond seed layer 102 a may be regarded as the seed-adhesion layer 102 , and the material forming the diamond seed layer 102 a includes at least one of Si, Ge or SiGe.

[0119] In another optional embodiment, in combination Figure 4b , forming a seed-adhesion layer 102 on the semiconductor layer 103, and forming a diamond substrate 101 on the seed-adhesion layer 102, which may specifically include:

[0120] A first adhesion layer 102b is formed on the semiconductor layer 103, and a second adhesion layer 102c is formed on the diamond substrate 101, and the first adhesion layer 102b and the second adhesion layer 102c are bonded face to face.

[0121] The material of the first adhesion layer 102b or the second adhesion layer 102c includes at least one of Si3N4, AlN, Ti, Au, Pt or Ni.

[0122] That is, through this wafer bonding process, the above-mentioned film layers do not have to be affected by the high temperature conditions required for deposition, avoiding possible stress deformation and defects of each film layer, thereby improving the reliability of GaN HEMT devices.

[0123] S25 , etching and removing the temporary substrate 111 , the buffer layer 112 and the sacrificial layer 113 .

[0124] In this step, the temporary substrate 111 is removed by chemical etching or plasma etching, and the buffer layer 112 and the sacrificial layer 113 are removed by plasma etching, thereby obtaining a diamond-based gallium nitride epitaxial structure based on the diamond substrate 101 and sequentially including a seed-adhesion layer 102, a semiconductor layer 103, a barrier layer 106, a doping layer 107 and an etching stop layer 108, and thereby forming a gallium nitride HEMT device.

[0125] In a specific implementation process, the gallium nitride HEMT device of this embodiment is in an off state when there is no gate voltage input, and the gallium nitride HEMT device is an enhancement mode device.

[0126] Continue to combine Figure 3j On the basis of the third embodiment, the gallium nitride HEMT device of the fourth embodiment of the present application has a spacer layer 120. Specifically, in step S23 of the third embodiment, forming a semiconductor layer 103 on the barrier layer 106 may include:

[0127] The spacer layer 120 is formed on the barrier layer 106 , and the semiconductor layer 103 is formed on the spacer layer 120 .

[0128] The spacer layer 120 is formed of at least one of AlN, Al2O3, AlGaN, InGaO and diamond.

[0129] Also, the thickness of the spacer layer 120 ranges from 1 nm to 5 nm.

[0130] Preferably, the thickness of the spacer layer 120 is 3 nm.

[0131] That is, in this embodiment, the spacer layer 120 separates the charges of the two-dimensional electron gas (2DEG) 104 from the barrier layer 106 to increase the charge mobility and charge density of the two-dimensional electron gas (2DEG) 104, thereby improving the performance of the GaN HEMT device.

[0132] It can be understood that the deposition process of each film layer in the embodiment of the present application includes at least one of MOCVD (metal organic chemical vapor deposition), MBE (molecular beam epitaxy), ALD (atomic layer deposition), PECVD (plasma enhanced chemical vapor deposition), and PVD (physical vapor deposition). Specifically, when the diamond substrate 101 is obtained by deposition means, it can be achieved by MPCVD or HFCVD process, and the temporary substrate 111 is preferably obtained by cutting, grinding and polishing after manufacturing a single crystal silicon wafer by the Czochralski (CZ method) or the Bridgman method.

[0133] In summary, the epitaxial preparation method of the gallium nitride HEMT device disclosed in the embodiment of the present application includes providing a temporary substrate 111, forming a buffer layer 112 on the temporary substrate 111, forming a sacrificial layer 113 on the buffer layer 111, and forming an etching stop layer 108 on the sacrificial layer 113; forming a barrier layer 106 on the etching stop layer 108; forming a semiconductor layer 103 on the barrier layer 106; forming a seed-adhesion layer 102 on the semiconductor layer 103, and forming a diamond substrate 101 on the seed-adhesion layer 102; etching and removing the temporary substrate 111, the buffer layer 112 and the sacrificial layer 113, thereby, a diamond-based gallium nitride epitaxial structure can be obtained by one etching, thereby reducing the preparation cost of the gallium nitride HEMT device and improving the heat dissipation efficiency of the gallium nitride HEMT device.

[0134] The above is a detailed introduction to the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the core idea of ​​the present application. At the same time, for technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A method for epitaxially preparing a gallium nitride HEMT device, characterized in that: include: providing a temporary substrate, forming a buffer layer on the temporary substrate, forming a sacrificial layer on the buffer layer, and forming an etching stop layer on the sacrificial layer; forming a barrier layer on the etch stop layer; forming a semiconductor layer on the barrier layer; forming a seed-adhesion layer on the semiconductor layer, and forming a diamond substrate on the seed-adhesion layer; The temporary substrate, the buffer layer and the sacrificial layer are removed by etching.

2. The epitaxial preparation method of a gallium nitride HEMT device according to claim 1, characterized in that: The step of forming a seed-adhesion layer on the semiconductor layer and forming a diamond substrate on the seed-adhesion layer comprises: forming a diamond seed layer on the semiconductor layer, and depositing a diamond substrate on the diamond seed layer; or, A first adhesion layer is formed on the semiconductor layer, a second adhesion layer is formed on the diamond substrate, and the first adhesion layer and the second adhesion layer are bonded face to face.

3. The epitaxial preparation method of a gallium nitride HEMT device according to claim 2, characterized in that: The forming of a semiconductor layer on the barrier layer comprises: A spacer layer is formed on the barrier layer, and the semiconductor layer is formed on the spacer layer.

4. The epitaxial preparation method of a gallium nitride HEMT device according to claim 3, characterized in that: The spacer layer is formed of a material including at least one of AlN, Al2O3, AlGaN, InGaO or diamond; and the thickness of the spacer layer ranges from 1 nm to 5 nm.

5. The epitaxial preparation method of a gallium nitride HEMT device according to claim 1, characterized in that: The gallium nitride HEMT device is in an on state when no gate voltage is input, and the gallium nitride HEMT device is a depletion-type device.

6. The epitaxial preparation method of a gallium nitride HEMT device according to claim 2, characterized in that: The temporary substrate is formed of a material including Si, SiC or sapphire; the buffer layer is formed of a material including at least one of Si3N4, AlN, AlGaN or GaN; the sacrificial layer or the semiconductor layer is formed of a material including at least one of GaN, AlGaN, InGaN, Ga2O3 or SiC; the etching stop layer is formed of a material including at least one of Si3N4, SiO2, HfO or SrTiO3; the barrier layer is formed of a material including at least one of AlN, Al2O3, AlGaN, InGaO or diamond; the diamond seed layer is formed of a material including at least one of Si, Ge or SiGe; the first adhesion layer or the second adhesion layer is formed of a material including at least one of Si3N4, AlN, Ti, Au, Pt or Ni; the diamond substrate is formed of a material including at least one of single crystal diamond, polycrystalline diamond or microcrystalline diamond.

7. The epitaxial preparation method of a gallium nitride HEMT device according to claim 1, characterized in that: The thickness range of the temporary substrate includes 200μm-2000μm; the thickness range of the buffer layer includes 100nm-1000nm; the thickness range of the sacrificial layer or the semiconductor layer includes 1μm-10μm; the thickness range of the etching stop layer includes 5nm-200nm; the thickness range of the barrier layer includes 10nm-30nm; the thickness range of the seed-adhesion layer includes 5nm-100nm; the thickness range of the diamond substrate includes 20μm-300μm.

8. The epitaxial preparation method of a gallium nitride HEMT device according to any one of claims 1 to 7, characterized in that: The step of forming a barrier layer on the etching stop layer comprises: A doping layer is formed on the etching stop layer, and the barrier layer is formed on the doping layer.

9. The epitaxial preparation method of a gallium nitride HEMT device according to claim 8, characterized in that: The forming material of the doping layer includes at least one of GaN, AlGaN, InGaN, Ga2O3 or SiC; the thickness range of the doping layer includes 0.1 μm-2 μm.

10. The epitaxial preparation method of a gallium nitride HEMT device according to claim 8, characterized in that: The gallium nitride HEMT device is in an off state when no gate voltage is input, and the gallium nitride HEMT device is an enhancement mode device.

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