Micro-LED chip without etching mesa and preparation method thereof

Abstract

The invention discloses a Micro-LED chip without an etching mesa and a preparation method thereof, and the Micro-LED chip comprises a light-emitting structure which comprises a substrate layer, an N-type gallium nitride layer, a multi-quantum well layer and a P-type gallium nitride layer; the edge of the light-emitting structure exposes the N-type gallium nitride layer; the selective groove array is located above the P-type gallium nitride layer, and the selective groove array comprises a plurality of groove structures and an insulating structure surrounding the groove structures; the P-type gallium nitride layer is exposed out of the groove structure; the N-type gallium nitride layer is also exposed out of the selective groove array; the thin film structure comprises a current diffusion layer and a metal electrode; the thin film structure is located above the P-type gallium nitride layer in the groove structure and above the N-type gallium nitride layer; and the current diffusion layer is in contact with the P-type gallium nitride layer and also in contact with the N-type gallium nitride layer. By adopting the technical scheme, the side wall of the Micro-LED pixel unit can be prevented from being damaged, so that the performance of a chip is improved.

Description

Technical Field

[0001] The present invention relates to the field of Micro-LED technology, and in particular to a Micro-LED chip without an etched table and a preparation method thereof. Background Art

[0002] Micro-LED has broad application prospects in many fields, especially in the display field, due to its outstanding performance. As a new type of miniaturized and arrayed LED device, Micro-LED usually uses dry etching of gallium nitride to obtain gallium nitride mesa units and large-scale pixel arrays. However, dry etching can cause damage and lattice defects on the side walls of the gallium nitride mesa units, which can easily cause non-radiative recombination when current is injected, thus affecting the luminous purity and efficiency of the device. Moreover, as the size of Micro-LED gradually decreases, the proportion of the sidewall to the surface area of ​​the pixel mesa gradually increases, and the negative impact of etching will be further enhanced.

[0003] At present, the main solutions to the non-radiative recombination paths of Micro-LEDs caused by dry etching include sidewall modification, sidewall passivation, a combination of sidewall modification and passivation, regulation of current injection paths, and selective thermal oxidation. Except for selective thermal oxidation, the first four methods are improvements based on the dry etching of the table, which increases the cost and difficulty of preparation; selective thermal oxidation defines the pixel structure by selectively preparing a thick oxygen layer at a high temperature and for a long time, without the need for etching technology, but high temperature will damage the GaN epitaxial structure, thereby affecting the performance of the device.

[0004] Therefore, how to avoid sidewall damage caused during the preparation process and improve the performance of Micro-LED has become a technical problem that needs to be solved urgently. Summary of the invention

[0005] The present invention provides a Micro-LED chip without an etched table and a preparation method thereof, so as to avoid damage to the side wall of the Micro-LED pixel unit during the preparation process, thereby improving the performance of the Micro-LED chip.

[0006] According to one aspect of the present invention, there is provided a Micro-LED chip without an etched mesa, comprising:

[0007] A light-emitting structure, comprising, from bottom to top, a substrate layer, an N-type gallium nitride layer, a multi-quantum well layer and a P-type gallium nitride layer; a portion of the N-type gallium nitride layer is exposed at an edge of the light-emitting structure;

[0008] A selective groove array located above the P-type gallium nitride layer of the light emitting structure, the selective groove array comprising a plurality of groove structures and an insulating structure arranged around the groove structures; the groove structures expose the P-type gallium nitride layer; the selective groove array also exposes the N-type gallium nitride layer exposed by the light emitting structure;

[0009] A thin film structure, the thin film structure comprising a current diffusion layer and a metal electrode from bottom to top; the thin film structure is located above the P-type gallium nitride layer in the groove structure, and above the N-type gallium nitride layer exposed by the light-emitting structure; the current diffusion layer is in contact with the P-type gallium nitride layer, and the current diffusion layer is also in contact with the N-type gallium nitride layer.

[0010] Optionally, the N-type gallium nitride layer, the multi-quantum well layer and the P-type gallium nitride layer in the light-emitting structure are all integrated structures.

[0011] Optionally, along a direction perpendicular to the plane where the substrate layer is located, a projection of the groove structure on the plane where the substrate layer is located is a groove projection;

[0012] The groove projection includes one or more of a circle, a triangle, a quadrilateral, and a pentagon.

[0013] Optionally, the light-emitting structure selected for the Micro-LED chip has a light-emitting spectrum that includes a spectrum from near ultraviolet to red light.

[0014] According to another aspect of the present invention, a method for preparing a Micro-LED chip without an etched mesa is provided, which is used for the Micro-LED chip described in any embodiment of the present invention;

[0015] The preparation method comprises:

[0016] A gallium nitride-based epitaxial wafer having a light-emitting structure is provided; wherein the light-emitting structure comprises, from bottom to top, a substrate layer, an N-type gallium nitride layer, a multi-quantum well layer and a P-type gallium nitride layer;

[0017] Etching the P-type gallium nitride layer and the multi-quantum well layer of the light-emitting structure to expose a portion of the N-type gallium nitride layer at the edge of the gallium nitride-based epitaxial wafer;

[0018] A selective groove array is formed above the P-type gallium nitride layer of the light emitting structure; the selective groove array includes a plurality of groove structures and an insulating structure arranged around the groove structures; the groove structures expose the P-type gallium nitride layer; the selective groove array also exposes the N-type gallium nitride layer exposed by the light emitting structure;

[0019] A thin film structure is formed on the exposed P-type gallium nitride layer and the N-type gallium nitride layer; the thin film structure comprises a current diffusion layer and a metal electrode from bottom to top.

[0020] Optionally, before forming a selective groove array above the P-type gallium nitride layer of the light emitting structure, the method further includes:

[0021] forming a photoresist layer on the P-type gallium nitride layer of the light emitting structure;

[0022] exposing and developing to remove part of the photoresist layer, and the photoresist layer that is not removed forms a plurality of photoresist structures;

[0023] A selective groove array is formed above the P-type gallium nitride layer of the light emitting structure, comprising:

[0024] Forming a whole-layer insulating structure above the P-type gallium nitride layer and the photoresist structure;

[0025] The photoresist structure and the insulating structure located above the photoresist structure are removed by stripping to form the selective groove array, exposing the P-type gallium nitride layer and the N-type gallium nitride layer located at the edge of the gallium nitride-based epitaxial wafer.

[0026] Optionally, a thin film structure is formed on the exposed P-type gallium nitride layer and the N-type gallium nitride layer, comprising:

[0027] Forming a whole layer of thin film structure;

[0028] The thin film structure located above the insulating structure of the selective groove array is removed by grinding.

[0029] Optionally, forming a selective groove array above the P-type gallium nitride layer of the light emitting structure includes:

[0030] Forming a whole layer of insulating structure on the P-type gallium nitride layer and the photoresist structure, and forming a whole layer of sacrificial layer on the whole layer of the insulating structure;

[0031] The photoresist structure, the insulating layer and the sacrificial layer located above the photoresist structure are removed by stripping to form the selective groove array, exposing the P-type gallium nitride layer and the N-type gallium nitride layer located at the edge of the gallium nitride-based epitaxial wafer;

[0032] A thin film structure is formed on the exposed P-type gallium nitride layer and the N-type gallium nitride layer, comprising:

[0033] Forming a whole layer of the film structure;

[0034] The sacrificial layer and the thin film structure located above the sacrificial layer are removed by wet etching or vapor etching.

[0035] The technical solution of the present invention is to set a selective groove array above the P-type gallium nitride layer of the light-emitting structure, and set a thin film structure in the groove structure of the selective groove array, so that the thin film structures can be independently set in different groove structures to form pixel units. The insulating structure of the selective groove array can define the pixel units of the Micro-LED chip. There is no need to define the pixel units by etching gallium nitride, which can avoid damage and defects to the side walls of the pixel units caused by etching, thereby reducing the process difficulty and improving device performance.

[0036] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0038] Figure 1 is a schematic structural diagram of a Micro-LED chip without an etched table provided in an embodiment of the present invention;

[0039] Figure 2 It is a flowchart of a method for preparing a Micro-LED chip without an etched table provided in an embodiment of the present invention;

[0040] Figure 3 It is a structural schematic diagram of a Micro-LED chip preparation process without etching table provided by an embodiment of the present invention;

[0041] Figure 4 It is a flowchart of another method for preparing a Micro-LED chip without etching mesas provided in an embodiment of the present invention;

[0042] Figure 5 It is a structural schematic diagram of another method of preparing a Micro-LED chip without an etched table provided in an embodiment of the present invention;

[0043] Figure 6It is a flowchart of another method for preparing a Micro-LED chip without etching mesas provided in an embodiment of the present invention;

[0044] Figure 7 It is a structural schematic diagram of another Micro-LED chip preparation process without etching table provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0045] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0046] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0047] Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention.

[0048] Figure 1 is a schematic diagram of the structure of a Micro-LED chip without an etched table provided in an embodiment of the present invention, with reference to Figure 1 , Micro-LED chips include:

[0049] The light emitting structure 10 includes a substrate layer 11, an N-type gallium nitride layer 12, a multi-quantum well layer 13 and a P-type gallium nitride layer 14 arranged in sequence from bottom to top; a portion of the N-type gallium nitride layer 12 is exposed at the edge of the light emitting structure 10;

[0050] A selective groove array 20 is located above the P-type gallium nitride layer 14 of the light emitting structure 10, and the selective groove array 20 includes a plurality of groove structures 21 and an insulating structure 22 disposed around the groove structures 21; the groove structures 21 expose the P-type gallium nitride layer 14; the selective groove array 20 also exposes the N-type gallium nitride layer 12 exposed by the light emitting structure 10;

[0051] The thin film structure 30 includes a current diffusion layer 31 and a metal electrode 32 from bottom to top; the thin film structure 30 is located above the P-type gallium nitride layer 14 in the groove structure 21, and above the N-type gallium nitride layer 12 exposed by the light-emitting structure 10; the current diffusion layer 31 is in contact with the P-type gallium nitride layer 14, and the current diffusion layer 31 is also in contact with the N-type gallium nitride layer 12.

[0052] The substrate layer 11 includes, but is not limited to, materials such as sapphire (Al2O3), silicon (Si), and silicon carbide (SiC). Generally, the substrate layer 11 is compatible with the gallium nitride crystal structure.

[0053] The N-type gallium nitride layer 12 refers to gallium nitride doped with a certain amount of impurities, such as silicon (Si), so that it has free electrons and can provide negative electrons under the action of an electric field. These electrons can combine with holes in the multi-quantum well layer 13 to generate light.

[0054] The multi-quantum well layer 13 may be formed by alternating multiple barrier layers and potential well layers, for example, multiple gallium nitride (GaN) and aluminum gallium nitride (AlGaN) layers. Electrons and holes can recombine in a specific energy band structure to emit light of a specific color. The energy band gap can be adjusted by adjusting the structure, elements, and proportions in the multi-quantum well layer 13, thereby regulating the emission wavelength of the multi-quantum well layer 13, so that the emission spectrum of the light-emitting structure 10 can include a spectrum from near ultraviolet to red light.

[0055] The P-type gallium nitride layer 14 refers to gallium nitride doped with a certain amount of impurities, such as magnesium (Mg), so that it has holes and can provide holes under the action of an electric field. These holes can combine with electrons in the multi-quantum well layer 13 to generate light.

[0056] The insulating structure 22 of the selective groove array 20 includes but is not limited to insulating materials such as silicon nitride (SiNx), silicon oxide (SiO2), and amorphous silicon (α-Si).

[0057] The current diffusion layer 31 of the thin film structure 30 includes but is not limited to conductive film layers such as indium tin oxide (ITO), nickel (Ni), and gold (Au). The current diffusion layer 31 can form an ohmic contact with the N-type gallium nitride layer 12 or the P-type gallium nitride layer 14 to reduce contact resistance. The metal electrode 32 can be composed of one or more metal layers (such as Ti, Ni, Al, Au, etc.) stacked together to increase adhesion and reduce resistivity.

[0058] For example, when a voltage is provided to the Micro-LED chip, a negative current may enter through the thin film structure 30 located above the N-type gallium nitride layer 12 exposed by the light-emitting structure 10, and flow out from the P-type gallium nitride layer 14 of the light-emitting structure 10 through the thin film structure 30 located above the P-type gallium nitride layer 14 in the groove structure. After the current is injected, electrons may enter the N-type gallium nitride layer 12 and move to the multi-quantum well layer 13, and holes may enter the P-type gallium nitride layer 14 and move to the multi-quantum well layer 13; in the multi-quantum well layer 13, electrons and holes meet and recombine, releasing energy and emitting it in the form of light.

[0059] A plurality of groove structures 21 and a plurality of thin film structures 30 located in the plurality of groove structures 21 may be arranged above the light emitting structure 10 of the Micro-LED chip. The thin film structure 30 in the groove structure 21 and the P-type gallium nitride layer 14, the multi-quantum well layer 13 and the N-type gallium nitride layer 12 thereunder may constitute a pixel unit, and the area where the groove structure 21 is located is the area where the pixel unit is located. The Micro-LED chip may include a plurality of pixel units, and a pixel array is formed on the Micro-LED chip. The negative electrodes of the plurality of pixel units in the pixel array (the thin film structure 30 located above the N-type gallium nitride layer 12 exposed by the light emitting structure 10) may be reused and receive the same electrical signal, and the positive electrodes of the plurality of pixel units in the pixel array (the thin film structure 30 located above the P-type gallium nitride layer 14 in the groove structure) are independent of each other and may receive the same or different electrical signals. Each pixel unit in the pixel array may be independently controlled, and has a higher resolution and contrast.

[0060] The Micro-LED chip without etched table provided in the embodiment of the present invention arranges a selective groove array above the P-type gallium nitride layer of the light-emitting structure, and arranges a thin film structure in the groove structure of the selective groove array, so that the thin film structure can be independently arranged in different groove structures to form a pixel unit array. The insulating structure of the selective groove array can define the pixel unit of the Micro-LED chip, and there is no need to define the pixel unit by etching gallium nitride, which can avoid damage and defects to the side walls of the pixel unit caused by etching, thereby reducing the process difficulty and improving device performance.

[0061] In an optional embodiment, the N-type gallium nitride layer 12, the multi-quantum well layer 13 and the P-type gallium nitride layer 14 in the light-emitting structure 10 are all integrated structures. There is no need to separate the N-type gallium nitride layer 12, the multi-quantum well layer 13 and the P-type gallium nitride layer 14 into independent structures, and the pixel array of the Micro-LED chip can also be realized.

[0062] In another optional embodiment, along a direction perpendicular to the plane where the substrate layer 11 is located, the projection of the groove structure 21 on the plane where the substrate layer 11 is located is a groove projection; the groove projection may include one or more of a circle, a triangle, a quadrilateral, and a pentagon, but is not limited thereto. The groove projection may also include other polygons such as a hexagon, a heptagon, and an octagon. The embodiment of the present invention does not limit the shape of the groove structure 21.

[0063] Based on the same inventive concept, an embodiment of the present invention also provides a method for preparing a Micro-LED chip without an etched mesa. Figure 2 is a flowchart of a method for preparing a Micro-LED chip without an etched table provided in an embodiment of the present invention. Figure 3 Schematic diagram of the structure of a Micro-LED chip without an etched table provided in an embodiment of the present invention, Figure 2 and Figure 3 , the preparation method comprises:

[0064] S110, providing a gallium nitride-based epitaxial wafer having a light-emitting structure; wherein the light-emitting structure comprises, from bottom to top, a substrate layer, an N-type gallium nitride layer, a multi-quantum well layer and a P-type gallium nitride layer.

[0065] Exemplary, reference Figure 3 (a) An N-type gallium nitride layer 12, a multi-quantum well layer 13 and a P-type gallium nitride layer 14 can be epitaxially formed in sequence on a substrate layer 11, and then a certain proportion of concentrated sulfuric acid (H2SO4) and hydrogen peroxide (H2O2) is used to clean the gallium nitride-based epitaxial wafer to remove various impurities on the surface and avoid defective pixel units.

[0066] S120, etching the P-type gallium nitride layer and the multi-quantum well layer of the light-emitting structure to expose a portion of the N-type gallium nitride layer at the edge of the gallium nitride-based epitaxial wafer.

[0067] Exemplary, reference Figure 3 (b) A hard mask layer or a photoresist mask layer may be provided in the middle region and part of the edge region of the P-type gallium nitride layer 14, and then the edge region of the gallium nitride-based epitaxial wafer may be etched by dry etching, starting from the P-type gallium nitride layer 14 and etching is stopped after the N-type gallium nitride layer 12 is exposed.

[0068] S130, forming a selective groove array above the P-type gallium nitride layer of the light-emitting structure; the selective groove array includes a plurality of groove structures and an insulating structure arranged around the groove structures; the groove structures expose the P-type gallium nitride layer; the selective groove array also exposes the N-type gallium nitride layer exposed by the light-emitting structure.

[0069] Exemplary, reference Figure 3 (c) and Figure 3 (d) A whole layer of insulating structure 22 may be formed by plasma enhanced chemical vapor deposition (PECVD) or inductively coupled plasma chemical vapor deposition (ICP-CVD), and then a pattern on a mask (not shown) is transferred to the insulating structure 22 by photolithography, and the insulating structure 22 is patterned to form a plurality of groove structures 21 penetrating the insulating structure 22, and to remove part of the insulating structure 22 at the edge, so that the groove structure 21 of the selective groove array 20 exposes the P-type gallium nitride layer 14, and the edge of the selective groove array 20 also exposes the N-type gallium nitride layer 12 exposed by the light-emitting structure 10.

[0070] S140, forming a thin film structure on the exposed P-type gallium nitride layer and the N-type gallium nitride layer; the thin film structure includes a current diffusion layer and a metal electrode from bottom to top.

[0071] Exemplary, reference Figure 3 (e) and Figure 3 (f) A thin conductive film layer such as ITO or Ni / Au can be deposited on the entire surface of the P-type gallium nitride layer 14 by magnetron sputtering or other equipment as a current diffusion layer 31, and annealed at high temperature in a nitrogen (N2) or nitrogen oxide (N2 / O2) atmosphere so that the current diffusion layer forms an ohmic contact with the gallium nitride layer to reduce the contact resistance; then a whole layer of metal electrode 32 is prepared by PECVD or other equipment. The metal electrode 32 can be composed of one or more metal layers (such as Ti, Ni, Al, Au, etc.) stacked together. Finally, the pattern on the mask (not shown in the figure) is transferred to the current diffusion layer 31 and the metal electrode 32 of the thin film structure 30 by photolithography, and the exposed P-type gallium nitride layer 14 and the current diffusion layer 31 and the metal electrode 32 above the N-type gallium nitride layer 12 are retained.

[0072] The method for preparing a Micro-LED chip without an etched table provided in an embodiment of the present invention prepares a selective groove array above the P-type gallium nitride layer of the light-emitting structure, and forms a thin film structure in the groove structure of the selective groove array, so that the thin film structures can be independently arranged in different groove structures to form a pixel unit array. The insulating structure of the selective groove array can define the pixel unit of the Micro-LED chip, and there is no need to define the pixel unit by etching gallium nitride, which can avoid damage and defects to the side walls of the pixel unit caused by etching, thereby reducing the process difficulty and improving device performance.

[0073] Optional, Figure 4 is a flowchart of another method for preparing a Micro-LED chip without etching a table provided in an embodiment of the present invention. Figure 5 FIG. 1 is a schematic diagram of a structure of another method for preparing a Micro-LED chip without an etched table provided in an embodiment of the present invention, referring to FIG. Figure 4 and Figure 5 , the preparation method comprises:

[0074] S210, providing a gallium nitride-based epitaxial wafer having a light-emitting structure; wherein the light-emitting structure comprises, from bottom to top, a substrate layer, an N-type gallium nitride layer, a multi-quantum well layer and a P-type gallium nitride layer.

[0075] S220, etching the P-type gallium nitride layer and the multi-quantum well layer of the light-emitting structure to expose a portion of the N-type gallium nitride layer at the edge of the gallium nitride-based epitaxial wafer.

[0076] S230 , forming a photoresist layer on the P-type gallium nitride layer of the light emitting structure.

[0077] S240, exposing and developing, removing part of the photoresist layer, and forming a plurality of photoresist structures on the remaining photoresist layer.

[0078] S250, forming a whole-layer insulating structure on the P-type gallium nitride layer and the photoresist structure.

[0079] S260, removing the photoresist structure and the insulating structure located above the photoresist structure by stripping to form a selective groove array, exposing the P-type gallium nitride layer and the N-type gallium nitride layer located at the edge of the gallium nitride-based epitaxial wafer.

[0080] S270, forming a thin film structure on the exposed P-type gallium nitride layer and the N-type gallium nitride layer; the thin film structure includes a current diffusion layer and a metal electrode from bottom to top.

[0081] For example, reference 4 and Figure 5 , a patterned photoresist structure 40 can be formed on the surface of the P-type gallium nitride layer 14 and the surface of the N-type gallium nitride layer 12 by using a photolithography process, such as Figure 5 As shown in (e), the remaining area of ​​the photoresist structure 40 is the area where the groove structure 21 is formed. A whole layer of insulating structure 22 can be formed above the patterned photoresist structure 40. When the photoresist structure 40 is stripped, the insulating structure 22 located above the photoresist structure 40 can be removed at the same time to form a selective groove array 20, exposing the P-type gallium nitride layer 14 and the N-type gallium nitride layer 12 located at the edge of the gallium nitride-based epitaxial wafer.

[0082] In this way, by forming a photoresist structure 40 before forming a whole layer of insulating structure 22, and by stripping off the photoresist structure 40 and the insulating structure 22 located above the photoresist structure 40, a selective groove array 20 is formed. There is no need to use high-precision photolithography to prepare the selective groove array 20, which is beneficial to reducing the preparation process and reducing the preparation difficulty and preparation cost.

[0083] In an optional embodiment, a thin film structure is formed on the exposed P-type gallium nitride layer and the N-type gallium nitride layer, including: forming a whole layer of the thin film structure; and removing the thin film structure located above the insulating structure of the selective groove array by grinding.

[0084] Exemplary, reference Figure 5 When preparing the selective groove array 20, a thicker insulating structure 22 can be prepared. After the current diffusion layer 31 and the metal electrode 32 are prepared in the entire layer, the current diffusion layer 31 and the metal electrode 32 above the insulating structure 22 can be removed by grinding, and the current diffusion layer 31 and the metal electrode 32 located above the exposed P-type gallium nitride layer and the N-type gallium nitride layer 12 are retained.

[0085] In an optional implementation, chemical mechanical polishing (CMP) may be used to remove the current diffusion layer 31 and the metal electrode 32 above the insulating structure 22 .

[0086] Optional, Figure 6 is a flowchart of another method for preparing a Micro-LED chip without etching a table provided in an embodiment of the present invention. Figure 7 FIG. 1 is a schematic diagram of a structure of another method for preparing a Micro-LED chip without an etched table provided in an embodiment of the present invention, referring to FIG. Figure 6 and Figure 7 , the preparation method comprises:

[0087] S310, providing a gallium nitride-based epitaxial wafer having a light-emitting structure; wherein the light-emitting structure comprises, from bottom to top, a substrate layer, an N-type gallium nitride layer, a multi-quantum well layer and a P-type gallium nitride layer.

[0088] S320, etching the P-type gallium nitride layer and the multi-quantum well layer of the light-emitting structure to expose a portion of the N-type gallium nitride layer at the edge of the gallium nitride-based epitaxial wafer.

[0089] S330 , forming a photoresist layer on the P-type gallium nitride layer of the light emitting structure.

[0090] S340, exposing and developing, removing part of the photoresist layer, and forming a plurality of photoresist structures on the remaining photoresist layer.

[0091] S350, forming a whole layer of insulating structure above the P-type gallium nitride layer of the light emitting structure and above the photoresist structure, and forming a whole layer of sacrificial layer above the whole layer of insulating structure.

[0092] S360, removing the photoresist structure, the insulating structure and the sacrificial layer located above the photoresist structure by stripping to form a selective groove array, exposing the P-type gallium nitride layer and the N-type gallium nitride layer located at the edge of the gallium nitride-based epitaxial wafer.

[0093] S370, forming a whole layer of thin film structure.

[0094] S380, removing the sacrificial layer and the thin film structure above the sacrificial layer by wet etching or vapor etching.

[0095] The sacrificial layer 50 may be an insulating film made of a material different from that of the insulating structure 22 , but is not limited thereto. The embodiment of the present invention does not limit the material of the sacrificial layer 50 .

[0096] For example, reference 6 and Figure 7 After the insulating structure 22 is prepared, a sacrificial layer 50 may be formed on the insulating structure 22. The materials of the insulating structure 22 and the sacrificial layer 50 may include SiNx / SiO2, α-Si / SiO2 or SiNx / α-Si, respectively. After the groove structure 21 of the selective groove array 20 is formed, the sacrificial layer 50 is still retained on the insulating structure 22 of the selective groove array 20. When the entire layer of the current diffusion layer 31 and the metal electrode 32 are formed, the current diffusion layer 31 and the metal electrode 32 are also formed on the sacrificial layer 50. The sacrificial layer 50 and the current diffusion layer 31 and the metal electrode 32 located above the sacrificial layer 50 may be removed by wet etching or vapor etching, so that the thin film structure 30 that has not been removed forms an electrode.

[0097] It is understandable that the thin film structure 30 originally deposited on the insulating structure 22 and the sacrificial layer 50, which may cause a circuit short circuit to the adjacent pixel units, will be detached along with the removal of the sacrificial layer 50, thereby completely preparing the Micro-LED chip.

[0098] In an optional implementation, a buffered oxide etchant (BOE) solution may be used to remove the sacrificial layer 50 and the thin film structure 30 located above the sacrificial layer 50 using a wet etching technique.

[0099] In yet another optional embodiment, a gas containing halogen elements may be used to remove the sacrificial layer 50 and the thin film structure 30 located above the sacrificial layer 50 using a vapor phase etching technique.

[0100] It is understandable that the solution used in the wet etching technology is not limited to the BOE solution, and the gas used in the vapor phase etching technology is not limited to the gas containing halogen elements. The embodiment of the present invention does not specifically limit the solution used in the wet etching technology and the gas used in the vapor phase etching technology.

[0101] In this way, by forming a sacrificial layer 50 on the surface of the insulating structure 22 and simultaneously removing the thin film structure 30 located above the sacrificial layer 50 when removing the sacrificial layer 50, patterning of the thin film structure 30 can be achieved. Compared with removing the thin film structure 30 located above the insulating structure 22 of the selective groove array 20 by photolithography patterning or grinding, there is no need to adopt a high-precision photolithography process, that is, the thin film structure 30 can be deposited on the entire surface and selectively placed in the groove structure 21 of the selective groove array 20, and then the non-structural film (the thin film structure 30 above the insulating structure 22) is removed by wet etching technology or vapor phase etching technology, thereby forming the pixel unit and pixel array of the Micro-LED chip, which can greatly reduce the process difficulty and preparation cost.

[0102] The method for preparing the Micro-LED chip provided in the embodiment of the present invention is used to prepare the Micro-LED chip provided in any embodiment of the present invention, and has the corresponding technical features and beneficial effects of the Micro-LED chip. For the contents not fully described in the embodiment of the method for preparing the Micro-LED chip, refer to the description of the Micro-LED chip above, and will not be repeated here; similarly, the Micro-LED chip in the embodiment of the present invention also has the functional modules and beneficial effects that can execute the method for preparing the Micro-LED chip provided in the embodiment of the present invention. For the contents not fully described in the embodiment of the Micro-LED chip, refer to the description of the method for preparing the Micro-LED chip above, and will not be repeated here.

[0103] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A Micro-LED chip without an etched table, characterized in that: include: A light-emitting structure, comprising, from bottom to top, a substrate layer, an N-type gallium nitride layer, a multi-quantum well layer and a P-type gallium nitride layer; a portion of the N-type gallium nitride layer is exposed at an edge of the light-emitting structure; A selective groove array located above the P-type gallium nitride layer of the light emitting structure, the selective groove array comprising a plurality of groove structures and an insulating structure arranged around the groove structures; the groove structures expose the P-type gallium nitride layer; the selective groove array also exposes the N-type gallium nitride layer exposed by the light emitting structure; A thin film structure, the thin film structure comprising a current diffusion layer and a metal electrode from bottom to top; the thin film structure is located above the P-type gallium nitride layer in the groove structure, and above the N-type gallium nitride layer exposed by the light-emitting structure; the current diffusion layer is in contact with the P-type gallium nitride layer, and the current diffusion layer is also in contact with the N-type gallium nitride layer.

2. The Micro-LED chip without etched mesas according to claim 1, characterized in that: The N-type gallium nitride layer, the multi-quantum well layer and the P-type gallium nitride layer in the light-emitting structure are all integrated structures.

3. The Micro-LED chip without etched mesas according to claim 1, characterized in that: Along a direction perpendicular to the plane where the substrate layer is located, the projection of the groove structure on the plane where the substrate layer is located is a groove projection; The groove projection includes one or more of a circle, a triangle, a quadrilateral, and a pentagon.

4. The Micro-LED chip without etched mesas according to claim 1, characterized in that: The light-emitting structure selected by the Micro-LED chip has a light-emitting spectrum ranging from near ultraviolet to red light.

5. A method for preparing a Micro-LED chip without an etched table, characterized in that: Used to prepare the Micro-LED chip according to any one of claims 1 to 4; The preparation method comprises: A gallium nitride-based epitaxial wafer having a light-emitting structure is provided; wherein the light-emitting structure comprises, from bottom to top, a substrate layer, an N-type gallium nitride layer, a multi-quantum well layer and a P-type gallium nitride layer; Etching the P-type gallium nitride layer and the multi-quantum well layer of the light-emitting structure to expose a portion of the N-type gallium nitride layer at the edge of the gallium nitride-based epitaxial wafer; A selective groove array is formed above the P-type gallium nitride layer of the light emitting structure; the selective groove array includes a plurality of groove structures and an insulating structure arranged around the groove structures; the groove structures expose the P-type gallium nitride layer; the selective groove array also exposes the N-type gallium nitride layer exposed by the light emitting structure; A thin film structure is formed on the exposed P-type gallium nitride layer and the N-type gallium nitride layer; the thin film structure comprises a current diffusion layer and a metal electrode from bottom to top.

6. The method for preparing a Micro-LED chip without an etched mesa according to claim 5, characterized in that: Before forming a selective groove array above the P-type gallium nitride layer of the light emitting structure, the method further includes: forming a photoresist layer on the P-type gallium nitride layer of the light emitting structure; exposing and developing to remove part of the photoresist layer, and the photoresist layer that is not removed forms a plurality of photoresist structures; A selective groove array is formed above the P-type gallium nitride layer of the light emitting structure, comprising: Forming a whole-layer insulating structure above the P-type gallium nitride layer and the photoresist structure; The photoresist structure and the insulating structure located above the photoresist structure are removed by stripping to form the selective groove array, exposing the P-type gallium nitride layer and the N-type gallium nitride layer located at the edge of the gallium nitride-based epitaxial wafer.

7. The method for preparing a Micro-LED chip without an etched mesa according to claim 6, characterized in that: A thin film structure is formed on the exposed P-type gallium nitride layer and the N-type gallium nitride layer, comprising: Forming a whole layer of thin film structure; The thin film structure located above the insulating structure of the selective groove array is removed by grinding.

8. The method for preparing a Micro-LED chip without an etched mesa according to claim 6, characterized in that: A selective groove array is formed above the P-type gallium nitride layer of the light emitting structure, comprising: Forming a whole layer of insulating structure on the P-type gallium nitride layer and the photoresist structure, and forming a whole layer of sacrificial layer on the whole layer of the insulating structure; The photoresist structure, the insulating structure and the sacrificial layer located above the photoresist structure are removed by stripping to form the selective groove array, exposing the P-type gallium nitride layer and the N-type gallium nitride layer located at the edge of the gallium nitride-based epitaxial wafer; A thin film structure is formed on the exposed P-type gallium nitride layer and the N-type gallium nitride layer, comprising: Forming a whole layer of the film structure; The sacrificial layer and the thin film structure located above the sacrificial layer are removed by wet etching or vapor etching.

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