Display device and mother substrate for display device

Abstract

The invention relates to a display device and a mother substrate for the display device. According to one embodiment, a display device includes: a substrate; an organic insulating layer disposed over the substrate over a display region in which a plurality of display elements are disposed and a peripheral region around the display region; a first partition wall disposed between adjacent display elements above the organic insulating layer; and a second partition wall disposed in the peripheral region. The first partition wall and the second partition wall each have: a conductive lower portion; and an upper portion protruding from a side surface of the lower portion. The organic insulating layer has an opening in the peripheral region. The second partition wall is disposed along the edge of the opening on the outside of the opening.

Description

[0001] Cross-references to related applications

[0002] This application claims priority based on Japanese patent application No. 2023-183189 filed on October 25, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Embodiments of the present invention relate to a display device and a mother substrate for a display device. Background Art

[0004] In recent years, a display device using an organic light emitting diode (OLED) as a display element has been put into practical use. The display element includes a lower electrode, an organic layer covering the lower electrode, and an upper electrode covering the organic layer.

[0005] When manufacturing the above-mentioned display device, a technology for improving the yield in the manufacturing process is required. Summary of the invention

[0006] In summary, according to an embodiment, a display device includes: a substrate; an organic insulating layer, which is arranged above the substrate over a display area where a plurality of display elements are arranged and a peripheral area around the display area; a first partition wall arranged between adjacent display elements above the organic insulating layer; and a second partition wall arranged in the peripheral area. The first partition wall and the second partition wall each have: a conductive lower portion; and an upper portion protruding from a side surface of the lower portion. The organic insulating layer has an opening in the peripheral area. The second partition wall is arranged outside the opening along the edge of the opening.

[0007] In addition, according to an embodiment, a mother substrate for a display device includes: a panel portion having a display area for displaying an image and a peripheral area around the display area; a blank portion outside the panel portion; an organic insulating layer arranged over the panel portion and the blank portion; a first partition wall arranged in the display area above the organic insulating layer; and a second partition wall arranged in the blank portion. The first partition wall and the second partition wall each include: a lower portion having conductivity; and an upper portion protruding from a side surface of the lower portion. The organic insulating layer has an opening in the blank portion. The second partition wall is arranged outside the opening along an edge of the opening.

[0008] According to such a configuration, it is possible to provide a display device and a mother substrate for a display device that can improve the yield in the manufacturing process. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 This is a diagram showing a configuration example of a display device according to the first embodiment.

[0010] Figure 2 It is a schematic plan view showing an example of the layout of sub-pixels.

[0011] Figure 3 It is along Figure 2 Schematic cross-sectional view of the display device taken along line III-III.

[0012] Figure 4 FIG. 1 is a diagram showing an example of a layer structure that can be applied to an organic layer.

[0013] Figure 5 This is a plan view showing an example of a mother substrate for a display device according to the first embodiment.

[0014] Figure 6 It is a top view showing a configuration example of a pad.

[0015] Figure 7 It is a plan view showing a configuration example of a region including a pad in a peripheral region or a blank portion.

[0016] Figure 8 It is a plan view showing a configuration example of a region including a window portion in a peripheral region or a blank portion.

[0017] Fig. 9 It is shown Figure 7 and Figure 8 A schematic partial enlarged view of section IX in FIG.

[0018] Fig.10 It is along Figure 7 A schematic cross-sectional view of a mother substrate for a display device taken along line XX in FIG.

[0019] Fig.11 This is a schematic cross-sectional view showing another configuration example of a mother substrate for a display device.

[0020] Fig.12 This is a schematic cross-sectional view showing still another configuration example of a mother substrate for a display device.

[0021] Fig.13 This is a schematic cross-sectional view showing still another configuration example of a mother substrate for a display device.

[0022] Fig.14 This is a schematic cross-sectional view showing still another configuration example of a mother substrate for a display device.

[0023] Fig.15 This is a schematic cross-sectional view showing still another configuration example of a mother substrate for a display device.

[0024] Fig.16 This is a schematic cross-sectional view showing still another configuration example of a mother substrate for a display device.

[0025] Fig.17 It is along Figure 8 Schematic cross-sectional view of a mother substrate for a display device taken along line XVII-XVII in FIG.

[0026] Fig.18 This is a schematic cross-sectional view showing another configuration example of a mother substrate for a display device.

[0027] Fig.19 This is a schematic cross-sectional view showing still another configuration example of a mother substrate for a display device.

[0028] Fig. 20 This is a schematic cross-sectional view showing still another configuration example of a mother substrate for a display device.

[0029] Fig.21 This is a schematic cross-sectional view showing still another configuration example of a mother substrate for a display device.

[0030] Fig. 22 This is a schematic cross-sectional view showing still another configuration example of a mother substrate for a display device.

[0031] Fig.23 This is a schematic cross-sectional view showing still another configuration example of a mother substrate for a display device.

[0032] Fig.24 This is a schematic cross-sectional view showing still another configuration example of a mother substrate for a display device.

[0033] Fig.25 This is a schematic cross-sectional view showing still another configuration example of a mother substrate for a display device.

[0034] Fig.26 This is a schematic cross-sectional view showing still another configuration example of a mother substrate for a display device.

[0035] Fig. 27 It is a schematic plan view showing a region including a pad in a peripheral region or a blank portion in the second embodiment.

[0036] Fig.28 yes Fig. 27 A partial enlarged view of part XXVIII in FIG.

[0037] Fig.29 It is a schematic plan view showing a region including a pad in a peripheral region or a blank portion in the third embodiment.

[0038] Fig.30 It is a schematic plan view showing a region including a pad in a peripheral region or a blank portion in the fourth embodiment.

[0039] Fig.31 It is a schematic plan view showing a region including a pad in a peripheral region or a blank portion in the fifth embodiment.

[0040] Fig.32 It is a schematic plan view showing a region including a pad in a peripheral region or a blank portion in the sixth embodiment.

[0041] Fig.33 It is a schematic top view showing a region including a pad in a peripheral region or a blank portion in the seventh embodiment.

[0042] Fig.34 It is a schematic top view showing a region including a pad in a peripheral region or a blank portion in the eighth embodiment.

[0043] Fig.35 It is a schematic top view showing a region including a pad in a peripheral region or a blank portion in the ninth embodiment.

[0044] Fig.36 It is a schematic plan view showing a region including a pad in a peripheral region or a blank portion in the tenth embodiment.

[0045] Fig.37 It is a diagram for explaining other shapes of openings that can be applied to the window portion. DETAILED DESCRIPTION

[0046] Several embodiments will be described with reference to the drawings. The disclosed contents are merely examples, and it is obvious that appropriate changes that maintain the spirit of the invention can be easily conceived by those skilled in the art and are within the scope of the present invention.

[0047] In addition, in order to make the description clearer, the drawings sometimes schematically show the width, thickness, shape, etc. of each part compared with the actual mode, but this is only an example and does not limit the interpretation of the present invention. In addition, in this specification and each figure, the same reference numerals are given to the constituent elements that perform the same or similar functions as the constituent elements previously described in relation to the already appeared figures, and repeated detailed descriptions are sometimes appropriately omitted.

[0048] It should be noted that in the accompanying drawings, mutually orthogonal X-axis, Y-axis and Z-axis are recorded as needed for easy understanding. The direction along the X-axis is called the X-direction, the direction along the Y-axis is called the Y-direction, and the direction along the Z-axis is called the Z-direction. The Z-direction is the normal direction of the plane including the X-direction and the Y-direction. In each embodiment, the X-direction is equivalent to the first direction, and the Y-direction is equivalent to the second direction. In addition, observing various elements parallel to the Z-direction is called a top view.

[0049] The display device involved in each embodiment is an organic electroluminescent display device having an organic light emitting diode (OLED) as a display element, and can be installed in various electronic devices such as televisions, personal computers, vehicle-mounted equipment, tablet terminals, smartphones, mobile phone terminals, wearable terminals, etc.

[0050] [First embodiment]

[0051] Figure 1 1 is a diagram showing a configuration example of a display device DSP according to the present embodiment. The display device DSP includes a display panel PNL on an insulating substrate 10, and the display panel PNL includes a display area DA for displaying an image and a peripheral area SA around the display area DA. A plurality of display elements described later are arranged in the display area DA. The substrate 10 may be glass or a flexible resin film.

[0052] In the present embodiment, the shape of the substrate 10 in plan view is a rectangle, but the shape of the substrate 10 in plan view is not limited to a rectangle, and may be other shapes such as a square, a circle, or an ellipse.

[0053] The display area DA has a plurality of pixels PX arranged in a matrix in the X direction and the Y direction. The pixel PX includes a plurality of sub-pixels SP that display different colors. In the present embodiment, it is assumed that the pixel PX includes a blue sub-pixel SP1, a green sub-pixel SP2, and a red sub-pixel SP3. However, the pixel PX may also include a sub-pixel SP of another color such as white together with the sub-pixels SP1, SP2, and SP3 or instead of any of the sub-pixels SP1, SP2, and SP3.

[0054] The sub-pixel SP includes a pixel circuit 1 and a display element DE driven by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a driving transistor 3, and a capacitor 4. The pixel switch 2 and the driving transistor 3 are switching elements composed of, for example, thin film transistors.

[0055] In the display area DA, a plurality of scanning lines GL for supplying scanning signals to the pixel circuits 1 of the sub-pixels SP, a plurality of signal lines SL for supplying video signals to the pixel circuits 1 of the sub-pixels SP, and a plurality of power supply lines PL are arranged. Figure 1 In the example shown, the scanning lines GL and the power supply lines PL extend in the X direction, and the signal lines SL extend in the Y direction.

[0056] The gate electrode of the pixel switch 2 is connected to the scanning line GL. One of the source electrode and the drain electrode of the pixel switch 2 is connected to the signal line SL, and the other is connected to the gate electrode of the driving transistor 3 and the capacitor 4 .

[0057] In the driving transistor 3, one of the source electrode and the drain electrode is connected to the power line PL and the capacitor 4, and the other is connected to the display element DE. It should be noted that the structure of the pixel circuit 1 is not limited to the example shown in the figure. For example, the pixel circuit 1 can also have more thin film transistors and capacitors.

[0058] The peripheral area SA is provided with a pad PD and a window WP for inspection or the like. The pad PD and the window WP are provided at Figure 1 In the example shown, a plurality of pads PD and window portions WP are arranged, but the number of pads PD and window portions WP can be changed appropriately. It should be noted that at least one of the pads PD and window portions WP may be omitted in the display panel PNL.

[0059] Figure 2 is a schematic top view showing an example of the layout of sub-pixels SP1, SP2, and SP3. Figure 2 In the example shown, the sub-pixels SP2 and SP3 are arranged in the X direction with the sub-pixel SP1. In addition, the sub-pixel SP2 and the sub-pixel SP3 are arranged in the Y direction.

[0060] When the sub-pixels SP1, SP2, and SP3 are arranged in this way, columns in which the sub-pixels SP2 and SP3 are alternately arranged in the Y direction and columns in which a plurality of sub-pixels SP1 are repeatedly arranged in the Y direction are formed in the display area DA. These columns are alternately arranged in the X direction. It should be noted that the layout of the sub-pixels SP1, SP2, and SP3 is not limited to Figure 2 Example shown.

[0061] The inorganic insulating layer 5 is disposed in the display area DA. The inorganic insulating layer 5 has pixel openings AP1, AP2, and AP3 in the sub-pixels SP1, SP2, and SP3, respectively. The inorganic insulating layer 5 having these pixel openings AP1, AP2, and AP3 is sometimes called a rib.

[0062] exist Figure 2 In the example shown, the pixel opening AP1 is larger than the pixel opening AP2, and the pixel opening AP2 is larger than the pixel opening AP3. That is, among the sub-pixels SP1, SP2, and SP3, the sub-pixel SP1 has the largest aperture ratio and the sub-pixel SP3 has the smallest aperture ratio.

[0063] The sub-pixel SP1 includes a lower electrode LE1, an upper electrode UE1, and an organic layer OR1 respectively overlapping with the pixel opening AP1. The sub-pixel SP2 includes a lower electrode LE2, an upper electrode UE2, and an organic layer OR2 respectively overlapping with the pixel opening AP2. The sub-pixel SP3 includes a lower electrode LE3, an upper electrode UE3, and an organic layer OR3 respectively overlapping with the pixel opening AP3.

[0064] The lower electrode LE1, the upper electrode UE1, and the portion of the organic layer OR1 that overlaps with the pixel opening AP1 constitute the display element DE1 of the sub-pixel SP1. The lower electrode LE2, the upper electrode UE2, and the portion of the organic layer OR2 that overlaps with the pixel opening AP2 constitute the display element DE2 of the sub-pixel SP2. The lower electrode LE3, the upper electrode UE3, and the portion of the organic layer OR3 that overlaps with the pixel opening AP3 constitute the display element DE3 of the sub-pixel SP3. The display elements DE1, DE2, and DE3 may also include a cover layer described later.

[0065] The display area DA is provided with conductive partition walls 6 (first partition walls). The partition walls 6 are provided on the inorganic insulating layer 5. The partition walls 6 overlap the inorganic insulating layer 5 as a whole and have the same planar shape as the inorganic insulating layer 5. The partition walls 6 are provided between adjacent display elements DE1, DE2, and DE3.

[0066] That is, the partition wall 6 has openings in each of the sub-pixels SP1, SP2, and SP3. The inorganic insulating layer 5 and the partition wall 6 are lattice-shaped in a plan view, and surround each of the sub-pixels SP1, SP2, and SP3. The partition wall 6 serves as a wiring for supplying a common voltage to the upper electrodes UE1, UE2, and UE3.

[0067] Figure 3 It is along Figure 2 A schematic cross-sectional view of a display device DSP along line III-III in FIG. A circuit layer 11 is arranged on the substrate 10. The circuit layer 11 includes Figure 1 The circuit layer 11 is covered with an insulating layer 12. The insulating layer 12 is an organic insulating layer that functions as a planarizing film that planarizes the unevenness generated by the circuit layer 11.

[0068] The lower electrodes LE1, LE2, and LE3 are arranged on the insulating layer 12. The inorganic insulating layer 5 is arranged on the insulating layer 12 and the lower electrodes LE1, LE2, and LE3. The end portions of the lower electrodes LE1, LE2, and LE3 are covered by the inorganic insulating layer 5.

[0069] Although in Figure 3 Although not shown in the cross section, the lower electrodes LE1 , LE2 , and LE3 are connected to the pixel circuit 1 of the circuit layer 11 through contact holes provided in the insulating layer 12 .

[0070] The partition wall 6 includes a conductive lower portion 61 disposed on the inorganic insulating layer 5, and an upper portion 62 disposed on the lower portion 61. The upper portion 62 has a greater width than the lower portion 61. Thus, both ends of the upper portion 62 protrude from the side surfaces of the lower portion 61. Such a shape of the partition wall 6 is called an overhang.

[0071] exist Figure 3 In the example shown, the lower portion 61 includes a base layer 63 disposed on the inorganic insulating layer 5 and a shaft layer 64 disposed on the base layer 63. For example, the base layer 63 is formed thinner than the shaft layer 64. Figure 3 In the example shown, both end portions of the bottom layer 63 protrude from the side surfaces of the shaft layer 64 .

[0072] The organic layer OR1 passes through the pixel opening AP1 and covers the lower electrode LE1. The upper electrode UE1 covers the organic layer OR1 and faces the lower electrode LE1. The organic layer OR1 is disposed between the lower electrode LE1 and the upper electrode UE1.

[0073] The organic layer OR2 passes through the pixel opening AP2 and covers the lower electrode LE2. The upper electrode UE2 covers the organic layer OR2 and is opposite to the lower electrode LE2. The organic layer OR3 passes through the pixel opening AP3 and covers the lower electrode LE3. The upper electrode UE3 covers the organic layer OR3 and is opposite to the lower electrode LE3. The upper electrodes UE1, UE2, and UE3 are in contact with the side of the lower portion 61 of the partition wall 6.

[0074] The display element DE1 includes a cap layer CP1 disposed on the upper electrode UE1. The display element DE2 includes a cap layer CP2 disposed on the upper electrode UE2. The display element DE3 includes a cap layer CP3 disposed on the upper electrode UE3. The cap layers CP1, CP2, and CP3 respectively function as optical adjustment layers for improving the extraction efficiency of light emitted by the organic layers OR1, OR2, and OR3.

[0075] In the following description, the multilayer body including the organic layer OR1, the upper electrode UE1 and the cover layer CP1 is referred to as the stacked film FL1, the multilayer body including the organic layer OR2, the upper electrode UE2 and the cover layer CP2 is referred to as the stacked film FL2, and the multilayer body including the organic layer OR3, the upper electrode UE3 and the cover layer CP3 is referred to as the stacked film FL3.

[0076] A portion of the laminate film FL1 is located above the upper portion 62. This portion is separated from the portion of the laminate film FL1 located below the partition wall 6 (the portion constituting the display element DE1). Similarly, a portion of the laminate film FL2 is located above the upper portion 62, and this portion is separated from the portion of the laminate film FL2 located below the partition wall 6 (the portion constituting the display element DE2). In addition, a portion of the laminate film FL3 is located above the upper portion 62, and this portion is separated from the portion of the laminate film FL3 located below the partition wall 6 (the portion constituting the display element DE3).

[0077] Seal layers SE1, SE2, and SE3 are respectively arranged in sub-pixels SP1, SP2, and SP3. Seal layer SE1 continuously covers cap layer CP1 and partition walls 6 around sub-pixel SP1. Seal layer SE2 continuously covers cap layer CP2 and partition walls 6 around sub-pixel SP2. Seal layer SE3 continuously covers cap layer CP3 and partition walls 6 around sub-pixel SP3.

[0078] exist Figure 3 In the example shown, the laminated film FL1 and the sealing layer SE1 on the partition wall 6 between the sub-pixels SP1 and SP2 are separated from the laminated film FL2 and the sealing layer SE2 on the partition wall 6. In addition, the laminated film FL1 and the sealing layer SE1 on the partition wall 6 between the sub-pixels SP1 and SP3 are separated from the laminated film FL3 and the sealing layer SE3 on the partition wall 6.

[0079] The sealing layers SE1, SE2, and SE3 are covered by the resin layer 13. The resin layer 13 is covered by the sealing layer 14. The sealing layer 14 is covered by the resin layer 15. The resin layers 13, 15, and the sealing layer 14 are continuously provided at least in the entire display area DA, and a part of them also reaches the peripheral area SA.

[0080] A cover member such as a polarizing plate, a touch panel, a protective film or a cover glass may be further disposed on the resin layer 15. Such a cover member may be bonded to the resin layer 15 via an adhesive layer such as OCA (Optical Clear Adhesive).

[0081] The insulating layer 12 is formed of an organic insulating material such as polyimide. The inorganic insulating layer 5 and the sealing layer 14, SE1, SE2, SE3 are formed of an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2O3).

[0082] In one example, the inorganic insulating layer 5 is formed of silicon oxynitride, and the sealing layers 14, SE1, SE2, and SE3 are formed of silicon nitride. The resin layers 13 and 15 are formed of a resin material (organic insulating material) such as epoxy resin or acrylic resin.

[0083] The lower electrodes LE1, LE2, and LE3 include a reflective layer formed of, for example, silver, and a pair of conductive oxide layers covering the upper and lower surfaces of the reflective layer, respectively. Each conductive oxide layer may be formed of, for example, a transparent conductive oxide such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), or IGZO (Indium Gallium Zinc Oxide).

[0084] The upper electrodes UE1, UE2, UE3 are formed of a metal material such as an alloy of magnesium and silver (MgAg), etc. For example, the lower electrodes LE1, LE2, LE3 correspond to anodes, and the upper electrodes UE1, UE2, UE3 correspond to cathodes.

[0085] Figure 4 1 is a diagram showing an example of a layer structure that can be applied to the organic layers OR1, OR2, and OR3. The organic layers OR1, OR2, and OR3 are composed of a plurality of thin films including a light-emitting layer EML.

[0086] In this embodiment, it is assumed that the organic layers OR1, OR2, and OR3 have a structure in which a hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, a light-emitting layer EML, a hole blocking layer HBL, an electron transport layer ETL, and an electron injection layer EIL are stacked in this order along the Z direction. However, the organic layers OR1, OR2, and OR3 may also have other structures such as a so-called tandem structure including a plurality of light-emitting layers EML.

[0087] Covering layers CP1, CP2, CP3 ( Figure 3 For example, the transparent layer may have a laminated structure formed by overlapping a plurality of transparent layers. These transparent layers may include a layer formed by an inorganic material and a layer formed by an organic material. In addition, these transparent layers have different refractive indices.

[0088] For example, the refractive index of these transparent layers is different from the refractive index of the upper electrodes UE1, UE2, UE3 and the refractive index of the sealing layers SE1, SE2, SE3. It should be noted that at least one of the cap layers CP1, CP2, CP3 may be omitted.

[0089] The bottom layer 63 and the axial layer 64 of the partition wall 6 ( Figure 3 As the metal material of the bottom layer 63, for example, molybdenum, titanium, titanium nitride (TiN), molybdenum-tungsten alloy (MoW) or molybdenum-niobium alloy (MoNb) can be used.

[0090] As the metal material of the shaft layer 64, for example, aluminum, aluminum-neodymium alloy (AlNd), aluminum-yttrium alloy (AlY) or aluminum-silicon alloy (AlSi) can be used. It should be noted that the shaft layer 64 may also be formed of an insulating material.

[0091] For example, the upper portion 62 of the partition wall 6 has a laminated structure of a lower layer formed of a metal material and an upper layer formed of a conductive oxide. As the metal material forming the lower layer, for example, titanium, titanium nitride, molybdenum, tungsten, molybdenum-tungsten alloy or molybdenum-niobium alloy can be used. As the conductive oxide forming the upper layer, for example, ITO or IZO can be used. It should be noted that the upper portion 62 may also have a single-layer structure of a metal material. In addition, the upper portion 62 may also include a layer formed of an insulating material.

[0092] A common voltage is supplied to the partition wall 6. The common voltage is supplied to the upper electrodes UE1, UE2, UE3 in contact with the side surface of the lower portion 61. Pixel voltages corresponding to the video signals of the signal lines SL are supplied to the lower electrodes LE1, LE2, LE3 through the pixel circuits 1 of the sub-pixels SP1, SP2, SP3.

[0093] The organic layers OR1, OR2, and OR3 emit light in response to the application of voltage. Specifically, if a potential difference is formed between the lower electrode LE1 and the upper electrode UE1, the light-emitting layer EML of the organic layer OR1 emits light in the blue band. If a potential difference is formed between the lower electrode LE2 and the upper electrode UE2, the light-emitting layer EML of the organic layer OR2 emits light in the green band. If a potential difference is formed between the lower electrode LE3 and the upper electrode UE3, the light-emitting layer EML of the organic layer OR3 emits light in the red band.

[0094] As another example, the light-emitting layers EML of the organic layers OR1, OR2, and OR3 may also emit light of the same color (e.g., white). In this case, the display device DSP may also include a color filter that converts the light emitted by the light-emitting layer EML into light of a color corresponding to the sub-pixels SP1, SP2, and SP3. In addition, the display device DSP may also include a layer including quantum dots that are excited by the light emitted by the light-emitting layer EML to generate light of a color corresponding to the sub-pixels SP1, SP2, and SP3.

[0095] Figure 3 The circuit layer 11 , the insulating layer 12 , and the inorganic insulating layer 5 shown are arranged over the display area DA and the peripheral area SA.

[0096] Next, a display device mother substrate 100 for collectively manufacturing a plurality of display device DSPs will be described.

[0097] Figure 5 1 is a plan view showing an example of a display device mother substrate 100 according to the present embodiment. The display device mother substrate 100 includes a plurality of panel portions PP and a plurality of blank portions MP outside the panel portions PP on a large substrate 10 .

[0098] In the present embodiment, the shape of the large substrate 10 in plan view is a rectangle, but the shape of the large substrate 10 in plan view is not limited to a rectangle, and may be other shapes such as a square, a circle, or an ellipse.

[0099] The plurality of panel portions PP are arranged in a matrix in the X direction and the Y direction. Each of the panel portions PP is taken out by cutting the display device mother substrate 100 along a cutting line (not shown).

[0100] Each of the panel parts PP taken out is equivalent to Figure 1 The display panel PNL of the display device DSP shown in the figure has a plurality of pads PD electrically connected to a test element group (Test Element Group) and the like and a window portion WP arranged in the blank portion MP.

[0101] Figure 6 It is a top view showing a configuration example of the pad PD. Figure 6 The pad PD shown is equivalent to Figure 1 The pad PD in the peripheral area SA shown, or Figure 5 The pad PD in the blank portion MP is shown.

[0102] Inorganic insulating layer 5 ( Figure 3 The organic insulating layer IL at least comprises Figure 3 The organic insulating layer IL and the inorganic insulating layer 5 are arranged in each of the panel portion PP and also arranged over the blank portion MP. When focusing on the panel portion PP, the organic insulating layer IL and the inorganic insulating layer 5 are arranged over the display area DA and the peripheral area SA.

[0103] In the peripheral area SA and the blank portion MP, the organic insulating layer IL has an opening OP1 and the inorganic insulating layer 5 has an opening OP2. The opening OP1 is indicated by a dotted line and the opening OP2 is indicated by a solid line.

[0104] Circuit layer 11 ( Figure 3 The metal layer MT shown in FIG. 1 includes a metal layer MT. The metal layer MT shown in a single-dot chain line corresponds to the electrode of the pad PD. The metal layer MT overlaps with the opening OP1 of the organic insulating layer IL and the opening OP2 of the inorganic insulating layer 5. The portion of the organic insulating layer IL that does not overlap with the opening OP1 is marked with a dot.

[0105] The area of ​​the opening OP2 is smaller than the area of ​​the opening OP1 in a plan view. The portions of the metal layer MT exposed from the opening OP1 and the opening OP2 are indicated by oblique lines. The peripheral portion of the metal layer MT is covered by the organic insulating layer IL and the inorganic insulating layer 5 .

[0106] The openings OP1 and OP2 have a quadrilateral shape when viewed from above, for example. The quadrilateral shape includes a rectangular shape, a square shape, a rhombus shape, a trapezoidal shape, a parallelogram shape, etc. As an example, the openings OP1 and OP2 have a square shape when viewed from above. The distances of the opening OP1 in the X direction and the Y direction are, for example, about 400 μm, but are not limited to this example.

[0107] like Figure 6As shown, the opening OP1 has an edge 30. The edge 30 of the opening OP1 is a step portion. The edge 30 includes a pair of edges 31 (first edges) extending in the X direction, a pair of edges 33 (second edges) extending in the Y direction, and a rounded corner portion 35. The rounded corner portion 35 is an example of a corner portion connecting the edge 31 and the edge 33. The edge 30 includes four rounded corner portions 35.

[0108] Figure 7 FIG. 1 is a plan view showing a configuration example of a region including a pad PD in the peripheral region SA or the blank portion MP. Figure 7 In the example shown, four pads PD are arranged. Each of the pads PD in the metal layer MT is exposed from the opening OP1 and the opening OP2 .

[0109] The display device mother substrate 100 (display device DSP) further includes: a conductive partition wall 7 (second partition wall) and a conductive partition wall 8. These partition walls 7 and 8 are arranged above the organic insulating layer IL in the peripheral area SA or the blank portion MP. The partition wall 7 is arranged outside the opening OP1 along the edge 30 of the opening OP1. The partition wall 7 surrounds the opening OP1, for example.

[0110] The partition wall 8 is arranged in the cross-shaped region between the four pads PD. The partition wall 8 is also arranged in the peripheral region of the four pads PD. Figure 7 In the example shown, the partition wall 8 is formed in a lattice shape. Figure 2 The grid-like partition walls 6 shown are formed in the same pattern. In addition, the partition walls 7 and 8 are not formed in the region overlapping with the opening OP1.

[0111] Figure 8 FIG. 1 is a plan view showing a configuration example of a region including a window portion WP in the peripheral region SA or the blank portion MP. Figure 8 In the example shown, a region including one window portion WP is shown.

[0112] The organic insulating layer IL has an opening OP3. The window portion WP is formed by the organic insulating layer IL having the opening OP3. Figure 8 In FIG. 1 , the opening OP3 is indicated by a dotted line. The portion of the organic insulating layer IL that does not overlap with the opening OP3 is marked with a dot.

[0113] The opening OP3 has, for example, a quadrangular shape in a plan view. As an example, the opening OP3 has a rectangular shape that is long in the Y direction in a plan view.

[0114] like Figure 8As shown, the opening OP3 has an edge 40. The edge 40 includes a pair of edges 41 (first edges) extending in the X direction, a pair of edges 43 (second edges) extending in the Y direction, and a rounded corner portion 45 connecting the edges 41 and 43. The rounded corner portion 45 is an example of a corner portion connecting the edge 41 and the edge 43. The edge 40 includes four rounded corner portions 45.

[0115] In the window portion WP, a plurality of (eg, three) marks MA are arranged in a region overlapping with the opening OP3. The marks MA are marks used, for example, in the manufacturing process for the purpose of improving accuracy.

[0116] The marker MA is, for example, included in the circuit layer 11 ( Figure 3 The mark MA is formed by combining graphics, text, symbols, etc. The mark MA includes, for example, a mark M1 formed by graphics and a mark M2 formed by text. It should be noted that the mark MA is not limited to these examples.

[0117] The partition wall 7 is also arranged outside the opening OP3 similarly to the opening OP1. That is, the partition wall 7 is arranged outside the opening OP3 along the edge 40 of the opening OP3. The partition wall 7 surrounds the opening OP3, for example. The partition wall 7 is not formed in the region overlapping with the opening OP3.

[0118] Fig. 9 It is shown Figure 7 and Figure 8 A schematic partial enlarged view of section IX in FIG. Fig. 9 FIG. 4 shows a region including one of the plurality of rounded corners 35 and 45, but the structure of the region including the other rounded corners 35 and 45 is also the same as FIG. Fig. 9 It's the same.

[0119] like Fig. 9 As shown, the rounded corners 35 and 45 have an arc shape in a plan view. In other words, the rounded corners 35 and 45 have a curvature radius R1. The curvature radius R1 of the rounded corners 35 and 45 is, for example, greater than the thickness of the organic insulating layer IL. The curvature radius R1 of the rounded corners 35 and 45 is, for example, preferably greater than 25 μm.

[0120] As described above, the partition wall 7 is arranged along the edges 30 and 40 of the openings OP1 and OP3. When focusing on the rounded corners 35 and 45, at least a part of the partition wall 7 is arranged outside the rounded corners 35 and 45 (corner portions).

[0121] Focusing on the opening OP1, the partition wall 7 is arranged outside the rounded corner 35 and outside the edges 31 and 33. Focusing on the opening OP3, the partition wall 7 is arranged outside the rounded corner 45 and outside the edges 41 and 43.

[0122] Next, a configuration example of the mother substrate 100 for a display device including the opening OP1 will be described.

[0123] Fig.10 It is along Figure 7 A schematic cross-sectional view of a display device mother substrate 100 taken along line XX in FIG. Figure 3 ) includes an insulating layer 111, a wiring layer 112, an insulating layer 113, an insulating layer 114 and a metal layer MT.

[0124] The insulating layer 111 is an inorganic insulating layer, and is disposed on the substrate 10. The wiring layer 112 is provided on the insulating layer 111. The insulating layer 113 is an inorganic insulating layer, and is disposed on the wiring layer 112.

[0125] In the pad PD, the wiring layer 112 is exposed from the insulating layer 113. The insulating layer 114 is an organic insulating layer, and is disposed on the insulating layer 113. The metal layer MT is provided on the insulating layer 113 and the insulating layer 114, and is in contact with the wiring layer 112 in the pad PD.

[0126] Thus, the metal layer MT is electrically connected to the wiring layer 112. The insulating layer 111, the wiring layer 112, the insulating layer 113, the insulating layer 114, and the metal layer MT are included in Figure 3 In the circuit layer 11 shown. It should be noted that the circuit layer 11 may include an insulating layer and a conductive layer in addition to the layers shown in the figure.

[0127] The insulating layer 12 is an organic insulating layer, and is disposed on the insulating layer 114 and the metal layer MT. The organic insulating layer IL includes the insulating layer 114 and the insulating layer 12. That is, the organic insulating layer IL is disposed above the substrate 10. The insulating layer 12 has an opening OP1 exposing the metal layer MT. The opening OP1 corresponds to the opening of the organic insulating layer IL.

[0128] The inorganic insulating layer 5 covers the insulating layer 12 and is in contact with the metal layer MT. The inorganic insulating layer 5 has an opening OP2 overlapping with the opening OP1. The metal layer MT is exposed from the inorganic insulating layer 5 in the opening OP2.

[0129] The partition walls 7 and 8 are arranged above the organic insulating layer IL. The partition walls 7 and 8 have conductive lower portions 71 and 81 arranged above the inorganic insulating layer 5 and upper portions 72 and 82 arranged above the lower portions 71 and 81. The upper portions 72 and 82 have a greater width than the lower portions 71 and 81.

[0130] Both ends of the upper portions 72 and 82 protrude from the side surfaces of the lower portions 71 and 81. Figure 3 The lower part 71, 81 can also be connected with the partition wall 6 shown in FIG. Figure 3 The partition walls 6 shown similarly each include a base layer arranged on the inorganic insulating layer 5 and a shaft layer arranged on the base layer.

[0131] The partition walls 7 and 8 may be formed in the same process as the partition walls 6. In this case, the lower portions 71 and 81 are formed of the same material as the lower portion 61, and the upper portions 72 and 82 are formed of the same material as the upper portion 62.

[0132] Next, another configuration example will be described regarding the cross-sectional structure of the mother substrate 100 for a display device including the opening OP1 .

[0133] Fig.11 1 is a schematic cross-sectional view showing another configuration example of the mother substrate 100 for a display device. Fig.10 Compared with the configuration example shown, Fig.11 The structure example shown is different in that the organic insulating layer IL has a step-shaped cross section.

[0134] The organic insulating layer IL includes an insulating layer 114 and an insulating layer 12. The insulating layer 12 includes an opening OP1. When focusing on the cross-sectional shape of the organic insulating layer IL, the organic insulating layer IL has a step-shaped cross-section in which the thickness decreases toward the opening OP1.

[0135] The thickness T1 of the organic insulating layer IL is the sum of the thickness of the insulating layer 114 and the thickness of the insulating layer 12 , and corresponds to the distance along the Z direction from the upper surface of the insulating layer 113 to the substantially flat upper surface 121A of the insulating layer 12 .

[0136] The thickness T2 of the organic insulating layer IL is the thickness of the insulating layer 12 between the insulating layer 114 and the opening OP1, and is equivalent to the distance along the Z direction from the upper surface of the metal layer MT to the substantially flat upper surface 122A of the insulating layer 12. The thickness T2 is smaller than the thickness T1. The upper surface 122A is located between the upper surface 121A and the opening OP1. The upper surface 122A is located below the upper surface 121A.

[0137] The partition walls 7 and 8 are arranged on the inorganic insulating layer 5 above the organic insulating layer IL. Fig.11 In the example shown, partition wall 7 is disposed above upper surface 121A, but is not disposed above upper surface 122A. However, partition wall 7 may be disposed above upper surface 122A.

[0138] The organic insulating layer IL having a stepped cross section can be formed, for example, by the following method: First, the insulating layer 114 is formed on the insulating layer 113. Then, the metal layer MT is formed. Then, the insulating layer 12 having the opening OP1, the upper surface 121A, and the upper surface 122A is formed.

[0139] Such an insulating layer 12 can be formed, for example, by the following method. On the entire surface of the display device mother substrate 100 formed with the metal layer MT, an insulating layer is formed, for example, using a positive organic material. Then, the insulating layer is exposed. In this exposure process, the exposure amount of the opening OP1 is set to the maximum, and the exposure amount is set to decrease in stages from the opening OP1 toward the outside. Then, the exposed insulating layer is developed. Then, the insulating layer is fired. Thus, an organic insulating layer IL having the above-mentioned cross-sectional shape is formed.

[0140] Fig.12 1 is a schematic cross-sectional view showing another configuration example of the mother substrate 100 for a display device. Fig.11 Compared with the configuration example shown, Fig.12 The illustrated configuration example is different in that the inorganic insulating layer 5 does not have an opening. The inorganic insulating layer 5 covers the insulating layer 12 and covers the metal layer MT exposed from the opening OP1. In other words, the metal layer MT is not exposed.

[0141] Fig.13 1 is a schematic cross-sectional view showing another configuration example of the mother substrate 100 for a display device. Fig.11 Compared with the configuration example shown, Fig.13 The illustrated configuration example is different in that the insulating layer 114 extends further toward the pad PD than the insulating layer 12. The insulating layer 114 has an opening OP1. When focusing on the cross-sectional shape of the organic insulating layer IL, the organic insulating layer IL has a step-shaped cross-section in which the thickness decreases toward the opening OP1.

[0142] The thickness T1 of the organic insulating layer IL is the sum of the thickness of the insulating layer 114 and the thickness of the insulating layer 12, which is equivalent to the distance along the Z direction from the upper surface of the insulating layer 113 to the substantially flat upper surface 12A of the insulating layer 12. The thickness T2 of the organic insulating layer IL is the thickness of the insulating layer 114 between the insulating layer 12 and the opening OP1, which is equivalent to the distance along the Z direction from the upper surface of the wiring layer 112 to the substantially flat upper surface 114A of the insulating layer 114. The thickness T2 is smaller than the thickness T1. The upper surface 114A is located between the upper surface 12A and the opening OP1. The upper surface 114A is located below the upper surface 12A.

[0143] exist Fig.13 In the example shown, partition wall 7 is disposed above upper surface 12A, but is not disposed above upper surface 114A. However, partition wall 7 may be disposed above upper surface 114A.

[0144] The organic insulating layer IL having a stepped cross section can be formed, for example, by the following method. First, an insulating layer 114 having an opening OP1 and an upper surface 114A is formed on the insulating layer 113. Then, a metal layer MT is formed. Then, an insulating layer 12 having an upper surface 12A is formed. Thus, an organic insulating layer IL having the above-described cross-sectional shape is formed.

[0145] Fig.14 1 is a schematic cross-sectional view showing another configuration example of the mother substrate 100 for a display device. Fig.13 Compared with the configuration example shown, Fig.14 The illustrated configuration example is different in that the inorganic insulating layer 5 does not have an opening.

[0146] Fig.15 1 is a schematic cross-sectional view showing another configuration example of the mother substrate 100 for a display device. Fig.11 Compared with the configuration example shown, Fig.15 The illustrated configuration example is different in that the organic insulating layer IL having a stepped cross section is a single layer body of the insulating layer 12. In other words, the organic insulating layer IL does not include the insulating layer 114. The insulating layer 12 has an opening OP1.

[0147] The thickness T1 of the organic insulating layer IL corresponds to the distance along the Z direction from the upper surface of the insulating layer 113 to the substantially flat upper surface 121A of the insulating layer 12. The thickness T2 of the organic insulating layer IL corresponds to the distance along the Z direction from the upper surface of the metal layer MT to the substantially flat upper surface 122A of the insulating layer 12. The thickness T2 is smaller than the thickness T1. The upper surface 122A is located between the upper surface 121A and the opening OP1. The upper surface 122A is located below the upper surface 121A.

[0148] The partition walls 7 and 8 are arranged on the inorganic insulating layer 5 above the organic insulating layer IL. Fig.15 In the example shown, partition wall 7 is disposed above upper surface 121A, but is not disposed above upper surface 122A. However, partition wall 7 may be disposed above upper surface 122A.

[0149] The insulating layer 12 can be formed, for example, by the following method. On the entire surface of the display device mother substrate 100 formed with the metal layer MT, an insulating layer is formed, for example, using a positive organic material. Then, the insulating layer is exposed. In this exposure process, the exposure amount of the opening OP1 is set to the maximum, and the exposure amount is set to decrease in stages from the opening OP1 toward the outside. Then, the exposed insulating layer is developed. Then, the insulating layer is fired. Thus, an insulating layer 12 (organic insulating layer IL) having the above-mentioned cross-sectional shape is formed.

[0150] Fig.161 is a schematic cross-sectional view showing another configuration example of the mother substrate 100 for a display device. Fig.15 Compared with the configuration example shown, Fig.16 The illustrated configuration example is different in that the inorganic insulating layer 5 does not have an opening.

[0151] Next, a configuration example of the mother substrate 100 for a display device including the opening OP3 will be described.

[0152] Fig.17 It is along Figure 8 Schematic cross-sectional view of a mother substrate 100 for a display device taken along line XVII-XVII in FIG. The insulating layer 114 is disposed on the substrate 10. The insulating layer 12 is disposed on the insulating layer 114. The insulating layer 12 has an opening OP3 that exposes the insulating layer 114. In other words, the insulating layer 114 does not have an opening at a position overlapping with the opening OP3.

[0153] The organic insulating layer IL includes an insulating layer 114 and an insulating layer 12. The opening OP3 corresponds to the opening of the organic insulating layer IL. The inorganic insulating layer 5 covers the insulating layer 12 and is in contact with the insulating layer 114 in the opening OP3.

[0154] The partition wall 7 is disposed above the organic insulating layer IL. The partition wall 7 has a lower portion 71 disposed above the inorganic insulating layer 5 and an upper portion 72 disposed above the lower portion 71. The upper portion 72 has a greater width than the lower portion 71.

[0155] Next, another configuration example will be described regarding the cross-sectional structure of the mother substrate 100 for a display device including the window portion WP.

[0156] Fig.18 1 is a schematic cross-sectional view showing another configuration example of the mother substrate 100 for a display device. Fig.17 Compared with the configuration example shown, Fig.18 The illustrated configuration example is different in that insulating layer 111 and insulating layer 113 are provided and insulating layer 114 has an opening.

[0157] The insulating layer 111 is disposed on the substrate 10. The insulating layer 113 is disposed on the insulating layer 111. The insulating layer 114 is disposed on the insulating layer 113. The insulating layer 12 covers the insulating layer 114 and has an opening OP3 in a region in contact with the insulating layer 113. In other words, the insulating layer 114 has an opening at a position overlapping with the opening OP3.

[0158] exist Fig.18 In the example shown, the organic insulating layer IL has Fig.11The thickness T1 of the organic insulating layer IL is the sum of the thickness of the insulating layer 114 and the thickness of the insulating layer 12 , and corresponds to the distance from the upper surface of the insulating layer 113 to the substantially flat upper surface 121A of the insulating layer 12 in the Z direction.

[0159] The thickness T2 of the organic insulating layer IL is the thickness of the insulating layer 12, and corresponds to the distance along the Z direction from the upper surface of the insulating layer 113 to the substantially flat upper surface 122A of the insulating layer 12. The thickness T2 is smaller than the thickness T1. The upper surface 122A is located between the upper surface 121A and the opening OP3. The upper surface 122A is located below the upper surface 121A.

[0160] The inorganic insulating layer 5 covers the insulating layer 12 and covers the insulating layer 113 in the opening OP3. The partition wall 7 is arranged above the organic insulating layer IL. Fig.18 In the example shown, partition wall 7 is disposed above upper surface 121A, but is not disposed above upper surface 122A. However, partition wall 7 may be disposed above upper surface 122A.

[0161] Fig.19 1 is a schematic cross-sectional view showing another configuration example of the mother substrate 100 for a display device. Fig.18 Compared with the configuration example shown, Fig.19 The illustrated configuration example is different in that the insulating layer 111 and the insulating layer 113 are omitted.

[0162] The insulating layer 114 is disposed on the substrate 10. The insulating layer 12 covers the insulating layer 114 and has an opening OP3 in a region in contact with the substrate 10. The inorganic insulating layer 5 covers the substrate 10 in the opening OP3.

[0163] Fig. 20 1 is a schematic cross-sectional view showing another configuration example of the mother substrate 100 for a display device. Fig.19 Compared with the configuration example shown, Fig. 20 The structure example shown is different in that the inorganic insulating layer 5 is omitted. The partition wall 7 is arranged on the insulating layer 12 .

[0164] Fig.21 1 is a schematic cross-sectional view showing another configuration example of the mother substrate 100 for a display device. Fig.18 Compared with the configuration example shown, Fig. 20 The illustrated configuration example is different in that the insulating layer 114 extends further toward the center of the opening OP3 than the insulating layer 12. The insulating layer 114 has the opening OP3.

[0165] exist Fig.21 In the example shown, the organic insulating layer IL has Fig.13The thickness T1 of the organic insulating layer IL is the sum of the thickness of the insulating layer 114 and the thickness of the insulating layer 12 , and corresponds to the distance from the upper surface of the insulating layer 113 to the substantially flat upper surface 12A of the insulating layer 12 in the Z direction.

[0166] The thickness T2 of the organic insulating layer IL is the thickness of the insulating layer 114 exposed from the insulating layer 12, and is equivalent to the distance along the Z direction from the upper surface of the insulating layer 113 to the substantially flat upper surface 114A of the insulating layer 114. The thickness T2 is smaller than the thickness T1. The upper surface 114A is located between the upper surface 12A and the opening OP3. The upper surface 114A is located below the upper surface 12A.

[0167] The inorganic insulating layer 5 covers the insulating layer 12, covers the insulating layer 114 exposed from the insulating layer 12, and covers the insulating layer 113 in the opening OP3. The partition wall 7 is arranged above the organic insulating layer IL. Fig. 20 In the example shown, partition wall 7 is disposed above upper surface 12A, but is not disposed above upper surface 114A. However, partition wall 7 may be disposed above upper surface 114A.

[0168] Fig. 22 1 is a schematic cross-sectional view showing another configuration example of the mother substrate 100 for a display device. Fig.21 Compared with the configuration example shown, Fig. 22 The illustrated configuration example is different in that the insulating layer 111 and the insulating layer 113 are omitted. The insulating layer 114 is disposed on the substrate 10 and has an opening OP3. The inorganic insulating layer 5 covers the substrate 10 in the opening OP3.

[0169] Fig.23 1 is a schematic cross-sectional view showing another configuration example of the mother substrate 100 for a display device. Fig. 22 Compared with the configuration example shown, Fig.23 The structure example shown is different in that the inorganic insulating layer 5 is omitted. The partition wall 7 is arranged on the insulating layer 12 .

[0170] Fig.24 1 is a schematic cross-sectional view showing another configuration example of the mother substrate 100 for a display device. Fig.18 Compared with the configuration example shown, Fig.24 The illustrated configuration example is different in that the organic insulating layer IL having a stepped cross section is a single layer body of the insulating layer 12. In other words, the organic insulating layer IL does not include the insulating layer 114. The insulating layer 12 has an opening OP3.

[0171] exist Fig.24 In the example shown, the organic insulating layer IL has Fig.15The organic insulating layer IL has the same cross-sectional shape as shown. The thickness T1 of the organic insulating layer IL corresponds to the distance from the upper surface of the insulating layer 113 to the substantially flat upper surface 121A of the insulating layer 12 along the Z direction.

[0172] The thickness T2 of the organic insulating layer IL corresponds to the distance along the Z direction from the upper surface of the insulating layer 113 to the substantially flat upper surface 122A of the insulating layer 12. The thickness T2 is smaller than the thickness T1. The upper surface 122A is located between the upper surface 121A and the opening OP3. The upper surface 122A is located below the upper surface 121A.

[0173] The inorganic insulating layer 5 covers the insulating layer 12 and covers the insulating layer 113 in the opening OP3. The partition wall 7 is arranged above the organic insulating layer IL. Fig.24 In the example shown, partition wall 7 is disposed above upper surface 121A, but is not disposed above upper surface 122A. However, partition wall 7 may be disposed above upper surface 122A.

[0174] Fig.25 1 is a schematic cross-sectional view showing another configuration example of the mother substrate 100 for a display device. Fig.24 Compared with the configuration example shown, Fig.25 The illustrated configuration example is different in that the insulating layer 111 and the insulating layer 113 are omitted. The insulating layer 12 corresponding to the organic insulating layer IL is disposed on the substrate 10 and has an opening OP3. The inorganic insulating layer 5 covers the substrate 10 in the opening OP3.

[0175] Fig.26 1 is a schematic cross-sectional view showing another configuration example of the mother substrate 100 for a display device. Fig.25 Compared with the configuration example shown, Fig.26 The structure example shown is different in that the inorganic insulating layer 5 is omitted. The insulating layer 12 corresponding to the organic insulating layer IL is arranged on the substrate 10 and has an opening OP3. The partition wall 7 is arranged on the insulating layer 12.

[0176] Specifically, the display device mother substrate 100 (display device DSP) includes partition walls 7 disposed along edges 30 and 40 of the openings OP1 and OP3 outside the openings OP1 and OP3 in the peripheral area SA and the blank portion MP.

[0177] The laminated films FL1, FL2, FL3 ( Figure 3As shown in FIG. 1 , the adhesion between the laminated film FL1, FL2, FL3 and the sealing layer SE1, SE2, SE3 thereon is weak, and thus may be peeled off from the substrate during the manufacturing process of the display device DSP. If such peeling is extended, the laminated films FL1, FL2, FL3 and the sealing layers SE1, SE2, SE3 thereon may be peeled off, which may cause contamination of the chamber of the production line, etc.

[0178] In this embodiment, the stacked films FL1, FL2, and FL3 are cut off by the overhanging partition wall 7. Therefore, even if peeling occurs in the stacked films FL1, FL2, and FL3, its range is not easy to expand. In addition, the stacked films FL1, FL2, and FL3 cut off by the partition wall 7 are pressed by the sealing layers SE1, SE2, and SE3 formed in a manner that intrudes below the upper portion 72 of the partition wall 7, so they are not easy to peel off.

[0179] The laminated films FL1, FL2, FL3 are easily peeled off at the edges 30, 40 of the openings OP1, OP3. Specifically, the laminated films FL1, FL2, FL3 are easily peeled off starting from the corners of the edges 30, 40 of the openings OP1, OP3.

[0180] According to the present embodiment, the partition wall 7 surrounds at least a portion of the corner portion in the peripheral area SA and the blank portion MP. This can suppress the laminated films FL1, FL2, and FL3 from peeling off at portions that are likely to become peeling starting points.

[0181] In the present embodiment, the radius of curvature R1 of the rounded corners 35 and 45 is 25 μm or more. When the corners are in a right-angle shape, the side surfaces of the organic insulating layer IL forming the corners become steeper than the edges 31 and 32 .

[0182] Such a shape of the organic insulating layer IL may cause residues to be generated from the components constituting the partition wall 7 inside the opening OP1 during the manufacturing process. Such residues become a starting point, causing the laminated films FL1, FL2, and FL3 to be easily peeled off. The larger the radius of curvature R1 of the fillet 35 and 45, the less likely the residues are to be generated. When the radius of curvature R1 of the fillet 35 and 45 reaches about 20 μm, the residues are confirmed.

[0183] By setting the curvature radius R1 to be 25 μm or more as in the rounded corners 35 and 45, the shape of the side surface of the organic insulating layer IL at the rounded corners 35 and 45 can be made gentle. This makes it difficult for the above-mentioned residue to be generated in the manufacturing process. As a result, the rounded corners 35 and 45 are unlikely to become the starting point for peeling of the laminated films FL1, FL2, and FL3.

[0184] As described above, according to the configuration of this embodiment, according to this embodiment, it is possible to suppress the peeling of the laminated films FL1, FL2, and FL3, and improve the yield rate in the manufacturing process. In addition, according to this embodiment, various preferable effects can be obtained.

[0185] Next, other examples of the openings OP1, OP3 and the partition wall 7 in the peripheral area SA and the blank portion MP are described. Hereinafter, the region including the pad PD is mainly described, but the configuration examples of the embodiments described below can also be applied to the region including the window portion WP. In the configuration of the following embodiments, for the portions not specifically mentioned, the same configuration as the first embodiment can be applied.

[0186] [Second embodiment]

[0187] Fig. 27 1 is a schematic plan view showing a region including the pad PD in the peripheral region SA or the blank portion MP in the present embodiment. Fig.28 yes Fig. 27 A partial enlarged view of part XXVIII in FIG. Figure 7 Compared with the configuration example shown, Fig. 27 The shape of the partition walls 7 in the examples shown is different.

[0188] like Fig. 27 As shown, the partition wall 7 surrounds the opening OP1 on the outside of the opening OP1. The partition wall 7 includes a pair of partition wall portions 7X extending in the X direction, a pair of partition wall portions 7Y extending in the Y direction, and a partition wall portion 7Z connecting the partition wall portions 7X and 7Y.

[0189] like Fig.28 As shown in FIG. 1 , the partition wall 7Z has an arc shape in a plan view. The partition wall 7Z has a predetermined radius of curvature. When focusing on the rounded corner 35 , the partition wall 7Z is arranged along the rounded corner 35 .

[0190] The partition wall 7 is arranged at a certain distance from the edge 30 of the opening OP1. Specifically, the partition wall portion 7X is arranged at a certain distance from the edge 31, the partition wall portion 7Y is arranged at a certain distance from the edge 33, and the partition wall portion 7Z is arranged at a certain distance from the rounded corner portion 35. The distance here refers to the distance along the normal direction of the edge 30.

[0191] In other words, the partition wall 7 is arranged parallel to the edge 30 of the opening OP1. In this case, the distance W1 ( Fig.28 ) is substantially constant along the edge 30 of the opening OP1.

[0192] The configuration of this embodiment can also achieve the same effects as those of the first embodiment. In this embodiment, the partition wall 7 is arranged at a certain distance from the edge 30 of the opening OP1. More specifically, the distance between the partition wall portion 7Z of the partition wall 7 and the rounded corner portion 35 of the edge 30 is constant.

[0193] The greater the distance between the partition wall 7 and the edge 30, the easier it is for the laminated films FL1, FL2, and FL3 to peel off. By forming the partition wall portion 7Z in an arc shape, the distance between the partition wall portion 7Z and the rounded corner portion 35 is constant, thereby reducing the distance between the partition wall 7 and the edge 30 compared to the first embodiment.

[0194] Thus, the peeling of the laminated films FL1, FL2, and FL3 at the corners that are likely to become the starting point of peeling can be further suppressed. In addition, even if peeling occurs between the partition wall portion 7Z and the rounded corner portion 35, the partition wall 7 can suppress the expansion of the peeling and reduce the range of the peeling. As a result, the yield rate in the manufacturing process can be improved.

[0195] [Third Embodiment]

[0196] Fig.29 1 is a schematic plan view showing a region including the pad PD in the peripheral region SA or the blank portion MP in the present embodiment. Figure 7 Compared with the configuration example shown, Fig.29 The example shown is different in that the partition wall 7 has a plurality of sections arranged at intervals. The partition wall 7 has sections 7A, 7B, 7C, and 7D. The sections 7A, 7B, 7C, and 7D each have an L shape.

[0197] The segments 7A, 7B, 7C, and 7D are respectively arranged outside the rounded corner portion 35. Gaps G1 are respectively formed between the segments 7A and 7B adjacent in the X direction, between the segments 7C and 7D adjacent in the X direction, between the segments 7A and 7D adjacent in the Y direction, and between the segments 7B and 7C adjacent in the Y direction.

[0198] If we focus on the segment 7A, the segment 7A has an end 7Ax opposite to the segment 7B and an end 7Ay opposite to the segment 7D. Fig.29 As shown, the distance between the edge 33 in the X direction and the end 7Ax is defined as a distance DX, and the distance between the edge 31 in the Y direction and the end 7Ay is defined as a distance DY.

[0199] The segment 7A is formed so that the distance DX and the distance DY are at least 50 μm or more. In this case, the segment 7A is arranged outside at least a part of the rounded corner 35 and the edges 31 and 33 connected to the rounded corner 35 .

[0200] The radius of curvature R1 ( Fig. 9 When the distance DX and the distance DY are 25 μm or more, the segment 7A is formed so that the distance DX and the distance DY are 50 μm or more. Here, the relationship with the opening OP1 is described with attention to the segment 7A, but the segments 7B, 7C, and 7D are also formed with the same structure.

[0201] The configuration of this embodiment can also provide the same effects as those of the first embodiment. In this embodiment, the partition wall 7 includes the sections 7A, 7B, 7C, and 7D that are disposed at intervals.

[0202] When the partition wall 7 is not divided into a plurality of sections, there is a possibility that a resist (for example, a resist for patterning the inorganic insulating layer 5 ) disposed after the partition wall 7 may be poorly formed during the manufacturing process.

[0203] That is, the partition wall 7 suppresses the spread of the resist, and a portion not sufficiently filled with the resist may occur below the upper portion 72 of the partition wall 7. In this case, when the resist is dried under a reduced pressure environment, the space where the resist is not arranged may expand and break.

[0204] By forming the partition wall 7 from a plurality of segments as in the present embodiment, the resist easily spreads through the gap G1, and thus resist shape defects can be suppressed. As a result, the yield in the manufacturing process can be improved.

[0205] [Fourth embodiment]

[0206] Fig.30 1 is a schematic plan view showing a region including the pad PD in the peripheral region SA or the blank portion MP in the present embodiment. Fig. 27 Compared with the configuration example shown, Fig.30 The example shown is different in that the partition wall 7 is composed of a plurality of segments arranged at intervals.

[0207] The partition wall 7 includes sections 7A, 7B, 7C, and 7D. The sections 7A, 7B, 7C, and 7D each have an L-shape. The sections 7A, 7B, 7C, and 7D are disposed outside the rounded corner portion 35 .

[0208] Gaps G1 are formed between the segments 7A and 7B adjacent to each other in the X direction, between the segments 7C and 7D adjacent to each other in the X direction, between the segments 7A and 7D adjacent to each other in the Y direction, and between the segments 7B and 7C adjacent to each other in the Y direction.

[0209] When focusing on the segment 7A, the segment 7A includes: a partition 7X extending in the X direction; a partition 7Y extending in the Y direction; and a partition 7Z connecting the partition 7X and the partition 7Y. The partition 7Z has an arc shape in a plan view and has a predetermined radius of curvature.

[0210] The segment 7A is arranged at a certain distance from the edge 30 of the opening OP1. The distance W1 from the edge 30 of the opening OP1 to the segment 7A is constant along the edge 30 of the opening OP1. Here, the relationship with the opening OP1 is described with attention paid to the segment 7A, but the segments 7B, 7C, and 7D are also formed in the same structure.

[0211] The structure of this embodiment is to use Fig. 27 The structure and use of the second embodiment described Fig.29 The configuration of the third embodiment described above is a combination of the configurations of the present embodiment. The configuration of this embodiment can also achieve the same effects as those of the above-described embodiments.

[0212] [Fifth embodiment]

[0213] Fig.31 1 is a schematic plan view showing a region including the pad PD in the peripheral region SA or the blank portion MP in the present embodiment. Figure 7 Compared with the configuration example shown, Fig.31 The example shown differs in that the edge 30 of the opening OP1 does not have a rounded corner portion.

[0214] The corner portion 37 of the edge 30 is formed by connecting the edge 31 and the edge 33. Fig.13 As shown, the corner portion 37 has a right angle shape. Here, the right angle shape includes not only that the angle formed by the edges 31 and 33 is 90 degrees, but also includes the deviation of the angle caused by the manufacturing process.

[0215] In the configuration of this embodiment as well, the same effects as those of the first embodiment can be obtained.

[0216] [Sixth embodiment]

[0217] Fig.32 1 is a schematic plan view showing a region including the pad PD in the peripheral region SA or the blank portion MP in the present embodiment. Fig.31 Compared with the configuration example shown, Fig.32 The example shown is different in that the partition wall 7 is composed of a plurality of segments arranged at intervals.

[0218] The partition wall 7 has sections 7A, 7B, 7C, and 7D. The sections 7A, 7B, 7C, and 7D each have an L-shape. The sections 7A, 7B, 7C, and 7D are disposed outside the corner portion 37, respectively.

[0219] A gap G1 is formed between the adjacent segments 7A and 7B in the X direction, between the adjacent segments 7C and 7D in the X direction, between the adjacent segments 7A and 7D in the Y direction, and between the adjacent segments 7B and 7C in the Y direction. Focusing on the segment 7A, the segment 7A has an end 7Ax facing the segment 7B and an end 7Ay facing the segment 7D.

[0220] When the corner portion 37 is a right angle, the segment 7A is preferably formed so that the distance DX and the distance DY are both 100 μm or more. Fig. 9 Even when the distance DX and the distance DY are less than 25 μm, it is preferred that the segment 7A be formed so that the distance DX and the distance DY are respectively greater than 100 μm.

[0221] Here, the relationship with the opening OP1 is described with attention paid to the segment 7A, but the segments 7B, 7C, and 7D are also formed in the same structure.

[0222] The structure of this embodiment is to use Fig.29 The configuration and use of the third embodiment described Fig.31 The configuration of the fifth embodiment described above is a combination of the configuration of the fifth embodiment. In the configuration of this embodiment, the same effects as those of the above-described embodiments can be obtained.

[0223] [Seventh embodiment]

[0224] Fig.33 FIG. 2 is a schematic plan view showing a region including a pad PD in a peripheral region SA or a blank portion MP in the present embodiment. Fig.29 Compared with the configuration example shown, Fig.33 The example shown is different in that the openings OP1 , OP2 have a circular shape.

[0225] The openings OP1 and OP2 each have a circular shape when viewed from above. In the present embodiment, a portion of the edge 30 of the opening OP1 in the circumferential direction corresponds to the rounded corner of the opening OP1. The radius (radius of curvature) of the edge 30 of the opening OP1 is, for example, greater than 25 μm. In one example, the radius is 200 μm, but this is not limited to this example. The area of ​​the opening OP2 is smaller than the area of ​​the opening OP1. In other words, the radius of the edge of the opening OP2 is smaller than the radius of the edge 30 of the opening OP1.

[0226] The partition wall 7 is arranged along the edge 30 of the opening OP1. The partition wall 7 has segments 7A, 7B, 7C, and 7D. The segments 7A, 7B, 7C, and 7D each have an L shape. A gap G1 is formed between the segments 7A and 7B adjacent to each other in the X direction, between the segments 7C and 7D adjacent to each other in the X direction, between the segments 7A and 7D adjacent to each other in the Y direction, and between the segments 7B and 7C adjacent to each other in the Y direction.

[0227] The configuration of this embodiment can also achieve the same effect as that of the first embodiment. In this embodiment, by making the opening OP1 circular, a portion that easily becomes a starting point for peeling is not formed, so peeling of the stacked films FL1, FL2, and FL3 can be further suppressed. As a result, the yield rate in the manufacturing process can be improved.

[0228] [Eighth embodiment]

[0229] Fig.34 FIG. 2 is a schematic plan view showing a region including a pad PD in a peripheral region SA or a blank portion MP in the present embodiment. Fig.33 Compared with the configuration example shown, Fig.34 The shape of the partition walls 7 in the examples shown is different.

[0230] The partition wall 7 has a substantially circular shape in a plan view. The partition wall 7 is arranged at a certain distance from the edge 30 of the opening OP1. In other words, the partition wall 7 is arranged parallel to the edge 30 of the opening OP1. That is, the distance W2 from the edge 30 of the opening OP1 to the partition wall 7 is constant along the edge 30 of the opening OP1.

[0231] The partition wall 7 has segments 7A, 7B, 7C, and 7D. The segments 7A, 7B, 7C, and 7D each have an arc shape. The segments 7A, 7B, 7C, and 7D are arranged at intervals in the circumferential direction. A gap G1 is formed between the adjacent segments 7A, 7B, 7C, and 7D in the circumferential direction.

[0232] The configuration of this embodiment can also achieve the same effects as those of the first embodiment. In this embodiment, by forming the segments 7A, 7B, 7C, and 7D into arc shapes, the distance from the edge 30 can be made constant, and the distance between the partition wall 7 and the edge 30 can be reduced compared to the seventh embodiment.

[0233] exist Fig.33 and Fig.34 In the example shown, the partition wall 7 has the sections 7A, 7B, 7C, and 7D, but the partition wall 7 may surround the opening OP1. In other words, the partition wall 7 may be formed integrally without providing the gap G1.

[0234] [Ninth embodiment]

[0235] Fig.35 1 is a schematic plan view showing a region including a pad PD in a peripheral region SA or a blank portion MP in the present embodiment. Fig.35 , the vicinity of the rounded corner portion 35 of the opening OP1 is shown in an enlarged manner. The edge 30 of the opening OP1 includes edges 31 and 33 and the rounded corner portion 35. The partition wall 7 is arranged along the edge 30 of the opening OP1.

[0236] The partition wall 7 includes sections 7A and 7D. When focusing on the section 7A, the section 7A has an arc shape along the rounded corner portion 35. The section 7A is separated from the section 7D in the Y direction.

[0237] When focusing on the vicinity of the edge 33, the partition wall 7 further includes a segment 7E. The segment 7E is disposed between the adjacent segments 7A and 7D. The segment 7E has a linear shape along the Y direction.

[0238] The segment 7E is arranged at a distance from the segments 7A and 7D in the Y direction. A gap G2 is formed between the segment 7A and the segment 7E, and between the segment 7D and the segment 7E.

[0239] The display device mother substrate 100 (display device DSP) may further include a partition wall 9 (third partition wall). The partition wall 9 is arranged on the outside of the partition wall 7 so as to overlap with the gap G2. Specifically, when viewed along the X direction, the partition wall 9 overlaps with the gap G2. The distance of the partition wall 9 in the Y direction is, for example, greater than the distance of the gap G2 in the Y direction.

[0240] Although not shown, the partition wall 9 has a conductive lower portion disposed on the inorganic insulating layer 5 and an upper portion disposed on the lower portion. The upper portion has a greater width than the lower portion. The display device mother substrate 100 (display device DSP) may further include a partition wall 90. The partition wall 90 is disposed outside the partition wall 9.

[0241] The configuration of this embodiment can also provide the same effects as those of the first embodiment. In this embodiment, the partition walls 9 are arranged outside the partition walls 7 so as to overlap with the gaps G2 .

[0242] Thus, even when the laminated films FL1, FL2, and FL3 are peeled off through the gap G2, the expansion of the peeling can be suppressed by the partition wall 9. As a result, the yield in the manufacturing process can be improved.

[0243] use Fig.35 Section 7E of the description can be applied to use Fig.29 , Fig.30 , Fig.32 , Fig.33 In the above-described embodiments, a plurality of segments 7E may be arranged so as to be separated from each other in the X direction and the Y direction.

[0244] [10th embodiment]

[0245] Fig.36 1 is a schematic plan view showing a region including a pad PD in a peripheral region SA or a blank portion MP in the present embodiment. Fig.36 In the example shown, the partition wall 7 is not arranged outside the opening OP1. In this case, the edge 30 of the opening OP1 has a rounded corner portion 35. As described above, the curvature radius R1 ( Fig. 9 as shown) is above 25 μm.

[0246] The configuration of this embodiment can also improve the yield in the manufacturing process. Specifically, the edge 30 of the opening OP1 has a rounded corner 35. By rounding the corner, the corner is less likely to become a starting point for peeling, and peeling of the laminated films FL1, FL2, and FL3 can be suppressed.

[0247] Next, the shapes of the openings OP1 and OP3 applicable to the above-described embodiments will be described.

[0248] Fig.37 1 is a diagram for explaining other shapes of the opening OP3 applicable to the window portion WP. The opening OP3 has an oblong shape that is longer in the Y direction. The edge 40 of the opening OP3 includes a pair of edges 47 extending in the Y direction and a pair of rounded corners 49 connecting the ends of the pair of edges 47. The radius of curvature of the rounded corner 49 is greater than 25 μm.

[0249] The partition wall 7 surrounds the opening OP3 on the outside of the opening OP3. It should be noted that the partition wall 7 may be arranged at a certain distance from the edge 40 of the opening OP3. The partition wall 7 may have a plurality of sections separated from each other.

[0250] Here, the opening OP3 is used for explanation, but the same shape can also be applied to the opening OP1. In addition, the shapes applicable to the openings OP1 and OP3 include not only circular shapes ( Fig.33 as well as Fig.34 As shown) and oblong shapes, also include elliptical shapes.

[0251] Based on the display device and mother substrate for display device described above as embodiments of the present invention, all display devices and mother substrate for display device that can be implemented by those skilled in the art through appropriate design changes also fall within the scope of the present invention as long as they include the main purpose of the present invention.

[0252] Within the scope of the present invention, those skilled in the art can think of various variations, which also belong to the scope of the present invention. For example, for the above-mentioned embodiments, those skilled in the art appropriately perform an embodiment in which constituent elements are added, deleted or the design is changed, or perform an embodiment in which a process is added, omitted or the condition is changed, and as long as they have the gist of the present invention, they are included in the scope of the present invention.

[0253] In addition, regarding other effects brought about by the methods described in the above embodiments, effects that are clear from the description of this specification, or effects that can be appropriately conceived by those skilled in the art are of course understood as effects brought about by the present invention.

Claims

1. A display device comprising: substrate; an organic insulating layer disposed above the substrate over a display region where a plurality of display elements are disposed and a peripheral region around the display region; A first partition wall disposed above the organic insulating layer and between adjacent display elements; and a second partition wall disposed in the peripheral region, The first partition wall and the second partition wall each have a conductive lower portion and an upper portion protruding from a side surface of the lower portion. The organic insulating layer has an opening in the peripheral region, The second partition wall is arranged outside the opening along the edge of the opening.

2. The display device according to claim 1, wherein: The opening has: a first edge extending in a first direction; a second edge extending in a second direction intersecting the first direction; and a corner portion connected to the first edge and the second edge. At least a portion of the second partition wall is disposed outside the corner portion.

3. The display device according to claim 2, wherein: The second partition wall is formed 50 μm or more from the second edge in the first direction, and is formed 50 μm or more from the first edge in the second direction.

4. The display device according to claim 3, wherein: The corner portion has an arc shape.

5. The display device according to claim 4, wherein: The curvature radius of the corner portion is greater than 25 μm.

6. The display device according to claim 1, wherein: The opening has a circular shape.

7. The display device according to claim 1, wherein: The second partition wall surrounds the opening.

8. The display device according to claim 1, wherein: The second partition wall is disposed outside the opening at a predetermined distance from the edge of the opening.

9. The display device according to claim 1, wherein: The second partition wall includes a plurality of sections that are arranged at intervals.

10. The display device according to claim 9, wherein: A third partition wall is further provided outside the second partition wall so as to overlap with a gap between the adjacent sections.

11. A mother substrate for a display device, comprising: A panel portion having a display area for displaying an image and a peripheral area around the display area; a blank portion outside the panel portion; an organic insulating layer disposed throughout the panel portion and the blank portion; A first partition disposed in the display region above the organic insulating layer; and A second partition wall is arranged in the blank portion, The first partition wall and the second partition wall each have a conductive lower portion and an upper portion protruding from a side surface of the lower portion. The organic insulating layer has an opening in the blank portion, The second partition wall is arranged outside the opening along the edge of the opening.

12. The mother substrate for a display device according to claim 11, wherein: The opening has: a first edge extending in a first direction; a second edge extending in a second direction intersecting the first direction; and a corner portion connected to the first edge and the second edge. At least a portion of the second partition wall is disposed outside the corner portion.

13. The mother substrate for a display device according to claim 12, wherein: The second partition wall is formed 50 μm or more from the second edge in the first direction, and is formed 50 μm or more from the first edge in the second direction.

14. The mother substrate for a display device according to claim 13, wherein: The corner portion has an arc shape.

15. The mother substrate for a display device according to claim 14, wherein: The curvature radius of the corner portion is greater than 25 μm.

16. The mother substrate for a display device according to claim 11, wherein: The opening has a circular shape.

17. The mother substrate for a display device according to claim 11, wherein: The second partition wall surrounds the opening.

18. The mother substrate for a display device according to claim 11, wherein: The second partition wall is disposed outside the opening at a predetermined distance from the edge of the opening.

19. The mother substrate for a display device according to claim 11, wherein: The second partition wall includes a plurality of sections that are arranged at intervals.

20. The mother substrate for a display device according to claim 19, wherein: A third partition wall is further provided outside the second partition wall so as to overlap with a gap between the adjacent sections.

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