Display panel and manufacturing method thereof

Abstract

The invention relates to a display panel and a manufacturing method thereof. The display panel comprises a substrate, a plurality of light-emitting units, a first packaging layer and at least one auxiliary electrode, the light-emitting units are arranged on the substrate, and each light-emitting unit comprises a first electrode, a light-emitting function layer and a second electrode which are sequentially arranged in a stacked mode in the direction away from the substrate. The first packaging layer comprises a first packaging sub-layer and a second packaging sub-layer, the first packaging sub-layer is arranged on one side, far away from the substrate, of the plurality of light emitting units and covers the plurality of light emitting units, the second packaging sub-layer is arranged on one side, far away from the substrate, of the first packaging sub-layer, and the first packaging layer comprises a plurality of via holes penetrating through the first packaging sub-layer and the second packaging sub-layer. The at least one auxiliary electrode is arranged on the side, away from the substrate, of the first packaging layer and electrically connected with the second electrodes of the multiple light-emitting units through the multiple via holes. According to the display panel, the current is more uniformly distributed on the display panel through the auxiliary electrode, the brightness uniformity of the display panel is improved, and the display effect of the display panel is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof. Background Art

[0002] Display panels are an indispensable component in modern electronic devices, used to display images and text information. The packaging technology of display panels is an indispensable part of display panel manufacturing. However, the display panels in the related art have the problem of poor packaging effect.

[0003] In some display panels, auxiliary electrode technology is introduced to effectively improve their performance. Patents CN118742138A, PCT / CN2024 / 107011, and 202411175069.8 record relevant contents of auxiliary electrode technology for reference. Summary of the invention

[0004] Based on this, a display panel and a manufacturing method thereof are provided, wherein auxiliary electrodes are introduced to make the current more evenly distributed on the display panel, so as to improve the display effect of the display panel.

[0005] A display panel, comprising:

[0006] substrate;

[0007] A plurality of light-emitting units are arranged on the substrate, wherein the light-emitting units include a first electrode, a light-emitting functional layer, and a second electrode which are sequentially stacked in a direction away from the substrate;

[0008] A first encapsulation layer, comprising a first encapsulation sublayer and a second encapsulation sublayer, wherein the first encapsulation sublayer is disposed on a side of the plurality of light-emitting units away from the substrate and covers the plurality of light-emitting units, and the second encapsulation sublayer is disposed on a side of the first encapsulation sublayer away from the substrate, and the first encapsulation layer comprises a plurality of via holes penetrating the first encapsulation sublayer and the second encapsulation sublayer;

[0009] At least one auxiliary electrode is disposed on a side of the first packaging layer away from the substrate and is electrically connected to the second electrodes of the plurality of light-emitting units through the plurality of via holes.

[0010] In one of the embodiments, the first encapsulation sublayer has at least one gap, and the at least one gap is filled by the second encapsulation sublayer;

[0011] Optionally, an extension direction of the at least one slit intersects with a plane where the substrate is located.

[0012] In one embodiment, the material of the first encapsulation sublayer is the same as the material of the second encapsulation sublayer;

[0013] Optionally, a material of the first encapsulation sublayer includes an inorganic material, and a material of the second encapsulation sublayer includes an inorganic material.

[0014] In one embodiment, the display panel further comprises:

[0015] A pixel definition layer, the pixel definition layer is arranged on one side of the substrate, a plurality of pixel openings are opened on the pixel definition layer, and parts of the light-emitting units are located in corresponding pixel openings;

[0016] Optionally, a portion of the first electrode is located between the substrate and the pixel definition layer, and another portion is exposed from the corresponding pixel opening.

[0017] In one embodiment, the display panel further comprises:

[0018] A second packaging layer is provided on a side of the first packaging layer away from the substrate;

[0019] A third packaging layer is provided on a side of the second packaging layer away from the substrate;

[0020] Optionally, the material of the second encapsulation layer includes an organic material, and the material of the third encapsulation layer includes an inorganic material;

[0021] Optionally, a material of the third encapsulation layer is the same as a material of the first encapsulation layer.

[0022] According to another aspect of the present application, a method for manufacturing a display panel is provided, the manufacturing method comprising:

[0023] providing a substrate;

[0024] forming a plurality of light-emitting units on the substrate;

[0025] forming a first encapsulation sublayer on a side of the plurality of light-emitting units away from the substrate;

[0026] performing stress relief on the first encapsulation sublayer;

[0027] forming a second encapsulation sublayer on a side of the first encapsulation sublayer away from the substrate to obtain a first encapsulation layer including the first encapsulation sublayer and the second encapsulation sublayer;

[0028] forming a plurality of via holes disposed on the first encapsulation layer and penetrating the first encapsulation sublayer and the second encapsulation sublayer;

[0029] At least one auxiliary electrode is formed on a side of the first packaging layer away from the substrate and fills the plurality of via holes. The at least one auxiliary electrode is electrically connected to the second electrodes of the plurality of light-emitting units through the plurality of via holes.

[0030] In one embodiment, after stress release is performed on the first encapsulation sublayer, at least one gap is exposed in the first encapsulation sublayer, and the step of forming a second encapsulation sublayer on a side of the first encapsulation sublayer away from the substrate includes:

[0031] A second encapsulation sublayer is formed on a side of the first encapsulation sublayer away from the substrate, so that the material of the second encapsulation sublayer is filled in the at least one gap.

[0032] In one embodiment, the step of relieving stress on the first encapsulation sublayer includes:

[0033] The first encapsulation sublayer is cooled.

[0034] In one embodiment, the step of cooling the first encapsulation sublayer includes:

[0035] The first encapsulation sublayer is cooled multiple times, each time from a first temperature to a second temperature, and kept at the second temperature for a preset time, wherein the difference between the first temperature and the second temperature is in a range of 8°-12°;

[0036] Optionally, the preset time ranges from 1 to 3 minutes.

[0037] In one embodiment, the step of cooling the first encapsulation sublayer includes:

[0038] Lowering the temperature of the first encapsulation sublayer from a third temperature to a fourth temperature;

[0039] Wherein, the third temperature ranges from 95° to 105°, and the fourth temperature ranges from 25° to 35°.

[0040] The display panel is provided with a via hole on the packaging layer, and the auxiliary electrode is electrically connected to the light-emitting unit through the via hole. Through the setting of the auxiliary electrode, the current is more evenly distributed on the display panel, improving the brightness uniformity of the display panel, and further improving the display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 A schematic diagram of the structure of a display panel according to an embodiment of the present application.

[0042] Figure 2 This is an enlarged view of a portion of the second packaging layer located within the first packaging layer according to an embodiment of the present application.

[0043] Figure 3 A schematic structural diagram of a seamless display panel according to an embodiment of the present application.

[0044] Figure 4 This is a flow chart of the steps of a method for manufacturing a display panel according to an embodiment of the present application.

[0045] Figure 5 This is a flow chart of the steps of stress release for the first packaging sub-layer according to an embodiment of the present application.

[0046] Description of reference numerals:

[0047] 10. Display panel;

[0048] 100. Substrate;

[0049] 200, light-emitting unit; 210, first electrode; 220, second electrode; 230, light-emitting functional layer;

[0050] 310, first encapsulation sublayer; 320, second encapsulation sublayer; 330, auxiliary electrode;

[0051] 410, pixel definition layer; 420, second encapsulation layer; 430, third encapsulation layer. DETAILED DESCRIPTION

[0052] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0053] The upper auxiliary electrode technology can be applied to intelligent pixelization technology (ViP) and fine metal mask technology (FMM). Through the polarization current control of the auxiliary electrode, the pixel preparation process can be optimized and the performance of active matrix organic light-emitting diode (AMOLED) products can be improved.

[0054] Among them, the smart pixelization technology is a metal mask-free RGB self-alignment pixelization technology, which can use the existing technology and process of active matrix organic light-emitting diode (AMOLED) in the thin film field effect transistor (TFT) control backplane. After the anode is prepared, it is gradually differentiated from the pixel definition layer (PDL) to form the isolation column structure unique to ViP AMOLED, and then enters the whole surface evaporation and photolithography patterning steps for pixel preparation. In this process, the upper auxiliary electrode technology can be used as the anode when studying the cathode process, or the cathode when studying the anode process. The polarization current passes through the research electrode and the auxiliary electrode at the same time to ensure the uniform distribution of the electric field lines of the research electrode and reduce the cell pressure of the electrolytic cell.

[0055] Fine metal mask technology is used in the core evaporation process of AMOLED, which directly determines the resolution and display effect of AMOLED display screens. In the FMM evaporation process, the upper auxiliary electrode technology can also be applied to ensure the regular deposition of materials during the evaporation process and avoid the contamination of the electrolyte solution near the research electrode by the electrode reaction on the upper auxiliary electrode. In the FMM technology route, since each common layer in the electroluminescent (EL) device plays a role in the three RGB sub-pixels at the same time, it is impossible to achieve independent debugging and optimization of the sub-pixel device, which limits the performance of the EL device. The upper auxiliary electrode technology can provide more flexible current control here.

[0056] When using the upper auxiliary electrode technology, it is necessary to drill holes on the upper part of the thin film encapsulation (TFE) layer. Since the auxiliary electrode holes need to be made above the chemical vapor deposition layer, when there are particles under the chemical vapor deposition layer, the poor encapsulation of the inorganic layer and the stress will cause cracks near the particles, which will create channels for water vapor invasion, causing the package to fail easily and affecting the life of the device. For example, the particles in the evaporation chamber cannot be avoided by the above-mentioned smart pixelation technology and fine metal mask technology. For example, the friction between SPC and FMM generated under the fine metal mask route will inevitably produce particles. That is, both of the above routes will inevitably produce particles, and these particles will cause cracks in the encapsulation layer, resulting in encapsulation failure.

[0057] That is, when the display panel adopts the upper auxiliary cathode technology, it is easy to cause cracks in the packaging layer, resulting in packaging failure, and eventually causing impurities such as water vapor to enter the display panel through the cracks, affecting the use of the display panel.

[0058] Based on the above issues, see Figure 1 and Figure 2 As shown, the present application provides a display panel 10 and a manufacturing method thereof, which introduces an auxiliary electrode to make the current more evenly distributed on the display panel to improve the display effect of the display panel. At the same time, the display panel 10 of the present application has a better packaging effect, avoiding easy cracking of the packaging when using the upper auxiliary cathode technology.

[0059] The display panel 10 includes a substrate 100, a plurality of light-emitting units 200, and a first encapsulation layer. The plurality of light-emitting units 200 are disposed on the substrate 100 for emitting display light. The light-emitting units include a first electrode, a light-emitting functional layer, and a second electrode which are sequentially stacked in a direction away from the substrate. The first encapsulation layer includes a first encapsulation sublayer 310 and a second encapsulation sublayer 320. The first encapsulation sublayer 310 is disposed on a side of the light-emitting unit 200 away from the substrate 100 and covers the plurality of light-emitting units 200 to achieve preliminary encapsulation of the plurality of light-emitting units 200.

[0060] The second encapsulation sublayer 320 is disposed on a side of the first encapsulation sublayer 310 away from the substrate 100, and the first encapsulation layer includes a plurality of vias penetrating the first encapsulation sublayer and the second encapsulation sublayer. At least one auxiliary electrode is disposed on a side of the first encapsulation layer away from the substrate, and is electrically connected to the second electrodes of the plurality of light-emitting units through the plurality of vias.

[0061] The above-mentioned display panel is provided with a via hole on the packaging layer, and the auxiliary electrode is electrically connected to the light-emitting unit through the via hole. Through the setting of the auxiliary electrode 330, the current can be more evenly distributed on the display panel 10, thereby improving the brightness uniformity of the display panel 10 and further improving the display effect of the display panel.

[0062] It can be understood that the present application is provided with a plurality of light-emitting units 200 , and correspondingly, a plurality of auxiliary electrodes 330 are also provided, and the plurality of auxiliary electrodes 330 correspond one-to-one to the plurality of light-emitting units 200 .

[0063] In some embodiments, see Figure 1 , Figure 2 and Figure 3 As shown, Figure 3 This is a schematic diagram of the structure of a seamless display panel of an embodiment of the present application. The first encapsulation sublayer has at least one gap, and at least one gap is filled by the second encapsulation sublayer. In some embodiments, the extension direction of at least one gap intersects with the plane where the substrate is located. The gap is filled by the second encapsulation sublayer 320 to make up for the cracks exposed by the first encapsulation sublayer 310 due to stress, so as to improve the stress resistance or encapsulation ability of the display panel 10.

[0064] It can be understood that the above-mentioned display panel 10 is subjected to secondary coating by setting the second encapsulation sublayer 320 to fill the gaps in the first encapsulation sublayer 310, thereby improving the stress resistance of the display panel 10 and avoiding the first encapsulation sublayer 310 being affected by stress and causing gaps that cannot be filled when the auxiliary electrode 330 is set, resulting in water vapor entering the gaps and affecting the yield of the display panel 10. That is, the display panel 10 of the present application has a better encapsulation effect.

[0065] In some embodiments, the light emitting functional layer 230 can emit at least three colors of light, three of which are red, blue and green, so as to realize the display of full-color images of the display panel 10 .

[0066] In some embodiments, the material of the first encapsulation sublayer 310 is the same as the material of the second encapsulation sublayer 320. Optionally, the material of the first encapsulation sublayer 310 includes inorganic material, and the material of the second encapsulation sublayer 320 includes inorganic material. The material of the first encapsulation sublayer 310 can be aluminum oxide, silicon nitride, silicon oxide, silicon oxynitride, etc., and the material of the second encapsulation sublayer 320 can be aluminum oxide, silicon nitride, silicon oxide, silicon oxynitride, etc.

[0067] In some embodiments, continue to refer to Figure 1 and Figure 2 As shown, the display panel 10 further includes a pixel definition layer 410, which is disposed on one side of the substrate 100, and a plurality of pixel openings are provided on the pixel definition layer 410, and a portion of the light-emitting unit is located in the corresponding pixel opening. Optionally, a portion of the first electrode is located between the substrate and the pixel definition layer, and another portion is exposed from the corresponding pixel opening. In this way, the pixel opening is used to expose at least a portion of the first electrode 210, and the light-emitting functional layer 230 and the second electrode 220 are stacked on the first electrode 210 in a direction away from the substrate 100. The first electrode 210 is exposed through the pixel definition layer 410 to facilitate the arrangement of the light-emitting functional layer 230 and the second electrode 220.

[0068] See also Figure 1 , the display panel 10 further includes a second encapsulation layer 420 and a third encapsulation layer 430 stacked on the side of the first encapsulation sublayer 310 away from the substrate 100 to improve the encapsulation effect of the display panel 10. It can be understood that the second encapsulation layer 420 is arranged on the side of the first encapsulation sublayer 310 away from the substrate, and the third encapsulation layer 430 is arranged on the side of the second encapsulation layer 420 away from the substrate. Optionally, the material of the third encapsulation layer 430 is the same as that of the first encapsulation sublayer 310. Optionally, the material of the second encapsulation layer 420 includes an organic material, and the material of the third encapsulation layer 430 includes an inorganic material. In some embodiments, the second encapsulation layer 420 adopts inkjet printing technology to make the display panel 10 flat, and the third encapsulation layer 430 further encapsulates the display panel 10 to improve the encapsulation effect of the display panel 10.

[0069] In some embodiments, continue to refer to Figure 1 and Figure 2 As shown, the vias include a first via provided on the first encapsulation sublayer 310, and a second via provided on the second encapsulation sublayer 320, one end of the first via is electrically connected to the second electrode 220, the other end of the first via is electrically connected to one end of the second via, and the other end of the second via is electrically connected to the auxiliary electrode 330. It can be understood that the first via and the second via are connected to each other through the first encapsulation sublayer 310 and the second encapsulation sublayer 320, so that the first via can be provided in the first via, and the second via can be provided in the second via, so that the two ends of the second via are electrically connected to the auxiliary electrode 330 and the first via respectively, and the first via is electrically connected to the second electrode 220, so as to realize the electrical connection between the auxiliary electrode 330 and the second electrode 220.

[0070] See also Figure 4 As shown, Figure 4 This is a flow chart of the steps of a method for manufacturing a display panel according to an embodiment of the present application.

[0071] The present application also provides a method for manufacturing a display panel 10, which is used to manufacture the above-mentioned display panel 10. The manufacturing method includes:

[0072] S1. Provide a substrate 100. In some embodiments, the substrate 100 is an array substrate.

[0073] S2. A plurality of light-emitting units 200 are formed on the substrate 100 , and the plurality of light-emitting units 200 respectively emit at least three colors of light, three of which are red, blue and green, so as to realize the display of a full-color image of the display panel 10 .

[0074] S3. Form a first encapsulation sublayer 310 on a side of the light emitting unit 200 away from the substrate 100 , wherein the first encapsulation sublayer 310 may be prepared by using atomic layer deposition technology.

[0075] S4, releasing stress on the first encapsulation sublayer 310. Releasing the stress of the first encapsulation sublayer 310 in advance prevents the first encapsulation sublayer 310 from being cracked due to stress when a first via hole is subsequently formed on the first encapsulation sublayer 310.

[0076] S5 , forming a second encapsulation sublayer 320 on a side of the first encapsulation sublayer 310 away from the substrate 100 to obtain a first encapsulation layer including the first encapsulation sublayer 310 and the second encapsulation sublayer 320 .

[0077] S6 . Form a plurality of via holes disposed on the first encapsulation sublayer 310 and penetrating the first encapsulation sublayer 310 and the second encapsulation sublayer 320 .

[0078] S7, forming at least one auxiliary electrode disposed on a side of the first encapsulation layer away from the substrate and filled with multiple vias, wherein the at least one auxiliary electrode is electrically connected to the second electrodes of the multiple light-emitting units through the multiple vias. An auxiliary electrode 330 is formed on a side of the second encapsulation sublayer 320 away from the first encapsulation sublayer 310, so as to ensure that the current is more evenly distributed on the display panel 10 through the auxiliary electrode 330, thereby improving the brightness uniformity of the display panel 10 and further improving the display effect of the display panel. The auxiliary electrode 330 is electrically connected to the light-emitting unit 200 through the second via structure and the first via structure, or in other words, the auxiliary electrode 330 is electrically connected to the second electrode 220 through the second via structure and the first via structure.

[0079] In some embodiments, Figure 1 , Figure 2 and Figure 3As shown, in step S4, after stress release of the first encapsulation sublayer 310, at least one slit is exposed on the first encapsulation sublayer 310. In step S5, the step of forming a second encapsulation sublayer on the side of the first encapsulation sublayer away from the substrate also includes: S50, forming a second encapsulation sublayer on the side of the first encapsulation sublayer away from the substrate, so that the material of the second encapsulation sublayer is filled in the at least one slit, forming a seamless display panel, such as Figure 3 as shown in .

[0080] Thus, the second encapsulation sublayer 320 is provided and subjected to secondary coating to fill the gaps in the first encapsulation sublayer 310 , thereby improving the stress resistance of the display panel 10 and preventing the first encapsulation sublayer 310 from being affected by stress and causing gaps that cannot be filled when the auxiliary electrode 330 is provided.

[0081] In some embodiments, step S6, forming a plurality of via holes disposed on the first encapsulation sublayer 310 and penetrating the first encapsulation sublayer 310 and the second encapsulation sublayer 320, further includes:

[0082] S61, forming a first via hole on the first encapsulation sublayer 310 and a second via hole on the second encapsulation sublayer 320, wherein the second via hole is connected to the first via hole, so that the first via hole structure and the second via hole structure are electrically connected to each other.

[0083] S62. Form a first via structure in the first via hole and a second via structure in the second via hole, and electrically connect the first via structure and the second via structure to each other, an end of the first via structure away from the second via structure is electrically connected to the second electrode 220, and an end of the second via structure away from the first via structure is electrically connected to the auxiliary electrode 330.

[0084] In some embodiments, step S4, releasing stress on the first encapsulation sublayer 310, specifically includes: step S41, cooling the first encapsulation sublayer 310, and releasing the stress of the first encapsulation sublayer 310 by cooling.

[0085] In some embodiments, see Figure 5 As shown, Figure 5 This is a flowchart of the steps of stress release of the first encapsulation sublayer according to an embodiment of the present application. Step S41, cooling the first encapsulation sublayer 310 includes the first embodiment:

[0086] The first encapsulation sublayer 310 is cooled multiple times, each time from the first temperature to the second temperature, and kept warm at the second temperature for a preset time, wherein the difference between the first temperature and the second temperature is 8°-12°. That is, the first encapsulation sublayer 310 is cooled in stages, and each time the temperature is cooled by 8°-12°, and then kept warm for a preset time after cooling, so as to facilitate subsequent cooling. Optionally, the preset time is 1-3 minutes. For example, after a single cooling of 8°-12° causes the first encapsulation sublayer 310 to cool from the first temperature to the second temperature, the first encapsulation sublayer 310 is kept warm for 1-3 minutes when it is at the second temperature. Preferably, the first encapsulation sublayer 310 is kept warm for about 1-3 minutes when it is at the second temperature. When cooling the first encapsulation sublayer 310, the substrate 100, the light-emitting unit 200 and the first encapsulation sublayer 310 can be cooled at the same time to improve the convenience of cooling, without cooling the first encapsulation sublayer 310 separately.

[0087] In some embodiments, the time for each temperature reduction of 8°-12° can be maintained at about 1 minute, so as to improve the efficiency of stress release of the first encapsulation sublayer 310 while ensuring that no damage is caused to the substrate 100 and the light-emitting unit 200.

[0088] In some embodiments, continue to refer to Figure 5 As shown, step S41, cooling the first encapsulation sublayer 310 also includes: cooling the temperature of the first encapsulation sublayer 310 from the third temperature to the fourth temperature, wherein the third temperature ranges from 95°-105°, and the fourth temperature ranges from 25°-35°. It can be understood that after the first encapsulation sublayer 310 is formed on the substrate 100, the overall temperature or the temperature of the first encapsulation sublayer 310 is 95°-105°. At this time, the first encapsulation sublayer 310 is cooled for multiple times and finally cooled to 25°-35° so as to completely release the stress of the first encapsulation sublayer 310 and expose the gaps in the first encapsulation sublayer 310 caused by the released stress. When cooling the first encapsulation sublayer 310, the substrate 100, the light-emitting unit 200 and the first encapsulation sublayer 310 can be cooled at the same time to improve the convenience of cooling, and there is no need to cool the first encapsulation sublayer 310 separately.

[0089] The display panel 10 provided in the present application is subjected to secondary coating by setting a second encapsulation sublayer 320 to fill the gaps in the first encapsulation sublayer 310, thereby improving the stress resistance of the display panel 10 and avoiding the first encapsulation sublayer 310 being affected by stress and causing gaps that cannot be filled when the auxiliary electrode 330 is set, thereby preventing water vapor from entering the gaps and affecting the yield of the display panel 10. That is, the display panel 10 of the present application has a better encapsulation effect.

[0090] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A display panel, characterized in that: The display panel comprises: substrate; A plurality of light-emitting units are arranged on the substrate, wherein the light-emitting units include a first electrode, a light-emitting functional layer, and a second electrode which are sequentially stacked in a direction away from the substrate; A first encapsulation layer, comprising a first encapsulation sublayer and a second encapsulation sublayer, wherein the first encapsulation sublayer is disposed on a side of the plurality of light-emitting units away from the substrate and covers the plurality of light-emitting units, and the second encapsulation sublayer is disposed on a side of the first encapsulation sublayer away from the substrate, and the first encapsulation layer comprises a plurality of via holes penetrating the first encapsulation sublayer and the second encapsulation sublayer; At least one auxiliary electrode is disposed on a side of the first packaging layer away from the substrate and is electrically connected to the second electrodes of the plurality of light-emitting units through the plurality of via holes.

2. The display panel according to claim 1, characterized in that: The first encapsulation sublayer has at least one gap, and the at least one gap is filled by the second encapsulation sublayer; Optionally, an extension direction of the at least one slit intersects with a plane where the substrate is located.

3. The display panel according to claim 1, characterized in that: The material of the first encapsulation sublayer is the same as the material of the second encapsulation sublayer; Optionally, a material of the first encapsulation sublayer includes an inorganic material, and a material of the second encapsulation sublayer includes an inorganic material.

4. The display panel according to claim 1, characterized in that: The display panel further includes: A pixel definition layer, the pixel definition layer is arranged on one side of the substrate, a plurality of pixel openings are opened on the pixel definition layer, and parts of the light-emitting units are located in corresponding pixel openings; Optionally, a portion of the first electrode is located between the substrate and the pixel definition layer, and another portion is exposed from the corresponding pixel opening.

5. The display panel according to claim 1, characterized in that: The display panel further includes: A second packaging layer is provided on a side of the first packaging layer away from the substrate; A third packaging layer is provided on a side of the second packaging layer away from the substrate; Optionally, the material of the second encapsulation layer includes an organic material, and the material of the third encapsulation layer includes an inorganic material; Optionally, a material of the third encapsulation layer is the same as a material of the first encapsulation layer.

6. A method for manufacturing a display panel, characterized in that: The production method comprises: providing a substrate; forming a plurality of light-emitting units on the substrate; forming a first encapsulation sublayer on a side of the plurality of light-emitting units away from the substrate; performing stress relief on the first encapsulation sublayer; forming a second encapsulation sublayer on a side of the first encapsulation sublayer away from the substrate to obtain a first encapsulation layer including the first encapsulation sublayer and the second encapsulation sublayer; forming a plurality of via holes disposed on the first encapsulation layer and penetrating the first encapsulation sublayer and the second encapsulation sublayer; At least one auxiliary electrode is formed on a side of the first packaging layer away from the substrate and fills the plurality of via holes. The at least one auxiliary electrode is electrically connected to the second electrodes of the plurality of light-emitting units through the plurality of via holes.

7. The method for manufacturing a display panel according to claim 6, characterized in that: After stress release is performed on the first encapsulation sublayer, at least one slit is exposed in the first encapsulation sublayer, and the step of forming a second encapsulation sublayer on a side of the first encapsulation sublayer away from the substrate comprises: A second encapsulation sublayer is formed on a side of the first encapsulation sublayer away from the substrate, so that the material of the second encapsulation sublayer is filled in the at least one gap.

8. The method for manufacturing a display panel according to claim 6, characterized in that: The step of relieving stress on the first encapsulation sublayer comprises: The first encapsulation sublayer is cooled.

9. The method for manufacturing a display panel according to claim 8, characterized in that: The step of cooling the first encapsulation sublayer comprises: The first encapsulation sublayer is cooled multiple times, each time from a first temperature to a second temperature, and kept at the second temperature for a preset time, wherein the difference between the first temperature and the second temperature is in a range of 8°-12°; Optionally, the preset time ranges from 1 to 3 minutes.

10. The method for manufacturing a display panel according to claim 8, characterized in that: The step of cooling the first encapsulation sublayer comprises: Lowering the temperature of the first encapsulation sublayer from a third temperature to a fourth temperature; Wherein, the third temperature ranges from 95° to 105°, and the fourth temperature ranges from 25° to 35°.

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