Gate tube device and preparation method thereof

Abstract

The invention belongs to the technical field of micro-nano electronics, and particularly relates to a gate tube device and a preparation method thereof, and the gate tube device sequentially comprises a first metal electrode layer, a switch layer and a second metal electrode layer from bottom to top; the switch layer is formed by doping a metal oxide with a metal simple substance, and the metal simple substance is metal which can be subjected to an oxidation-reduction reaction under the action of an electric field; the specific preparation method comprises the following steps: depositing the first metal electrode layer on the substrate; depositing a switch layer on the first metal electrode layer; depositing a second metal electrode layer on the switch layer to obtain an initial device; and finally, annealing the initial device to obtain the gate tube device, thereby achieving the technical effects that the prepared gate tube device has low leakage current, large switch ratio, steep switch slope, improved on-state current and high durability.

Description

Technical Field

[0001] The invention belongs to the field of micro-nano electronic technology, and in particular relates to a gate tube device and a preparation method thereof. Background Art

[0002] With the rapid development of big data, cloud computing and Internet of Things technologies, the sharp increase in information volume and the continuous expansion of market demand, storage technology is facing unprecedented challenges, especially in terms of the efficiency of data storage and the convenience of transmission. To meet this challenge, RRAM (resistive random access memory) cross array technology has become a cutting-edge technology that has attracted much attention due to its excellent storage density and fast response performance. RRAM technology relies on the non-volatile characteristics and high efficiency of resistive random access memory devices and has great application potential. However, the storage cells in the RRAM cross array often face leakage current problems, which may affect the reliability of the device through the surrounding cells. Therefore, each storage cell needs to be connected to a gate tube to avoid interference from leakage current.

[0003] At present, the more common gate transistors include bidirectional threshold switch devices (Ovonic Threshold Switch, OTS) based on sulfur compounds, threshold switch devices based on metal insulator phase change (Metal Insulator Transition, MIT) and threshold switch devices based on conductive wires. Among them, threshold switch devices based on conductive wires have lower leakage current and larger switching ratio than bidirectional threshold switch devices and threshold switch devices based on metal insulator phase change, and have steep switching slopes. However, this type of device also has the disadvantages of small on-state current, inability to drive some storage devices, and poor durability. How to prepare a conductive wire-type threshold switch device with low leakage, large switch, steep switching slope, large on-state current and high durability is an urgent problem to be solved. Summary of the invention

[0004] In view of the defects of the prior art, the present invention provides a gate tube device and a preparation method thereof, which aims to solve the technical problems in the prior art that the gate tube device based on conductive wire does not have low leakage current, small switching ratio, slow switching slope, small on-state current and low durability.

[0005] To achieve the above-mentioned purpose, according to the first aspect of the present invention, a gate tube device is provided, which comprises, from bottom to top, a first metal electrode layer, a switch layer and a second metal electrode layer; the switch layer is a metal oxide doped with a metal element, and the metal element is a metal that can undergo an oxidation-reduction reaction under the action of an electric field. Preferably, the material of the metal oxide is selected from ScO x 、TiO x ,FeOx 、NiO x 、ZnO x 、ZrO x 、MoO x , HfO x 、TaO x , WO x One or more of , where x is in the range of 1≤x≤2.

[0006] Preferably, the metal element is selected from one or more of Ag, Cu and Co.

[0007] Preferably, in the switching layer, the doping concentration of the metal element in the metal oxide increases from bottom to top.

[0008] Preferably, the thickness of the switch layer is 1-30 nm.

[0009] Preferably, materials of the first metal electrode layer and the second metal electrode layer are independently selected from one or more of Pt, Ti, W, Au, Al, TiN, TaN, TiW, indium tin oxide, indium zinc oxide and indium silicon oxide.

[0010] According to another aspect of the present invention, a method for preparing a gate tube device is provided, and the specific steps include: depositing a first metal electrode layer on the substrate; depositing a switch layer on the first metal electrode layer; Then, a second metal electrode layer is deposited on the switch layer to obtain an initial device; Finally, the initial device is annealed to obtain a gate tube device.

[0011] Preferably, the annealing time is 30-90s and the temperature is 400-600°C. Preferably, methods of depositing the first metal electrode layer, the switch layer and the first metal electrode layer are independently selected from chemical vapor deposition, atomic layer deposition, sputtering, pulsed laser deposition, evaporation or molecular beam epitaxy.

[0012] In general, the above technical solution conceived by the present invention has the following technical advantages compared with the prior art.

[0013] 1. The gate tube in the present invention forms a metal-oxygen vacancy complex by introducing a specific doping metal into the metal oxide and utilizing it as a stabilizer for oxygen vacancies, thereby effectively reducing the activation energy required for oxygen vacancy migration and promoting the controllable generation of conductive filaments.

[0014] 2. After the doped metal is introduced into the metal oxide, the gate tube in the present invention is annealed to cause the oxygen vacancies in the metal oxide to aggregate along the grain boundaries or the doping sites of the doped metal to form a pre-distributed localized high-concentration area, which significantly reduces the energy barrier formed by the conductive filaments in the switching layer. In addition, annealing promotes the reduction of the internal doped metal to form metal clusters, which serve as nucleation points for the generation of conductive filaments. Under the combined action of the two, the device maintains the threshold switching characteristics at low voltage, and at the same time, utilizes the high resistance and sufficient oxygen vacancy concentration provided by the metal oxide to exhibit the characteristics of low leakage current and steep switching slope.

[0015] 3. The concentration of the metal element in the switch layer of the present invention increases from bottom to top during doping. The doping concentration increases from bottom to top, so that the metal concentration in the bottom doping area of ​​the switch layer is relatively low, which can inhibit the random nucleation of oxygen vacancies at the interface, reduce the initial leakage current, and reduce the risk of breakdown caused by local electric field concentration; the large electric field in the top high doping area promotes the orderly migration of oxygen vacancies along the concentration gradient direction, forming a single dominant conductive filament rather than multiple filaments competing, thereby improving the stability of the gate tube at high on-state current. At the same time, the bottom-up doping metal concentration gradient in the gate tube is equivalent to providing a guide track for the migration of sufficient oxygen vacancies in the metal oxide. This directional growth method reduces the randomness of its formation and fracture, and will effectively improve the cycle durability. By using the doping concentration that increases from bottom to top, a gate tube device with low leakage current, large switching ratio, steep switching slope, large on-state current and high durability is successfully realized after annealing.

[0016] 4. The gating device provided by the present invention has a simple structure and a wide range of material choices. At the same time, the preparation method is simple, the process flow is short, and the cost is low. Therefore, the gating device of the present invention has the potential to be integrated in series with the storage unit to effectively reduce the leakage current, improve the storage density, and reduce the operating power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a structural schematic diagram of a gating tube unit provided in Example 1 of the present invention.

[0018] Figure 2 It is a flow chart of a method for preparing a gate tube unit provided in Example 1 of the present invention.

[0019] Figure 3 This is a measured current-voltage curve diagram of the gate tube device provided in Example 1 of the present invention.

[0020] Figure 4 This is a partial curve diagram of the switching slope of the gate transistor device provided in Example 1 of the present invention.

[0021] Figure 5 This is a DC durability test diagram of the gate tube device provided in Example 1 of the present invention.

[0022] Figure 6 This is a measured current-voltage curve diagram of the gate tube device provided in Comparative Example 1 of the present invention.

[0023] Figure 7 This is a measured current-voltage curve diagram of the gate tube device provided in Example 2 of the present invention.

[0024] Figure 8 This is a measured current-voltage curve diagram of the gate tube device provided in Example 3 of the present invention.

[0025] Wherein, 101 is a first metal electrode layer; 102 is a switch layer; and 103 is a second metal electrode layer. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0027] Example 1 This embodiment provides a method for preparing a gate transistor device, wherein the switch layer is a metal oxide HfO x The metal Cu is doped in the switching layer, where 1 ≤ x ≤ 2, and the doping concentration of the metal Cu in the switching layer gradually increases from bottom to top. The device structure is as follows Figure 1 The preparation process is as shown in Figure 2 As shown, the following steps are included: (1) Using Si and SiO2 semiconductor substrates, the substrates were ultrasonically cleaned in acetone, alcohol, and deionized water in turn, each time for 10 min. After cleaning, the residual liquid on the surface was blown dry with a nitrogen gun for later use; (2) Using magnetron sputtering, 10 nm of Ti and 100 nm of Pt are deposited on the substrate surface as the first metal electrode layer, where Ti acts as an adhesion layer to improve the adhesion between Pt and the SiO2 substrate. (3) A switching layer is grown on the first metal electrode layer. A metal oxide HfO doped with metal Cu is prepared by co-sputtering a Hf target and a Cu target and introducing 10 sccm of oxygen and 30 sccm of argon. x, where 1 ≤ x ≤ 2, is used as the switch layer. During the deposition process, the sputtering power of the Cu target is increased from 40 W to 70 W every 5 minutes, and the sputtering power of the Hf target is kept at 100 W. The total sputtering time is 20 minutes, and a total of about 25 nm of switch layer material is deposited; (4) Using magnetron sputtering to deposit 100 nm of Pt on the functional layer material as the second metal electrode layer material to obtain an initial device; (5) The initial device is placed in an annealing furnace for rapid thermal annealing. The annealing atmosphere is a nitrogen atmosphere, the annealing temperature is 500 degrees Celsius, and the annealing time is 30 seconds.

[0028] Figure 3 This is the measured current-voltage curve of Example 1 of the present invention. It can be seen that the unannealed device only shows a nonlinear current-voltage relationship, while the annealed device shows an obvious threshold switching device, which turns on at around 0.7 and changes from the off state to the on state, reaching 10 9 The high on-off ratio enables the gate transistor device to be used in large-scale storage arrays; the off-state leakage current is less than 1 pA, which can effectively suppress the leakage current in the array, thereby reducing power consumption and reducing erroneous operations; the on-state current is 100 μA, and the high on-state current enables the device to provide effective current drive for the storage unit. At the same time, when the voltage drops below 0.4 V, the device returns to the off state. The low holding voltage can avoid the voltage division problem after integration on the one hand, and achieve low power consumption of the array on the other hand.

[0029] Figure 4 This is a current-voltage curve diagram of specific embodiment 1 of the present invention when the scanning step length is 1 mV. It can be seen that the device has steep opening and closing slopes, indicating that the device has the ability to quickly open and close.

[0030] Figure 5 This is a durability test diagram of Example 1 of the present invention under DC. It can be seen that the device can maintain 1000 DC cycles at a high on-state current of 100 μA without obvious performance degradation, which indicates that the device has excellent durability and can provide sufficient current drive for the storage unit and maintain excellent durability.

[0031] Comparative Example 1 This comparative example provides a method for preparing a gate tube device, wherein the switch layer is a metal oxide HfO x , where x=1.7, the switch layer does not contain doped metal, and includes the following preparation steps: (1) Using SiO2 and Si semiconductor substrates, the substrates were placed in acetone, alcohol, and deionized water for ultrasonic cleaning in turn, each cleaning lasting 10 min. After cleaning, the residual liquid on the surface was blown dry with a nitrogen gun for later use; (2) Using magnetron sputtering, 10 nm of Ti and 100 nm of Pt are deposited on the substrate surface as the first metal electrode layer, where Ti acts as an adhesion layer to improve the adhesion between Pt and the SiO2 substrate. (3) A switch layer is grown on the first metal electrode layer. The material used for the gate switch layer is metal oxide HfO x , where 1 ≤ x ≤ 2, the thickness is 25 nm, the switch layer is grown by magnetron sputtering, 10 sccm of oxygen and 30 sccm of argon are introduced, the sputtering power of the Hf target is kept constant at 100 W, the total sputtering time is 20 minutes, and a total of about 25 nm of switch layer material is deposited; (4) Using magnetron sputtering to deposit 100 nm of Pt on the functional layer material as the second metal electrode layer material to obtain an initial device; (5) The initial device is placed in an annealing furnace for rapid thermal annealing. The annealing atmosphere is a nitrogen atmosphere, the annealing temperature is 500 degrees Celsius, and the annealing time is 30 seconds.

[0032] Figure 6 This is the measured current-voltage curve of comparative example 1 of the present invention. It can be seen that in the case of undoped metal, the device only shows a nonlinear voltage-current relationship after annealing. This is because the oxygen vacancies in the metal oxide of the undoped metal are randomly distributed, and the undoped metal acts as the migration center of the oxygen vacancies, and cannot form conductive filaments at low voltages. At the same time, there are no metal nanoclusters in the undoped device switch layer as nucleation sites for conductive filaments, and oxygen vacancies cannot self-organize to form conductive filaments under low electric fields, which leads to the inability of the undoped device to show threshold switching characteristics after annealing.

[0033] Example 2 This embodiment provides a method for preparing a gate transistor device, wherein the switch layer is a metal oxide HfO x The method comprises the following steps: doping metal Cu in the switching layer, wherein 1 ≤ x ≤ 2, and the doping concentration of the metal Cu in the switching layer decreases from bottom to top; and (1) Using Si and SiO2 semiconductor substrates, the substrates were ultrasonically cleaned in acetone, alcohol, and deionized water in turn, each time for 10 min. After cleaning, the residual liquid on the surface was blown dry with a nitrogen gun for later use; (2) Using magnetron sputtering, 10 nm of Ti and 100 nm of Pt are deposited on the substrate surface as the first metal electrode layer, where Ti acts as an adhesion layer to improve the adhesion between Pt and the SiO2 substrate. (3) A switching layer is grown on the first metal electrode layer. A metal oxide HfO doped with metal Cu is prepared by co-sputtering a Hf target and a Cu target and introducing 10 sccm of oxygen and 30 sccm of argon. x , where 1 ≤ x ≤ 2, is used as the switch layer. During the deposition process, the sputtering power of the Cu target is reduced from 70 W to 40 W every 5 minutes, and the sputtering power of the Hf target is kept at 100 W. The total sputtering time is 20 minutes, and a total of about 25 nm of switch layer material is deposited; (4) Using magnetron sputtering to deposit 100 nm of Pt on the functional layer material as the second metal electrode layer material to obtain an initial device; (5) The initial device is placed in an annealing furnace for rapid thermal annealing. The annealing atmosphere is a nitrogen atmosphere, the annealing temperature is 500 degrees Celsius, and the annealing time is 30 seconds.

[0034] Figure 7 : This is the measured current-voltage curve of Example 2 of the present invention. It can be seen that the device with increasing doping metal concentration from top to bottom exhibits threshold switching behavior, which turns on near 0.8 V and changes from the off state to the on state. The leakage current is greater than 100 pA, the on-state current reaches 500 μA, and the switching ratio is about 5 x 10 6 , when the voltage drops below 0.4 V, the device returns to the off state. Compared with Comparative Example 1, the functional layer of the device adopts a Cu element doping concentration distribution that decreases from bottom to top. During the annealing process, oxygen vacancies are induced to be enriched preferentially along the polycrystalline grain boundaries and doping sites to form a preset localized high-concentration defect region. At the same time, Cu doping precipitates metal clusters as nucleation points for conductive filaments under reductive annealing conditions. The two synergistically reduce the activation energy barrier for the formation of the conductive channel, thereby realizing the threshold switching characteristics at a low driving voltage; compared with Example 1, the leakage current of the device is larger, and the on-state current is higher. This is because the high doping metal concentration at the bottom causes the electric field to be concentrated at the interface near the bottom electrode, which accelerates the migration of oxygen vacancies in the metal oxide and the nucleation of conductive filaments, forming a low-resistance path that penetrates the dielectric, increasing the leakage current, and the concentration decrease from bottom to top may cause the conductive filaments to be formed preferentially at the bottom, but due to the lack of sufficient doping metal or oxygen vacancies in the top area with high electric field strength, the filaments may not be able to completely penetrate the dielectric layer, forming an unstable local conductive path, and this instability provides a theoretical basis for its larger on-state current.

[0035] Example 3 This embodiment provides a method for preparing a gate transistor device, wherein the switch layer is a metal oxide HfO x The method comprises the following steps: doping metal Cu in the switching layer, wherein x=1.3, and the metal Cu is uniformly doped in the switching layer; and (1) Using Si and SiO2 semiconductor substrates, the substrates were ultrasonically cleaned in acetone, alcohol, and deionized water in turn, each time for 10 min. After cleaning, the residual liquid on the surface was blown dry with a nitrogen gun for later use; (2) Using magnetron sputtering, 10 nm of Ti and 100 nm of Pt are deposited on the substrate surface as the first metal electrode layer, where Ti acts as an adhesion layer to improve the adhesion between Pt and the SiO2 substrate. (3) A switching layer is grown on the first metal electrode layer. A metal oxide HfO doped with metal Cu is prepared by co-sputtering a Hf target and a Cu target and introducing 10 sccm of oxygen and 30 sccm of argon. x In the process of deposition, the sputtering power of Hf target was kept at 100W, and the sputtering power of Cu target was kept at 40W. The total sputtering time was 20 minutes, and a total of about 25nm of switch layer material was deposited. (4) Using magnetron sputtering to deposit 100 nm of Pt on the functional layer material as the second metal electrode layer material to obtain an initial device; (5) The initial device is placed in an annealing furnace for rapid thermal annealing. The annealing atmosphere is a nitrogen atmosphere, the annealing temperature is 500 degrees Celsius, and the annealing time is 30 seconds.

[0036] Figure 8 : This is the measured current-voltage curve of Example 3 of the present invention. It can be seen that the device with uniform distribution of doped metal concentration also exhibits threshold switching behavior. It turns on at around 0.8 V, changes from the off state to the on state, the leakage current is greater than 100 pA, the on-state current can reach 100 μA, and the on-off ratio is about 10 6, and when the voltage drops below 0.4 V, the device returns to the off state. Compared with Comparative Example 1, the device is uniformly doped with a single metal substance Cu, combined with a nitrogen atmosphere annealing treatment, to induce the directional enrichment of oxygen vacancies in the functional layer along the polycrystalline grain boundaries and the doping sites, forming a pre-distributed local high-concentration oxygen vacancy region to reduce the activation energy of the formation of the conductive filaments, and the annealing synchronously drives the reduction and precipitation of the doped metal to form metal nanoclusters as nucleation sites for the conductive filaments. The synergistic effect of the above-mentioned oxygen vacancy enrichment and metal clusters enables the device to exhibit threshold switching characteristics at a low driving voltage; compared with Example 1, the leakage current of the device is larger, and the on-state current is extremely unstable. After exceeding the threshold voltage, the current fluctuates at the μA level. This is because the uniform doping of the doped metal makes the distribution of the oxygen vacancies provided by the doped metal atoms and the metal oxide in the metal oxide highly random. Under the action of the electric field, multiple positions may nucleate at the same time to form multiple conductive filaments competing. This multi-filament behavior will cause the on-state current jump and the randomness of filament formation and breakage to increase. At the same time, uniform doping will introduce a large number of scattering centers, which will significantly reduce the carrier mobility, thereby reducing the off-state resistance of the switch layer and increasing the leakage current.

[0037] It will be easily understood by those skilled in the art that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A gate tube device, characterized in that: From bottom to top, there are a first metal electrode layer, a switch layer and a second metal electrode layer; the switch layer is a metal oxide doped with a metal element, and the metal element is a metal that can undergo redox reaction under the action of an electric field.

2. The gate tube device according to claim 1, characterized in that: The material of the metal oxide is selected from ScO x 、TiO x ,FeO x 、NiO x 、ZnO x 、ZrO x 、MoO x , HfO x 、TaO x , WO x One or more of , where x is in the range of 1≤x≤2.

3. The gate tube device according to claim 1, characterized in that: The metal element is selected from one or more of Ag, Cu and Co.

4. The gate transistor device according to claim 1, characterized in that: In the switching layer, the doping concentration of the metal element in the metal oxide increases from bottom to top.

5. The gate transistor device according to claim 4, characterized in that: The thickness of the switch layer is 1-30 nm.

6. The gate transistor device according to claim 5, characterized in that: The materials of the first metal electrode layer and the second metal electrode layer are independently selected from one or more of Pt, Ti, W, Au, Al, TiN, TaN, TiW, indium tin oxide, indium zinc oxide and indium silicon oxide.

7. The method for preparing a gate tube device according to any one of claims 1 to 6, characterized in that: The specific steps include: (1) depositing a first metal electrode layer on a substrate; (2) depositing a switching layer on the first metal electrode layer; (3) then depositing a second metal electrode layer on the switch layer to obtain an initial device; (4) Finally, the initial device is annealed to obtain a gate tube device.

8. The method for preparing a gate transistor device according to claim 7, characterized in that: The annealing time is 30-90s and the temperature is 400-600°C.

9. The method for preparing a gate transistor device according to claim 7, characterized in that: Methods for depositing the first metal electrode layer, the switch layer and the first metal electrode layer are independently selected from chemical vapor deposition, atomic layer deposition, sputtering, pulsed laser deposition, evaporation or molecular beam epitaxy.

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