A multifunctional optoelectronic logic gate based on copper indium phosphorous sulfide and operating method
By leveraging the bulk photovoltaic and photothermal effects of copper indium phosphorus sulfide (CIPS) materials, and combining a sandwich structure of graphene and metal electrodes, the functionality of a multifunctional optoelectronic logic gate in a single device was realized. This solves the problem that existing technologies cannot achieve multifunctional optoelectronic logic gates in a single device, enabling simple and easy-to-implement multifunctional logic control.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHENGDU UNIV
- Filing Date
- 2024-11-26
- Publication Date
- 2026-07-31
AI Technical Summary
Existing optoelectronic logic gates cannot achieve multiple functions with a single device, requiring complex device design.
A multifunctional optoelectronic logic gate based on copper indium phosphorus sulfur (CIPS) is adopted. By utilizing the bulk photovoltaic and photothermal effects of two-dimensional ferroelectric CIPS materials, bidirectional transmission of photocurrent is achieved through a simple device structure design. A sandwich structure is formed by combining graphene electrodes and metal electrodes, and the logic function of controlling the switching state and light intensity of the light source is utilized.
It implements OR gate, NOT gate, and XOR gate functions in a single device, is easy to fabricate, has simple bidirectional current control, requires no additional voltage for logic control, and is easy to operate.
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Figure CN119916626B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of optoelectronic logic gate technology, and in particular to a multifunctional optoelectronic logic gate based on copper indium phosphorus sulfur and its operation method. Background Technology
[0002] Optoelectronic logic gates (OELGs) convert optical input signals into electrical output signals using Boolean logic, showing broad application prospects in machine vision, real-time video analysis, and optical detection, and are expected to become a key component of future logic circuits. However, most current OELGs rely on pn heterojunctions. Due to the unidirectional carrier transport characteristic of pn junctions, they can often only realize a single logic gate, making it difficult to realize multifunctional OELGs. Currently, basic logic gates include AND, OR, NOT, XOR, NOR, and NAND. Existing OELGs cannot realize multifunctional OELGs with a single device; multiple devices are required. Therefore, achieving bidirectional photocurrent transmission through optical manipulation has attracted researchers' attention. This approach is expected to overcome the limitations of existing technologies and promote the development of multifunctional OELGs. For example, researchers have achieved bidirectional transmission of output current by adjusting the light wavelength, or through the competition mechanism between the photovoltaic and photothermal effects, or by utilizing different redox reactions in electrochemical cells. However, most of these studies require complex device designs. How to implement multifunctional optoelectronic logic gates using a single device is a current challenge.
[0003] Therefore, existing technologies still need to be improved and developed. Summary of the Invention
[0004] In view of the shortcomings of the prior art, this application provides a multifunctional optoelectronic logic gate based on copper indium phosphorus sulfur. By utilizing the bulk photovoltaic effect of the material, bidirectional transmission of photocurrent can be achieved with only a simple device structure design, thus providing a solution to realize a multifunctional optoelectronic logic gate in a single simple device and solving the above problems.
[0005] This application is achieved through the following technical solution:
[0006] The first aspect of this application is to provide a multifunctional optoelectronic logic gate based on copper indium phosphorus sulfide, comprising:
[0007] Substrate;
[0008] Two metal electrodes are respectively disposed at both ends of the upper surface of the substrate;
[0009] Two graphene electrodes are stacked on the upper surface of the substrate and located between the two metal electrodes and connected to the metal electrodes;
[0010] A two-dimensional ferroelectric copper indium phosphorus sulfur material is disposed between two layers of graphene electrodes to form a three-layer sandwich structure.
[0011] Two light sources are positioned above the upper graphene electrode, illuminating the surface of the two-dimensional ferroelectric copper indium phosphorus sulfur material through the transparent graphene electrode.
[0012] By adjusting the switching state and light intensity of the light source, the three functions of the photoelectric logic gate—OR gate, NOT gate, and XOR gate—are realized.
[0013] Specifically, the two-dimensional ferroelectric copper indium phosphorus sulfur material has the chemical formula CuInP2S6, is in the form of a film, and has a thickness of 200-240 nm.
[0014] Specifically, by using photolithography to design metal electrodes, and then performing exposure and evaporation, the metal electrodes are mounted on the substrate to obtain a substrate with metal electrodes at both ends, one of which is grounded.
[0015] Specifically, the graphene electrode is in the form of a film with a thickness of 0.4–0.7 nm;
[0016] The graphene electrode includes a lower first graphene electrode and an upper second graphene electrode.
[0017] One end of the first graphene electrode is at least partially connected to one of the metal electrodes, and one end of the second graphene electrode is at least partially connected to the other metal electrode. The metal electrode to which the second graphene electrode is connected is grounded, and the short-circuit photocurrent generated between the two metal electrodes serves as the output signal.
[0018] Specifically, the first graphene electrode, the two-dimensional ferroelectric copper indium phosphorus sulfur material, and the second graphene electrode are stacked sequentially from bottom to top along the thickness direction to form the sandwich structure.
[0019] Specifically, the substrate is a Si / SiO2 substrate, wherein the thickness of Si is 490–510 μm and the thickness of SiO2 is 275–295 nm.
[0020] Specifically, the wavelength range of both light sources is 320nm to 420nm. Adjusting the light intensity of the light sources causes the two-dimensional ferroelectric copper indium phosphorus sulfur material to undergo polarization reversal.
[0021] The second aspect of this application is to provide an operation method for a multifunctional optoelectronic logic gate based on copper indium phosphorus sulfide, comprising the following steps:
[0022] Obtain the input logic value generated by the light source and the output logic value of the photocurrent;
[0023] By adjusting the on / off state and light intensity of the light source, different functions of the photoelectric logic gate can be achieved.
[0024] Specifically, obtaining the input logic value generated by the light source and the output logic value of the photocurrent includes:
[0025] The input logic value is determined, wherein the input logic value is a two-digit logic value composed of the input logic value of the first light source and the input logic value of the second light source, and the on state of any one of the light sources is logic "1" and the off state is logic "0". The input logic value includes four types: "00", "10", "01" and "11".
[0026] The photocurrent is set to be the short-circuit current at a voltage of 0V, so that no additional voltage needs to be applied during the entire operation;
[0027] The output logic value is set to "1" when the photocurrent is positive and "0" when the photocurrent is negative.
[0028] Specifically, by adjusting the on / off state and light intensity of the light source, different functions of the photoelectric logic gate are achieved, including:
[0029] The light intensities of the first light source and the second light source are set such that the photocurrent is positive when the input logic values are "10", "11" and "01" respectively, and the corresponding output logic value is "1" to realize the OR gate logic function.
[0030] The light intensities of the first light source and the second light source are set such that when the input logic value is "11", the photocurrent is negative and the corresponding output logic value is "0", and when the input logic values are "10" and "01", the photocurrent is positive and the corresponding output logic value is "1", so as to realize the XOR gate logic function.
[0031] The first light source is set to always open, and the second light source is adjusted to be either closed or open, i.e., the input logic value is "(1)0" or "(1)1". By setting the light intensity of the first light source and the second light source, when the input logic value is "(1)0", the output photocurrent is positive, i.e., the output logic value is "1", and when the input logic value is "(1)1", the output photocurrent is negative, i.e., the output logic value is "0", so as to realize the NOT gate logic function.
[0032] Compared with the prior art, this application has the following advantages: (1) Through simple material and structural design, optoelectronic logic gates with three functions, OR gate, NOT gate and XOR gate, can be realized in a single device. They are easy to fabricate and have multiple functions; (2) A single device can realize bidirectional current control and polarization regulation; (3) The operation of logic control is simple. Only the light intensity needs to be adjusted to realize bidirectional current. Moreover, the control of the multifunctional logic gate does not require the application of additional voltage and does not require voltage adjustment to realize optoelectronic logic gate. Attached Figure Description
[0033] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0034] Figure 1 This is a schematic diagram of the structure of a multifunctional optoelectronic logic gate device based on copper indium phosphorus sulfur according to an embodiment of this application.
[0035] Figure 2 This is a schematic diagram of a multifunctional optoelectronic logic gate based on copper indium phosphorus sulfur (CIPS) according to an embodiment of this application.
[0036] Figure 3 This is a diagram showing the correspondence between light intensity and output current polarization direction in an embodiment of this application.
[0037] Figure 4 This is a schematic diagram of the logic control of a multifunctional optoelectronic logic gate based on copper indium phosphorus sulfur according to an embodiment of this application.
[0038] Figure reference numerals: 1-substrate; 2-metal electrode; 3-graphene electrode; 4-two-dimensional ferroelectric CuInP2S6 material; 5-light source. Detailed Implementation
[0039] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the embodiments of this application. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.
[0040] It should be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the embodiments of this application. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.
[0041] It should be understood that the terms "upper," "lower," "left," "right," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or a specific orientational structure and operation. Therefore, they should not be construed as limitations on the present invention.
[0042] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.
[0043] Optoelectronic logic gates (OELGs) convert optical input signals into electrical output signals using Boolean logic to achieve logical judgments. They have broad application prospects in machine vision, real-time video analysis, and optical detection, and are expected to become a key component of future logic circuits. However, most current OELGs rely on pn heterojunctions. Due to the unidirectional carrier transport characteristic of pn junctions, they can often only implement a single logic gate, making it difficult to realize multifunctional OELGs. Currently, basic logic gates include AND, OR, NOT, XOR, NOR, and NAND. Existing OELGs cannot achieve multifunctional OELGs with a single device, or achieving multifunctional OELGs requires complex device structures. Therefore, achieving bidirectional transmission of photocurrent through optical manipulation has attracted researchers' attention. This approach is expected to overcome the limitations of existing technologies and promote the development of multifunctional OELGs. For example, researchers have achieved bidirectional transmission of output current by adjusting the wavelength of light, or through the competition mechanism between the photovoltaic and photothermal effects, or by utilizing different redox reactions in electrochemical cells. However, most of these studies require complex device designs. How to implement multifunctional optoelectronic logic gates using a single device is a current challenge.
[0044] Copper indium phosphorus sulfide is a room-temperature two-dimensional ferroelectric material that still exhibits stable ferroelectric polarization at a thickness of 4 nm.
[0045] Bulk photovoltaic (BPVE) exists in materials with broken symmetry and can generate open-circuit voltages and short-circuit photocurrents exceeding the bandgap. Based on the bulk photovoltaic effect, ferroelectric materials can generate short-circuit photocurrents associated with their polarization direction by utilizing their spontaneous polarization. Furthermore, based on the correlation between the ferroelectric polarization of CIPS and the displacement of Cu ions within it, reversible ferroelectric polarization reversal of CIPS under global and local optical fields can be achieved through photothermal effects, thereby realizing bidirectional transmission of photocurrent in the device.
[0046] Copper indium phosphorus sulfide (CuInP2S6) is a typical two-dimensional ferroelectric material exhibiting bulk photovoltaic (BPVE) effect. Two-dimensional CIPS thin films can be obtained by mechanically exfoliating CIPS crystals. The ferroelectric polarization of CIPS is related to Cu... + The displacements are mutually coupled, and the photothermal effect can be used to drive Cu in CIPS. + The displacement of the material is used to control the polarization direction of CIPS. Furthermore, by combining the inherent bulk photovoltaic effect of the material, the polarization reversal caused by the photothermal effect can be achieved while simultaneously controlling the direction and magnitude of the photocurrent. Therefore, this application designs a multifunctional logic gate based on CIPS material. A sandwich structure device can be obtained simply through two-dimensional material transfer and stacking, thus realizing a multifunctional optoelectronic logic gate in a single device.
[0047] The first aspect of this application is to provide a multifunctional optoelectronic logic gate based on copper indium phosphorus sulfur, such as Figure 1 The diagram shown is a device structure diagram of a multifunctional optoelectronic logic gate in one embodiment. From bottom to top, it includes a substrate 1, two metal electrodes 2, two layers of graphene electrodes 3, a two-dimensional ferroelectric copper indium phosphorus sulfur material 4, and two sets of light sources 5.
[0048] Specifically, substrate 1 is a Si / SiO2 substrate, with the thickness of Si being 490–510 μm and the thickness of SiO2 being 275–295 nm.
[0049] Specifically, two metal electrodes 2 are disposed at both ends of the upper surface of the substrate, maintaining a certain distance between them to accommodate a sandwich structure composed of a graphene electrode and a copper indium phosphorus sulfide material. Specifically, the metal electrodes 2 include a first electrode and a second electrode, respectively located at both ends of the upper surface of the substrate, wherein the second electrode is grounded. The metal electrodes can be made of gold, silver, copper, platinum, palladium, iridium, and some alloys thereof, which have good electrical conductivity. In one embodiment, the metal electrodes are made of gold.
[0050] In one embodiment, the metal electrode 2 is designed using photolithography, and after the pattern is exposed and vapor-deposited, the metal electrode 2 is mounted on the substrate 1 to obtain a substrate with metal electrodes at both ends, with the side with the metal electrodes facing upwards, and one of the metal electrodes is grounded to form an output circuit.
[0051] The graphene electrode 3 is a two-dimensional (2D) material, in the form of a film, with a thickness of 0.4–0.7 nm. Graphene material possesses excellent thermal conductivity and exhibits good electron transport channels and stability. Two layers of graphene electrodes 3 are stacked vertically on the upper surface of the substrate and horizontally between the two metal electrodes 2, and are respectively connected to the metal electrodes 2. The graphene electrodes are transparent materials, allowing light sources to pass through the graphene and illuminate the surface of the two-dimensional ferroelectric material. Specifically, the connection between the two graphene electrodes and the two metal electrodes is such that one graphene electrode is connected to one metal electrode, and the other graphene electrode is connected to the other metal electrode. The contact surface of the metal electrode is the connection point, and the connection is achieved through van der Waals forces.
[0052] Specifically, in one embodiment, one metal electrode 2 is designated as the first metal electrode, and the other metal electrode 2 is designated as the second metal electrode. The graphene electrode 3 comprises a lower first graphene electrode and an upper second graphene electrode. One end of the first graphene electrode is at least partially connected to the first metal electrode, and one end of the second graphene electrode is at least partially connected to the second metal electrode. The second graphene electrode is grounded through the metal electrode, forming a short-circuit current as an output signal. The direction and magnitude of the short-circuit current can be controlled by switching the light source and adjusting the light intensity, thereby obtaining a multifunctional logic gate device.
[0053] One end of the first graphene electrode is at least partially connected to one of the metal electrodes, and one end of the second graphene electrode is at least partially connected to the other metal electrode. The metal electrode to which the second graphene electrode is connected is grounded, and the short-circuit photocurrent generated between the two metal electrodes serves as the output signal.
[0054] In one embodiment, the short-circuit current is set to 0V, eliminating the need for additional voltage application during operation. Preferably, the short-circuit current voltage can be set to 0V, meaning that different logic gates can be implemented without applying additional voltage. This eliminates the need to adjust the voltage to implement the logic gates, making operation convenient and allowing simple devices to implement logic gates with different functions.
[0055] In one embodiment, the output is logic "1" when the short-circuit current (photocurrent) is positive, and logic "0" when the short-circuit current (photocurrent) is negative. The positive or negative value of the photocurrent is related to the magnitude of the light intensity.
[0056] The two-dimensional ferroelectric copper indium phosphorus sulfur (CIPS) material 4 is also a two-dimensional (2D) material, in the form of a film with a thickness of 200–240 nm, and is disposed between the two graphene electrodes 3, forming a sandwich structure of three stacked two-dimensional structures. Due to its inherent bulk photovoltaic effect, the two-dimensional ferroelectric CIPS material correlates the photocurrent direction with the polarization direction of the ferroelectric material, and achieves reversible ferroelectric polarization reversal of CIPS under global and local light fields through photothermal effects, thereby realizing bidirectional transmission of photocurrent in the device. Photocurrent refers to the current under illumination and with a voltage of 0V. The photothermal effect refers to the reaction of Cu in the two-dimensional ferroelectric CIPS material after the upper layer of the sandwich structure is irradiated by light. + The temperature gradient drives the displacement, which in turn changes the ferroelectric polarization direction of the CIPS, thereby altering the direction of its photocurrent.
[0057] The stacking of the sandwich structures is achieved through van der Waals forces, as is the stacking of the contact surfaces between the metal electrodes and the graphene electrodes.
[0058] Two light sources 5 are positioned above the upper graphene electrode 3, i.e., the second graphene electrode, and vertically illuminate the upper surface of the upper graphene electrode 3. The graphene electrode is a transparent material; therefore, the light source can pass through the graphene electrode and illuminate the surface of the two-dimensional ferroelectric copper indium phosphorus sulfide material 4. The two light sources 5 include a first light source (Light-1) and a second light source (Light-2), both with a wavelength range of 320nm to 420nm. Adjusting the light intensity of the light sources can cause polarization reversal in the CIPS material. When either light source 5 illuminates the surface of the second graphene electrode, an input light signal is generated. The first light source (Light-1) generates a first light input signal, and the second light source (Light-2) generates a second light input signal. The on-state (i.e., the light source is on) of any light source 5 is defined as logic "1", and the off-state (the light source is off) is defined as logic "0", enabling three light input logics: "10", "01", and "11". When both light sources are off, i.e., the input logic value is "00", no photocurrent is generated.
[0059] The materials of the components that make up the structure of this application are readily available and the structure is simple. Polarization reversal and bidirectional photocurrent transmission can be achieved simply by utilizing the material properties of copper indium phosphorus sulfur.
[0060] like Figure 2 The diagram shown is a schematic of a multifunctional optoelectronic logic gate based on copper indium phosphorus sulfur according to this application.
[0061] In such Figure 2 In (a), the light intensities of the two light sources are set to a certain value, Cu + At the top of CIPS, by adjusting the light intensity, Cu can be... + Downward displacement to reach as Figure 2 (b) shows the bottom of CIPS, thereby changing the polarization direction of CIPS.
[0062] like Figure 3 The figure shows the output current corresponding to different light intensities in one embodiment of this application. When the light intensity is <0.45W / cm², the output current is... 2 As light intensity increases, current intensity also increases and remains positive. When light intensity continues to increase, exceeding 0.45 W / cm²... 2 Then, the current polarity reverses, forming a negative current. The specific principle is as follows: Figure 2 As shown, increasing the light intensity to a certain value can cause Cu + The downward displacement achieves polarization reversal. Therefore, by utilizing the properties of copper indium phosphorus sulfide (CIPS) materials, different optoelectronic logic gate functions can be realized by adjusting the light intensity.
[0063] The second aspect of this application is to provide an operation method for a multifunctional optoelectronic logic gate based on copper indium phosphorus sulfide (CIPS). By controlling the light intensity and utilizing the material properties, the multifunctional optoelectronic logic gate is realized, specifically including the following steps:
[0064] S1. Obtain the input logic value and the output logic value of the photocurrent generated by the light source;
[0065] S2. By adjusting the switching state or light intensity of the light source, different functions of the photoelectric logic gate can be achieved.
[0066] Specifically, step S1, obtaining the input logic value generated by the light source and the output logic value of the photocurrent, includes:
[0067] S11. Determine the input logic value, wherein the input logic value is a two-digit logic value composed of the input logic value of the first light source and the input logic value of the second light source, and the on state of any one of the light sources is logic "1" and the off state is logic "0". The input logic value includes four types: "00", "10", "01" and "11".
[0068] S12. Set the voltage to the short-circuit current at 0V to achieve the goal of not needing to apply additional voltage during the entire operation;
[0069] S13. Set the output logic value to "1" when the photocurrent is positive and "0" when the photocurrent is negative.
[0070] like Figure 4 As shown in Figure a, there are four types of input logic: 00 when both light sources are off, 10 when the first light source is on and the second light source is off, 01 when the first light source is off and the second light source is on, and 11 when both light sources are on.
[0071] Specifically, step S2, by adjusting the on / off state or light intensity of the light source, enables different functions of the photoelectric logic gate, including:
[0072] S21. Set the light intensity of the first light source and the second light source so that the photocurrent is positive when the input logic values are "10", "11" and "01" respectively, and the corresponding output logic value is "1" to realize the OR gate logic function.
[0073] In one embodiment, such as Figure 4 As shown in b, the light intensity of the first light source is set to 0.25 W / cm². 2 The light intensity of the second light source is 0.14 W / cm². 2 When the input logic is set to "10", "11", and "01" respectively, the corresponding output current is positive, so the output logic is "1" to realize the OR gate logic function.
[0074] Step S2 further includes: S22, setting the light intensity of the first light source and the second light source such that when the input logic value is "11", the output current is negative and the corresponding output logic value is "0", and when the input logic value is "10" or "01", the output current is positive and the corresponding output logic value is "1", so as to realize the XOR gate logic function.
[0075] In one embodiment, such as Figure 4 As shown in Figure c, the light intensity of the first light source is set to 0.42 W / cm². 2 The light intensity of the second light source is 0.20 W / cm². 2 When the input logic is set to "11", the total light intensity is 0.62 W / cm². 2 When the input logic is "10" or "01", the corresponding current is negative, so the output logic is "0". When the input logic is "10" or "01", the corresponding current is positive, so the output logic is "1", thus realizing the XOR logic function of the XOR gate.
[0076] Step S2 further includes: S23, setting the first light source to be normally open, adjusting the second light source to be either closed or open, that is, setting the input logic value to "10" or "11", and setting the light intensity of the first light source and the second light source to achieve the output logic value to be "1" or "0", so as to realize the NOT gate logic function.
[0077] In one embodiment, such as Figure 4 As shown in d, the first light source is set to be normally open, with a light intensity of 0.31 W / cm². 2When the second light source is turned off, that is, the light intensity of the system is 0.31 W / cm², which is the light intensity of the first light source. 2 The input logic is "(1)0", the output photocurrent is positive, and the output logic is "1". When the second light source is turned on and the light intensity of the second light source is 0.20W / cm², the output logic is "1". 2 The total light intensity is 0.51 W / cm². 2 The input logic is “(1)1”, and the corresponding output photocurrent is negative, that is, the output logic value is “0”, so as to realize the NOT logic function of the NOT gate.
[0078] Similarly, the second light source can be set to always-on, and the first light source can be set to on or off. By setting the light intensity, the NOT logic function of the NOT gate can also be implemented.
[0079] Understandable. Figure 3 and Figure 4 The corresponding light intensity and current sign represent the performance of a two-dimensional ferroelectric copper indium phosphorus sulfide material with a thickness of 200-240 nm in one embodiment of this application at 0 V. This material can be replaced with other two-dimensional ferroelectric materials or other materials with equivalent effects. Specifically, the light intensity value can also be in other ranges.
[0080] In summary, this application provides a multifunctional optoelectronic logic gate based on copper indium phosphorus sulfide (CIPS), comprising: a substrate; two metal electrodes respectively disposed at both ends of the upper surface of the substrate; two layers of graphene electrodes stacked on the upper surface of the substrate and located between the two metal electrodes and connected to the metal electrodes; a two-dimensional ferroelectric CIPS material disposed between the two layers of graphene electrodes, forming a three-layer stacked sandwich structure; two sets of light sources disposed above the upper graphene electrode, illuminating the surface of the two-dimensional ferroelectric CIPS material through the transparent graphene electrode; by controlling the light signal generated by the light source as the input signal, the three functions of the optoelectronic logic gate—OR gate, NOT gate, and XOR gate—are realized. By setting different light intensities, utilizing the bulk photovoltaic effect of the two-dimensional ferroelectric CIPS material, and defining the on / off logic value of the light source and the positive and negative logic values of the short-circuit current, the three optoelectronic logic gates—OR gate, NOT gate, and XOR gate—are realized. The structure of this application is simple, the materials are readily available and easy to fabricate. Bidirectional current control and polarization modulation can be achieved on a single device. The logic control operation is simple, and bidirectional current can be achieved by simply adjusting the light intensity. Furthermore, the control of the multifunctional logic gate does not require the application of an additional voltage, and the optoelectronic logic gate can be achieved without adjusting the voltage.
[0081] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions are not in essence a departure from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.
Claims
1. A multifunctional optoelectronic logic gate based on copper indium phosphorus sulfide, characterized in that, include: Substrate; Two metal electrodes are respectively disposed at both ends of the upper surface of the substrate; Two graphene electrodes are stacked on the upper surface of the substrate and located between the two metal electrodes and connected to the metal electrodes; A two-dimensional ferroelectric copper indium phosphorus sulfur material is disposed between two layers of graphene electrodes to form a three-layer sandwich structure. Two light sources are positioned above the upper graphene electrode, illuminating the surface of the two-dimensional ferroelectric copper indium phosphorus sulfur material through the transparent graphene electrode. By adjusting the switching state and light intensity of the light source, the three functions of the photoelectric logic gate—OR gate, NOT gate, and XOR gate—can be realized. By designing metal electrodes using photolithography, followed by exposure and evaporation, and then mounting the metal electrodes on the substrate, a substrate with metal electrodes at both ends can be obtained, with one of the metal electrodes grounded. The graphene electrode includes a first graphene electrode and a second graphene electrode. One end of the first graphene electrode is at least partially connected to one of the metal electrodes, and one end of the second graphene electrode is at least partially connected to another metal electrode. The metal electrode to which the second graphene electrode is connected is grounded, and the short-circuit photocurrent generated between the two metal electrodes is used as the output signal. The chemical formula of the two-dimensional ferroelectric copper indium phosphorus sulfur material is CuInP2S6. The voltage of the short-circuit photocurrent is 0V. When the short-circuit photocurrent is positive, the output is logic "1" and when the short-circuit photocurrent is negative, the output is logic "0". The polarization direction of CuInP2S6 is adjusted by regulating the light intensity of the light source, thereby changing the direction of the short-circuit photocurrent and making the short-circuit photocurrent positive or negative.
2. The multifunctional optoelectronic logic gate based on copper indium phosphorus sulfide according to claim 1, characterized in that, The two-dimensional ferroelectric copper indium phosphorus sulfur material is in the form of a film with a thickness of 200–240 nm.
3. The multifunctional optoelectronic logic gate based on copper indium phosphorus sulfide according to claim 1, characterized in that, The graphene electrode is in the form of a film with a thickness of 0.4~0.7 nm.
4. A multifunctional optoelectronic logic gate based on copper indium phosphorus sulfide according to claim 3, characterized in that, The first graphene electrode, the two-dimensional ferroelectric copper indium phosphorus sulfur material, and the second graphene electrode are stacked sequentially from bottom to top along the thickness direction to form the sandwich structure.
5. A multifunctional optoelectronic logic gate based on copper indium phosphorus sulfide according to claim 1, characterized in that, The substrate is a Si / SiO2 substrate, wherein the thickness of Si is 490–510 μm and the thickness of SiO2 is 275–295 nm.
6. A multifunctional optoelectronic logic gate based on copper indium phosphorus sulfide according to claim 1, characterized in that, Both light sources have wavelengths ranging from 320 nm to 420 nm. Adjusting the light intensity of the light sources causes the two-dimensional ferroelectric copper indium phosphorus sulfur material to undergo polarization reversal.
7. An operation method using the multifunctional optoelectronic logic gate based on copper indium phosphorus sulfide as described in any one of claims 1-6, characterized in that, Including the following steps: Obtain the input logic value generated by the light source and the output logic value of the photocurrent; By adjusting the on / off state and light intensity of the light source, different functions of the photoelectric logic gate can be achieved.
8. The operating method according to claim 7, characterized in that, The process of obtaining the input logic value and the output logic value of the photocurrent generated by the light source includes: The input logic value is determined, wherein the input logic value is a two-digit logic value composed of the input logic value of the first light source and the input logic value of the second light source, and the on state of any one of the light sources is logic "1" and the off state is logic "0". The input logic value includes four types: "00", "10", "01" and "11". The photocurrent is set to be the short-circuit current at 0V, so that no additional voltage needs to be applied during the entire operation; The output logic value is set to "1" when the photocurrent is positive and "0" when the photocurrent is negative.
9. The operating method according to claim 8, characterized in that, The method of adjusting the on / off state and light intensity of the light source to realize different functions of the photoelectric logic gate includes: The light intensities of the first and second light sources are set such that the photocurrent is positive when the input logic values are "10", "11", and "01", and the corresponding output logic value is "1", so as to realize the OR gate logic function. The light intensities of the first light source and the second light source are set such that when the input logic value is "11", the photocurrent is negative and the corresponding output logic value is "0", and when the input logic values are "10" and "01", the photocurrent is positive and the corresponding output logic value is "1", so as to realize the XOR gate logic function. The first light source is set to always open, and the second light source is adjusted to be either closed or open, i.e., the input logic value is "(1)0" or "(1)1". By setting the light intensity of the first light source and the second light source, when the input logic value is "(1)0", the output photocurrent is positive, i.e., the output logic value is "1", and when the input logic value is "(1)1", the output photocurrent is negative, i.e., the output logic value is "0", so as to realize the NOT gate logic function.