A monolithic hetero-integrated structure based on silicon-based 3C-SiC and a preparation method thereof
By using a monolithic heterogeneous integration structure based on silicon-based 3C-SiC, the problems of lattice mismatch and thermal mismatch between Si substrate and compound semiconductor material are solved, realizing efficient integration of multiple devices and modules, improving thermal management and isolation design, and making it suitable for multi-material and multi-device integration.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HUBEI JIUFENGSHAN LAB
- Filing Date
- 2025-01-07
- Publication Date
- 2026-07-21
AI Technical Summary
In the existing technology, there are lattice mismatch and thermal mismatch problems between Si substrate and compound semiconductor materials. The thermal management and isolation design problems between multiple devices and modules have not been effectively solved, and the devices are incompatible with standard CMOS processes.
A monolithic heterogeneous integration structure based on silicon-based 3C-SiC is adopted, including a silicon substrate, a buried oxide layer, a top silicon layer, a 3C-SiC layer, silicon photonic devices, radio frequency devices, optoelectronic devices, power devices, and MEMS devices. The 3C-SiC layer is used as a functional layer and a buffer layer to improve lattice mismatch and thermal management, thereby realizing the integration of multiple devices.
It effectively improves the mismatch and stress between Si and compound semiconductor materials, enhances the bonding strength between devices, improves thermal management capabilities, suppresses atomic diffusion, and realizes a multifunctional module-integrated heterogeneous chip.
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Figure CN119929734B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor device technology, specifically to a monolithic heterogeneous integrated structure based on silicon-based 3C-SiC and its fabrication method. Background Technology
[0002] Electronic systems are evolving towards miniaturization, diversification, and intelligence, aiming to create multifunctional microsystems with sensing, communication, processing, and transmission capabilities. The core technology of microsystems lies in integration, with three-dimensional heterogeneous integration gradually becoming the link between chip manufacturing and system integration. Under this integration method, different chips can possess different functions, processes, and characteristics, thereby enabling more diverse applications and higher levels of performance.
[0003] Monolithic integration in heterogeneous integration refers to the integration of various devices with different functions on a single chip. The chip packaging step can be omitted, but the manufacturing process requirements are challenging. Currently, monolithic heterogeneous integration is mainly based on Si substrates. For example, in microelectronics, the main development direction is monolithic heterogeneous integration of III-V group and Si-based CMOS electronic devices; in optoelectronics and MEMS devices, the main development direction is monolithic heterogeneous integration of III-V group optoelectronic devices, Si-based CMOS electronic devices, and MEMS devices.
[0004] However, achieving integrated multifunctional modules requires the use of multiple materials to perform different functions; significant lattice and thermal mismatches exist between Si and most compound semiconductors, especially III-V compounds; furthermore, the fabrication of III-V devices, quantum wells, thermistors, and other devices is not compatible with standard CMOS processes. Moreover, the isolation issues between multiple devices and modules increase the complexity of the manufacturing process; and increased chip integration also introduces heat dissipation problems.
[0005] Based on the current state of technological development, this invention provides a novel monolithic heterogeneous integrated structure based on silicon-based 3C-SiC and its fabrication method. Summary of the Invention
[0006] Based on the above description, the present invention provides a monolithic heterogeneous integrated structure based on silicon-based 3C-SiC and its fabrication method, in order to solve the technical problems of large mismatch between Si substrate and compound semiconductor material and the challenges of thermal management and isolation design among multiple devices and modules in existing integrated technologies.
[0007] The technical solution of the present invention to solve the above-mentioned technical problems is as follows:
[0008] In a first aspect, the present invention provides a monolithic heterogeneous integrated structure based on silicon-based 3C-SiC, comprising: a silicon substrate, a buried oxide layer, a top silicon layer, a 3C-SiC layer, silicon photonic devices, radio frequency devices, optoelectronic devices, power devices, and MEMS devices.
[0009] The buried oxide layer is disposed between the silicon substrate and the top silicon layer; the 3C-SiC layer is disposed on the top silicon layer;
[0010] The top silicon layer is provided with a first functional region, a second functional region, a third functional region, a fourth functional region and a fifth functional region in sequence; the 3C-SiC layer is provided with a first sub-3C-SiC layer, a second sub-3C-SiC layer and a third sub-3C-SiC layer in sequence;
[0011] The first functional area is used to form the silicon photonic device; the first sub-3C-SiC layer, the second sub-3C-SiC layer and the third sub-3C-SiC layer are respectively disposed corresponding to the second functional area, the third functional area and the fourth functional area, and are respectively used to set the optoelectronic device, the radio frequency device and the power device; the fifth functional area is used to set the MEMS device to construct a multi-device heterogeneous integrated structure.
[0012] Based on the above technical solution, the present invention can be further improved as follows.
[0013] Furthermore, the top silicon layer located in the first functional region is etched at different depths multiple times, and / or, doped, thin film deposited, locally opened, and germanium epitaxial processes are used to construct the silicon photonic device.
[0014] Furthermore, the silicon photonic device is one or more of waveguides, gratings, modulators, and germanium devices.
[0015] Furthermore, the radio frequency device is disposed on the second sub-3C-SiC layer located in the third functional region;
[0016] The radio frequency device includes an epitaxial material disposed on the second sub-3C-SiC layer and a dielectric layer and electrodes located on the epitaxial material.
[0017] Furthermore, the epitaxial material is a group III-V material.
[0018] Furthermore, the radio frequency device is a GaN HEMT, GaAs HBT, InP HBT, or Ga2O3 HEMT.
[0019] Furthermore, the optoelectronic device is bonded to the first sub-3C-SiC layer located in the second functional region;
[0020] The optoelectronic device is a III-V group laser or a light-emitting device.
[0021] Furthermore, the power device is formed on the third sub-3C-SiC layer located in the fourth functional region;
[0022] The power device is a lateral MOSFET, a lateral SBD, or a lateral IGBT.
[0023] Furthermore, the MEMS device is formed on the top silicon layer of the fifth functional region;
[0024] The MEMS device is a piezoresistive pressure sensor, a capacitive pressure sensor, a micro-oscillator, a MEMS optical sensor, or a biosensor.
[0025] In a second aspect, the present invention also provides a method for fabricating a monolithic heterogeneous integrated structure based on silicon-based 3C-SiC as described in the first aspect, comprising:
[0026] A 3C-SiC layer is grown and deposited on top of a silicon wafer containing a buried oxide layer to obtain an integrated substrate; the integrated substrate has five functional regions.
[0027] After etching, insulating layer deposition and planarization of the 3C-SiC layers in the second functional region and the first functional region, multiple 3C-SiC etchings of different depths are performed to form waveguides and expose the surface of the top silicon layer.
[0028] In the first functional area, after etching, ion implantation, insulating layer deposition and planarization of the exposed top silicon layer, silicon etching at different depths is performed multiple times to form a silicon photonic device.
[0029] In the third functional region, a semiconductor material is epitaxially grown on the 3C-SiC layer, and the semiconductor material is etched, dielectric deposited, and electrode prepared to form a radio frequency device;
[0030] In the second functional region, an optoelectronic device is formed by bonding on the 3C-SiC layer;
[0031] In the fourth functional region, the 3C-SiC layer is etched, dielectric deposited, and electrode fabricated to form a power device.
[0032] In the fifth functional region, dielectric deposition, etching, thin film deposition, and electrode fabrication are performed on the exposed top silicon layer to form a MEMS device.
[0033] Compared with the prior art, the technical solution of this application has the following beneficial technical effects:
[0034] The monolithic heterogeneous integrated structure based on silicon-based 3C-SiC provided by this invention comprises a silicon substrate, a buried oxide layer, a top silicon layer, a 3C-SiC layer, silicon optical devices, radio frequency devices, optoelectronic devices, power devices, and MEMS devices. The buried oxide layer is disposed between the silicon substrate and the top silicon layer. The 3C-SiC layer is disposed on the top silicon layer. The top silicon layer has five functional regions sequentially arranged: the first functional region is used to form silicon optical devices; the first, second, and third sub-3C-SiC layers correspond to the second, third, and fourth functional regions, respectively, and are used to set up optoelectronic devices, radio frequency devices, and power devices; the fifth functional region is used to set up MEMS devices, thereby constructing a multi-device heterogeneous integrated structure. Compared with the prior art, it has the following beneficial effects:
[0035] (1) The 3C-SiC layer is disposed on the top silicon layer, providing a 3C-SiC-on-Si substrate. This structure combines the advantages of Si's large size and low cost with the advantages of the wide bandgap semiconductor 3C-SiC. Among them, 3C-SiC can be used as a functional layer for some devices, such as the drift layer of power devices, the micro cantilever beam and sensing film of MEMS devices; it can also be used as a buffer layer for epitaxial growth of other materials (RF devices), such as III-V group materials GaN, Ga2O3, etc., which can effectively improve the mismatch and stress between Si and compound semiconductor materials; it can also be used as a bonding layer (optoelectronic devices) to improve the bonding strength between Si and other materials or modules; therefore, this 3C-SiC / Si integration platform is suitable for multi-material and multi-device integration.
[0036] (2) The 3C-SiC layer has high thermal conductivity, which can improve the thermal management capability of multi-device integration and improve the heat dissipation problem of chips with increased integration. By setting multiple sub-3C-SiC layers with spacing, thermal isolation can be performed between devices or modules, such as isolating the heat transfer between thermistor devices and heat-generating devices.
[0037] (3) The 3C-SiC layer can suppress atomic diffusion between the substrate and its epitaxial layer. When applied to RF devices, it can effectively improve RF loss and realize the crosstalk isolation design of monolithic integration using 3C-SiC.
[0038] In summary, the monolithic heterogeneous integrated structure based on silicon-based 3C-SiC and its fabrication method provided by this invention improves the mismatch problem between 3C-SiC / Si and other compound semiconductors compared to Si, making it suitable for integrating multi-component materials. 3C-SiC possesses high thermal conductivity, and its spacing layout design can improve the thermal management capability of the integrated chip. Furthermore, 3C-SiC can suppress atomic diffusion, enabling crosstalk isolation design for monolithic integration. Therefore, this monolithic heterogeneous integrated structure based on silicon-based 3C-SiC can achieve the integration of various devices or modules according to different application scenarios, realizing a multifunctional module-integrated heterogeneous integrated chip. Attached Figure Description
[0039] Figure 1 This is a schematic diagram of the monolithic heterogeneous integration structure based on silicon-based 3C-SiC provided in Embodiment 1 of the present invention;
[0040] Figures 2 to 9 This is a schematic diagram of the fabrication process of a monolithic heterogeneous integrated structure based on silicon-based 3C-SiC provided in Embodiment 2 of the present invention.
[0041] Figure 10 This is a schematic diagram of the integration of optoelectronic devices provided in Embodiment 3 of the present invention;
[0042] The attached diagram lists the components represented by each number as follows:
[0043] 1. Silicon substrate; 2. Buried oxide layer; 3. Top silicon layer; 4. 3C-SiC layer; 5. Silicon photonics device; 6. Radio frequency device; 7. Optoelectronic device; 8. Power device; 9. MEMS device. Detailed Implementation
[0044] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.
[0045] This invention provides a monolithic heterogeneous integration structure based on silicon-based 3C-SiC.
[0046] The embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples. The following examples are used to illustrate the present invention, but should not be used to limit the scope of the present invention.
[0047] Example 1
[0048] like Figure 1 As shown, the monolithic heterogeneous integrated structure based on silicon-based 3C-SiC provided in this embodiment includes: a silicon substrate 1, a buried oxide layer 2, a top silicon layer 3, a 3C-SiC layer 4, a silicon photonic device 5, a radio frequency device 6, an optoelectronic device 7, a power device 8, and a MEMS device 9.
[0049] The buried oxide layer 2 is disposed between the silicon substrate 1 and the top silicon layer 3; the 3C-SiC layer 4 is disposed on the top silicon layer 3.
[0050] The top silicon layer 3 is provided with a first functional area, a second functional area, a third functional area, a fourth functional area and a fifth functional area arranged side by side and spaced apart; the 3C-SiC layer 4 is provided with a first sub-3C-SiC layer, a second sub-3C-SiC layer and a third sub-3C-SiC layer.
[0051] The first functional area is used to form the silicon photonic device 5.
[0052] The top silicon layer 3 located in the first functional area is etched at different depths multiple times, and / or, doped, thin film deposited, locally opened, germanium epitaxial processes to form a silicon photonic device 5.
[0053] Specifically, an optoelectronic device 7 is bonded to the first sub-3C-SiC layer located in the second functional region.
[0054] In a specific example, the silicon photonic device 5 is one or more of a waveguide, grating, modulator, and germanium device.
[0055] When silicon photonic device 5 is a waveguide, such as Figure 1 As shown, a waveguide is provided at the first sub-3C-SiC layer of the second functional area. Its significance is that light emitted from the optoelectronic device is transmitted to the silicon waveguide through the 3C-SiC waveguide, and then the light is transmitted or emitted. Otherwise, the light cannot be directly transmitted to the silicon waveguide.
[0056] In a specific example, optoelectronic device 7 is a III-V group laser or a light-emitting device.
[0057] The first sub-3C-SiC layer, the second sub-3C-SiC layer, and the third sub-3C-SiC layer are respectively set to the second functional region, the third functional region, and the fourth functional region, and are used to set up optoelectronic device 7, radio frequency device 6, and power device 8, respectively; the fifth functional region is used to set up MEMS device 9, so as to construct a multi-device heterogeneous integrated structure.
[0058] Specifically, radio frequency devices 6 are located on the second sub-3C-SiC layer in the third functional area.
[0059] The radio frequency device 6 includes an epitaxial material disposed on the second sub-3C-SiC layer and a dielectric layer and electrodes disposed on the epitaxial material.
[0060] The epitaxial material is a III-V group material.
[0061] In a specific example, the aforementioned RF device 6 is a GaN HEMT, GaAs HBT, InP HBT, or Ga2O3 HEMT.
[0062] Furthermore, a power device 8 is formed on the third sub-3C-SiC layer located in the fourth functional region.
[0063] Power device 8 is a lateral MOSFET, lateral SBD, or lateral IGBT.
[0064] Furthermore, a MEMS device 9 is formed on the top silicon layer 3 located in the fifth functional region.
[0065] MEMS device 9 can be a piezoresistive pressure sensor, a capacitive pressure sensor, a micro-oscillator, a MEMS optical sensor, or a biosensor.
[0066] Compared to existing technologies, the monolithic heterogeneous integration structure based on silicon-based 3C-SiC provided in this embodiment has the following advantages:
[0067] (1) The 3C-SiC layer is disposed on the top silicon layer, providing a 3C-SiC-on-Si substrate. This structure combines the advantages of Si's large size and low cost with the advantages of the wide bandgap semiconductor 3C-SiC. Among them, 3C-SiC can be used as a functional layer for some devices, such as the drift layer of power devices, the micro cantilever beam and sensing film of MEMS devices; it can also be used as a buffer layer for epitaxial growth of other materials (RF devices), such as III-V group materials GaN, Ga2O3, etc., which can effectively improve the mismatch and stress between Si and compound semiconductor materials; it can also be used as a bonding layer (optoelectronic devices) to improve the bonding strength between Si and other materials or modules; therefore, this 3C-SiC / Si integration platform is suitable for multi-material and multi-device integration.
[0068] (2) The 3C-SiC layer has high thermal conductivity, which can improve the thermal management capability of multi-device integration and improve the heat dissipation problem of chips with increased integration. By setting multiple sub-3C-SiC layers with spacing, thermal isolation can be performed between devices or modules, such as isolating the heat transfer between thermistor devices and heat-generating devices.
[0069] (3) The 3C-SiC layer can suppress atomic diffusion between the substrate and its epitaxial layer. When applied to RF devices, it can effectively improve RF loss and realize the crosstalk isolation design of monolithic integration using 3C-SiC.
[0070] In summary, the monolithic heterogeneous integrated structure based on silicon-based 3C-SiC and its fabrication method provided in this embodiment can realize the integration of various devices or modules according to different application scenarios, and realize a multifunctional module integrated heterogeneous integrated chip.
[0071] Example 2
[0072] This embodiment provides a method for fabricating the monolithic heterogeneous integrated structure based on silicon-based 3C-SiC provided in Example 1, such as... Figures 2 to 9 As shown, it includes:
[0073] Step S1: A 3C-SiC layer is grown and deposited on the top of a silicon wafer containing a buried oxide layer to obtain an integrated substrate; the integrated substrate has five functional regions.
[0074] Specifically, such as Figure 2As shown, a 500nm~5μm 3C-SiC layer is deposited on top of a Si wafer containing a buried oxide layer using chemical or physical growth methods as a subsequent integration substrate.
[0075] The Si wafer consists of a Si substrate, a 1-3 μm buried oxide (BOX) SiO2 layer, and a 100-400 nm top silicon layer. 3C-SiC can be synthesized at relatively low temperatures (below 1300℃), belongs to the cubic crystal system like Si, and is the only SiC crystal form that can be grown on a Si substrate with excellent performance. Therefore, 3C-SiC / Si substrates are a suitable alternative to Si substrates as monolithic integration platforms, combining the advantages of Si's large size and low cost with the advantages of the wide bandgap semiconductor 3C-SiC.
[0076] Step S2: After etching, depositing insulating layers and planarizing the 3C-SiC layers of the second functional region and the first functional region, perform multiple 3C-SiC etchings at different depths to form waveguides and expose the surface of the top silicon layer.
[0077] Specifically, such as Figure 3 As shown, certain areas of 3C-SiC undergo etching, insulating layer deposition, and planarization processes. Waveguides are formed and the Si surface is exposed through multiple etching processes at varying depths of 3C-SiC, facilitating subsequent fabrication of Si devices.
[0078] Step S3: In the first functional area, after etching, ion implantation, insulating layer deposition and planarization of the exposed top silicon layer, silicon etching at different depths is performed multiple times to form a silicon photonic device.
[0079] Specifically, such as Figure 4 As shown, Si in a portion of the area undergoes etching, ion implantation, insulating layer deposition, planarization, and other processes. Silicon optical devices are formed through multiple etching processes at varying depths. These devices can be waveguides, gratings, modulators, or germanium devices formed through localized openings and germanium epitaxial growth. Figure 4 The illustration uses a silicon waveguide and does not constitute a limitation of the present invention.
[0080] Step S4: In the third functional region, an epitaxial semiconductor material is grown on the 3C-SiC layer, and the semiconductor material is etched, dielectric deposited, and electrode prepared to form a radio frequency device.
[0081] Specifically, such as Figure 5As shown, III-V compound semiconductor materials are locally epitaxially grown on 3C-SiC. These III-V materials can be GaN / AlGaN heterojunctions, AlGaAs / GaAs heterojunctions, InAlAs / InP or InP / InGaAs / InP heterojunctions, (AlxGa1-x)2O3 / Ga2O3 heterojunctions, etc. 3C-SiC can serve as a buffer layer for the epitaxial growth of other compound semiconductor materials on a Si substrate, effectively improving the mismatch and stress between Si and III-V materials, and enhancing the crystal quality of the epitaxial layer.
[0082] like Figure 6 As shown, radio frequency (RF) devices are fabricated by performing etching, dielectric deposition, and electrode fabrication processes on III-V group materials. The etched 3C-SiC portion provides crosstalk isolation for the RF devices. RF devices that can be fabricated using the aforementioned epitaxial III-V group materials include GaN HEMTs, GaAs HBTs, InP HBTs, and Ga2O3 HEMTs.
[0083] Studies have shown that 3C-SiC can suppress atomic diffusion between the substrate and the epitaxial layer. When applied to RF devices, it can effectively improve RF loss. Therefore, 3C-SiC can be used to improve the crosstalk isolation design of monolithic integration.
[0084] Step S5: At the second functional region, an optoelectronic device is formed by bonding on the 3C-SiC layer.
[0085] Specifically, such as Figure 7 As shown, optoelectronic devices are bonded to 3C-SiC using a coupon-to-wafer method. The optoelectronic devices can be III-V group lasers (LDs), including InP LDs, GaAs LDs, VCSELs (vertical cavity surface-emitting lasers), etc.; or they can be light-emitting devices, including GaN-based LEDs (light-emitting diodes), mini LEDs, microLEDs, etc.
[0086] First, optoelectronic devices are fabricated on individual III-V group epitaxial wafers through quantum well growth, etching, and coating processes. Then, the wafers are thinned and diced into smaller pieces to form samples for bonding. These samples, containing the optoelectronic devices, are then integrated onto a 3C-SiC / Si platform using surface activation bonding or plasma activation bonding techniques. 3C-SiC can serve as a bonding layer, enhancing the bonding strength between Si and other materials or devices. Based on the 3C-SiC / Si platform, various materials can be heterogeneously integrated through bonding.
[0087] In addition, 3C-SiC has high thermal conductivity, which can improve the thermal management capabilities of multi-device integration: such as improving the heat dissipation of chips with increased integration density; or by controlling the layout of 3C-SiC, thermal isolation can be achieved between devices or modules, such as isolating heat transfer between thermistors and heat-generating devices.
[0088] Step S6: At the fourth functional region, the 3C-SiC layer is etched, dielectric deposited, and electrode fabricated to form a power device.
[0089] Specifically, such as Figure 8 As shown, power devices are fabricated by etching, dielectric deposition, and electrode fabrication on a portion of 3C-SiC. These power devices can be lateral MOSFETs, lateral SBDs, lateral IGBTs, etc.
[0090] Figure 8 The diagram uses a 3C-SiC MOSFET as an example. 3C-SiC has a wider bandgap (2.36 eV) than Si, and higher carrier mobility, lower interface defect state density, and higher electron affinity (3.7 eV) than 4H-SiC, which is widely used in power devices. Therefore, 3C-SiC has certain advantages in fabricating power devices.
[0091] Step S7: At the fifth functional region, dielectric deposition, etching, thin film deposition, and electrode fabrication are performed on the exposed top silicon layer to form a MEMS device.
[0092] Specifically, such as Figure 9 As shown, amorphous SiC and dielectric deposition, etching, 3C-SiC deposition and etching, thin film deposition, electrode fabrication and other processes are performed on Si in a certain area to fabricate MEMS devices.
[0093] MEMS devices can include piezoresistive pressure sensors, capacitive pressure sensors, micro-oscillators, MEMS optical sensors, biosensors, etc.
[0094] 3C-SiC possesses excellent bandgap width and electrochemical and mechanical stability, while also exhibiting high hardness and elastic modulus, high conductivity, high critical electric field, high electron mobility, diverse surface chemical properties, and good biocompatibility. 3C-SiC thin films are suitable for fabricating MEMS devices.
[0095] Finally, after completing window filling and planarization, multi-layer metal interconnection of the chip is performed to complete the monolithic heterogeneous integrated chip with multi-functional modules based on the 3C-SiC / Si integration platform.
[0096] Since this preparation method is used to prepare monolithic heterogeneous integrated structures based on silicon-based 3C-SiC, the beneficial effects of monolithic heterogeneous integrated structures based on silicon-based 3C-SiC are also applicable to this preparation method. For the beneficial effects, please refer to the effect description above, and it will not be repeated here.
[0097] Example 3
[0098] The difference between this embodiment and Embodiments 1 and 2 is that: step S3 is performed first to complete the fabrication of the Si device (silicon photonic device), and then the 3C-SiC layer is deposited in step S1—3C-SiC is grown on the Si substrate, and then subsequent processes are performed.
[0099] Furthermore, the order of fabrication processes for each device is not fixed, but depends on the complexity of the processes, the compatibility between processes, and the impact of subsequent processes on the current device. When process conditions permit, the fabrication of a specific layer of multiple devices can be completed simultaneously in a single process step.
[0100] For the remaining identical structures and their preparation methods, please refer to the descriptions in Examples 1 and 2, which will not be repeated here.
[0101] Example 4
[0102] The difference between this embodiment and Embodiments 1 and 2 is that, in addition to the radio frequency device being fabricated based on epitaxial InP, GaN or Ga2O3 materials as described in Embodiment 1 (step S4 in Embodiment 2), the independently fabricated radio frequency module can also be bonded to 3C-SiC using a coupon to wafer method.
[0103] For the remaining identical structures and their preparation methods, please refer to the descriptions in Examples 1 and 2, which will not be repeated here.
[0104] Example 5
[0105] The difference between this embodiment and Embodiments 1 and 2 is that, in addition to the coupon-to-wafer bonding method described in Embodiment 1 (step S5 in Embodiment 2), the optoelectronic device in this embodiment can also be bonded to Si, such as... Figure 10 The diagram shows how to first etch deep trenches into Si to place the optical components, and then bond the optoelectronic devices to the Si trenches using a coupon-to-wafer method; alternatively, it can be based on the epitaxial growth of InP, GaAs, GaN and other materials with photoelectric effects on 3C-SiC, and then fabricate the optoelectronic materials based on the epitaxial growth.
[0106] For the remaining identical structures and their preparation methods, please refer to the descriptions in Examples 1 and 2, which will not be repeated here.
[0107] Example 6
[0108] The difference between this embodiment and Embodiments 1 and 2 is that, in addition to being fabricated based on 3C-SiC as described in Embodiment 1 (step S6 in Embodiment 2), the power device can also be fabricated based on a 3C-SiC buffer layer epitaxial wide bandgap semiconductor material (GaN, Ga2O3), and then based on the epitaxial material; or the independently fabricated power device can be bonded to 3C-SiC using a coupon to wafer method.
[0109] For the remaining identical structures and their preparation methods, please refer to the descriptions in Examples 1 and 2, which will not be repeated here.
[0110] Example 7
[0111] The difference between this embodiment and Embodiments 1 and 2 is that, in addition to being fabricated based on Si and 3C-SiC materials as described in Embodiment 1 (step S7 in Embodiment 2), the MEMS module can also be a separately fabricated MEMS device bonded to 3C-SiC using a coupon-to-wafer method.
[0112] For the remaining identical structures and their preparation methods, please refer to the descriptions in Examples 1 and 2, which will not be repeated here.
[0113] In the description of this specification, references to terms such as "specific example" or "some examples" indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of those different embodiments or examples.
[0114] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A monolithic heterogeneous integrated structure based on silicon-based 3C-SiC, characterized in that, include: Silicon substrates, buried oxide layers, top silicon layers, 3C-SiC layers, silicon photonic devices, radio frequency devices, optoelectronic devices, power devices, and MEMS devices; The buried oxide layer is disposed between the silicon substrate and the top silicon layer; the 3C-SiC layer is disposed on the top silicon layer; The top silicon layer is provided with a first functional region, a second functional region, a third functional region, a fourth functional region and a fifth functional region in sequence; the 3C-SiC layer is provided with a first sub-3C-SiC layer, a second sub-3C-SiC layer and a third sub-3C-SiC layer in sequence; The first functional region is used to form the silicon photonic device; the first sub-3C-SiC layer, the second sub-3C-SiC layer, and the third sub-3C-SiC layer are respectively disposed corresponding to the second functional region, the third functional region, and the fourth functional region, and are respectively used to set the optoelectronic device, the radio frequency device, and the power device; the fifth functional region is used to set the MEMS device to construct a multi-device heterogeneous integrated structure. The top silicon layer located in the first functional region is etched to different depths multiple times, and / or, doped, thin film deposited, locally opened, and germanium epitaxial processes to form the silicon photonic device; The radio frequency device is located on the second sub-3C-SiC layer of the third functional region; The radio frequency device includes an epitaxial material disposed on the second sub-3C-SiC layer and a dielectric layer and electrodes located on the epitaxial material; The optoelectronic device is bonded to the first sub-3C-SiC layer located in the second functional region; The optoelectronic device is a III-V group laser or a light-emitting device.
2. The monolithic heterogeneous integrated structure based on silicon-based 3C-SiC according to claim 1, characterized in that, The silicon photonic device is one or more of waveguides, gratings, modulators, and germanium devices.
3. The monolithic heterogeneous integration structure based on silicon-based 3C-SiC according to claim 1, characterized in that, The epitaxial material is a III-V group material.
4. The monolithic heterogeneous integration structure based on silicon-based 3C-SiC according to claim 1, characterized in that, The radio frequency device is a GaN HEMT, GaAs HBT, InP HBT, or Ga2O3 HEMT.
5. The monolithic heterogeneous integration structure based on silicon-based 3C-SiC according to claim 1, characterized in that, The power device is formed on the third sub-3C-SiC layer located in the fourth functional region; The power device is a lateral MOSFET, a lateral SBD, or a lateral IGBT.
6. The monolithic heterogeneous integration structure based on silicon-based 3C-SiC according to claim 1, characterized in that, The MEMS device is formed on the top silicon layer of the fifth functional region; The MEMS device is a piezoresistive pressure sensor, a capacitive pressure sensor, a micro-oscillator, a MEMS optical sensor, or a biosensor.
7. A method for fabricating a monolithic heterogeneous integrated structure based on silicon-based 3C-SiC as described in any one of claims 1 to 6, characterized in that, include: A 3C-SiC layer is grown and deposited on top of a silicon wafer containing a buried oxide layer to obtain an integrated substrate; The integrated substrate has five functional areas; After etching, insulating layer deposition and planarization of the 3C-SiC layers in the second functional region and the first functional region, multiple 3C-SiC partial etchings of different depths are performed to form waveguides and expose the surface of the top silicon layer. In the first functional area, after etching, ion implantation, insulating layer deposition and planarization of the exposed top silicon layer, silicon etching at different depths is performed multiple times to form a silicon photonic device. In the third functional region, a semiconductor material is epitaxially grown on the 3C-SiC layer, and the semiconductor material is etched, dielectric deposited, and electrode prepared to form a radio frequency device; In the second functional region, an optoelectronic device is formed by bonding on the 3C-SiC layer; In the fourth functional region, the 3C-SiC layer is etched, dielectric deposited, and electrode fabricated to form a power device. In the fifth functional region, dielectric deposition, etching, thin film deposition, and electrode fabrication are performed on the exposed top silicon layer to form a MEMS device.