Hot straightening wafer table, photolithography apparatus and high-order overlay error correction method

Abstract

The present disclosure provides a thermal correction wafer table, a photolithography device and a high-order overlay error correction method. The thermal correction wafer table comprises, from top to bottom, a vacuum chuck comprising an array of protrusions and a sealing side wall for adsorbing and fixing a wafer; a thermal correction execution assembly comprising a base plate and an array of temperature execution units, each temperature execution unit comprising a heating / cooling element and a first temperature sensor for controlling thermal deformation of the wafer to correct high-order overlay errors; a support assembly comprising a mounting flange for fixed connection with the vacuum chuck and an array of second through holes; a piezoelectric ceramic driving assembly comprising an array of piezoelectric ceramic units, the piezoelectric ceramic units being in contact with a lower surface of the vacuum chuck after passing through the second through holes and the first through holes on the thermal correction execution assembly for regulating a surface shape of the wafer; wherein the arrays of protrusions, temperature execution units, second through holes and piezoelectric ceramic units correspond to each other.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor equipment technology, specifically to a thermally corrected wafer stage, a photolithography device, and a method for correcting high-order overlay errors. Background Technology

[0002] As the linewidth of semiconductor chips decreases, high-resolution overlay error control has become a significant challenge in the field of photolithography. Mask and wafer deformation, non-uniformity in wafer stage movement, and environmental factors can all introduce alignment and overlay errors. Currently, linear overlay error correction can be achieved by applying force actuators around the mask, such as through translation, rotation, and amplification.

[0003] When the accuracy of linear overlay error correction is insufficient, it is necessary to correct higher-order overlay errors. Current lithography equipment can only support up to the third order for higher-order overlay error correction achieved through lens control in existing technologies, and several higher-order terms cannot be accurately corrected by controlling the lens alone.

[0004] Advanced overlay error correction based on thermal actuators requires higher precision in wafer profile. Therefore, the development of a wafer stage that simultaneously addresses wafer profile control and advanced overlay error correction is of great value. Summary of the Invention

[0005] (a) Technical problems to be solved

[0006] To address the aforementioned issues, this disclosure provides a thermally corrected wafer stage, a photolithography apparatus, and a method for correcting high-order overlay errors, which solves the technical problems of the difficulty in accurately correcting high-order overlay errors using traditional methods.

[0007] (II) Technical Solution

[0008] The first aspect of this disclosure provides a thermally corrected wafer stage, comprising, from top to bottom: a vacuum chuck, including an array of protrusions and a sealed sidewall surrounding the array, for adsorbing and fixing a wafer; a thermally corrected actuator assembly, including a substrate and an array of temperature actuators, each temperature actuator including a heating / cooling element and a first temperature sensor, for controlling the thermal deformation of the wafer to correct higher-order overlay errors; a support assembly, including a mounting flange for fixed connection with the vacuum chuck and an array of second through holes; and a piezoelectric ceramic drive assembly, including an array of piezoelectric ceramic units, the piezoelectric ceramic units passing through the second through holes and the first through holes on the thermally corrected actuator assembly and contacting the lower surface of the vacuum chuck, for adjusting the wafer's surface shape; wherein the array of protrusions, the array of temperature actuators, the array of second through holes, and the array of piezoelectric ceramic units correspond to each other.

[0009] According to embodiments of this disclosure, the thickness of the vacuum suction cup is 1-2 mm; the material of the vacuum suction cup is either silicon carbide or aluminum nitride; and a gap is provided between adjacent protrusions in the vacuum suction cup to insulate them from each other.

[0010] According to embodiments of this disclosure, the substrate of the thermal correction execution assembly is a PCB board with circuitry; the heating / cooling element is a thermoelectric element, such as a Peltier, disposed on the lower surface of the substrate, and the temperature of each heating / cooling element is independently controlled; the first temperature sensor is a thermistor disposed on the upper surface of the substrate.

[0011] According to embodiments of this disclosure, the substrate is further provided with heat transfer holes, which are filled with thermally conductive material; the heat transfer holes are in contact with heating / cooling elements to rapidly transfer heat to the protrusions.

[0012] According to embodiments of this disclosure, the heating / cooling element includes: a resistance heating wire made of metal or conductive ceramic; a cooling water pipe containing a liquid of either water or ethylene glycol; a heat-conducting block having the resistance heating wire and the cooling water pipe housed on its upper surface for heat conduction; and a second temperature sensor disposed on the lower surface of the heat-conducting block.

[0013] According to embodiments of this disclosure, the support assembly further includes: at least four wire outlets for concentrating the circuit connection lines of the heating / cooling element and the first temperature sensor; a third through hole for accommodating the vacuum channel of the vacuum suction cup; and a cooling water pipe channel disposed on the lower surface of the support assembly for releasing the heat generated by the heating / cooling element to the outside.

[0014] According to embodiments of this disclosure, the potential difference across each piezoelectric ceramic unit in the piezoelectric ceramic driving assembly is independently controlled to apply a force to the vacuum chuck, thereby controlling the surface shape of the wafer; wherein the surface shape PV in one exposure field of the wafer is <10nm.

[0015] The second aspect of this disclosure provides a photolithography apparatus, comprising: a thermal correction stage as described above, for adjusting the surface shape of a wafer and controlling the thermal deformation of the wafer to correct higher-order overlay errors; an exposure light source; an alignment system for measuring overlay errors; and a thermal correction control system for adjusting the operating state of a thermal correction execution component based on temperature load data to control the thermal deformation of the wafer and thereby correct higher-order overlay errors.

[0016] The third aspect of this disclosure provides a method for correcting high-order overlay errors, comprising: S1, using a vacuum chuck to adsorb and fix the wafer, and using a piezoelectric ceramic driving component to control the surface shape of the wafer; S2, establishing a grid coordinate system for an exposure field and obtaining the thermal deformation matrix of the wafer; S3, using an alignment system to measure the overlay error in the exposure field, and calculating temperature load control matrix data based on the overlay error; S4, adjusting the working state of the thermal correction execution component according to the temperature load control matrix data to control the thermal deformation of the wafer and thereby correct the high-order overlay error.

[0017] According to an embodiment of this disclosure, the method further includes: S5, measuring the overlay error after correcting the higher-order overlay error using an alignment system; if the preset overlay accuracy is not met, correcting the thermal deformation matrix and repeating S3 to S5 until the preset overlay accuracy is met; if the preset overlay accuracy is met, ending the higher-order overlay error correction process.

[0018] (III) Beneficial Effects

[0019] The thermal correction stage, lithography equipment, and high-order overlay error correction method disclosed herein utilize an array of temperature execution units in the thermal correction execution component to control the thermal deformation of the wafer, thereby correcting overlay errors in the X and Y directions of the wafer. This method can correct overlay errors, especially high-order overlay errors, both between and within the exposure field, with higher precision. Simultaneously, to achieve efficient heat conduction, the vacuum chuck is designed with a very small thickness, which can cause deformation during wafer adsorption and affect the exposure effect. By using a piezoelectric ceramic driving component to adjust the wafer's surface shape, the Z-direction deformation of the wafer can be corrected. Attached Figure Description

[0020] Figure 1 An exploded view of a thermally correcting support stage according to an embodiment of the present disclosure is shown schematically.

[0021] Figure 2 A schematic cross-sectional view of the thermally correcting support stage according to an embodiment of the present disclosure is shown.

[0022] Figure 3 A schematic cross-sectional view is shown in the embodiment of the present disclosure of the vacuum chuck and the thermal correction actuator in a coupled state;

[0023] Figure 4 A schematic diagram of the structure of a heating / cooling element according to an embodiment of the present disclosure is shown.

[0024] Figure 5 A schematic diagram of the structure of the support component according to an embodiment of the present disclosure is shown.

[0025] Figure 6 This schematic diagram illustrates the control process of the thermal correction control system according to an embodiment of the present disclosure;

[0026] Figure 7 The schematic diagram illustrates a flowchart of a high-order overlay error correction method according to an embodiment of the present disclosure;

[0027] Figure 8 A schematic diagram illustrating the structure of a grid coordinate system according to an embodiment of the present disclosure is shown.

[0028] Figure 9 This schematic diagram illustrates the arrangement of temperature execution units in a thermal correction execution assembly according to an embodiment of the present disclosure.

[0029] Explanation of reference numerals in the attached figures:

[0030] 1. Wafer; 2. Vacuum chuck; 21. Hermetically sealed sidewall; 22. Protrusion; 23. Vacuum channel; 3. Thermal correction actuator; 31. Substrate; 32. Heating / cooling element; 33. First temperature sensor; 34. Heat transfer hole; 311. Resistance heating wire; 312. Cooling water pipe; 313. Heat-conducting block; 314. Second temperature sensor; 4. Support assembly; 41. Mounting flange; 42. Wire outlet; 43. Second through hole; 44. Third through hole; 45. Cooling water pipe channel; 5. Piezoelectric ceramic drive assembly; 51. Piezoelectric ceramic unit. Detailed Implementation

[0031] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.

[0032] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. The terms “comprising,” “including,” etc., as used herein indicate the presence of the stated features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0033] It should be noted that if the embodiments of this disclosure involve directional indication, the directional indication is only used to explain the relative positional relationship and movement of the components in a specific posture. If the specific posture changes, the directional indication will also change accordingly.

[0034] The use of ordinal numbers such as "first," "second," "third," etc., in the specification and claims to modify the corresponding elements does not in itself imply or represent any ordinal number of the element, nor does it represent the order of one element with another element, or the order of manufacturing methods. The use of these ordinal numbers is only to enable a clearly distinguishable element with a certain name from another element with the same name.

[0035] This disclosure provides a heat-correcting support stage; please refer to [link / reference]. Figures 1-2 The assembly, from top to bottom, includes: a vacuum chuck 2, comprising an array of protrusions 22 and a sealed sidewall 21 surrounding the array, for adsorbing and fixing the wafer 1; a thermal correction actuator 3, comprising a substrate 31 and an array of temperature actuators, each temperature actuator comprising a heating / cooling element 32 and a first temperature sensor 33, for controlling the thermal deformation of the wafer 1 to correct higher-order overlay errors; a support assembly 4, comprising a mounting flange 41 for fixed connection with the vacuum chuck 2 and an array of second through holes 43; and a piezoelectric ceramic drive assembly 5, comprising an array of piezoelectric ceramic units 51, the piezoelectric ceramic units 51 passing through the second through holes 43 and the first through holes on the thermal correction actuator 3 and contacting the lower surface of the vacuum chuck 2, for adjusting the surface shape of the wafer 1; wherein the array of protrusions 22, the array of temperature actuators, the array of second through holes 43 and the array of piezoelectric ceramic units 51 correspond to each other.

[0036] This thermal correction stage has a multi-layered structure, integrating functions such as vacuum adsorption, high-order overlay error correction, and wafer surface shape control. The array of temperature actuators in the thermal correction execution component 3 controls the thermal deformation of wafer 1 to correct overlay errors in the X and Y directions. It can correct overlay errors, especially high-order overlay errors, both between and within exposure fields, with higher precision. Simultaneously, to achieve efficient heat conduction, the vacuum chuck 2 is designed with a very small thickness, which can cause deformation of wafer 1 during adsorption and affect the exposure effect. The piezoelectric ceramic drive component 5 is used to control the surface shape of wafer 1, correcting wafer deformation in the Z direction.

[0037] Based on the above embodiments, the thickness of the vacuum suction cup 2 is 1-2 mm; the material of the vacuum suction cup 2 is either silicon carbide or aluminum nitride; and a gap is provided between adjacent protrusions 22 in the vacuum suction cup 2 to insulate each other from heat.

[0038] The vacuum chuck 2 includes a sealed sidewall 21 and multiple protrusions 22 disposed in the area enclosed by the sealed sidewall 21. The protrusions 22 can be cylindrical. The wafer 1 can be attached to the upper surface of the vacuum chuck 2 and contact the surface of the protrusions 22. Under vacuum, the wafer 1 and the vacuum chuck 2 are pressed together, forming a closed vacuum chamber between them, thereby fixing the wafer 1. The vacuum chuck 2 can locally transfer the heat received from the thermal correction execution component 3 to the wafer 1, thereby controlling the thermal deformation of the wafer 1 and realizing the correction of higher-order overlay errors. There is a certain gap between the protrusions 22 of the vacuum chuck 2, which can realize the function of heat insulation between them, thereby enabling local temperature control of the wafer 1. In order to achieve efficient heat conduction, the thickness of the wafer support surface formed by the vacuum chuck 2 should be set to be significantly smaller than the thickness of the existing conventional wafer stage support surface, for example, 1 to 2 mm.

[0039] Based on the above embodiments, such as Figure 3 As shown, in the thermal correction execution component 3, the substrate 31 is a PCB board with circuitry; the heating / cooling element 32 is a thermoelectric element located on the lower surface of the substrate 31, and the temperature of each heating / cooling element 32 is independently controlled; the first temperature sensor 33 is a thermistor located on the upper surface of the substrate 31.

[0040] The thermal correction execution component 3 includes a substrate 31 and a temperature execution unit composed of multiple first temperature sensors 33 and heating / cooling elements 32. The temperature of each heating / cooling element 32 can be controlled independently. The substrate 31 can be a PCB board with circuitry; the heating / cooling elements 32 can be thermoelectric elements, soldered to the lower surface of the substrate 31 to form a conductive circuit, achieving heating and cooling functions by changing the direction of current flow; the first temperature sensors 33 can be thermistors, soldered to the upper surface of the substrate 31 to measure the temperature of the heating / cooling elements 32.

[0041] The temperature of each heating / cooling element 32 in the temperature execution unit is adjusted by the control component, thereby enabling the thermal correction execution component 3 to perform thermal deformation correction. During heating or cooling, the first temperature sensor 33 can monitor the temperature changes of each heating / cooling element 32 in the temperature execution unit in real time and transmit the data to the control component. The control component adjusts the operating state of the heating / cooling element 32 according to the set temperature range and temperature change rate, etc., to achieve a stable temperature control effect.

[0042] The array of temperature actuators in thermal correction actuator component 3 can be used in various temperature control systems, enabling independent temperature control of multiple areas within a small area. Based on the thermal deformation matrix, a temperature matrix for correcting high-order overlay errors is calculated, allowing for rapid and efficient correction of these errors. This technology can be applied to high-precision deformation correction systems in other fields.

[0043] Based on the above embodiment, the substrate 31 is also provided with a heat transfer hole 34, which is filled with a thermally conductive material; the heat transfer hole 34 is in contact with the heating / cooling element 32 and is used to quickly transfer heat to the protrusion 22.

[0044] like Figure 3 As shown, the substrate 31 is provided with heat transfer holes 34. Thermally conductive material (such as copper) is filled into the heat transfer holes 34 so that the temperature of the heating / cooling element 32 is quickly transferred to the upper surface of the protrusion 22 in the vacuum chuck 2, thereby achieving the purpose of heating / cooling the wafer 1.

[0045] According to another embodiment of this disclosure, the heating / cooling element 32 includes: a resistance heating wire 311 made of metal or conductive ceramic; a cooling water pipe 312 containing liquid either water or ethylene glycol; a heat-conducting block 313 having the resistance heating wire 311 and the cooling water pipe 312 housed in its upper surface for heat conduction; and a second temperature sensor 314 disposed on the lower surface of the heat-conducting block 313.

[0046] The heating / cooling element 32 can specifically be Figure 4 In the structure shown, the resistance heating wire 311 and the cooling water pipe 312 are embedded in the heat-conducting block 313, and the second temperature sensor 314 is attached to the back of the heat-conducting block 313 for measuring the temperature of the heating / cooling element 32. The resistance heating wire 311 may include metals such as tungsten, copper, or nickel-chromium alloys, or may include conductive ceramics such as tungsten carbide or titanium nitride. The liquid in the cooling water pipe 312 may include water, ethylene glycol, etc.

[0047] Based on the above embodiments, the support assembly 4 further includes: at least four wire outlets 42 for concentrating the circuit connection lines of the heating / cooling element 32 and the first temperature sensor 33; a third through hole 44 for accommodating the vacuum channel 23 of the vacuum suction cup 2; and a cooling water pipe channel 45, located on the lower surface of the support assembly 4, for releasing the heat generated by the heating / cooling element 32 to the outside.

[0048] The support assembly 4 is mechanically fixed to the vacuum suction cup 2 via a mounting flange 41, and the thermal correction actuator 3 is sandwiched between them. The wires of the thermal correction actuator 3 are led out from the wire outlet 42 of the support assembly 4, such as... Figure 5 As shown in (a), there are, for example, four wire outlets 42, evenly distributed around the periphery of the array formed by the second through holes 43. The first temperature sensor 33 and the heating / cooling element 32 in the temperature actuator are soldered onto the substrate 31 on which the circuit is arranged. The wires are concentrated at the edge of the support assembly 4, which reduces the failure rate of the temperature actuator and improves the connection efficiency.

[0049] like Figure 5 As shown in (b), a cooling water pipe channel 45 can be further designed on the back of the support assembly 4, passing through the lower part of the heating / cooling element 32, to release the heat generated by the heating / cooling element 32 to the outside through water cooling. The temperature of the support assembly 4 can be controlled by adjusting the flow rate and temperature of the cooling water through the control component.

[0050] Based on the above embodiments, the potential difference between the two ends of each piezoelectric ceramic unit 51 in the piezoelectric ceramic driving assembly 5 is independently controlled to apply a force to the vacuum chuck 2, thereby regulating the surface shape of the wafer 1; wherein, the surface shape in an exposure field of the wafer 1 is preferably controlled to be PV < 10nm.

[0051] The piezoelectric ceramic drive assembly 5 is used to control the surface shape of the wafer 1, preventing the wafer 1 from being deformed due to the small thickness of the support surface of the wafer stage, which would affect the exposure effect. The piezoelectric ceramic drive assembly 5 is installed below the support assembly 4 and can be adjusted for only one exposure field. After the exposure field is switched, the piezoelectric ceramic drive assembly 5 is retracted under motor control and moved to the corresponding exposure field before resuming operation. However, this disclosure is not limited to this; multiple piezoelectric ceramic drive assemblies 5 can be set up to control the number of exposure fields separately.

[0052] The surface of the piezoelectric ceramic driving assembly 5 is provided with an array of multiple piezoelectric ceramic units 51. An external circuit independently applies a potential difference to the two ends of each piezoelectric ceramic unit 51, causing the piezoelectric ceramic unit 51 to deform independently. The piezoelectric ceramic unit 51 passes through through holes respectively provided on the support assembly 4 and the thermal correction execution assembly 3 and directly contacts the lower surface of the vacuum chuck 2, thereby controlling the surface shape of the wafer 1 placed on it. Preferably, the surface shape within an exposure field (e.g., 26mm × 33mm) needs to be controlled to PV < 10nm. The piezoelectric ceramic driving assembly can realize wafer adsorption surface shape control, solving the problems of easy deformation and poor flatness caused by the small thickness of the support surface of the vacuum chuck of the wafer stage.

[0053] The thermal correction stage disclosed herein can achieve high-order overlay error correction by controlling the thermal deformation of the wafer, and can also use piezoelectric ceramic drive components to adjust the surface shape of the wafer to ensure exposure and overlay quality.

[0054] This disclosure also provides a photolithography apparatus, comprising: a thermal correction stage as described above, used to adjust the surface shape of wafer 1 and control the thermal deformation of wafer 1 to correct higher-order overlay errors; an exposure light source; an alignment system for measuring overlay errors; and a thermal correction control system for adjusting the working state of the thermal correction execution component 3 according to temperature load data to control the thermal deformation of wafer 1 and thereby correct higher-order overlay errors.

[0055] This disclosure also provides a lithography apparatus including the aforementioned thermal correction stage, which at least includes basic configurations such as an exposure light source, an alignment system, and a thermal correction control system. Figure 6As shown, the key to temperature control of the heating / cooling element 32 lies in accurate temperature monitoring and feedback adjustment. During heating or cooling, the first temperature sensor 33 can monitor the temperature change of the target object in real time and transmit the data to the thermal correction control system. The thermal correction control system adjusts the operating state of the heating / cooling element 32 according to the set temperature range and temperature change rate, such as a temperature adjustment range of -20℃ to +20℃ and a temperature change rate of 0.1℃, to achieve a stable temperature control effect. Specifically, when the temperature load is set (within the adjustment range), the thermal correction control system adjusts the operating state of the heating / cooling element 32 to raise or lower the temperature according to the temperature change rate, so that the temperature measured by the first temperature sensor 33 reaches the specified temperature load.

[0056] This disclosure also provides a high-order overlay error correction method, such as Figure 7 As shown, the process includes: S1, using a vacuum chuck 2 to adsorb and fix the wafer 1, and then using a piezoelectric ceramic driving component 5 to adjust the surface shape of the wafer 1; S2, establishing a grid coordinate system for an exposure field and obtaining the thermal deformation matrix of the wafer 1; S3, using an alignment system to measure the overlay error in the exposure field and calculating the temperature load control matrix data based on the overlay error; S4, adjusting the working state of the thermal correction execution component 3 according to the temperature load control matrix data to control the thermal deformation of the wafer 1 and thus correct higher-order overlay errors.

[0057] Step S1: Attach wafer 1 to the upper surface of vacuum chuck 2. Evacuate the space enclosed by the hermetically sealed sidewall 21 and wafer 1 through the central vacuum channel 23, adsorbing wafer 1 onto the upper surface of protrusion 22 and fixing it in place. Move piezoelectric ceramic drive assembly 5 to the area to be adjusted. Apply a potential difference to both ends of each piezoelectric ceramic unit 51 through the thermal correction control system of the photolithography equipment to adjust wafer 1 to the desired surface shape.

[0058] Step S2: Measure the overlay error δ0 using the alignment system of the photolithography equipment. The wafer 1 includes a previous layer pattern. The alignment system obtains the overlay error by measuring the deviation of the overlay mark on the current mask used for photolithography from the overlay mark on the previous layer pattern in the X and Y directions.

[0059] Establish a grid coordinate system. With the center of the exposure field as the origin, establish... Figure 8 The coordinate system is shown, and the grid regions and grid nodes are numbered. For example, the grid regions are defined as A1, A2...A48, and the grid nodes are defined as N1, N2,...N35. Each grid node can serve as a marker point.

[0060] The alignment system was used to measure the overlay error δ in the X and Y directions of the marked points. xi δ yi δ xi δyi This refers to higher-order overlay errors that include second- and third-order terms. It can be represented by the following parametric model:

[0061]

[0062] Where, k1…k 19 The coefficients of the overlay error model are the overlay error δ in the X direction of the measuring point. x Let denoted as the root mean square of the overlay error in the X direction for all grid nodes, and δ as the overlay error in the Y direction. y Let denot be the root mean square of the overlay error in the Y direction for all grid nodes.

[0063] Step S3: Calculate the temperature load control matrix.

[0064] Before calculating the temperature load control matrix, the thermal deformation matrix C of the wafer needs to be obtained first.

[0065] The relationship between the temperature load T applied in the wafer exposure field and the deformation Δ at the measuring point is shown in equation (1):

[0066] C×T=Δ (1)

[0067] Where C is the wafer thermal deformation matrix. The thermal deformation matrix C can be calculated using finite element method software, by separately analyzing A... i By applying a unit temperature load to the region, the thermal deformation in the X and Y directions at all measuring points within the entire field is calculated, yielding the column matrix C. ix and C iy The column matrices are combined to obtain the thermal deformation matrix C. x and C y In addition, the thermal deformation matrix C of the wafer can be obtained through experimental testing.

[0068]

[0069] The overlay error δ is the deformation Δ at the measurement point position of the pre-corrected wafer.

[0070] Based on the overlay error δ and the pre-obtained wafer thermal deformation matrix C, the optimal solution T of equation set (3) is obtained by solving the minimum residual w between the overlay error and the deformation at the measurement point. The optimal solution T is the temperature load control matrix. In the first calculation, the overlay error δ0 obtained by measuring in step S2 above is used as the overlay error δ for calculation.

[0071] w≥δ-C×T

[0072] w≥C×T-δ (3)

[0073] T1≤T≤T2

[0074] Where T1 and T2 are the lower and upper limits of temperature control, respectively. The solution scheme for the temperature load control matrix with the minimum residual in step S2 includes the least squares method.

[0075] Step S4: Input the temperature load control matrix T obtained in step S3 to the thermal correction control system. The thermal correction control system adjusts the deformation of the wafer 1 surface by independently controlling the temperature of each heating / cooling element 32 to compensate for higher-order overlay errors.

[0076] Based on the above embodiments, the method further includes: S5, using the alignment system to measure and correct the overlay error after correcting the higher-order overlay error; if the preset overlay accuracy is not met, the thermal deformation matrix is ​​corrected, and S3 to S5 are repeated until the preset overlay accuracy is met; if the preset overlay accuracy is met, the higher-order overlay error correction process ends.

[0077] Step S5: Measure the corrected overlay error δ1 again using the alignment system to verify if it meets the required overlay accuracy, such as meeting the accuracy requirement of less than 5nm for high-order overlay error correction. If the required overlay accuracy is met, the high-order overlay error correction process ends; otherwise, the wafer thermal deformation matrix C is corrected by adding a small correction amount to the elements of the wafer thermal deformation matrix C, adjusting it in the direction of reducing overlay error to achieve calculation convergence, thus obtaining C. j Then, it is used as the new wafer thermal deformation matrix C, and the corrected overlay error δ1 is used as the new overlay error δ. Substitute it into equation (3) and repeat steps S3 to S5 to obtain the overlay error δ2 of this iteration. Repeat the iteration multiple times until the required overlay accuracy is met.

[0078] The high-order overlay error correction method disclosed herein calculates the temperature load control matrix for correcting high-order overlay errors based on the thermal deformation matrix, which can provide timely feedback and quickly and efficiently correct high-order overlay errors.

[0079] The present disclosure will be further described below through specific embodiments. The thermal correction substrate stage, lithography equipment, and high-order overlay error correction method described above will be specifically illustrated in the following embodiments. However, the following embodiments are merely illustrative of the present disclosure, and the scope of the present disclosure is not limited thereto.

[0080] This embodiment provides a thermally corrected plate-holding stage, as shown in the following figure. Figure 1 and Figure 2 It includes: a vacuum suction cup 2, a thermal correction actuator 3, a support assembly 4, and a piezoelectric ceramic drive assembly 5.

[0081] The vacuum chuck 2 is disc-shaped, and the wafer 1 can be attached to the upper surface of the vacuum chuck 2. The vacuum chuck 2 is provided with a sealing sidewall 21 and a cylindrical protrusion 22. The sealing sidewall 21 is arranged around the cylindrical protrusion 22 to form a vacuum chamber. Pressurization is applied through the vacuum channel 23 to form a vacuum chamber in the area enclosed by the wafer 1 and the vacuum chuck 2.

[0082] The vacuum chuck 2 can transfer heat received from the thermal correction actuator 3 to a local area of ​​the wafer 1 to heat or cool the wafer 1 and control its thermal deformation. Specifically, the cylindrical protrusions 22 of the vacuum chuck 2 can support the wafer 1, ensuring its flatness; the gaps between the cylindrical protrusions 22 provide thermal insulation, thereby enabling localized temperature control on the upper surface of the vacuum chuck 2; the cylindrical protrusions 22 and the substrate of the vacuum chuck 2 have a small thickness to ensure rapid heat conduction to the wafer 1 and the attainment of a steady state; the vacuum chuck 2 can be made of materials with good thermal conductivity and low thermal deformation, such as silicon carbide or aluminum nitride.

[0083] Figure 3 The diagram shows a cross-sectional view of the vacuum chuck 2 and the thermal correction actuator 3 in their mating state. The thermal correction actuator 3 includes a substrate 31 and multiple temperature actuators, each of which includes a heating / cooling element 32 and a first temperature sensor 33. The multiple heating / cooling elements 32 can be independently controlled to locally distribute heat within the vacuum chuck 2. The vacuum chuck 2 has a groove to accommodate the first temperature sensor 33.

[0084] The substrate 31 includes materials such as a PCB board. The circuit of the temperature sensor 33 is arranged on the upper surface of the substrate 31, and the circuit of the heating / cooling element 32 is arranged on the lower surface.

[0085] The arrangement of the temperature actuators in thermal correction actuator 3 is as follows: Figure 9 As shown. Wafer 1 has nine exposure fields, each measuring 26mm × 33mm. Figure 9 The area enclosed by the thick solid line is the exposure field. In order to achieve overlay error correction in the entire field, a 39mm×44mm area around the exposure field is selected and a temperature load is applied using a temperature execution array. Each area is divided into 6×8 small areas. The lower surface of the vacuum chuck 2 and the substrate 31 are also divided into the same number and size of small areas. The temperature execution units of the thermal correction execution component 3 are distributed in each small area of ​​the substrate 31.

[0086] The heating / cooling element 32 includes a thermoelectric element that can perform heat absorption and release using the Peltier effect. Specifically, the thermoelectric element has positive and negative electrodes, which are soldered onto the substrate 31. It switches between heat absorption and heat release according to the direction of the current, and the amount of heat absorption and release can be controlled according to the amount of current. The first temperature sensor 33 includes a thermistor, which is soldered onto the substrate 31 and can measure the temperature of the thermoelectric element.

[0087] Figure 5 Figure (a) shows a front view of the support component 4. Figure 5 Figure (b) shows a structural schematic diagram of the back of the support assembly 4. The support assembly 4 is mechanically connected and fixed to the vacuum suction cup 2 via a mounting flange 41, with the thermal correction actuator 3 sandwiched between them.

[0088] The support assembly 4 has four wire outlets 42, which centrally lead out the circuit connection lines between the first temperature sensor 33 and the heating / cooling element 32. A third through hole 44 is located at the center of the support assembly, through which the vacuum channel 23 of the vacuum suction cup 2 passes. The support assembly 4 also has a cooling water pipe channel 45, which runs between the heating / cooling elements 32, releasing the heat generated by the heating / cooling elements 32 to the outside via water cooling. The temperature of the support assembly 4 can be controlled by adjusting the flow rate and temperature of the cooling water using a thermal correction control system.

[0089] like Figure 2 As shown, the piezoelectric ceramic driving assembly 5 consists of multiple piezoelectric ceramic units 51. The support assembly 4 is provided with a second through hole 43, and the substrate 31 of the thermal correction execution assembly 3 is also provided with a first through hole. The piezoelectric ceramic units 51 pass through the second through hole 43 and the first through hole and contact the bottom of the vacuum chuck 2. Each piezoelectric ceramic unit 51 is independently connected to an external circuit through an electrode wire. The external circuit applies a potential difference to the two independent ends of each piezoelectric ceramic unit 51, causing the piezoelectric ceramic unit 51 to deform independently, apply a force to the vacuum chuck 2, and thus adjust the surface shape of the wafer 1.

[0090] The piezoelectric ceramic drive assembly 5 is configured to operate on only one exposure field. After the exposure field is switched, the piezoelectric ceramic drive assembly 5 moves to the corresponding exposure field under the control of the thermal correction control system and the motor before commencing operation. The piezoelectric ceramic drive assembly 5 has 6×8 piezoelectric drive units, which correspond to the area division of the exposure field.

[0091] This embodiment also provides a high-order overlay error correction method, including steps S01 to S05:

[0092] Step S01: The wafer 1 is attached to the upper surface of the vacuum chuck 2. A vacuum is created in the space enclosed by the hermetically sealed sidewall 21 and the wafer 1 through the central vacuum channel 23, allowing the wafer 1 to be adsorbed onto and fixed to the cylindrical protrusion 22. The piezoelectric ceramic driving assembly 5 is moved to the area to be adjusted. A potential difference is applied to both ends of each piezoelectric ceramic unit 51 through the thermal correction control system of the photolithography equipment, adjusting the surface profile within one exposure field (e.g., 26mm × 33mm) of the wafer 1 to PV < 10nm. This is equivalent to step S1 above.

[0093] Step S02: Measure the overlay error δ0 using the alignment system of the photolithography equipment.

[0094] Establish a grid coordinate system. With the center of the exposure field as the origin, establish... Figure 8 The grid coordinate system is shown, and the grid regions and grid nodes are numbered. The grid regions are defined as A1, A2...A48, and the grid nodes are defined as N1, N2,...N35. Each grid node can serve as a marker point.

[0095] The alignment system was used to measure the overlay error δ in the X and Y directions of the marked points. xi δ yi The more marker points there are, and the more evenly they are distributed within the exposure field, the more accurate the final calculation result will be.

[0096] δ xi δ yi Higher-order overlay errors, including second- and third-order terms, can be represented by the following parametric model:

[0097]

[0098] A high-order overlay error model is selected as an example for illustration. The lens can compensate for second-order (k7, k) errors. 12 ) or third order (k 13 Overlay error, k8, k 10 k 11 k 14 k 16 k 19 This can be achieved by adjusting the scanning in the Y direction of the silicon wafer stage, but k9, k 15 k 17 k 18 k 20 This is not currently feasible. Therefore, this embodiment selects k. 17 =1×10 -8 k 18 =1×10 -8All other parameters are set to 0 for explanation. Before correction, the root mean square error of the overlay in the X direction at the mesh node is 14 nm, and the root mean square error of the overlay in the Y direction is 12 nm. This is equivalent to step S2 above.

[0099] Step S03: Calculate the temperature load control matrix C.

[0100] By separately in A i By applying a unit temperature load to the region, the thermal deformation in the X and Y directions at all grid node locations within the entire field is calculated, yielding the column matrix C. ix and C iy The column matrices are combined to obtain the thermal deformation matrix C. x and C y C x and C y The combination yields a matrix.

[0101] Based on the overlay error δ obtained from step S02 and the pre-obtained wafer thermal deformation matrix C, the optimal solution T of equation set (2) is obtained by solving the minimum residual w. The minimum residual is the overlay error, and the optimal solution T is the temperature load control matrix.

[0102] For example, the solution algorithm may include the least squares method, yielding a temperature load control matrix of T = [10.9, 4.9, 6.8, 4.9, 7.3...] °C. This is equivalent to step S3 above.

[0103] Step S04: The temperature load control matrix T obtained in step S03 is input to the thermal correction control system. The thermal correction control system adjusts the deformation of the wafer 1 surface by independently controlling the temperature of each heating / cooling element 32 to compensate for higher-order overlay errors. This is equivalent to step S4 above.

[0104] Step S05: Measure the corrected overlay error again using the alignment system; the overlay error w in the X direction. 1x =0.07nm, Y-direction overlay error w 1y =0.09nm, which meets the accuracy requirement of less than 5nm for high-order overlay error correction. This is equivalent to step S5 above.

[0105] The specific embodiments described above further illustrate the purpose, technical solutions, and beneficial effects of this disclosure. It should be understood that the above descriptions are merely specific embodiments of this disclosure and are not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A heat-correcting support stage, characterized in that, From top to bottom, they include: The vacuum chuck (2) includes an array of protrusions (22) and a sealed sidewall (21) surrounding the array, for adsorbing and fixing the wafer (1); the thickness of the vacuum chuck (2) is 1~2mm; The thermal correction execution assembly (3) includes a substrate (31) and an array of temperature execution units, each of which includes a heating / cooling element (32) and a first temperature sensor (33) for controlling the thermal deformation of the wafer (1) to correct higher-order overlay errors; The support assembly (4) includes a mounting flange (41) for fixed connection with the vacuum suction cup (2) and an array of second through holes (43); The piezoelectric ceramic drive assembly (5) includes an array of piezoelectric ceramic units (51), which pass through the second through hole (43) and the first through hole on the thermal correction execution assembly (3) and then contact the lower surface of the vacuum chuck (2) to adjust the surface shape of the wafer (1); Among them, the array composed of protrusions (22), the array composed of temperature actuators, the array composed of second through holes (43) and the array composed of piezoelectric ceramic units (51) correspond to each other; The thermal correction execution component (3) is configured to: after the piezoelectric ceramic drive component (5) regulates the surface shape of the wafer (1), independently control the temperature of each heating / cooling element (32) to adjust the thermal deformation of the wafer (1) in order to correct higher-order overlay errors.

2. The heat-correcting support stage according to claim 1, characterized in that, The vacuum suction cup (2) is made of either silicon carbide or aluminum nitride. The vacuum suction cup (2) has a gap between adjacent protrusions (22) to insulate each other from heat.

3. The heat-correcting support stage according to claim 1, characterized in that, The substrate (31) of the thermal correction execution component (3) is a PCB board with circuitry designed on it; The heating / cooling element (32) is a thermoelectric element and is disposed on the lower surface of the substrate (31). The temperature of each heating / cooling element (32) is independently controlled. The first temperature sensor (33) is a thermistor and is located on the upper surface of the substrate (31).

4. The heat-correcting support stage according to claim 3, characterized in that, The substrate (31) is also provided with heat transfer holes (34), and the heat transfer holes (34) are filled with thermally conductive material; The heat transfer hole (34) is in contact with the heating / cooling element (32) to rapidly transfer heat to the protrusion (22).

5. The heat-correcting support stage according to claim 1, characterized in that, The heating / cooling element (32) includes: The resistance heating wire (311) is made of metal or conductive ceramic. Cooling water pipe (312), wherein the liquid is either water or ethylene glycol; A heat-conducting block (313) has the resistance heating wire (311) and cooling water pipe (312) housed in its upper surface for heat conduction; The second temperature sensor (314) is located on the lower surface of the heat-conducting block (313).

6. The heat-correcting support stage according to claim 1, characterized in that, The support component (4) also includes: At least four wire outlets (42) are provided for concentrating the circuit connection lines of the heating / cooling element (32) and the first temperature sensor (33); The third through hole (44) is used to accommodate the vacuum channel (23) of the vacuum suction cup (2). A cooling water pipe channel (45) is provided on the lower surface of the support assembly (4) for releasing the heat generated by the heating / cooling element (32) to the outside.

7. The heat-correcting support stage according to claim 1, characterized in that, The potential difference between the two ends of each piezoelectric ceramic unit (51) in the piezoelectric ceramic driving assembly (5) is independently controlled to apply force to the vacuum chuck (2) and thereby regulate the surface shape of the wafer (1); Wherein, the surface shape PV in one exposure field of the wafer (1) is <10nm.

8. A photolithography apparatus, characterized in that, include: The thermal correction stage according to any one of claims 1 to 7 is used to adjust the surface shape of the wafer (1) and control the thermal deformation of the wafer (1) to correct higher-order overlay errors; Exposure light source; Alignment system used to measure overlay error; A thermal correction control system is used to adjust the working state of the thermal correction execution component (3) according to the temperature load data to control the thermal deformation of the wafer (1) and thus correct higher-order overlay errors.

9. A method for correcting high-order overlay errors, characterized in that, include: S1, after adsorbing and fixing the wafer (1) using a vacuum chuck (2), the surface shape of the wafer (1) is adjusted using a piezoelectric ceramic driving assembly (5); the vacuum chuck (2) includes an array of protrusions (22) and a sealed sidewall (21) surrounding the array; the thickness of the vacuum chuck (2) is 1~2mm; the piezoelectric ceramic driving assembly (5) includes an array of piezoelectric ceramic units (51), and the piezoelectric ceramic units (51) pass through the second through hole (43) and the first through hole on the thermal correction execution assembly (3) and then contact the lower surface of the vacuum chuck (2); S2, establish a grid coordinate system for an exposure field and obtain the thermal deformation matrix of the wafer (1); S3, use the alignment system to measure the overlay error in the exposure field, and calculate the temperature load control matrix data based on the overlay error; S4, adjust the working state of the thermal correction execution component (3) according to the temperature load control matrix data to control the thermal deformation of the wafer (1) and correct the high-order overlay error; the thermal correction execution component (3) includes a substrate (31) and an array of temperature execution units, each of the temperature execution units includes a heating / cooling element (32) and a first temperature sensor (33); wherein the array of protrusions (22), the array of temperature execution units, the array of second through holes (43) and the array of piezoelectric ceramic units (51) correspond to each other.

10. The high-order overlay error correction method according to claim 9, characterized in that, Also includes: S5, use the alignment system to measure and correct the overlay error after correcting the higher-order overlay error; if the preset overlay accuracy is not met, the thermal deformation matrix is ​​corrected, and S3~S5 are repeated until the preset overlay accuracy is met; if the preset overlay accuracy is met, the higher-order overlay error correction process ends.

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