Trigger type CMOS image sensor and implementation method thereof

Abstract

The invention relates to the technical field of image sensors, in particular to a trigger type CMOS image sensor and an implementation method thereof. The control circuit comprises an output circuit used for outputting photoelectric signals and a reading circuit used for inputting the photoelectric signals. The output circuit comprises a reset tube S4, a transmission tube S5, an output tube S6, a source following tube S10, a comparison unit, a switch S8, a switch S7 and a photoelectric signal storage capacitor. According to the invention, a pixel-level photoelectric signal storage and comparison mode is adopted, the change condition of the next image and the previous image on a single pixel is determined, the change signal is quantized, and the position information is identified, so that the quantization and processing time is greatly shortened, the power consumption is greatly reduced, and the frame frequency is greatly improved; the method is of great significance to application scenarios of events such as target detection, tracking and border monitoring.

Description

Technical Field

[0001] The present invention relates to the technical field of image sensors, and in particular to a trigger-type CMOS image sensor and an implementation method thereof. Background Art

[0002] CMOS image sensors are widely used in space exploration, earth observation, industrial monitoring and consumer electronics. They collect various types of complex light to achieve application requirements such as target acquisition, detection and perception, and imaging.

[0003] Existing CMOS image sensors have two exposure modes: global and rolling. The global exposure mode means that when the aperture is opened, all pixels on the CMOS image sensor can start to be exposed at the same time, and when the aperture is closed, all pixels end exposure at the same time; the rolling exposure mode is a row-by-row scanning and row-by-row exposure mode, that is, when all pixels in the previous row are exposed at the same time, all pixels in the next row are exposed at the same time until all rows are exposed; however, regardless of whether the exposure mode is changed, all full array data needs to be read out again, which has the disadvantages of high readout power consumption and low readout frame rate, thereby limiting the performance of CMOS image sensors in high-speed, low-power applications.

[0004] The circuit structure block diagram of the CMOS image sensor in the prior art is shown in Figure 6 , see the timing diagram Figure 7 , Figure 1 The pixel level circuit in includes switch S4, switch S5, and switch S6; see Figure 7 As shown, in the first stage, switch S6 is low, switch S4 and switch S5 are high, the photodiode is reset, and the reset signal is stored in the FD point; in the second stage, switch S6 is high, switch S4 and switch S5 are low, the reset of the photodiode is disconnected, and the reset signal is read out; in the third stage, switch S6 and switch S5 are high, switch S4 is low, and the photoelectric signal is transferred from the photodiode to the FD point; in the fourth stage, switch S6 is high, the switch is turned on, switch S4 and switch S5 are both low, the switch is disconnected, and the photoelectric signal is read out.

[0005] The above-mentioned traditional image sensor circuit needs to read out the data of each pixel one by one during each image capture process, and combine these data to generate a picture. However, in practical applications, only a small number of positions in a single picture often change. Despite this, the traditional image sensor circuit still needs to read out the data of all pixels in the entire picture, which not only leads to a significant power consumption overhead, but also reduces the frame rate of the system. Summary of the invention

[0006] In response to the problems mentioned in the prior art, the present invention proposes a triggered CMOS image sensor and an implementation method thereof, which identifies changing information at the pixel level, feeds back the pixel-level results to the control logic, and only quantifies and processes the changed positions, thereby greatly improving the rate of obtaining useful information, which not only improves the frame rate but also reduces power consumption.

[0007] In order to achieve the above object, the present invention adopts the following technical solution: The present invention discloses a trigger-type CMOS image sensor, comprising a photodiode and a control circuit; The photodiode is arranged on the upper chip, and the control circuit is arranged on the lower chip, wherein the upper chip and the lower chip adopt a 3D stacking structure, and the upper chip and the lower chip are interconnected by bonding; The control circuit includes an output circuit for outputting a photoelectric signal and a readout circuit for inputting a photoelectric signal, wherein the output circuit includes a reset tube S4, a transmission tube S5, an output tube S6, a source follower tube S10, a comparison unit, a switch S8, a switch S7 and a photoelectric signal storage capacitor; The drains of the reset tube S4 and the source follower tube S10 are both connected to VDD, the source of the transmission tube S5 is connected to the photodiode located on the upper layer of the chip and then grounded, the drain of the transmission tube S5 and the source of the reset tube S4 are connected to the FD point, the FD point is connected to the gate of the source follower tube S10, the source of the storage tube S10 and the source of the output tube S6 are connected to the switch S7 and the switch S8, and the drain of the output tube S6 outputs the photoelectric signal; One end of the photoelectric signal storage capacitor is connected to the switch S7 and then grounded, and the other end is also connected to one of the ports of the comparison unit, wherein the other port of the comparison unit is connected to the switch S8.

[0008] As a further improvement of the present invention, the port of the comparison unit connected to the switch S8 is used to receive the subsequent photoelectric signal, and the port connected to the switch S7 is used to receive the previous photoelectric signal.

[0009] As a further improvement of the present invention, the comparison unit includes a first comparator, a second comparator and an XOR gate, the two input ends of the XOR gate receive the photoelectric signal of the first comparator and the photoelectric signal of the second comparator respectively, and the output end of the XOR gate outputs an indication signal to the logic control; The positive end of the first comparator is connected to the negative end of the second comparator for receiving the subsequent photoelectric signal, and the negative end of the first comparator is connected to the positive end of the second comparator for receiving the previous photoelectric signal.

[0010] As a further improvement of the present invention, during comparison, if the previous photoelectric signal is inconsistent with the next photoelectric signal, the XOR gate outputs an indication signal to the logic control to control the readout circuit to convert the previous photoelectric signal.

[0011] As a further improvement of the present invention, during comparison, if the previous photoelectric signal is consistent with the next photoelectric signal, the XOR gate outputs an indication signal to the logic control to control the readout circuit not to convert the previous photoelectric signal.

[0012] As a further improvement of the present invention, the readout circuit includes an simulator front end, an analog-to-digital converter and a counter; the input end of the simulator front end is connected to the output circuit, the output end of the simulator front end is connected to the analog-to-digital converter, and the output end of the analog-to-digital converter is connected to the counter.

[0013] As a further improvement of the present invention, a copper pillar interconnection structure is adopted between the upper chip and the lower chip.

[0014] A method for realizing a trigger-type CMOS image sensor comprises the following steps: S1, the output circuit, after the previous exposure is completed, makes the switch S7 closed and the switch S8 open, and the previous photoelectric signal stored in FD is stored in the photoelectric signal storage capacitor through the source follower tube S10 and the switch S7; S2, the output circuit makes the switch S8 closed and the switch S7 open after the next exposure is completed, the next photoelectric signal is located at one port of the comparison unit, and the previous photoelectric signal stored in the photoelectric signal storage capacitor is located at another port; S3, the comparison unit compares the received previous photoelectric signal and the next electrical signal, inputs the previous photoelectric signal to the negative end of the first comparator and the positive end of the second comparator, inputs the next photoelectric signal to the positive end of the first comparator and the negative end of the second comparator, and compares whether the previous photoelectric signal and the next electrical signal are consistent; S4. If the previous photoelectric signal and the next electrical signal are consistent, the XOR gate outputs an indication signal to the logic control, which controls the readout circuit not to convert the previous photoelectric signal and realizes high-speed image generation; if the previous photoelectric signal and the next electrical signal are inconsistent, the XOR gate outputs an indication signal to the logic control, which controls the readout circuit to convert the previous photoelectric signal, and realizes high-speed image generation after conversion.

[0015] As a further improvement of the present invention, the specific process of step S4 is: If the previous photoelectric signal is smaller than the next photoelectric signal, the first comparator XOR gate outputs 1, the second comparator outputs 0, and the XOR gate outputs 1; If the previous photoelectric signal is greater than the next photoelectric signal, the first comparator outputs 0, the second comparator outputs 1, and the XOR gate outputs 1; If the previous photoelectric signal is equal to the next photoelectric signal, the first comparator outputs 0, the second comparator outputs 0, and the XOR gate outputs 0.

[0016] As a further improvement of the present invention, the comparison unit needs to be reset before performing step S3.

[0017] Compared with the prior art, the present invention has achieved the following technical effects: The present invention aims at application scenarios such as target tracking and staring imaging, which require long-term operation but only a small part of the target moves. Compared with the problems of high power consumption and low system frame rate of traditional image sensors, the present invention adopts difference signal recognition and state reduction comparison at the pixel level, identifies the change signal at the pixel level, and only quantizes and processes the change signal, which reduces the processing requirements of the readout circuit and effectively avoids unnecessary full-frame operations, thereby greatly improving the efficiency of obtaining useful information. It not only reduces power consumption but also increases the frame rate, so that the image sensor can more efficiently capture target dynamics during the task. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a schematic diagram of the image sensor stacking of the present invention; Figure 2 Schematic diagram of the specific structure of the image sensor of the present invention; Figure 3 It is a schematic diagram of the structure of the comparison unit of the present invention; Figure 4 This is a working timing diagram of the image sensor of the present invention; Figure 5 This is a schematic diagram of the working process of the image sensor of the present invention; Figure 6 It is a schematic diagram of the structure of an image sensor in the prior art; Figure 7 The following is a timing diagram of the operation of an image sensor in the prior art.

[0019] Figure numerals: 10, output circuit; 20, simulator front end; 30, analog-to-digital converter; 40, counter; 11, first port of comparison unit; 12, photoelectric signal storage capacitor; 13, comparison unit; 14, photodiode; 15, second port of comparison unit; 16, XOR gate output port; 17, first comparator; 18, second comparator; 19, XOR gate. DETAILED DESCRIPTION

[0020] In the following, only some exemplary embodiments are briefly described. As those skilled in the art will appreciate, the described embodiments may be modified in various ways without departing from the spirit or scope of the present invention. Therefore, the drawings and descriptions are considered to be exemplary and non-restrictive in nature.

[0021] In the description of the present invention, it is to be understood that the terms “center”, “longitudinal”, “lateral”, “length”, “width”, “thickness”, “up”, “down”, “front”, “back”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inside”, “outside”, “clockwise”, “counterclockwise”, “axial”, “radial”, “circumferential”, etc., indicating orientations or positional relationships are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0022] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0023] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or a communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0024] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0025] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0026] It should also be understood that the terms used in the present specification are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the present specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0027] It should be further understood that the term "and / or" used in the present description and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

[0028] Various structural schematic diagrams of the embodiments disclosed in the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clear expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0029] The embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0030] like Figure 1 As shown, a triggered CMOS image sensor of the present invention includes a photodiode 14 and a control circuit; the photodiode 14 is arranged on an upper chip, and the control circuit is arranged on a lower chip, wherein the upper chip and the lower chip adopt a 3D stacking structure, and the upper chip and the lower chip are interconnected by bonding. The 3D stacking adopted in the embodiment ensures that the photodiode 14 has a sufficient photosensitizing area, and at the same time ensures that the control circuit has a more sufficient area space.

[0031] like Figure 2 and Figure 4 As shown, the control circuit includes an output circuit 10 for outputting a photoelectric signal and a readout circuit for inputting a photoelectric signal, wherein the output circuit 10 includes a reset tube S4, a transmission tube S5, an output tube S6, a source follower tube S10, a comparison unit 13, a switch S8, a switch S7 and a photoelectric signal storage capacitor 12; the drains of the reset tube S4 and the source follower tube S10 are both connected to VDD, the source of the transmission tube S5 is connected to the photodiode 14 located on the upper layer of the chip and then grounded, the drain of the transmission tube S5 and the source of the reset tube S4 are connected to the FD point, the FD point is connected to the gate of the source follower tube S10, the source of the storage tube S10 and the source of the output tube S6 are connected to the switch S7 and the switch S8, and the drain of the output tube S6 outputs the photoelectric signal; One end of the photoelectric signal storage capacitor 12 is connected to the switch S7 and then grounded, and the other end is also connected to one of the ports of the comparison unit, wherein the other port of the comparison unit is connected to the switch S8. The port of the comparison unit connected to the switch S8 is used to receive the next photoelectric signal, and the port connected to the switch S7 is used to receive the previous photoelectric signal. In the embodiment, the comparison unit includes two ports, namely the first port 11 of the comparison unit and the second port 15 of the comparison unit. When the comparison unit is comparing, the first port 11 of the comparison unit is used to receive the previous photoelectric signal, and the first port 15 of the comparison unit is used to receive the next photoelectric signal. The comparison unit 13 compares the voltages of the previous photoelectric signal and the next photoelectric signal to confirm whether the previous photoelectric signal needs to be quantized.

[0032] like Figure 3 As shown, the comparison unit includes a first comparator 17, a second comparator 18 and an XOR gate 19, the two input ends of the XOR gate 19 receive the photoelectric signal of the first comparator 17 and the photoelectric signal of the second comparator 18 respectively, and the output end of the XOR gate 19 outputs an indication signal to the logic control; the positive end of the first comparator 17 is connected to the negative end of the second comparator 18 for receiving the next photoelectric signal, and the negative end of the first comparator 17 is connected to the positive end of the second comparator 18 for receiving the previous photoelectric signal. In the embodiment, the first comparator 17 and the second comparator 18 are preferably hysteresis comparators, and the voltage magnitudes of the previous photoelectric signal and the next photoelectric signal are determined by whether the comparator 17 and the second comparator 18 are flipped; the XOR gate output port 16 is used to output the indication signal.

[0033] The present invention can effectively identify the photoelectric difference in pixels of the previous and next frames, compare the photoelectric signals of the previous and next exposures in a pixel-level comparator, and if the previous photoelectric signal is inconsistent with the next photoelectric signal, the XOR gate outputs an indication signal to the logic control, and controls the readout circuit to quantize and process the previous photoelectric signal; if the previous photoelectric signal is consistent with the next photoelectric signal, the XOR gate outputs an indication signal to the logic control, and controls the readout circuit not to quantize and process the previous photoelectric signal. The present invention does not need to output the full frame, and the location of the event can be determined after comparing the difference between the previous and next frames, and has low delay characteristics and lower power consumption.

[0034] The readout circuit includes an emulator front end, an analog-to-digital converter, and a counter; the input end of the emulator front end is connected to the output circuit, the output end of the emulator front end is connected to the analog-to-digital converter, and the output end of the analog-to-digital converter is connected to the counter. The readout circuit structure in the embodiment is prior art, so it will not be elaborated here.

[0035] The upper chip and the lower chip use a copper pillar interconnection structure. In the embodiment, the copper pillar interconnection structure is used, which has high electrical conductivity, good thermal conductivity, low resistance, etc.

[0036] like Figure 5 As shown, the present invention proposes a method for realizing a trigger-type CMOS image sensor, comprising the following steps: S1, after the previous exposure is completed, the switch S7 is closed, the switch S8 is opened, and the previous photoelectric signal stored in the FD is stored in the photoelectric signal storage capacitor 12 through the source follower tube S10 and the switch S7. S2. After the next exposure is completed, the switch S8 is closed and the switch S7 is opened. The next photoelectric signal is located at the first port 15 of the comparison unit, and the previous photoelectric signal stored in the photoelectric signal storage capacitor 12 is located at the second port 11 of the comparison unit.

[0037] S3. Reset the first comparator 17, the second comparator 18 and the XOR gate 19 before comparison, so that the output values ​​of the first comparator 17, the second comparator 18 and the XOR gate 19 are 0.

[0038] S4. During comparison, if the voltages of the second port 11 of the comparison unit and the first port 15 of the comparison unit are substantially the same, the first comparator 17 and the second comparator 18 do not flip, and the first comparator 17 and the second comparator 18 maintain the reset state output of 0, and the XOR gate output port 16 is 0.

[0039] If the voltage at the second port 11 of the comparison unit is higher than the voltage at the first port 15 of the comparison unit, the first comparator 17 does not flip and the output is 0, the second comparator 18 flips and the output is 1, and the XOR gate output port 16 is 1.

[0040] If the voltage of the second port 11 of the comparison unit is lower than the voltage of the first port 15 of the comparison unit, the first comparator 17 flips and the output is 1, the second comparator 18 does not flip and the output is 0, and the XOR gate output port 16 is 0.

[0041] The present invention converts the three output states of the first comparator 17 and the second comparator 18 into high and low states through the XOR gate 19, thereby achieving state reduction of the comparator result and satisfying the simplified control of the control logic. Therefore, when the high and low levels of the XOR gate output port 16 are used as the indication signal of the control logic, no quantization and processing are performed when it is 0, and when it is 1, it is input to the readout circuit for quantization and processing, and the position information is marked at the same time, and the change information is substituted into the original image, so as to achieve high frame rate and low power consumption event triggered imaging.

[0042] The above shows and describes the basic principles and main features of the present invention and the advantages of the present invention. It is obvious to those skilled in the art that the present invention is not limited to the details of the above exemplary embodiments, and the present invention can be implemented in other specific forms without departing from the spirit or basic features of the present invention. Therefore, no matter from which point of view, the embodiments should be regarded as exemplary and non-restrictive. The scope of the present invention is defined by the attached claims rather than the above description, and it is intended that all changes falling within the meaning and scope of the equivalent elements of the claims are included in the present invention. Any figure mark in the claims should not be regarded as limiting the claims involved.

[0043] In addition, it should be understood that although this specification is described in accordance with the implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other implementation modes that can be understood by those skilled in the art. The above content is only to illustrate the technical idea of ​​the present invention, and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution according to the technical idea proposed by the present invention shall fall within the protection scope of the claims of the present invention.

Claims

1. A trigger-type CMOS image sensor, characterized in that: Including a photodiode and a control circuit; The photodiode is arranged on the upper chip, and the control circuit is arranged on the lower chip, wherein the upper chip and the lower chip adopt a 3D stacking structure, and the upper chip and the lower chip are interconnected by bonding; The control circuit includes an output circuit for outputting a photoelectric signal and a readout circuit for inputting a photoelectric signal, wherein the output circuit includes a reset tube S4, a transmission tube S5, an output tube S6, a source follower tube S10, a comparison unit, a switch S8, a switch S7 and a photoelectric signal storage capacitor; The drains of the reset tube S4 and the source follower tube S10 are both connected to VDD, the source of the transmission tube S5 is connected to the photodiode located on the upper layer of the chip and then grounded, the drain of the transmission tube S5 and the source of the reset tube S4 are connected to the FD point, the FD point is connected to the gate of the source follower tube S10, the source of the storage tube S10 and the source of the output tube S6 are connected to the switch S7 and the switch S8, and the drain of the output tube S6 outputs the photoelectric signal; One end of the photoelectric signal storage capacitor is connected to the switch S7 and then grounded, and the other end is also connected to one of the ports of the comparison unit, wherein the other port of the comparison unit is connected to the switch S8.

2. A trigger-type CMOS image sensor according to claim 1, characterized in that: The port of the comparison unit connected to the switch S8 is used to receive the subsequent photoelectric signal, and the port connected to the switch S7 is used to receive the previous photoelectric signal.

3. A trigger-type CMOS image sensor according to claim 1, characterized in that: The comparison unit includes a first comparator, a second comparator and an XOR gate, wherein two input terminals of the XOR gate receive the photoelectric signal of the first comparator and the photoelectric signal of the second comparator respectively, and an output terminal of the XOR gate outputs an indication signal to the logic control; The positive end of the first comparator is connected to the negative end of the second comparator for receiving the subsequent photoelectric signal, and the negative end of the first comparator is connected to the positive end of the second comparator for receiving the previous photoelectric signal.

4. A trigger-type CMOS image sensor according to claim 3, characterized in that: During comparison, if the previous photoelectric signal is inconsistent with the next photoelectric signal, the XOR gate outputs an indication signal to the logic control to control the readout circuit to convert the previous photoelectric signal.

5. A trigger-type CMOS image sensor according to claim 3, characterized in that: During comparison, if the previous photoelectric signal is consistent with the next photoelectric signal, the XOR gate outputs an indication signal to the logic control, controlling the readout circuit not to convert the previous photoelectric signal.

6. The trigger-type CMOS image sensor according to claim 1, characterized in that: The readout circuit includes an emulator front end, an analog-to-digital converter and a counter; the input end of the emulator front end is connected to the output circuit, the output end of the emulator front end is connected to the analog-to-digital converter, and the output end of the analog-to-digital converter is connected to the counter.

7. The trigger-type CMOS image sensor according to claim 1, characterized in that: A copper pillar interconnection structure is adopted between the upper chip and the lower chip.

8. A method for realizing a trigger-type CMOS image sensor, characterized in that: The following steps are involved: S1, the output circuit, after the previous exposure is completed, makes the switch S7 closed and the switch S8 open, and the previous photoelectric signal stored in FD is stored in the photoelectric signal storage capacitor through the source follower tube S10 and the switch S7; S2, the output circuit makes the switch S8 closed and the switch S7 open after the next exposure is completed, the next photoelectric signal is located at one port of the comparison unit, and the previous photoelectric signal stored in the photoelectric signal storage capacitor is located at another port; S3, the comparison unit compares the received previous photoelectric signal and the next electrical signal, inputs the previous photoelectric signal to the negative end of the first comparator and the positive end of the second comparator, inputs the next photoelectric signal to the positive end of the first comparator and the negative end of the second comparator, and compares whether the previous photoelectric signal and the next electrical signal are consistent; S4. If the previous photoelectric signal and the next electrical signal are consistent, the XOR gate outputs an indication signal to the logic control, which controls the readout circuit not to convert the previous photoelectric signal and realizes high-speed image generation; if the previous photoelectric signal and the next electrical signal are inconsistent, the XOR gate outputs an indication signal to the logic control, which controls the readout circuit to convert the previous photoelectric signal, and realizes high-speed image generation after conversion.

9. The method for realizing a trigger-type CMOS image sensor according to claim 8, characterized in that: The specific process of step S4 is: If the previous photoelectric signal is smaller than the next photoelectric signal, the first comparator XOR gate outputs 1, the second comparator outputs 0, and the XOR gate outputs 1; If the previous photoelectric signal is greater than the next photoelectric signal, the first comparator outputs 0, the second comparator outputs 1, and the XOR gate outputs 1; If the previous photoelectric signal is equal to the next photoelectric signal, the first comparator outputs 0, the second comparator outputs 0, and the XOR gate outputs 0.

10. The method for realizing a trigger-type CMOS image sensor according to claim 8, characterized in that: Before performing step S3, the comparison unit needs to be reset.

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