High-density three-dimensional storage integration-oriented ferroelectric film topological domain wall storage device with vertical cylindrical shell structure

Abstract

The invention discloses a ferroelectric film topological domain wall memory device with a vertical cylindrical shell structure for high-density three-dimensional memory integration, and belongs to the technical field of microelectronics and integrated circuit memories. The laminated structure sequentially comprises an inner electrode (1), a ferroelectric barrier layer (2) and an outer electrode (3) from inside to outside, the inner electrode (1) and the outer electrode (3) are made of metal materials or semiconductor materials, and the radius of the inner electrode ranges from several nanometers to 500 nanometers. The ferroelectric barrier layer (2) is made of a ferroelectric material, and the thickness of the ferroelectric barrier layer (2) is between 1nm and dozens of nanometers; the height of the vertical cylindrical shell is between several nanometers and micrometers. The device can form a stable center quadruple ferroelectric polarization topological domain structure and can be switched between a convergence state and a divergence state, a charged topological domain wall presents a giant tunneling electro-resistance (TER) effect, and a domain wall ferroelectric tunnel junction which is low in power consumption, high in switch ratio and non-destructive in reading can be achieved; according to the device structure, three-dimensional array integration can be realized, and the storage density is improved.

Description

Technical Field

[0001] The present invention belongs to the field of microelectronics and integrated circuit memory technology, and in particular relates to a novel ferroelectric memory device Background Art

[0002] Ferroelectric topological domains have attracted widespread attention as the basis for exploring various emerging physical properties due to their huge application potential. Exotic topological domain structures have been found in many ferroelectric materials, and these domain wall structures can be generated, eliminated or replaced by external stimuli. In recent years, nanoscale ferroelectric topological domain wall electronic devices have been considered as an important component of next-generation electronic devices due to their high-density, high-speed, low-energy non-volatile storage performance. In ferroelectric nanoislands, researchers have discovered various topological states, such as closed domain states, quadrant vortex states, circular vortex lattices, skyrmions, skyrmions, bubble domains, and central domain states, and have conducted in-depth studies on these complex ferroelectric topological structures.

[0003] However, the difficulty of operating the domain wall conductive channel leads to many limitations in the application of these devices in memory. For example, in Chinese invention patents CN 108550551B, CN109509753B, and CN114220466A, the current nano-ferroelectric domain wall memory usually adopts a planar structure, and the external voltage is applied to the upper and lower surfaces respectively; under the action of the external vertical electric field, not only out-of-plane ferroelectric polarization is generated, but also by designing the scanning stepping mode of the voltage in the plane, the in-plane electric field can be generated, thereby generating in-plane ferroelectric polarization, and these in-plane polarizations form topological ferroelectric domains under the restriction of boundary conditions; by changing the size of the external voltage, various in-plane topological states are realized, thereby obtaining multiple configurations. However, on the one hand, such a planar device requires complex dynamic voltage scanning to generate in-plane topological ferroelectric domains, which makes it difficult to realize array-level scale circuit applications; on the other hand, the planar device shows significant limitations in high-density three-dimensional array integration, which seriously limits the storage density and application prospects of domain wall memory devices. Summary of the invention

[0004] The vertical cylindrical shell structure ferroelectric thin film topological domain wall memory device of the present invention has a sandwich structure consisting of an inner electrode, a ferroelectric thin film, and an outer electrode; under the joint action of geometric boundary conditions and a two-dimensional radial electric field, the device can form a stable central quadruple ferroelectric polarization topological domain structure, and can switch between a convergent state and a divergent state, wherein the charged topological domain wall exhibits a giant tunneling electroresistance (TER) effect, and can realize a domain wall ferroelectric tunnel junction with low power consumption, high switching ratio, and non-destructive reading; at the same time, the device is a three-dimensional stackable structure, suitable for high-density storage array circuits, and the device units are arranged in a multi-layer stacking manner, so that more storage units can be accommodated in the same area to improve the storage density. The present invention aims to solve the problem of the difficulty of operating the domain wall topological state and the limited storage density in the existing ferroelectric domain wall memory device.

[0005] 1. Device structure

[0006] As shown in Figure 1(a), a vertical cylindrical shell structure ferroelectric topological domain wall memory device is shown. From the inside to the outside, the stacked structure is: inner electrode (1), ferroelectric barrier layer (2) and outer electrode (3). Figure 1(b) shows a three-dimensional memory array architecture implemented using this device structure.

[0007] 2. Laminated Materials

[0008] For a vertical cylindrical shell structure ferroelectric topological domain wall memory device, an inner electrode (1) and an outer electrode (3) are made of metal materials or semiconductor materials, and the radius of the inner electrode is between a few nanometers and 500 nanometers; a ferroelectric barrier layer (2) is made of ferroelectric material, and the thickness is usually between 1 nm and tens of nanometers; and the height of the vertical cylindrical shell is between a few nanometers and micrometers.

[0009] The radius of the external electrode ranges from nanometer to micrometer. There is no limit to the size of the external electrode. The size of the external electrode is related to the array structure. For example, in Figure 1(b), the entire plane is an electrode. If it is divided into each device, the distance between the two devices is the size of the electrode.

[0010] 3. Working Principle

[0011] By adjusting the applied voltage of the vertical cylindrical shell ferroelectric thin film device, the size and direction of the radial electric field of the ferroelectric device are changed, thereby changing the topological domain state in the ferroelectric film and the conductivity of the charged domain wall. Specifically, in the vertical cylindrical shell structure ferroelectric topological domain wall memory device, there is a stable central quadruple polarization topological domain, and there is a ferroelectric topological domain wall between the central four quadrants. Changing the direction of the electric field can make the topological domain switch back and forth between the convergent state and the divergent state, accompanied by the topological domain wall switching between the head-to-head state and the tail-to-tail state. When the direction of the external electric field is radially inward, the polarized topological domains are in a convergent state, forming head-to-head domain walls, positive charges are accumulated at the domain walls, the potential increases, resulting in a decrease in the barrier height, an increase in the probability of electron tunneling, and the device is in a low resistance state (LRS), corresponding to the logic "1" state; when the direction of the external electric field is radially outward, the polarized topological domains are in a divergent state, forming tail-to-tail domain walls, negative charges are accumulated at the domain walls, the potential decreases, resulting in an increase in the barrier height, a decrease in the probability of electron tunneling, and the device is in a high resistance state (HRS), corresponding to the logic "0" state. When the read voltage is applied, the high and low resistance states of the storage can be identified based on the magnitude of the read current, and the reading process will not affect the stored state, and the data state will not be changed after the electric field is removed, so non-destructive reading and non-volatile storage functions can be achieved. It should be noted that the write voltage should make the electric field in the ferroelectric film greater than the corrected electric field, and the read voltage should make the electric field in the ferroelectric film less than the corrected electric field.

[0012] 4. Three-dimensional integration

[0013] The vertical cylindrical shell ferroelectric thin film device of this invention is a three-dimensional stackable structure suitable for high-density storage array circuits. By arranging the device units in a multi-layer stacking manner, it can accommodate more storage units in the same area to improve the storage density. This invention not only solves the problem of difficulty in improving storage density caused by the challenge of size miniaturization, but also can realize low-power, high-switching ratio and simple process storage array circuits. This structure is suitable for large-scale array circuits and their storage and computing integration applications. It can achieve a close combination of storage and computing in the data processing process, and improve the efficiency and performance of the overall computing system. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] FIG1 is a vertical cylindrical shell structure ferroelectric topological domain wall memory device (a) and a schematic diagram of its three-dimensional array (b) provided by the present invention;

[0015] Figure 2 Two stable central quadruple ferroelectric polarization topological domains of a vertical cylindrical shell structure ferroelectric topological state domain wall memory device provided by the present invention: (a) convergent topological domain with head-to-head domain walls; (b) divergent topological domain with tail-to-tail domain walls;

[0016] Figure 3The net space charge distribution of a vertical cylindrical shell structure ferroelectric topological domain wall memory device provided by the present invention is as follows: (a) positive net space charge is generated at the head-to-head domain walls; (b) negative net space charge is generated at the tail-to-tail domain walls;

[0017] Figure 4 The potential distribution of a vertical cylindrical shell structure ferroelectric topological domain wall memory device provided by the present invention is as follows: (a) a positive potential distribution is formed at the head-to-head domain walls; (b) a negative potential distribution is formed at the tail-to-tail domain walls;

[0018] Figure 5 The potential barrier shapes of a vertical cylindrical shell structure ferroelectric topological domain wall memory device provided by the present invention in two polarization states: (a) the potential barrier shape at the domain wall; (b) the potential barrier shape at the non-domain wall;

[0019] Figure 6 The electron tunneling probability of a vertical cylindrical shell structure ferroelectric topological domain wall memory device provided by the present invention in two polarization states: (a) electron tunneling probability at the domain wall; (b) electron tunneling probability at the non-domain wall;

[0020] Figure 7 The relationship between the electron tunneling current and voltage of a vertical cylindrical shell structure ferroelectric topological domain wall memory device provided by the present invention: (a) current-voltage characteristics at the domain wall; (b) current-voltage characteristics at the non-domain wall;

[0021] Figure 8 A current switching ratio (TER ratio) of a vertical cylindrical shell structure ferroelectric topological domain wall memory device provided by the present invention, including TER ratios at the domain wall and non-domain wall;

[0022] Fig. 9 The tunneling current along the radial direction at different angles in a vertical cylindrical shell structure ferroelectric topological domain wall memory device provided by the present invention when the read voltage is 0.6V, the solid line corresponds to the convergent topological domain, and the dotted line corresponds to the divergent topological domain;

[0023] Fig.10 The overall TER ratio of a vertical cylindrical shell structure ferroelectric topological domain wall memory device provided by the present invention is the average value along the radial angle. DETAILED DESCRIPTION

[0024] As shown in FIG1 , this embodiment provides a ferroelectric topological domain wall memory device with a vertical cylindrical shell structure. The device stack includes an inner electrode (1), a ferroelectric barrier layer (2), and an outer electrode (3) in sequence from the inside to the outside.

[0025] The inner electrode (1) and the outer electrode (3) can each independently adopt metal materials, such as platinum (Pt), gold (Au), silver (Ag), aluminum (Al), copper (Cu), tungsten (W), cobalt (Co), nickel (Ni), molybdenum (Mo), ruthenium (Ru) and alloys of these metals, as well as titanium nitride (TiN), tantalum nitride (TaN), etc.; they can also adopt semiconductor materials, such as n-type and p-type heavily doped silicon (Si), germanium (Ge), gallium arsenide (GaAs), etc.

[0026] The ferroelectric barrier layer (2) can be made of fluorite structured ferroelectric materials, such as undoped or doped hafnium oxide (HfO2) ferroelectric materials, and doped materials include silicon (Si), aluminum (Al), zirconium (Zr), strontium (Sr), lanthanum (La), yttrium (Y), etc.; it can also be made of perovskite structured ferroelectric materials, such as lead titanate (PbTiO3), strontium titanate (SrTiO3), barium titanate (BaTiO3), etc.; it can also be aluminum scandium nitride (AlScN) ferroelectric material; it can also be made of two-dimensional layered ferroelectric materials, such as indium selenide (In2Se3), copper indium phosphosulfate (CuInP2S6), etc.

[0027] For example, the inner electrode (1) and the outer electrode (3) are both made of TiN, the ferroelectric barrier layer (2) is made of HfO2 ferroelectric material with a thickness of 10nm, and the inner electrode radius is 45nm, thereby forming a vertical cylindrical core-shell structure ferroelectric topological domain wall memory device with a stack of TiN / ferroelectric HfO2 / TiN, and its working principle and electrical properties are explained.

[0028] When the inner electrode is grounded, bias voltages are applied to the outer electrode, including write voltage and read voltage. Figure 2 and Figure 3 The PV characteristic curve and polarization distribution of the vertical cylindrical shell structure ferroelectric topological domain wall memory device are shown in the figure. Figure 4 and Figure 5 The net charge distribution and potential distribution in the device are given respectively. Figure 6 and Figure 7The potential barrier distribution and electron tunneling probability corresponding to the domain wall and non-domain wall are given respectively. When the write voltage is positive, the central quadruple polarized topological domain is in a convergent state, that is, the polarization direction points inward, forming a head-to-head domain wall, positive charge accumulates at the domain wall, the potential increases, resulting in a decrease in the barrier height, an increase in the electron tunneling probability, and the device is in a low resistance state (LRS), that is, storing "1"; when the bias write voltage is negative, the polarized central quadruple topological domain is in a divergent state, that is, the polarization direction points outward, forming a tail-to-tail domain wall, negative charge accumulates at the domain wall, the potential decreases, resulting in an increase in the barrier height, a decrease in the electron tunneling probability, and the device is in a high resistance state (HRS), that is, storing "0". At the same time, there is no charge accumulation at the non-domain wall, and the barrier height and electron tunneling probability do not change in the two polarization states.

[0029] from Figure 6 and Figure 7 It can also be seen that the shape of the potential barrier at the head-to-head domain wall position in the convergent state presents a quantum well structure, so there is a resonant tunneling peak in the tunneling probability, which is much greater than the case of tail-to-tail topological state domains in the divergent state, which further increases the tunneling probability gap between the low-resistance state and the high-resistance state. Figure 8 The tunneling current of the vertical cylindrical shell structure ferroelectric topological domain wall memory device in different topological domain polarization directions in the read state is shown. The head-to-head topological domain wall shows better conductivity and a larger tunneling current, that is, a low-resistance state, while the tail-to-tail topological domain wall has a smaller tunneling current, that is, a high-resistance state. In contrast, the current at the domain wall shows a clear window, while the currents in the two states at the non-domain wall almost overlap without a window. Fig. 9 The TER ratio (i.e., the resistance ratio of high resistance state to low resistance state) at the domain wall and non-domain wall is given, and the TER ratio at the domain wall can reach 10 6 As shown above, the TER ratio at non-domain wall is much lower than that at domain wall.

[0030] Fig. 9 It is the tunneling current along the radial direction at different angles in the vertical cylindrical shell structure ferroelectric topological domain wall memory device of this embodiment when the external voltage is 0.6V. Fig.10 The TER ratio of the device as a whole is given, that is, the TER ratio averaged along all radial angles, which is still greater than 10 5 High on / off ratio.

Claims

1. A vertical cylindrical shell structure ferroelectric thin film topological domain wall memory device for high-density three-dimensional storage integration, characterized in that: The stacked structure from inside to outside is: inner electrode (1), ferroelectric barrier layer (2) and outer electrode (3); The inner electrode (1) and the outer electrode (3) are made of metal material or semiconductor material. The radius of the inner electrode is between a few nanometers and 500 nanometers. The ferroelectric barrier layer (2) is made of ferroelectric material and has a thickness between 1 nm and several tens of nanometers. The height of the vertical cylindrical shell is between a few nanometers and micrometers.

2. A vertical cylindrical shell structure ferroelectric thin film topological domain wall memory device for high-density three-dimensional storage integration according to claim 1, characterized in that: The radius of the outer electrode is in the range of nanometer to micrometer.

3. A vertical cylindrical shell structure ferroelectric thin film topological domain wall memory device for high-density three-dimensional storage integration according to claim 1, characterized in that: By adjusting the external voltage of the vertical cylindrical shell ferroelectric thin film device, the size and direction of the radial electric field of the ferroelectric device are changed, thereby changing the topological domain state in the ferroelectric film and the conductivity of the charged domain wall.

4. A vertical cylindrical shell structure ferroelectric thin film topological domain wall memory device for high-density three-dimensional storage integration according to claim 1, characterized in that: In the vertical cylindrical shell structure ferroelectric topological domain wall memory device, there is a stable central quadruple polarization topological domain. There is a ferroelectric topological domain wall between the central four-quadrant domains. Changing the direction of the electric field can make the topological domain switch back and forth between the convergent state and the divergent state, accompanied by the topological domain wall switching between the head-to-head state and the tail-to-tail state.

5. A vertical cylindrical shell structure ferroelectric thin film topological domain wall memory device for high-density three-dimensional storage integration according to claim 4, characterized in that: When the polarization topological domain is in a convergent state, a head-to-head domain wall is formed, positive charges accumulate at the domain wall, the potential increases, resulting in a decrease in the barrier height, an increase in the probability of electron tunneling, and the device is in a low resistance state LRS, corresponding to a logic "1" state; when the polarization topological domain is in a divergent state, a tail-to-tail domain wall is formed, negative charges accumulate at the domain wall, the potential decreases, resulting in an increase in the barrier height, a decrease in the probability of electron tunneling, and the device is in a high resistance state HRS, corresponding to a logic "0" state. When a read voltage is applied, the high and low resistance states of the storage can be identified based on the magnitude of the read current.

6. A vertical cylindrical shell structure ferroelectric thin film topological domain wall memory device for high-density three-dimensional storage integration according to claim 1, characterized in that: The inner electrode (1) and the outer electrode (3) are both made of TiN, and the ferroelectric barrier layer (2) is made of HfO2 ferroelectric material.

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