Thin film transistor, display panel and display device

Abstract

The invention provides a thin film transistor, a display panel and a display device, and the thin film transistor comprises an active layer, and an oxide semiconductor material of the active layer is doped with a first metal element containing a terbium element, so that the heterostructure in the active layer is increased, the crystallinity of the active layer is reduced, and the performance of the display device is improved. Therefore, the uniformity and the stability of the thin film transistor can be improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a thin film transistor, a display panel and a display device. Background Art

[0002] As users' demands for high resolution, high definition, fast response, and low power consumption of display panels increase, oxide semiconductor thin film transistors (OS TFT) are increasingly used in liquid crystal display panels (LCD) and organic light emitting diode (OLED) display panels due to their high carrier mobility, low off-state leakage current, and high uniformity.

[0003] At present, with the increasing demand for large-size and high-resolution displays in the display industry, higher requirements are placed on the mobility and stability of oxide semiconductors. For large-size display panels, due to factors such as process instability and equipment parameter instability in the film formation process, there are large differences in the performance parameters of oxide thin-film transistors, which ultimately affect the uniformity and stability of oxide semiconductor thin-film transistors in large-size display panels.

[0004] Therefore, it is necessary to provide a thin film transistor, a display panel and a display device to improve this defect. Summary of the invention

[0005] The embodiments of the present application provide a thin film transistor, a display panel and a display device, which can improve the uniformity and stability of oxide thin film transistors.

[0006] In order to achieve the above object, according to a first aspect of the present application, a thin film transistor is provided, comprising:

[0007] Active layer;

[0008] A gate, disposed on one side of the active layer;

[0009] The material of the active layer includes an oxide semiconductor material and a first metal element doped in the oxide semiconductor material, and the first metal element includes terbium.

[0010] Optionally, the oxide semiconductor material is further doped with a second metal element, and the second metal element is in a positive tetravalent state;

[0011] Optionally, the atomic percentage of the first metal element is greater than 0 and less than or equal to 3%, and the atomic percentage of the second metal element is greater than 0 and less than or equal to 20%.

[0012] Optionally, the second metal element includes tin.

[0013] Optionally, the oxide semiconductor material includes indium and gallium elements;

[0014] The atomic percentage of the indium element is greater than or equal to 60% and less than or equal to 90%, and the atomic percentage of the gallium element is greater than or equal to 0 and less than or equal to 20%.

[0015] Optionally, the carrier concentration of the active layer is greater than or equal to 10 19 cm -3 and less than or equal to 10 20 cm -3 .

[0016] Optionally, the bandgap width of the active layer is greater than or equal to 3 eV and less than or equal to 3.8 eV.

[0017] Optionally, the active layer is configured in a crystalline state.

[0018] Optionally, the active layer is configured in an amorphous state.

[0019] Optionally, the thin film transistor further comprises a source electrode and a drain electrode, and the source electrode and the drain electrode are respectively connected to the active layer;

[0020] Wherein, when the gate is configured to not apply a gate voltage, the current between the source and the drain is configured to be less than or equal to 10 -10 A.

[0021] Optionally, the gate is disposed on a side of the active layer away from the source electrode, or the gate is disposed on a side of the active layer close to the source electrode.

[0022] According to a second aspect of the present application, a display panel is provided, comprising the thin film transistor as described above.

[0023] According to a third aspect of the present application, a display device is provided, comprising the display panel as described above.

[0024] In the thin film transistor of the embodiment of the present application, a first metal element including terbium is doped into the oxide semiconductor material of the active layer of the thin film transistor to increase the heterostructure in the active layer and reduce the crystallinity of the active layer, thereby improving the uniformity and stability of the thin film transistor.

[0025] Other features and advantages of the present application will be described in detail in the subsequent detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can obtain other drawings based on these drawings without creative work.

[0027] In order to more completely understand the present application and its beneficial effects, the following description will be given in conjunction with the accompanying drawings, wherein the same figure numbers represent the same parts in the following description.

[0028] Figure 1 A schematic diagram of the structure of a first display panel provided in an embodiment of the present application;

[0029] Figure 2 A schematic diagram of the structure of a second display panel provided in an embodiment of the present application;

[0030] Figure 3 A schematic diagram of a display device provided in an embodiment of the present application.

[0031] Description of reference numerals:

[0032] 1. Display panel; 11. Substrate; 12. Thin film transistor; 121. Active layer; 122. Gate; 123. Source; 124. Drain; 13. Gate insulating layer; 14. Passivation layer; 15. Light shielding layer; 16. Blocking layer; 17. Interlayer dielectric layer;

[0033] 10. Display device. DETAILED DESCRIPTION

[0034] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0035] An embodiment of the present application provides a thin film transistor, which includes an active layer and a gate. The gate is arranged on one side of the active layer. The material of the active layer includes an oxide semiconductor material and a first metal element doped in the oxide semiconductor material. The first metal element includes terbium.

[0036] In an embodiment of the present application, a first metal element including terbium is doped into an oxide semiconductor material of an active layer of a thin film transistor to increase a heterogeneous structure in the active layer and reduce the crystallinity of the active layer, thereby improving the uniformity and stability of the thin film transistor.

[0037] See also Figure 1 , Figure 1 A schematic diagram of the structure of a first display panel provided in an embodiment of the present application, wherein a thin film transistor 12 is applied to a display panel 1, and the display panel 1 includes a substrate 11 and a thin film transistor 12, wherein the thin film transistor 12 is disposed on the substrate 11. The thin film transistor 12 includes an active layer 121, wherein the material of the active layer 121 includes an oxide semiconductor material and a first metal element doped in the oxide semiconductor material, wherein the first metal element includes terbium (Tb).

[0038] In the embodiment of the present application, the first metal element including terbium is doped into the oxide semiconductor material of the active layer 121 of the thin film transistor 12, thereby increasing the heterogeneous structure in the active layer 121 and reducing the crystallinity of the active layer 121, thereby improving the uniformity and stability of the thin film transistor 12. In practical applications, other metal elements having the same effect as terbium can also be doped with the first metal element.

[0039] In some embodiments, see Figure 1 , the oxide semiconductor material of the active layer 121 is also doped with a second metal element, and the second metal element includes tin (Sn). The tin element can provide carriers and passivate oxygen-related defects, and the terbium element can provide a photogenerated carrier recombination center to improve the light stability. By doping the active layer 121 with tin and terbium at the same time, the heterostructure in the active layer 121 can be increased, and the crystallinity of the active layer 121 can be reduced, thereby improving the uniformity and stability of the thin film transistor 12. In practical applications, other metal elements that have the same effect as tin can also be doped with the second metal element.

[0040] In some embodiments, see Figure 1 , the atomic percentage of the second metal element in the active layer 121 is greater than 0 and less than or equal to 20%, and the atomic percentage of the first metal element is greater than 0 and less than or equal to 3%. For example, the atomic percentage of the tin element in the active layer 121 is 20%, and the atomic percentage of the terbium element is 1%; or, the atomic percentage of the tin element in the active layer 121 is 10%, and the atomic percentage of the terbium element is 2%; or, the atomic percentage of the tin element in the active layer 121 is 1%, and the atomic percentage of the terbium element is 3%.

[0041] In some embodiments, the active layer 121 is doped with terbium, but not with tin. That is, the atomic percentage of tin is 0, and the atomic percentage of terbium is greater than or equal to 0 and less than or equal to 3%, which can also increase the heterogeneous structure in the active layer 121 and reduce the crystallinity of the active layer 121, thereby improving the uniformity and stability of the thin film transistor 12.

[0042] In some embodiments, the oxide semiconductor material includes indium (In) and gallium (Ga), the atomic percentage of the indium element is greater than or equal to 60% and less than or equal to 90%, and the atomic percentage of the gallium element is greater than or equal to 0 and less than or equal to 20%.

[0043] It should be noted that, in the present embodiment, the oxide of the indium element is used as the main material of the active layer 121, and the proportion is relatively high, so that the active layer 121 has a large carrier concentration, so that the active layer 121 has a high mobility. If the atomic percentage of the indium element in the active layer 121 is less than 60%, the mobility of the active layer 121 will be low and cannot meet the requirements. In addition, the atomic percentage of the indium element is related to the crystallization state of the active layer. When the atomic percentage of the indium element is less than 80%, the active layer 121 is in a crystalline state; when the atomic percentage of the indium element is higher than 80%, the active layer 121 is in an amorphous state. The proportion of the gallium element is relatively low, and the gallium element can be used as a carrier inhibitor to reduce oxygen vacancies in the active layer 121 and improve the stability of the active layer 121.

[0044] In some embodiments, the active layer 121 contains indium element, and the gallium element is completely replaced by terbium element and / or tin element, that is, the oxide semiconductor material is indium oxide, and the oxide of indium element is used as the main material of the active layer 121. By doping indium oxide with terbium element, or doping indium oxide with tin element and terbium element at the same time, the heterogeneous structure in the active layer 121 can be increased, and the crystallinity of the active layer 121 can be reduced, thereby improving the uniformity and stability of the thin film transistor 12.

[0045] In some embodiments, the active layer 121 contains indium and gallium, that is, the material of the active layer 121 is indium gallium oxide, indium gallium oxide is doped with terbium, or indium gallium oxide is doped with tin and terbium at the same time. Gallium can be used as a carrier inhibitor to reduce oxygen vacancies in the active layer 121 and improve the stability of the active layer 121. By doping indium gallium oxide with terbium, or doping with tin and terbium at the same time, the heterogeneous structure in the active layer 121 can be increased, the crystallinity of the active layer 121 can be reduced, and the uniformity and stability of the thin film transistor 12 can be improved.

[0046] In some embodiments, the carrier concentration of the active layer 121 is greater than or equal to 10 19 cm-3 and less than or equal to 10 20 cm -3 For example, the carrier concentration of the active layer 121 is 10 19 cm -3 , or 10 20 cm -3 It should be noted that the carrier concentration and mobility of the active layer 121 are positively correlated. By limiting the carrier concentration of the active layer 121 to 10 19 cm -3 and less than or equal to 10 20 cm -3 Not only can the active layer 121 have a higher mobility, but the switching characteristics of the thin film transistor 12 can also be maintained, thereby preventing the thin film transistor 12 from being difficult to turn off.

[0047] In some embodiments, the bandgap width of the active layer 121 is greater than or equal to 3 eV and less than or equal to 3.8 eV. For example, the bandgap width of the active layer 121 is 3.2 eV, 3.4 eV, 3.6 eV or 3.8 eV.

[0048] It should be noted that if the bandgap of the active layer is too low, the optical stability of the active layer will be poor; if the bandgap of the active layer is too high, the mobility of the active layer will be degraded. In the embodiment of the present application, only terbium is doped in the active layer 121 or terbium and tin are doped at the same time to limit the bandgap of the active layer 121 to between 3eV and 3.8eV, thereby achieving mobility and improving the stability of the active layer.

[0049] In some implementations, the second metal element is in a positive tetravalent state. It should be noted that the positive tetravalent tin ions can be used as donor doping to replace the cations in the active layer 121, and each positive tetravalent tin ion can provide an additional free electron, thereby increasing the number of electrons and forming N-type doping, thereby increasing the carrier concentration in the active layer 121. The positive tetravalent tin ions can not only reduce the lattice defects in the active layer 121 and reduce electron scattering, but also reduce impurity scattering, thereby further improving the mobility of the active layer 121.

[0050] In some implementations, the active layer 121 is configured in a crystalline state. By doping the active layer 121 with tin and terbium, the heterostructure in the active layer 121 is increased and the crystallinity of the active layer is reduced, thereby improving the uniformity and stability of the thin film transistor.

[0051] In some implementations, the active layer 121 is configured in an amorphous state, that is, an amorphous state. The mobility of the active layer 121 in the amorphous state increases with the increase of carrier concentration. By increasing the carrier concentration of the active layer 121, the mobility of the active layer 121 can be improved.

[0052] In some embodiments, see Figure 1 The thin film transistor 12 includes a gate 122, a source 123 and a drain 124. Along the film thickness direction of the gate 122, the gate 122 is aligned with the active layer 121, and the source 123 and the drain 124 are connected to the active layer 121 respectively. When the gate 122 is configured to not apply a gate voltage, the current between the source 123 and the drain 124 is configured to be less than or equal to 10 -10 A. When no gate voltage is applied, a voltage less than or equal to 10 -10 A current can reduce the off-state current of the thin film transistor 12, thereby reducing the power consumption of the thin film transistor 12.

[0053] In some embodiments, see Figure 1 The thin film transistor 12 has a bottom gate structure, and the gate 122 is disposed on a side of the active layer 121 close to the substrate 11 .

[0054] In some embodiments, see Figure 1 The display panel 1 also includes a gate insulating layer 13 and a passivation layer 14. The gate insulating layer 13 is arranged on the substrate 11 and the gate 122. The active layer 121 is arranged on the surface of the gate insulating layer 13 away from the substrate 11. The source 123 and the drain 124 are arranged on the active layer 121 and overlap with the opposite ends of the active layer 121 respectively. The passivation layer 14 is arranged on the source and the drain 124, and covers the active layer 121 and the gate insulating layer 13.

[0055] In some embodiments, see Figure 2 , Figure 2 A schematic diagram of the structure of a second display panel provided in an embodiment of the present application, which has a structure similar to Figure 1 The structures of the thin film transistors in the first display panel shown are substantially the same, except that: Figure 2The thin film transistor 12 in the display panel is a top gate structure, and the gate electrode 122 is disposed on a side of the active layer 121 away from the substrate 11 . The display panel 1 further includes a light shielding layer 15, a blocking layer 16, a gate insulating layer 13, an interlayer dielectric layer 17 and a passivation layer 14. The light shielding layer 15 is arranged on the substrate 11, the blocking layer 16 is arranged on the substrate 11 and the light shielding layer 15, the active layer 121 is arranged on the surface of the blocking layer 16 away from the substrate 11, the gate insulating layer 13 is arranged on the surface of the active layer 121 away from the substrate 11, the gate 122 is arranged on the surface of the gate insulating layer 13 away from the active layer 121, the interlayer dielectric layer 17 is arranged on the gate 122 and the active layer 121, the source 123 and the drain 124 are arranged on the interlayer dielectric layer 17, the source 123 and the drain 124 are respectively overlapped with the active layer 121 through vias on the interlayer dielectric layer 17, and the passivation layer 14 is arranged on the source 123, the drain 124 and the interlayer dielectric layer 17.

[0056] Combination Figure 1 and Figure 2 It can be seen that the type of thin film transistor provided in the embodiments of the present application can be a top gate structure or a bottom gate structure, and the thin film transistor can also be a back channel etched thin film transistor or a top gate self-aligned thin film transistor. By doping terbium or simultaneously doping terbium and tin in the active layers of the above-mentioned various thin film transistors, the heterogeneous structure in the active layer can be increased and the crystallinity of the active layer can be reduced, thereby improving the uniformity and stability of the thin film transistor.

[0057] According to the thin film transistor provided in the above embodiment of the present application, the embodiment of the present application further provides a display panel, see Figure 2 The display panel includes a thin film transistor as provided in any one of the above embodiments. The display device provided in the embodiments of the present application can achieve the same technical effect as the thin film transistor provided in any one of the above embodiments, which will not be described in detail here.

[0058] In some embodiments, the display panel 1 is a liquid crystal display panel, which includes an array substrate, an opposing substrate and a liquid crystal layer (not shown in the figure), the opposing substrate is arranged opposite to the array substrate, the liquid crystal layer is arranged between the array substrate and the opposing substrate, and the array substrate includes a thin film transistor. When the color filter layer is arranged on one side of the opposing substrate, the opposing substrate can also be regarded as a color filter substrate.

[0059] In some embodiments, the display panel is an organic light emitting diode display panel or a micro light emitting diode display panel. Specifically, the display panel may include an array substrate and a light emitting device layer, the array substrate includes a thin film transistor, the light emitting device layer is arranged on the array substrate, the light emitting device layer has a plurality of light emitting devices, and the light emitting device may be an organic light emitting diode or a micro light emitting diode chip.

[0060] According to the display panel provided in the above embodiment of the present application, the embodiment of the present application further provides a display device, see Figure 3 , Figure 3 A schematic diagram of a display device provided in an embodiment of the present application, wherein the display device 10 includes a display panel 1, and the display panel 1 can be a display panel provided in any of the above embodiments. The display device provided in an embodiment of the present application can achieve the same technical effect as the display panel provided in any of the above embodiments, which will not be described in detail here.

[0061] Beneficial effects of the embodiments of the present application: The embodiments of the present application provide a thin film transistor, a display panel and a display device. The thin film transistor includes an active layer and a gate. By doping a first metal element including terbium into the oxide semiconductor material of the active layer, the heterostructure in the active layer is increased and the crystallinity of the active layer is reduced, thereby improving the uniformity and stability of the thin film transistor.

[0062] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0063] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0064] The embodiments, implementation methods and related technical features of the present application can be combined and replaced with each other without conflict.

[0065] The above are only preferred embodiments of the present application and do not constitute any form of limitation to the present application. However, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. A thin film transistor, characterized in that: include: Active layer; A gate, disposed on one side of the active layer; The material of the active layer includes an oxide semiconductor material and a first metal element doped in the oxide semiconductor material, and the first metal element includes terbium.

2. The thin film transistor according to claim 1, wherein: The oxide semiconductor material is further doped with a second metal element, and the second metal element is in a positive tetravalent state.

3. The thin film transistor according to claim 2, wherein: The atomic percentage of the first metal element is greater than 0 and less than or equal to 3%, and the atomic percentage of the second metal element is greater than 0 and less than or equal to 20%.

4. The thin film transistor according to claim 2 or 3, characterized in that: The second metal element includes tin.

5. The thin film transistor according to claim 1, wherein: The oxide semiconductor material includes indium and gallium.

6. The thin film transistor according to claim 5, characterized in that: The atomic percentage of the indium element is greater than or equal to 60% and less than or equal to 90%, and the atomic percentage of the gallium element is greater than or equal to 0 and less than or equal to 20%.

7. The thin film transistor according to claim 1, wherein: The carrier concentration of the active layer is greater than or equal to 10 19 cm -3 and less than or equal to 10 20 cm -3 .

8. The thin film transistor according to claim 1, wherein: The bandgap width of the active layer is greater than or equal to 3 eV and less than or equal to 3.8 eV.

9. The thin film transistor according to claim 1, wherein: The active layer is in a crystalline state.

10. The thin film transistor according to claim 1, wherein: The active layer is in an amorphous state.

11. The thin film transistor according to claim 1, wherein: The thin film transistor further comprises a source electrode and a drain electrode, wherein the source electrode and the drain electrode are respectively connected to the active layer; Wherein, when the gate is configured to not apply a gate voltage, the current between the source and the drain is configured to be less than or equal to 10 -10 A.

12. The thin film transistor according to claim 11, wherein: The gate is arranged on a side of the active layer away from the source electrode, or the gate is arranged on a side of the active layer close to the source electrode.

13. A display panel, characterized in that: Comprising a thin film transistor as claimed in any one of claims 1 to 12.

14. A display device, characterized in that: Comprising the display panel as claimed in claim 13.

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