Solar cell and preparation method and application thereof

Abstract

The invention relates to a solar cell and a preparation method and application thereof, the solar cell comprises a silicon substrate, the silicon substrate comprises a first surface, a second surface and a side surface, the first surface and the second surface are arranged oppositely, and the side surface is connected with the first surface and the second surface; a first laminated structure and a first electrode are arranged on the first surface, the first laminated structure comprises a first transparent conductive film layer and a first barrier layer, and the first transparent conductive film layer and the first barrier layer both extend to at least part of the side surface; a second laminated structure and a second electrode are arranged on the second surface, the second laminated structure comprises a second transparent conductive film layer, and the second transparent conductive film layer extends to at least part of the side surface; on the side face, the first blocking layer is arranged between the first transparent conductive film layer and the second transparent conductive film layer, and the first blocking layer wraps the surface of the first transparent conductive film layer. According to the solar cell, on the basis of keeping a zero mask structure, the problem of short circuit of the cell is solved, and the light trapping effect is maximized.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic manufacturing technology, and in particular to a solar cell and a preparation method and application thereof. Background Art

[0002] In the solar cell structure, some deposition processes are not directional, resulting in the film layer not only covering the intended surface, but also adhering to the unexpected surface, forming unnecessary deposition layers. Based on this, when depositing transparent conductive film layers on the front and back sides, a contact layer between the front transparent conductive film layer and the back transparent conductive film layer will inevitably be formed on the side of the silicon substrate, resulting in a great risk of leakage in the battery.

[0003] In order to overcome the battery short circuit problem, a mask is usually designed for the coating area on the back of the battery to separate the transparent conductive film layer on the front from the transparent conductive film layer on the back to avoid conduction. However, the mask part on the back of the battery cannot collect carriers, resulting in incomplete collection of photogenerated carriers, thereby affecting the photoelectric conversion efficiency of the battery. Summary of the invention

[0004] Based on this, it is necessary to provide a solar cell and a preparation method and application thereof to address the above problems; the solar cell overcomes the battery short circuit problem and maximizes the light trapping effect while maintaining a zero mask structure.

[0005] A solar cell comprises a silicon substrate, wherein the silicon substrate comprises a first surface, a second surface and a side surface connecting the first surface and the second surface.

[0006] A first stacked structure and a first electrode are provided on the first surface, wherein the first stacked structure includes a first transparent conductive film layer and a first barrier layer, and both the first transparent conductive film layer and the first barrier layer extend to at least a portion of the side surface;

[0007] A second stacked structure and a second electrode are provided on the second surface, wherein the second stacked structure includes a second transparent conductive film layer, and the second transparent conductive film layer extends to at least a portion of the side surface;

[0008] On the side surface, the first barrier layer is disposed between the first transparent conductive film layer and the second transparent conductive film layer, and the first barrier layer covers the surface of the first transparent conductive film layer.

[0009] In one embodiment, the second stacked structure further includes a second barrier layer, and the second barrier layer extends to at least a portion of a side surface; on the side surface, the second barrier layer is coated on the surface of the second transparent conductive film layer.

[0010] In one embodiment, the thickness of the first barrier layer and the second barrier layer are independently selected from 5nm-100nm;

[0011] and / or, the refractive index of the first barrier layer is smaller than the refractive index of the first transparent conductive film layer;

[0012] And / or, the refractive index of the second barrier layer is smaller than the refractive index of the second transparent conductive film layer.

[0013] In one embodiment, on the side, the first barrier layer and the second barrier layer each independently include at least two stacked sub-layers, and the sub-layers meet at least one of the following conditions:

[0014] (1) The refractive index of any sublayer is 1-2;

[0015] (2) The refractive index of the sublayers increases gradually along the direction away from the silicon substrate.

[0016] In one embodiment, the first barrier layer and the second barrier layer are independently selected from at least one of a silicon nitride layer, a silicon oxide layer, a silicon oxynitride layer, and a lithium fluoride layer.

[0017] In one of the embodiments, on the side surface, the thickness of the first transparent conductive film layer and the second transparent conductive film layer are independently greater than 0 and less than or equal to 30 nm.

[0018] In one embodiment, the first stacked structure further includes a first doped amorphous silicon layer, the first doped amorphous silicon layer is disposed between the first transparent conductive film layer and the silicon substrate, and the first doped amorphous silicon layer extends to at least a portion of the side surface;

[0019] And / or, the second stacked structure further includes a second doped amorphous silicon layer, the second doped amorphous silicon layer is disposed between the second transparent conductive film layer and the silicon substrate, and the second doped amorphous silicon layer extends to at least a portion of the side surface.

[0020] In one embodiment, the first stacked structure further includes a first intrinsic amorphous silicon layer, the first intrinsic amorphous silicon layer is disposed between the first transparent conductive film layer and the silicon substrate, and the first intrinsic amorphous silicon layer extends to at least a portion of the side surface;

[0021] And / or, the second stacked structure further includes a second intrinsic amorphous silicon layer, the second intrinsic amorphous silicon layer is disposed between the second transparent conductive film layer and the silicon substrate, and the second intrinsic amorphous silicon layer extends to at least a portion of the side surface.

[0022] A method for preparing the solar cell as described above comprises the following steps:

[0023] A first stacking structure and a second stacking structure are deposited on the first surface and the second surface of the silicon substrate respectively. After the deposition of the first transparent conductive film layer in the first stacking structure is completed, a first electrode is prepared in sequence, a first barrier layer is deposited, a second transparent conductive film layer in the second stacking structure is deposited, and a second electrode is prepared to obtain a solar cell.

[0024] In one embodiment, after depositing the second transparent conductive film layer in the second stacked structure and before preparing the second electrode, a second barrier layer is deposited on the surface of the second transparent conductive film layer;

[0025] And / or, before depositing the first transparent conductive thin film layer in the first stacked structure, an intrinsic amorphous silicon layer and a doped amorphous silicon layer are deposited on the first surface and the second surface of the silicon substrate respectively.

[0026] A photovoltaic module comprises the solar cell described above.

[0027] The present invention improves the traditional stacked structure by setting a first barrier layer between the first transparent conductive film layer and the second transparent conductive film layer coated on the side, thereby effectively solving the battery short circuit problem while maintaining a zero mask structure, maximizing the light trapping effect, and fully exerting the light conversion efficiency of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0029] Figure 1 is a schematic diagram of a longitudinal cross-sectional structure of a solar cell in one embodiment of the present invention;

[0030] Figure 2 A schematic diagram of a longitudinal cross-sectional structure of a solar cell in another embodiment of the present invention;

[0031] Figure 3 A schematic diagram of a longitudinal cross-sectional structure of a solar cell in another embodiment of the present invention;

[0032] Figure 4 FIG. 4 is a schematic diagram of the longitudinal cross-sectional structure of a solar cell in another embodiment of the present invention.

[0033] Among them, 101 is a silicon substrate; 102 is a first intrinsic amorphous silicon layer; 103 is a first doped amorphous silicon layer; 104 is a first transparent conductive film layer; 105 is a first barrier layer; 106 is a first electrode; 107 is a second intrinsic amorphous silicon layer; 108 is a second doped amorphous silicon layer; 109 is a second transparent conductive film layer; 110 is a second barrier layer; 111 is a second electrode. DETAILED DESCRIPTION

[0034] For ease of understanding of the present invention, the present invention will be described in more detail below. However, it should be understood that the present invention can be implemented in many different forms and is not limited to the embodiments or examples described herein. On the contrary, the purpose of providing these embodiments or examples is to make the understanding of the disclosure of the present invention more thorough and comprehensive.

[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by technicians in the technical field of the present invention. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments or embodiments, and are not intended to limit the present invention. The optional range of the term "and / or" used herein includes any one of two or more related listed items, and also includes any and all combinations of related listed items, and the arbitrary and all combinations include any two related listed items, any more related listed items, or all related listed items. In the present invention, it is related to a numerical range. If there is no special explanation, the above numerical range is regarded as continuous and includes the minimum and maximum values ​​of the range, and each value between such minimum and maximum values. Further, when the range refers to an integer, each integer between the minimum and maximum values ​​of the range is included. In addition, when multiple ranges are provided to describe features or characteristics, the range can be merged. In other words, unless otherwise specified, all ranges disclosed herein should be understood to include any and all sub-ranges included therein.

[0036] The present invention provides a solar cell, including but not limited to a heterojunction cell, a TOPCon cell, a PERC cell, etc. Specifically, Figure 1 As shown, a cross-sectional structure of a solar cell provided by the present invention includes a silicon substrate 101, wherein the silicon substrate 101 includes a first surface, a second surface and a side surface connecting the first surface and the second surface which are arranged opposite to each other.

[0037] A first stacked structure and a first electrode 106 are provided on the first surface. The first stacked structure includes a first transparent conductive film layer 104 and a first barrier layer 105. Both the first transparent conductive film layer 104 and the first barrier layer 105 extend to at least a portion of the side surface.

[0038] A second stacked structure and a second electrode 111 are disposed on the second surface. The second stacked structure includes a second transparent conductive film layer 109. The second transparent conductive film layer 109 extends to at least a portion of the side surface.

[0039] On the side surface, the first barrier layer 105 is disposed between the first transparent conductive film layer 104 and the second transparent conductive film layer 109 , and the first barrier layer 105 covers the surface of the first transparent conductive film layer 104 .

[0040] The present invention improves the traditional stacked structure by setting a first barrier layer between the first transparent conductive film layer 104 and the second transparent conductive film layer 109 coated on the side, thereby effectively solving the battery short circuit problem while maintaining a zero mask structure, maximizing the light trapping effect, and giving full play to the light conversion efficiency of the solar cell.

[0041] Specifically, taking a heterojunction cell as an example, the cell structure provided by the present invention can achieve a light conversion efficiency of up to about 26.3%, which is about 0.15% higher than that of a traditional heterojunction cell. It is understandable that different types of solar cells have different test methods and performance differences, which will not be elaborated in the present invention.

[0042] It should be noted that the present invention does not limit the stacking structure. Those skilled in the art can understand that different stacking structures exist for different battery structures. For example, for a heterojunction battery, the stacking structure may include an intrinsic amorphous silicon layer, a doped amorphous silicon layer, and a transparent conductive film layer.

[0043] It is understandable that the present invention does not limit the backlight surface and the light-receiving surface of the solar cell. The first surface can be the backlight surface or the light-receiving surface, and the second surface can also be the backlight surface or the light-receiving surface. Specifically, when the first surface is the backlight surface, the second surface is the light-receiving surface; when the first surface is the light-receiving surface, the second surface is the backlight surface. In the present invention, the stacked structure of the first surface and the second surface can be symmetrical or asymmetrical, and the present invention does not limit this.

[0044] In one embodiment of the present invention, Figure 2 , Figure 3 and Figure 4 As shown, the second stacked structure also includes a second barrier layer 110, and the second barrier layer 110 extends to at least part of the side surface; on the side surface, the second barrier layer 110 is coated on the surface of the second transparent conductive film layer 109, which is not only conducive to further improving the battery efficiency, but also can effectively prevent the corrosion of water, acid and sodium to the second transparent conductive film layer 109, thereby further improving the stability.

[0045] It can be understood that the present invention does not limit the size of the first barrier layer 105 and the second barrier layer 110 on the side. On the side, the size of the first barrier layer 105 can be larger than the second barrier layer 110, the size of the first barrier layer 105 can be smaller than the second barrier layer 110, and the size of the first barrier layer 105 can also be equal to the second barrier layer 110.

[0046] Preferably, the thickness of the first barrier layer 105 and the second barrier layer 110 are independently selected from 5nm-100nm, including but not limited to any point value of 5nm, 10nm, 20nm, 50nm, 60nm, 85nm, 100nm or any range value between two thereof. It is understood that the first barrier layer 105 and the second barrier layer 110 may be the same or different, and the present invention is not limited thereto.

[0047] Preferably, the refractive index of the first barrier layer 105 is smaller than the refractive index of the first transparent conductive film layer 104 , and / or the refractive index of the second barrier layer 110 is smaller than the refractive index of the second transparent conductive film layer 109 .

[0048] It should be noted that the first barrier layer 105 and the second barrier layer 110 may have the same layer structure or different layer structures, and the present invention does not limit this.

[0049] In one embodiment of the present invention, on the side, the first barrier layer 105 and the second barrier layer 110 each independently include at least two stacked sub-layers.

[0050] Preferably, the refractive index of any sublayer is 1-2, more preferably 1.4-1.9, including but not limited to any value among 1.4, 1.5, 1.6, 1.7, 1.8, 1.9 or any range between two values.

[0051] Preferably, the refractive index of the sublayers increases gradually along the direction away from the silicon substrate 101 , which is beneficial to further improve the anti-reflection passivation effect.

[0052] Considering that the transparent conductive film layer is also easily corroded by water, acid, and sodium, resulting in problems such as reduced conversion rate and insufficient stability of the battery, in one embodiment of the present invention, the first barrier layer 105 and the second barrier layer 110 are independently selected from at least one of a silicon nitride layer, a silicon oxide layer, a silicon oxynitride layer, and a lithium fluoride layer, so that the layer structure has anti-reflection, insulation, and water-blocking functions, which can not only increase the amount of incident light, which is beneficial to further improve the battery efficiency, but also effectively prevent the corrosion of water, acid, and sodium to the first transparent conductive film layer 104, thereby improving stability.

[0053] Specifically, taking a heterojunction battery as an example, the battery structure provided by the present invention can achieve no attenuation in terms of stability by testing under the conditions of 10L aqueous solution of 1wt% acetic acid and 50g NaCl, 85°C, and 3h, indicating excellent stability, while the absolute attenuation rate of the traditional heterojunction battery reaches more than 3%, and the stability is far less than that of the present invention. It is understandable that for different types of solar cells, the test methods are different and the performance is also different, and the present invention will not go into details.

[0054] In one embodiment of the present invention, on the side, the thickness of the first transparent conductive film layer 104 and the second transparent conductive film layer 109 are independently greater than 0 and less than or equal to 30nm, which is more conducive to improving the coating effect of the barrier layer on the transparent conductive film layer, thereby further enhancing insulation. Specifically, the thickness includes but is not limited to any point value among 5nm, 10nm, 15nm, 20nm, 25nm, and 30nm or a range value between any two. It is understandable that the thickness of the first transparent conductive film layer 104 and the second transparent conductive film layer 109 can be the same or different, and the present invention is not limited to this.

[0055] It should be noted that, when the solar cell provided by the present invention is a heterojunction cell, the first stacked structure on the first surface includes a first intrinsic amorphous silicon layer 102, a first doped amorphous silicon layer 103 and a first transparent conductive film layer 104 which are stacked; the second stacked structure on the second surface includes a second intrinsic amorphous silicon layer 107, a second doped amorphous silicon layer 108 and a second transparent conductive film layer 109 which are stacked.

[0056] The present invention does not limit the specific structures of the first intrinsic amorphous silicon layer 102 and the first doped amorphous silicon layer 103 in the above-mentioned first stacked structure and the second intrinsic amorphous silicon layer 107 and the second doped amorphous silicon layer 108 in the second stacked structure on the side. The first intrinsic amorphous silicon layer 102 and the first doped amorphous silicon layer 103 can be only arranged on the first surface without being arranged on the side, or can be not only arranged on the first surface but also plated on the side; the second intrinsic amorphous silicon layer 107 and the second doped amorphous silicon layer 108 can be only arranged on the second surface without being arranged on the side, or can be not only arranged on the second surface but also plated on the side.

[0057] In one embodiment of the present invention, Figure 3 As shown, the first stacked structure also includes a first doped amorphous silicon layer 103, which is arranged between the first transparent conductive film layer 104 and the silicon substrate 101, and the first doped amorphous silicon layer 103 extends to at least part of the side. In other words, the first doped amorphous silicon layer 103 in the stacked structure is plated around the first surface and distributed on the side connected to the surface.

[0058] In one embodiment of the present invention, Figure 3 As shown, the second stacked structure also includes a second doped amorphous silicon layer 108, which is arranged between the second transparent conductive film layer 109 and the silicon substrate 101, and the second doped amorphous silicon layer 108 extends to at least part of the side. In other words, the second doped amorphous silicon layer 108 in the stacked structure is plated around the second surface and distributed on the side connected to the surface.

[0059] It should be noted that the present invention does not limit the size and specific distribution of the first doped amorphous silicon layer 103 and the second doped amorphous silicon layer 108 on the side. On the side, the size of the first doped amorphous silicon layer 103 and the second doped amorphous silicon layer 108 may be the same or different. When the first doped amorphous silicon layer 103 and the second doped amorphous silicon layer 108 are distributed on the side at the same time, they may be in contact with each other or have overlapping parts, or they may not be in contact at all. The present invention does not limit this.

[0060] In one embodiment of the present invention, the thickness of the first doped amorphous silicon layer 103 and the second doped amorphous silicon layer 108 are independently selected from 10 μm-30 μm, including but not limited to any point value of 10 μm, 15 μm, 20 μm, 25 μm, 30 μm or any range value between the two. It is understandable that the thickness of the first doped amorphous silicon layer 103 and the second doped amorphous silicon layer 108 can be the same or different, and the present invention is not limited to this.

[0061] In one embodiment of the present invention, Figure 4 As shown, the first stacked structure also includes a first intrinsic amorphous silicon layer 102, and the first intrinsic amorphous silicon layer 102 is arranged between the first transparent conductive film layer 104 and the silicon substrate 101, and the first intrinsic amorphous silicon layer 102 extends to at least part of the side. In other words, the first intrinsic amorphous silicon layer 102 in the stacked structure is plated around the first surface and distributed on the side connected to the surface.

[0062] In one embodiment of the present invention, Figure 4 As shown, the second stacked structure also includes a second intrinsic amorphous silicon layer 107, which is arranged between the second transparent conductive film layer 109 and the silicon substrate 101, and the second intrinsic amorphous silicon layer 107 extends to at least part of the side. In other words, the second intrinsic amorphous silicon layer 107 in the stacked structure is plated around the second surface and distributed on the side connected to the surface.

[0063] It should be noted that the present invention does not limit the size and specific distribution of the first intrinsic amorphous silicon layer 102 and the second intrinsic amorphous silicon layer 107 on the side. On the side, the size of the first intrinsic amorphous silicon layer 102 and the second intrinsic amorphous silicon layer 107 may be the same or different. When the first intrinsic amorphous silicon layer 102 and the second intrinsic amorphous silicon layer 107 are distributed on the side at the same time, they may be in contact with each other or have overlapping parts, or they may not be in contact at all. The present invention does not limit this.

[0064] In one embodiment of the present invention, the thickness of the first intrinsic amorphous silicon layer 102 and the second intrinsic amorphous silicon layer 107 are independently selected from 2nm-10nm, including but not limited to any point value of 2nm, 4nm, 5nm, 6nm, 8nm, 10nm or any range value between two of them. It is understandable that the thickness of the first intrinsic amorphous silicon layer 102 and the second intrinsic amorphous silicon layer 107 can be the same or different, and the present invention preferably has the same thickness.

[0065] It should be noted that the present invention does not limit the material and structure of the first electrode 106 and the second electrode 111. Those skilled in the art can set them according to different types of solar cells. For example, for heterojunction cells, the width of the electrode can be 10μm-40μm, and the height can be 5μm-20μm.

[0066] The present invention provides a method for preparing the solar cell as described above, comprising the following steps:

[0067] A first stacking structure and a second stacking structure are deposited on the first surface and the second surface of the silicon substrate respectively. After the deposition of the first transparent conductive film layer in the first stacking structure is completed, a first electrode is prepared in sequence, a first barrier layer is deposited, a second transparent conductive film layer in the second stacking structure is deposited, and a second electrode is prepared to obtain a solar cell.

[0068] By adjusting the preparation method of the first surface and the second surface stacking structure, the first barrier layer is arranged between the first transparent conductive film layer and the second transparent conductive film layer coated on the side, which not only effectively solves the battery short circuit problem, but also increases the incident light amount and improves the battery efficiency. At the same time, it can effectively prevent the corrosion of water, acid and sodium to the first transparent conductive film layer and improve stability.

[0069] In one embodiment of the present invention, after depositing the second transparent conductive film layer in the second stacked structure and before preparing the second electrode, a second barrier layer is deposited on the surface of the second transparent conductive film layer, which is not only conducive to further improving the battery efficiency, but also can effectively prevent the corrosion of water, acid and sodium to the second transparent conductive film layer, thereby further improving the stability.

[0070] In one embodiment of the present invention, before depositing the first transparent conductive thin film layer in the first stacked structure, an intrinsic amorphous silicon layer and a doped amorphous silicon layer are deposited on the first surface and the second surface of the silicon substrate, respectively.

[0071] In one embodiment of the present invention, before depositing the first transparent conductive film layer or the second transparent conductive film layer, a carrier is arranged around the side of the silicon substrate. The shielding effect of the carrier is utilized to reduce the wrapping of the transparent conductive film layer on the side and reduce the thickness of the transparent conductive film layer, thereby improving the coating effect of the barrier layer on the transparent conductive film layer, thereby improving the insulation and anti-corrosion effects.

[0072] In one embodiment of the present invention, when the amorphous silicon layer is prepared by depositing a stacked structure, a chemical vapor deposition process (CVD) is preferably used; when the transparent conductive thin film layer is prepared by depositing a stacked structure, a physical vapor deposition process (PVD) is preferably used.

[0073] It is understandable that different preparation processes may be used for different solar cell structures, and the present invention does not limit this. Conventional preparation processes may be used, and the present invention will not elaborate on this.

[0074] The present invention also provides a photovoltaic module, comprising the solar cell described above. The photovoltaic module can be widely used in multiple fields such as power generation, outdoor lighting, mobile power supply, and aerospace, and the present invention does not limit this.

[0075] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0076] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A solar cell, characterized in that: The silicon substrate comprises a first surface, a second surface and a side surface connecting the first surface and the second surface. A first stacked structure and a first electrode are provided on the first surface, wherein the first stacked structure includes a first transparent conductive film layer and a first barrier layer, and both the first transparent conductive film layer and the first barrier layer extend to at least a portion of the side surface; A second stacked structure and a second electrode are provided on the second surface, wherein the second stacked structure includes a second transparent conductive film layer, and the second transparent conductive film layer extends to at least a portion of the side surface; On the side surface, the first barrier layer is disposed between the first transparent conductive film layer and the second transparent conductive film layer, and the first barrier layer covers the surface of the first transparent conductive film layer.

2. The solar cell according to claim 1, characterized in that The second stacked structure further includes a second barrier layer, and the second barrier layer extends to at least a portion of the side surface; on the side surface, the second barrier layer is coated on the surface of the second transparent conductive film layer.

3. The solar cell according to claim 2, characterized in that: The thickness of the first barrier layer and the second barrier layer are independently selected from 5nm-100nm; and / or, the refractive index of the first barrier layer is smaller than the refractive index of the first transparent conductive film layer; And / or, the refractive index of the second barrier layer is smaller than the refractive index of the second transparent conductive film layer.

4. The solar cell according to claim 2, characterized in that: On the side, the first barrier layer and the second barrier layer each independently include at least two stacked sub-layers, and the sub-layers satisfy at least one of the following conditions: (1) The refractive index of any sublayer is 1-2; (2) The refractive index of the sublayers increases gradually along the direction away from the silicon substrate.

5. The solar cell according to claim 3 or 4, characterized in that: The first barrier layer and the second barrier layer are independently selected from at least one of a silicon nitride layer, a silicon oxide layer, a silicon oxynitride layer, and a lithium fluoride layer.

6. The solar cell according to claim 1, characterized in that On the side surface, the thickness of the first transparent conductive film layer and the second transparent conductive film layer are independently greater than 0 and less than or equal to 30 nm.

7. The solar cell according to claim 1, characterized in that The first stacked structure further includes a first doped amorphous silicon layer, the first doped amorphous silicon layer is disposed between the first transparent conductive film layer and the silicon substrate, and the first doped amorphous silicon layer extends to at least a portion of the side surface; And / or, the second stacked structure further includes a second doped amorphous silicon layer, the second doped amorphous silicon layer is disposed between the second transparent conductive film layer and the silicon substrate, and the second doped amorphous silicon layer extends to at least a portion of the side surface.

8. The solar cell according to claim 1, characterized in that The first stacked structure further includes a first intrinsic amorphous silicon layer, the first intrinsic amorphous silicon layer is disposed between the first transparent conductive film layer and the silicon substrate, and the first intrinsic amorphous silicon layer extends to at least a portion of the side surface; And / or, the second stacked structure further includes a second intrinsic amorphous silicon layer, the second intrinsic amorphous silicon layer is disposed between the second transparent conductive film layer and the silicon substrate, and the second intrinsic amorphous silicon layer extends to at least a portion of the side surface.

9. A method for preparing a solar cell according to any one of claims 1 to 8, characterized in that: The steps include: A first stacking structure and a second stacking structure are deposited on the first surface and the second surface of the silicon substrate respectively. After the deposition of the first transparent conductive film layer in the first stacking structure is completed, a first electrode is prepared in sequence, a first barrier layer is deposited, a second transparent conductive film layer in the second stacking structure is deposited, and a second electrode is prepared to obtain a solar cell.

10. The method for preparing a solar cell according to claim 9, characterized in that: After depositing the second transparent conductive film layer in the second stacked structure and before preparing the second electrode, depositing a second barrier layer on the surface of the second transparent conductive film layer; And / or, before depositing the first transparent conductive thin film layer in the first stacked structure, an intrinsic amorphous silicon layer and a doped amorphous silicon layer are deposited on the first surface and the second surface of the silicon substrate respectively.

11. A photovoltaic module, characterized in that: The invention comprises a solar cell as claimed in any one of claims 1 to 8.

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