Solar cell and preparation method and application thereof

Abstract

The invention relates to a solar cell and a preparation method and application thereof, the solar cell comprises a silicon substrate, the silicon substrate comprises a first surface, a second surface and a side surface, the first surface and the second surface are arranged oppositely, and the side surface is connected with the first surface and the second surface; a first laminated structure and a first electrode are sequentially laminated on the first surface, the first laminated structure comprises a first transparent conductive film layer, and the first transparent conductive film layer extends to at least part of the side surface; a second laminated structure and a second electrode are sequentially laminated on the second surface, the second laminated structure comprises a second transparent conductive film layer and a second functional layer, and the second transparent conductive film layer and the second functional layer both extend to at least part of the side surface; on the side face, the second functional layer is arranged between the first transparent conductive film layer and the second transparent conductive film layer. According to the solar cell, on the basis of keeping a zero mask structure, the problem of short circuit of the cell is solved, the cell efficiency is improved, the structure is simple, the feasibility is high, and popularization and application are facilitated.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic manufacturing technology, and in particular to a solar cell and a preparation method and application thereof. Background Art

[0002] In the solar cell structure, some deposition processes are not directional, resulting in the film layer not only covering the intended surface, but also attaching to the unexpected surface due to wrap-around plating, forming unnecessary deposition layers. Based on this, when depositing transparent conductive film layers on the front and back sides, a contact layer between the front transparent conductive film layer and the back transparent conductive film layer will inevitably be formed on the side of the silicon substrate, resulting in a great risk of leakage in the battery.

[0003] In order to overcome the problem of short circuit of the battery, a mask of a certain width is usually designed for the coating area on the back of the battery, or an insulating layer is added between the front and back sides to separate the transparent conductive film layer on the front and the transparent conductive film layer on the back to avoid conduction. However, since the mask part on the back of the battery is not covered with the transparent conductive film layer, its photogenerated electrons and holes cannot be collected, resulting in loss of solar cell efficiency; and adding an insulating layer will increase the preparation process and cost, which is not conducive to promotion and application. Summary of the invention

[0004] Based on this, it is necessary to provide a solar cell and a preparation method and application thereof to address the above problems; the solar cell overcomes the battery short circuit problem and improves battery efficiency while maintaining a zero mask structure, and has a simple structure and high feasibility, which is conducive to promotion and application.

[0005] A solar cell comprises a silicon substrate, wherein the silicon substrate comprises a first surface, a second surface and a side surface connecting the first surface and the second surface.

[0006] A first stacked structure and a first electrode are sequentially stacked on the first surface, wherein the first stacked structure includes a first transparent conductive film layer, and the first transparent conductive film layer extends to at least a portion of the side surface;

[0007] A second stacked structure and a second electrode are sequentially stacked on the second surface, the second stacked structure comprising a second transparent conductive film layer and a second functional layer, the second transparent conductive film layer and the second functional layer both extending to at least a portion of the side surface;

[0008] On the side surface, the second functional layer is disposed between the first transparent conductive film layer and the second transparent conductive film layer.

[0009] In one embodiment, the first stacked structure further includes a first functional layer, wherein the first functional layer is disposed between the first transparent conductive film layer and the first surface, and the first functional layer extends to at least a portion of the side surface.

[0010] In one embodiment, the first functional layer and / or the second functional layer are independently selected from at least one of an intrinsic amorphous silicon layer, a doped amorphous silicon layer, and a microcrystalline silicon layer.

[0011] In one embodiment, on the side surface, from the first surface to the second surface, the thickness of the first transparent conductive film layer decreases gradually;

[0012] And / or, on the side surface, the thickness of the second transparent conductive film layer decreases from the second surface to the first surface.

[0013] In one embodiment, on the side, from the first surface to the second surface, the length of the first transparent conductive film layer is less than the length of the second functional layer;

[0014] And / or, on the side, in the direction from the second surface to the first surface, the length of the second transparent conductive film layer is less than the length of the second functional layer.

[0015] In one embodiment, the first stacked structure includes a first intrinsic layer, a first doped layer, and a first transparent conductive film layer stacked in sequence on the first surface;

[0016] And / or, the second stacked structure includes a second intrinsic layer, a second doped layer, and a second transparent conductive film layer stacked in sequence on the second surface.

[0017] A method for preparing the solar cell as described above comprises the following steps:

[0018] Depositing a first stacked structure on a first surface of a silicon substrate, wherein the first stacked structure includes a first transparent conductive film layer, and the first transparent conductive film layer is plated around a side surface of the silicon substrate;

[0019] Depositing a second stacked structure on the second surface of the silicon substrate, the second stacked structure comprising a second transparent conductive thin film layer and a second functional layer, the second functional layer and the second transparent conductive thin film layer being sequentially plated around the side of the silicon substrate;

[0020] A first electrode and a second electrode are respectively prepared on the surfaces of the first stacked structure and the second stacked structure to obtain a solar cell.

[0021] In one of the embodiments, when the first stacked structure is deposited on the first surface of the silicon substrate, the first stacked structure further includes a first functional layer, and the first functional layer is plated around the side of the silicon substrate.

[0022] In one of the embodiments, before depositing the first transparent conductive film layer in the first stacked structure, a carrier is arranged around the side of the silicon substrate;

[0023] And / or, before depositing the second transparent conductive thin film layer in the second stacked structure, a carrier is arranged around the side surface of the silicon substrate.

[0024] A photovoltaic module comprises the solar cell described above.

[0025] The present invention improves the traditional stacked structure and arranges the side-plated functional layer between the first transparent conductive film layer and the second transparent conductive film layer to achieve the insulation function. On the one hand, it effectively solves the battery short circuit problem and maximizes the light conversion efficiency of the solar cell while maintaining the zero mask structure and not adding an additional insulating layer structure. On the other hand, the solar cell provided by the present invention has a simple structure and high feasibility, and can be applied to various solar cell structures such as heterojunction cells, which is conducive to promotion and application. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0027] Figure 1 is a schematic diagram of a longitudinal cross-sectional structure of a solar cell in one embodiment of the present invention;

[0028] Figure 2 A schematic diagram of a longitudinal cross-sectional structure of a solar cell in another embodiment of the present invention;

[0029] Figure 3 A schematic diagram of a longitudinal cross-sectional structure of a solar cell in another embodiment of the present invention;

[0030] Figure 4 A schematic diagram of a longitudinal cross-sectional structure of a solar cell in another embodiment of the present invention;

[0031] Figure 5 A schematic diagram of a longitudinal cross-sectional structure of a solar cell in another embodiment of the present invention;

[0032] Figure 6A schematic diagram of a longitudinal cross-sectional structure of a solar cell in another embodiment of the present invention;

[0033] Among them, 101 is a silicon substrate; 102 is a first intrinsic amorphous silicon layer; 103 is a first doped amorphous silicon layer; 104 is a first transparent conductive film layer; 105 is a first electrode; 106 is a second intrinsic amorphous silicon layer; 107 is a second doped amorphous silicon layer; 108 is a second transparent conductive film layer; 109 is a second electrode. DETAILED DESCRIPTION

[0034] For ease of understanding of the present invention, the present invention will be described in more detail below. However, it should be understood that the present invention can be implemented in many different forms and is not limited to the embodiments or examples described herein. On the contrary, the purpose of providing these embodiments or examples is to make the understanding of the disclosure of the present invention more thorough and comprehensive.

[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by technicians in the technical field of the present invention. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments or embodiments, and are not intended to limit the present invention. The optional range of the term "and / or" used herein includes any one of two or more related listed items, and also includes any and all combinations of related listed items, and the arbitrary and all combinations include any two related listed items, any more related listed items, or all related listed items. In the present invention, it is related to a numerical range. If there is no special explanation, the above numerical range is regarded as continuous, and includes the minimum and maximum values ​​of the range, and each value between such minimum and maximum values. Further, when the range refers to an integer, each integer between the minimum and maximum values ​​of the range is included. In addition, when multiple ranges are provided to describe features or characteristics, the range can be merged. In other words, unless otherwise specified, all ranges disclosed herein should be understood to include any and all sub-ranges included therein.

[0036] The present invention provides a solar cell, including but not limited to a heterojunction cell, a TOPCon cell, a PERC cell, etc. Specifically, Figure 1 As shown, a cross-sectional structure of a solar cell provided by the present invention includes a silicon substrate 101, wherein the silicon substrate 101 includes a first surface, a second surface and a side surface connecting the first surface and the second surface which are arranged opposite to each other.

[0037] A first stacked structure and a first electrode 105 are sequentially stacked on the first surface. The first stacked structure includes a first transparent conductive film layer 104. The first transparent conductive film layer 104 extends to at least a portion of the side surface.

[0038] A second stacked structure and a second electrode 109 are sequentially stacked on the second surface. The second stacked structure includes a second transparent conductive film layer 108 and a second functional layer. Both the second transparent conductive film layer 108 and the second functional layer extend to at least a portion of the side surface.

[0039] On the side surface, the second functional layer is disposed between the first transparent conductive film layer 104 and the second transparent conductive film layer 108 .

[0040] The present invention improves the traditional stacked structure and arranges the side-plated functional layer between the first transparent conductive film layer 104 and the second transparent conductive film layer 108 to achieve the insulation function. On the one hand, it effectively solves the battery short circuit problem and maximizes the light conversion efficiency of the solar cell while maintaining the zero mask structure and not adding an additional insulating layer structure. On the other hand, the solar cell provided by the present invention has a simple structure and high feasibility, and can be applied to various solar cell structures such as heterojunction cells, which is conducive to promotion and application.

[0041] Specifically, taking heterojunction cells as an example, the cell structure provided by the present invention can achieve a maximum light conversion efficiency of about 26.2% or more, which is about 0.2% higher than that of traditional heterojunction cells; the reverse current (Irev2) is as low as 0.001A, indicating that there is no short circuit problem. It is understandable that different types of solar cells have different test methods and performance differences, and the present invention will not elaborate on this.

[0042] It should be noted that the present invention does not limit the stacking structure. Those skilled in the art can understand that different stacking structures exist for different battery structures. For example, for a heterojunction battery, the stacking structure may include an intrinsic amorphous silicon layer, a doped amorphous silicon layer, and a transparent conductive film layer.

[0043] It is understandable that the present invention does not limit the backlight surface and the light-receiving surface of the solar cell. The first surface can be the backlight surface or the light-receiving surface, and the second surface can also be the backlight surface or the light-receiving surface. Specifically, when the first surface is the backlight surface, the second surface is the light-receiving surface; when the first surface is the light-receiving surface, the second surface is the backlight surface. In the present invention, the stacking structure of the first surface and the second surface can be symmetrical or asymmetrical, and the present invention does not limit this. When the stacking structure of the first surface and the second surface is symmetrical, the first stacking structure can also include a first functional layer. The present invention does not limit the specific structure of the first functional layer. For example: in combination Figure 1 As shown, the first functional layer is only provided on the first surface and not on the side; Figure 2 , Figure 3 and Figure 4 As shown, the first functional layer is not only disposed on the first surface, but also plated around the side surface.

[0044] In one embodiment of the present invention, Figure 2 , Figure 3 and Figure 4 As shown, the first stacked structure further includes a first functional layer, which is disposed between the first transparent conductive film layer 104 and the first surface, and extends to at least a portion of the side surface.

[0045] It can be understood that the present invention does not limit the size of the first functional layer and the first transparent conductive film layer 104 on the side. On the side, the size of the first functional layer can be larger than the first transparent conductive film layer 104, the size of the first functional layer can be smaller than the first transparent conductive film layer 104, and the size of the first functional layer can also be equal to the first transparent conductive film layer 104.

[0046] In one embodiment of the present invention, on the side, the first functional layer and / or the second functional layer are independently selected from at least one of an intrinsic amorphous silicon layer, a doped amorphous silicon layer, and a microcrystalline silicon layer, that is, on the side, the first functional layer can be selected from an intrinsic amorphous silicon layer, a doped amorphous silicon layer, a microcrystalline silicon layer, or a composite layer of an intrinsic amorphous silicon layer, a doped amorphous silicon layer, and a microcrystalline silicon layer; on the side, the second functional layer can also be selected from an intrinsic amorphous silicon layer, a doped amorphous silicon layer, a microcrystalline silicon layer, or a composite layer of an intrinsic amorphous silicon layer, a doped amorphous silicon layer, and a microcrystalline silicon layer.

[0047] Specifically, combined Figure 2 As shown, on the side, the first functional layer can be a first intrinsic amorphous silicon layer 102. In other words, the first intrinsic amorphous silicon layer 102 in the stacked structure is distributed along the first surface to the side connected to the surface, and the first doped amorphous silicon layer 103 is only arranged on the first surface and not on the side.

[0048] Combination Figure 3 As shown, on the side, the first functional layer can be a first doped amorphous silicon layer 103. In other words, the first doped amorphous silicon layer 103 in the stacked structure is distributed along the first surface to the side connected to the surface, while the first intrinsic amorphous silicon layer 102 is only arranged on the first surface and not on the side.

[0049] Combination Figure 4As shown, on the side, the first functional layer can be a first intrinsic amorphous silicon layer 102 and a first doped amorphous silicon layer 103 arranged in a stacked manner. In other words, the first intrinsic amorphous silicon layer 102 and the first doped amorphous silicon layer 103 in the stacked structure are both plated around the first surface and distributed on the side connected to the surface. It should be noted that the present invention does not limit the size of the first intrinsic amorphous silicon layer 102 and the first doped amorphous silicon layer 103 on the side. On the side, the size of the first intrinsic amorphous silicon layer 102 can be larger than the first doped amorphous silicon layer 103, the size of the first intrinsic amorphous silicon layer 102 can also be smaller than the first doped amorphous silicon layer 103, and the size of the first intrinsic amorphous silicon layer 102 can also be equal to the first doped amorphous silicon layer 103.

[0050] Combination Figure 1 , Figure 2 , Figure 3 as well as Figure 4 As shown, on the side, the second functional layer can be a second intrinsic amorphous silicon layer 106 and a second doped amorphous silicon layer 107 arranged in a stacked manner. In other words, the second intrinsic amorphous silicon layer 106 and the second doped amorphous silicon layer 107 in the stacked structure are both plated around the second surface and distributed on the side connected to the surface. It should be noted that the present invention does not limit the size of the second intrinsic amorphous silicon layer 106 and the second doped amorphous silicon layer 107 on the side. On the side, the size of the second intrinsic amorphous silicon layer 106 can be larger than the second doped amorphous silicon layer 107, the size of the second intrinsic amorphous silicon layer 106 can also be smaller than the second doped amorphous silicon layer 107, and the size of the second intrinsic amorphous silicon layer 106 can also be equal to the second doped amorphous silicon layer 107.

[0051] Combination Figure 5 As shown, on the side, the second functional layer can be a second intrinsic amorphous silicon layer 106. In other words, the second intrinsic amorphous silicon layer 106 in the stacked structure is distributed along the second surface to the side connected to the surface, and the second doped amorphous silicon layer 107 is only arranged on the second surface and not on the side.

[0052] Combination Figure 6 As shown, on the side, the second functional layer can be a second doped amorphous silicon layer 107. In other words, the second doped amorphous silicon layer 107 in the stacked structure is distributed along the second surface to the side connected to the surface, while the second intrinsic amorphous silicon layer 106 is only arranged on the second surface and not on the side.

[0053] In one embodiment of the present invention, the thickness of the intrinsic amorphous silicon layer is 1nm-10nm, including but not limited to any point value among 1nm, 2nm, 5nm, 6nm, 8nm, and 10nm, or a range value between any two of them. It should be noted that the thickness of the first intrinsic amorphous silicon layer 102 and the second intrinsic amorphous silicon layer 106 can be the same or different, and the present invention does not limit this.

[0054] In one embodiment of the present invention, the thickness of the doped amorphous silicon layer is 5nm-25nm, including but not limited to any point value among 5nm, 10nm, 15nm, 20nm, and 25nm, or a range value between any two of them. It should be noted that the thickness of the first doped amorphous silicon layer 103 and the second doped amorphous silicon layer 107 can be the same or different, and the present invention does not limit this.

[0055] In one embodiment of the present invention, on the side, the thickness of the first transparent conductive film layer 104 decreases from the first surface to the second surface. In other words, starting from the connection between the first surface and the side, the coating of the first transparent conductive film layer 104 gradually weakens along the coating direction, so that the first transparent conductive film layer 104 forms a layer structure with one end thicker and the other end thinner in the longitudinal section of the side.

[0056] In one embodiment of the present invention, on the side, the thickness of the second transparent conductive film layer 108 decreases from the second surface to the first surface. In other words, starting from the connection between the second surface and the side, the coating of the second transparent conductive film layer 108 gradually weakens along the coating direction, so that the second transparent conductive film layer 108 forms a layer structure with one end thicker and the other end thinner in the longitudinal section of the side.

[0057] In one embodiment of the present invention, on the first surface, the thickness of the first transparent conductive film layer 104 is preferably 30nm-90nm, including but not limited to any point value of 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm or any range value between two thereof. Based on this, it can be understood that in the first transparent conductive film layer 104 on the side, the thickness of the thicker end can also be preferably 30nm-90nm, and there is no limitation on the thickness of the thinner end.

[0058] In one embodiment of the present invention, on the second surface, the thickness of the second transparent conductive film layer 108 is 30nm-90nm, including but not limited to any point value of 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm or any range value between two thereof. Based on this, it can be understood that in the second transparent conductive film layer 108 on the side, the thickness of the thicker end can also be preferably 30nm-90nm, and there is no limitation on the thickness of the thinner end.

[0059] In one embodiment of the present invention, on the side, from the first surface to the second surface, the length of the first transparent conductive film layer 104 is smaller than the length of the second functional layer.

[0060] In one embodiment of the present invention, on the side, in the direction from the second surface to the first surface, the length of the second transparent conductive film layer 108 is smaller than the length of the second functional layer.

[0061] By adjusting the size relationship between the transparent conductive film layer and the functional layer on the side, it is helpful to further ensure the insulation between the first transparent conductive film layer 104 and the second transparent conductive film layer 108, thereby overcoming the battery short circuit problem.

[0062] It should be noted that the present invention does not limit the materials of the first transparent conductive film layer 104 and the second transparent conductive film layer 108 , and existing materials such as aluminum zinc oxide (AZO) or indium tin oxide (ITO) can be used.

[0063] In one embodiment of the present invention, the first stacked structure includes a first intrinsic layer, a first doped layer, and a first transparent conductive film layer 104 which are sequentially stacked on the first surface. It can be understood that the present invention does not limit the first intrinsic layer and the first doped layer in the first stacked structure. For example, the first intrinsic layer and the first doped layer can be a single-layer structure. When the first intrinsic layer is the first intrinsic amorphous silicon layer 102 and the first doped layer is the first doped amorphous silicon layer 103, the first functional layer can be formed by coating the first intrinsic amorphous silicon layer 102 and the first doped amorphous silicon layer 103. Alternatively, the first intrinsic layer and the first doped layer can be a multi-layer structure. When at least one layer of the first functional layer is the first intrinsic amorphous silicon layer 102 and at least one layer of the first doped layer is the first doped amorphous silicon layer 103, the first functional layer can be formed by coating the first intrinsic amorphous silicon layer 102 and the first doped amorphous silicon layer 103.

[0064] In one embodiment of the present invention, the second stacked structure includes a second intrinsic layer, a second doped layer, and a second transparent conductive film layer 108 which are sequentially stacked on the second surface. It can be understood that the present invention does not limit the second intrinsic layer and the second doped layer in the second stacked structure. For example, the second intrinsic layer and the second doped layer can be a single-layer structure. When the second intrinsic layer is the second intrinsic amorphous silicon layer 106 and the second doped layer is the second doped amorphous silicon layer 107, the second functional layer can be formed by coating the second intrinsic amorphous silicon layer 106 and the second doped amorphous silicon layer 107. Alternatively, the second intrinsic layer and the second doped layer can be a multi-layer structure. When at least one layer of the second functional layer is the second intrinsic amorphous silicon layer 106 and at least one layer of the second doped layer is the second doped amorphous silicon layer 107, the second functional layer can be formed by coating the second intrinsic amorphous silicon layer 106 and the second doped amorphous silicon layer 107.

[0065] It should be noted that the present invention does not limit the material and structure of the first electrode 105 and the second electrode 109 , and those skilled in the art can configure them according to different types of solar cells.

[0066] The present invention provides a method for preparing the solar cell as described above, comprising the following steps:

[0067] S1, depositing a first stacked structure on a first surface of a silicon substrate, wherein the first stacked structure comprises a first transparent conductive thin film layer, and the first transparent conductive thin film layer is plated around a side surface of the silicon substrate;

[0068] S2, depositing a second stacked structure on the second surface of the silicon substrate, wherein the second stacked structure includes a second transparent conductive thin film layer and a second functional layer, and the second functional layer and the second transparent conductive thin film layer are sequentially plated around the side of the silicon substrate;

[0069] S3, preparing a first electrode and a second electrode on the surfaces of the first stacked structure and the second stacked structure respectively to obtain a solar cell.

[0070] In step S1 and step S2, by adjusting the preparation order of the first surface and the second surface stacking structure, the second functional layer formed by the coating can be located between the first transparent conductive film layer and the second transparent conductive film layer, thereby achieving an effective solution to the battery short circuit problem while maintaining a zero mask structure and without adding an additional insulating layer structure, thereby maximizing the light conversion efficiency of the solar cell.

[0071] In one embodiment of the present invention, when the first stacked structure is deposited on the first surface of the silicon substrate, the first stacked structure further includes a first functional layer, and the first functional layer is plated around the side of the silicon substrate.

[0072] In one embodiment of the present invention, before depositing the first transparent conductive film layer in the first stacked structure, a carrier is arranged around the side of the silicon substrate, and the shielding effect of the carrier is used to reduce the wrap-around plating of the first transparent conductive film layer on the side.

[0073] In one embodiment of the present invention, before depositing the second transparent conductive film layer in the second stacked structure, a carrier is arranged around the side of the silicon substrate, and the shielding effect of the carrier is used to reduce the wrap-around plating of the second transparent conductive film layer on the side.

[0074] In one embodiment of the present invention, when the functional layer is prepared by depositing the stacked structure, a chemical vapor deposition process (CVD) is preferably used; when the transparent conductive thin film layer is prepared by depositing the stacked structure, a physical vapor deposition process (PVD) is preferably used.

[0075] It is understandable that different preparation processes may be used for different solar cell structures, and the present invention does not limit this. Conventional preparation processes may be used, and the present invention will not elaborate on this.

[0076] The present invention also provides a photovoltaic module, comprising the solar cell described above. The photovoltaic module can be widely used in multiple fields such as power generation, outdoor lighting, mobile power supply, and aerospace, and the present invention does not limit this.

[0077] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0078] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A solar cell, characterized in that: The silicon substrate comprises a first surface, a second surface and a side surface connecting the first surface and the second surface. A first stacked structure and a first electrode are sequentially stacked on the first surface, wherein the first stacked structure includes a first transparent conductive film layer, and the first transparent conductive film layer extends to at least a portion of the side surface; A second stacked structure and a second electrode are sequentially stacked on the second surface, the second stacked structure comprising a second transparent conductive film layer and a second functional layer, the second transparent conductive film layer and the second functional layer both extending to at least a portion of the side surface; On the side surface, the second functional layer is disposed between the first transparent conductive film layer and the second transparent conductive film layer.

2. The solar cell according to claim 1, characterized in that The first stacked structure further includes a first functional layer, which is disposed between the first transparent conductive film layer and the first surface, and extends to at least a portion of the side surface.

3. The solar cell according to claim 2, characterized in that: The first functional layer and / or the second functional layer are independently selected from at least one of an intrinsic amorphous silicon layer, a doped amorphous silicon layer, and a microcrystalline silicon layer.

4. The solar cell according to claim 1, characterized in that On the side surface, the thickness of the first transparent conductive film layer decreases from the first surface to the second surface; And / or, on the side surface, the thickness of the second transparent conductive film layer decreases from the second surface to the first surface.

5. The solar cell according to claim 1, characterized in that: On the side surface, in a direction from the first surface to the second surface, the length of the first transparent conductive film layer is less than the length of the second functional layer; And / or, on the side, in the direction from the second surface to the first surface, the length of the second transparent conductive film layer is less than the length of the second functional layer.

6. The solar cell according to claim 1, characterized in that The first stacked structure includes a first intrinsic layer, a first doped layer, and a first transparent conductive film layer stacked in sequence on the first surface; And / or, the second stacked structure includes a second intrinsic layer, a second doped layer, and a second transparent conductive film layer stacked in sequence on the second surface.

7. A method for preparing a solar cell according to any one of claims 1 to 6, characterized in that: The steps include: Depositing a first stacked structure on a first surface of a silicon substrate, wherein the first stacked structure includes a first transparent conductive film layer, and the first transparent conductive film layer is plated around a side surface of the silicon substrate; Depositing a second stacked structure on the second surface of the silicon substrate, the second stacked structure comprising a second transparent conductive thin film layer and a second functional layer, the second functional layer and the second transparent conductive thin film layer being sequentially plated around the side of the silicon substrate; A first electrode and a second electrode are respectively prepared on the surfaces of the first stacked structure and the second stacked structure to obtain a solar cell.

8. The method for preparing a solar cell according to claim 7, characterized in that: When the first stacked structure is deposited on the first surface of the silicon substrate, the first stacked structure further includes a first functional layer, and the first functional layer is plated around the side of the silicon substrate.

9. The method for preparing a solar cell according to claim 7, characterized in that: Before depositing the first transparent conductive film layer in the first stacked structure, a carrier is arranged around the side of the silicon substrate; And / or, before depositing the second transparent conductive thin film layer in the second stacked structure, a carrier is arranged around the side surface of the silicon substrate.

10. A photovoltaic module, characterized in that: The invention comprises a solar cell as claimed in any one of claims 1 to 6.

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