Solar cell and photovoltaic module
By designing a multi-layer structure in a solar cell and adjusting the concentration and distribution of doped elements, the problem of low carrier efficiency of solar cell electrodes is solved, and higher current transmission efficiency and power generation efficiency are achieved.
Patent Information
- Application Number
- CN202510088946.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-20
- Publication Date
- 2025-05-06
- Estimated Expiration
- 2045-01-20
AI Technical Summary
The efficiency of the electrodes of solar cells to derivate carriers is low, resulting in large current loss and affecting power generation efficiency.
A solar cell is designed, using a semiconductor substrate, a first doped semiconductor layer and a second doped semiconductor layer, and by adjusting the concentration and distribution of the doped elements, the conductivity and carrier transfer efficiency of the electrode are optimized.
The efficiency of electrode deriving carriers is improved, current loss is reduced, and power generation efficiency of solar cells is improved.
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Figure CN119947336A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of photovoltaic technology, and in particular to a solar cell and a photovoltaic module. Background Art
[0002] Solar cells are now being used more and more widely as a new energy alternative. Among them, photovoltaic solar cells are devices that convert sunlight into electrical energy. Specifically, solar cells use the photovoltaic principle to generate carriers, and then use electrodes to lead the carriers out, thereby facilitating the effective use of electrical energy.
[0003] However, in actual use, the efficiency of the electrodes of solar cells in extracting carriers is low, the current loss is large, and this affects the power generation efficiency. Summary of the invention
[0004] The purpose of the present application is to provide a solar cell and a photovoltaic module to improve the efficiency of the electrodes of the solar cell in extracting carriers.
[0005] In order to achieve the above objectives, this application provides the following technical solutions:
[0006] A solar cell, comprising:
[0007] Semiconductor substrate;
[0008] A first doped semiconductor layer, disposed on the surface of the semiconductor substrate and doped with a first element;
[0009] A second doped semiconductor layer, disposed on the surface of the semiconductor substrate and doped with a second element, the second doped semiconductor layer having a conductivity type opposite to that of the first doped semiconductor layer;
[0010] The first doped semiconductor layer has a first region and a second region, and the first region and the second region are arranged in a direction parallel to the surface of the semiconductor substrate; the doping concentration of the first element in the first region is C a1 , the doping concentration of the first element in the second region is C a2 , C a2 >C a1 ;
[0011] The second doped semiconductor layer has a third region and a fourth region, and the third region and the fourth region are arranged in a direction parallel to the surface of the semiconductor substrate; the doping concentration of the second element in the third region is C b1 , the doping concentration of the second element in the fourth region is C b2 , C b2 >C b1 ; C a2 >C b2 .
[0012] Wherein, when the doping type of the first doped semiconductor layer 3 is N-type, the first element is a Group V element or a Group VI element, such as phosphorus, arsenic, antimony, etc. When the doping type of the second doped semiconductor layer 3 is P-type, the first element is a Group III element, such as boron, gallium, etc. The present application obtains a doping concentration curve through ECV instrument testing, and the doping concentrations mentioned in the present application refer to the activated doping element concentration.
[0013] In actual use, compared with the second doped semiconductor layer (P-type semiconductor layer), the first doped semiconductor layer (N-type semiconductor layer) has a higher solid solubility of P element and can be doped into the semiconductor substrate at a higher content. The first doped semiconductor layer is more conducive to the transmission of carriers. Therefore, the thickness of the first doped semiconductor layer is allowed to be set smaller. Such a setting can not only reduce the material consumption, but also reduce the parasitic absorption loss caused by the doped semiconductor layer.
[0014] Under the design concept of reducing the thickness of the first doped semiconductor layer (N-type semiconductor layer), it is also necessary to ensure that the conductivity of the first doped semiconductor layer maintains a comparable level before thinning. Therefore, the design of the present application makes the doping concentration in the second region of the first doped semiconductor layer higher, and at the same time makes the doping concentration in the fourth region of the second doped semiconductor layer higher, so as to ensure the current transmission efficiency.
[0015] In one implementation, in this application, C a2 >C b2 , that is, the doping concentration C of the first element in the second region a2 greater than the doping concentration C of the second element in the fourth region b2 Such a configuration makes the conductivity of the thinner first doped semiconductor layer closer to the conductivity of the thicker second doped semiconductor layer, which can also be understood as balancing the conductivity difference between the first doped semiconductor layer and the second doped semiconductor layer, thereby further reducing the current difference between the first electrode and the first doped semiconductor layer and between the second electrode and the second doped semiconductor layer, reducing the current loss of the battery, and ensuring the performance of the battery.
[0016] In one implementation, ΔC a =C a2 -C a1 , △C b =C b2 -C b1 , △C a >△C b ;
[0017] and / or, K a =C a2 / C a1 , K b =C b2 / C b1 , Ka ≥K b .
[0018] △C of the first doped semiconductor layer a Larger and / or K a The thickness of the first doped semiconductor layer is larger, which is further conducive to making the thickness of the first doped semiconductor layer thinner, or the number of openings corresponding to the first doped semiconductor layer is smaller or the opening area is smaller. Such a setting can further bring three beneficial effects, which can not only save material costs, but also improve the carrier transmission capacity of the first doped semiconductor layer, reduce the carrier recombination rate, improve the photoelectric conversion efficiency of the solar cell, and reduce the damage of the first doped semiconductor layer during the preparation process.
[0019] In one implementation, K a =C a2 / C a1 , 2≤K a ≤1000; and / or, K b =C b2 / C b1 , 2≤K b ≤1000; and / or, △C a =C a2 -C a1 , 4*E21atom / cm 3 ≤△C a ≤9*E22 atom / cm 3 ; and / or, △C b =C b2 -C b1 , 3*E19atom / cm 3 ≤△C b ≤2*E21 atom / cm 3 .
[0020] In one implementation, the doping concentration of the first element in the second region gradually decreases in a direction approaching the semiconductor substrate;
[0021] And / or, the doping concentration of the second element in the fourth region gradually decreases along a direction approaching the semiconductor substrate.
[0022] In one implementation, along a direction away from the semiconductor substrate, the second region includes a first sub-region and a second sub-region arranged in sequence (that is, the second sub-region is farther away from the semiconductor substrate than the first sub-region), and the doping concentration of the second sub-region is greater than the doping concentration of the first sub-region;
[0023] In one implementation, along a direction away from the semiconductor substrate, the fourth region includes a third sub-region and a fourth sub-region arranged in sequence (that is, the fourth sub-region is farther away from the semiconductor substrate than the third sub-region), and the doping concentration of the fourth sub-region is greater than the doping concentration of the third sub-region.
[0024] In one implementation, the second sub-region is a region from the surface of the second region facing away from the semiconductor substrate to the point where the doping concentration of the second region is equal to the doping concentration of the first region in a direction toward the semiconductor substrate;
[0025] The first sub-region is from the position where the doping concentration of the second region is equal to the doping concentration of the first region along the direction toward the semiconductor substrate to the region of the second region close to the surface of the semiconductor substrate;
[0026] The fourth sub-region is a region from the surface of the fourth region away from the semiconductor substrate in the direction toward the semiconductor substrate to the point where the doping concentration of the fourth region is equal to the doping concentration of the third region.
[0027] The third sub-region is from a position where the doping concentration of the fourth region is equal to the doping concentration of the third region along a direction toward the semiconductor substrate to a region of the fourth region close to the surface of the semiconductor substrate.
[0028] In one implementation, along the thickness direction of the semiconductor substrate, the thickness of the second sub-region is h1, and the thickness of the fourth sub-region is h2; h1≤h2.
[0029] In one implementation, along the thickness direction of the semiconductor substrate, the thickness of the second sub-region is h1, and the thickness of the fourth sub-region is h2;
[0030] The thickness of the first doped semiconductor layer is d1, 0.1≤h1 / d1≤0.9; and / or the thickness of the second doped semiconductor layer is d2, 0.1≤h2 / d2≤0.9.
[0031] In one implementation, along the thickness direction of the semiconductor substrate, the thickness of the second sub-region is h1, and the thickness of the fourth sub-region is h2;
[0032] 0.01 μm≤h1≤0.13 μm; and / or, 0.01 μm≤h2≤0.15 μm; and / or, the thickness of the first doped semiconductor layer is d1, 10 nm≤d1≤400 nm; and / or, the thickness of the second doped semiconductor layer is d2, 10 nm≤d2≤400 nm.
[0033] In one implementation, from the surface of the second sub-region along a direction parallel to the thickness of the semiconductor substrate, the rate of change of the doping concentration of the first element in the second sub-region is |V1|, and the rate of change of the doping concentration of the second element in the fourth sub-region is |V2|, |V1|≥|V2|.
[0034] In one implementation, the doping concentration of the first element in the second region is 5*E21 to 6*E22atom / cm 3 and / or,
[0035] The doping concentration of the second element in the fourth region is 1*E20 to 3*E21 atom / cm 3 .
[0036] In one implementation, a total area of an orthographic projection of the second region on the surface of the semiconductor substrate is smaller than a total area of an orthographic projection of the fourth region on the surface of the semiconductor substrate.
[0037] In one implementation, there are multiple second regions and the multiple second regions are not continuously arranged; and / or there are multiple fourth regions and the multiple fourth regions are not continuously arranged.
[0038] In one implementation, a first electrode is disposed on a side of the second region facing away from the silicon substrate, and a second electrode is disposed on a side of the fourth region facing away from the silicon substrate.
[0039] In one implementation, the depth of the first element doped from the surface of the semiconductor substrate to the inward diffusion is a first inward diffusion depth, the depth of the second element doped from the surface of the semiconductor substrate to the inward diffusion is a second inward diffusion depth, and the first inward diffusion depth is less than or equal to the second inward diffusion depth;
[0040] The first inward expansion depth ranges from 50 nm to 150 nm; and / or the second inward expansion depth ranges from 50 nm to 150 nm.
[0041] In one implementation, the semiconductor substrate has a first surface and a second surface opposite to each other along a thickness direction thereof, and the first doped semiconductor layer is disposed on the first surface;
[0042] The second doped semiconductor layer is disposed on the first surface and is spaced apart from the first doped semiconductor layer along the first direction, and an electrical isolation structure is provided between the first doped semiconductor layer and the second doped semiconductor layer; or, the second doped semiconductor layer is disposed on the second surface.
[0043] In one implementation, the first region is a first non-laser action region; the second region is a first laser action region; and / or,
[0044] The third area is the second non-laser action area; the fourth area is the second laser action area.
[0045] In one implementation, the first doped semiconductor layer and / or the second doped semiconductor layer is a polysilicon layer.
[0046] In one implementation, the solar cell also includes a dielectric layer covering the first doped semiconductor layer and the second doped semiconductor layer, the dielectric layer having a first opening penetrating the thickness of the dielectric layer at a position corresponding to the second region, and the dielectric layer having a second opening penetrating the thickness of the dielectric layer at a position corresponding to the fourth region.
[0047] In one implementation, the solar cell further includes a first electrode and a second electrode, the first electrode passing through the first opening and electrically connected to the first doped semiconductor layer, and the second electrode passing through the second opening and electrically connected to the second doped semiconductor layer;
[0048] The first electrode includes a first seed layer and the first seed layer contacts the first doped semiconductor layer; the second electrode includes a second seed layer and the second seed layer contacts the second doped semiconductor layer; the thickness of the first seed layer is greater than the thickness of the second seed layer.
[0049] A photovoltaic module, comprising: an electrical connector and any one of the above solar cells; the solar cell further comprising a dielectric layer, a first electrode and a second electrode, the dielectric layer covering the first doped semiconductor layer and the second doped semiconductor layer, the dielectric layer being provided with a first opening and a second opening, the first electrode being electrically connected to the first doped semiconductor layer through the first opening, and the second electrode being electrically connected to the second doped semiconductor layer through the second opening;
[0050] The electrical connector is electrically connected to the first electrode and / or the second electrode in the solar cell.
[0051] Compared with the prior art, the beneficial effects of the photovoltaic module provided in the present application are the same as the beneficial effects of the above-mentioned solar cells, which will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS
[0052] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:
[0053] Figure 1 A partial cross-sectional view of a solar cell provided in an embodiment of the present application;
[0054] Figure 2 A partial cross-sectional view of another solar cell provided in an embodiment of the present application;
[0055] Figure 3 A schematic diagram showing how the concentration of the first element in the first doped semiconductor layer in the first region and the second region varies with depth provided in an embodiment of the present application;
[0056] Figure 4 A schematic diagram showing how the concentration of the second element in the second doped semiconductor layer in the third region and the fourth region varies with depth provided in an embodiment of the present application;
[0057] Figure 5 A schematic diagram showing how the concentration of the first element in the first doped semiconductor layer at the edge and in the middle of the second region varies with depth provided in an embodiment of the present application;
[0058] Figure 6 A schematic diagram showing how the concentration of the second element in the second doped semiconductor layer at the edge and in the middle of the fourth region varies with depth provided in an embodiment of the present application;
[0059] Figure 7 A partial cross-sectional view of another solar cell provided in an embodiment of the present application.
[0060] Reference numerals:
[0061] 1-semiconductor substrate, 2-first interface layer, 3-first doped semiconductor layer, 3a-first region, 3b-second region, 3b1-first sub-region, 3b2-second sub-region, 4-dielectric layer, 5-first electrode, 6-second doped semiconductor layer, 6a-third region, 6b-fourth region, 6b1-third sub-region, 6b2-fourth sub-region, 7-second electrode, 8-first seed layer, 9-second seed layer. DETAILED DESCRIPTION
[0062] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0063] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.
[0064] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, "multiple" means two or more, unless otherwise clearly and specifically defined. "Several" means one or more, unless otherwise clearly and specifically defined.
[0065] In the description of the present application, it should be understood that the terms "upper", "lower", "front", "back", "left", "right", etc., indicating directions or positional relationships are based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present application.
[0066] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0067] In order to improve the efficiency of the electrode of the solar cell in extracting carriers, in the first aspect, the present application provides a solar cell, which comprises a semiconductor substrate 1, a first doped semiconductor layer 3, a second doped semiconductor layer 6, a first electrode 5 and a second electrode 7. The semiconductor substrate 1 has a first surface and a second surface opposite to each other along the thickness direction thereof, that is, the two surfaces opposite to each other along the thickness direction of the semiconductor substrate 1 are the first surface and the second surface respectively.
[0068] The first doped semiconductor layer 3 is arranged on the semiconductor substrate 1. Specifically, the first doped semiconductor layer 3 can be arranged on the first surface or the second surface. In this application, the first doped semiconductor layer 3 is arranged on the first surface as an example for description. The first doped semiconductor layer 3 can be arranged on the first surface as a whole layer, or it can be arranged on the first surface partially, such as being arranged on the first surface in a strip shape. When the doping type of the first doped semiconductor layer 3 is N-type, the first element is a group V element or a group VI element, such as phosphorus, arsenic, antimony, etc. Among them, the first doped semiconductor layer 3 can be additionally formed on the semiconductor substrate 1 by deposition technology, and can also be formed in the semiconductor substrate 1 by diffusion, ion implantation, etc.
[0069] The second doped semiconductor layer 6 is arranged on the semiconductor substrate 1. Specifically, the second doped semiconductor layer 6 can be arranged on the first surface or the second surface. When the solar cell is a bifacial cell, the first doped semiconductor layer 3 is arranged on the first surface, and the second doped semiconductor layer 6 is arranged on the second surface. The second doped semiconductor layer 6 can be arranged on the second surface as a whole layer, or can be arranged on the second surface partially, such as being arranged on the second surface in a strip shape. When the solar cell is a back contact cell, the first doped semiconductor layer 3 and the second doped semiconductor layer 6 are both arranged on the first surface, and the first doped semiconductor layer 3 and the second doped semiconductor layer 6 are spaced apart along the first direction, and there is an electrical isolation structure between the first doped semiconductor layer 3 and the second doped semiconductor layer 6. The electrical isolation structure can be an isolation groove or an insulating material to prevent leakage between the first doped semiconductor layer 3 and the second doped semiconductor layer 6. In addition, the second doped semiconductor layer 6 is doped with a second element, and the conductivity type of the second doped semiconductor layer 6 is opposite to that of the first doped semiconductor layer 3. Specifically, when the doping type of the second doped semiconductor layer 6 is P-type, the second element is a III group element, such as boron, gallium, etc. Of course, the first doped semiconductor layer 3 may be of P type and the second doped semiconductor layer 3 may be of N type.
[0070] In this application, if Figure 1 and Figure 2 As shown, Figure 1 This is a side view of one side of a bifacial battery. Figure 2 This is a side view of a back-contact battery. The electrodes of different conductivity types are insulated. Figure 2 The first doped semiconductor layer 3 has a first region 3a and a second region 3b, wherein the first region 3a and the second region 3b may be distributed along a direction parallel to the first surface of the semiconductor substrate 1. The doping concentration of the first element in the first region 3a is C a1 , the doping concentration of the first element in the second region 3b is C a2 , C a2 >C a1 .
[0071] like Figure 3 As shown, Figure 3 The middle horizontal axis is the depth from the side of the first region 3a and the second region 3b away from the semiconductor substrate 1 (i.e., from the most surface of the N-type doped semiconductor layer away from the silicon substrate) to the side close to the semiconductor substrate 1. Figure 3 The vertical axis is the doping concentration of the first element. Through the ECV instrument test, an activated doping concentration curve is obtained. The doping concentration mentioned in this application refers to the activated doping element concentration.
[0072] from Figure 3As can be seen from the figure, from the side of the first region 3a and the second region 3b away from the semiconductor substrate 1 to a certain depth range, C a2 >C a1 . Among them, the second region 3b can be a region conductively connected to the first electrode 5. In this technical solution, compared with the first region 3a that is not conductively connected to the first electrode 5, the second region 3b conductively connected to the first electrode 5 has a higher doping concentration, so that the conductivity of the second region 3b of the first doped semiconductor layer 3 is higher, thereby reducing the transmission resistance between the first electrode 5 and the second region 3b, which is more conducive to the transmission of carriers and reduces current loss. At the same time, the thickness of the doped semiconductor, or the number of openings, or the opening area can be further reduced, saving material costs and reducing damage caused by the process.
[0073] The second doped semiconductor layer 6 has a third region 6a and a fourth region 6b, wherein the third region 6a and the fourth region 6b may be distributed in a direction parallel to the first surface of the semiconductor substrate 1. It can be understood that the distribution direction of the third region 6a and the fourth region 6b is the same as the distribution direction of the first region 3a and the second region 3b. The doping concentration of the second element in the third region 6a is C b1 , the doping concentration of the second element in the fourth region 6b is C b2 , C b2 >C b1 ; and, C a2 >C b2 .
[0074] like Figure 4 As shown, Figure 4 The middle horizontal axis is the depth from the side of the third region 6a and the fourth region 6b away from the semiconductor substrate 1 (i.e., from the outermost surface of the P-type doped semiconductor layer away from the silicon substrate) to the side close to the semiconductor substrate 1. Figure 4 The vertical axis is the doping concentration of the second element. Figure 4 As can be seen from the figure, from the side of the third region 6a and the fourth region 6b away from the semiconductor substrate 1 to a certain depth range, C b2 >C b1 .
[0075] Among them, the fourth region 6b can be a region conductively connected to the second electrode 7. In this technical solution, compared with the third region 6a not conductively connected to the second electrode 7, the fourth region 6b conductively connected to the second electrode 7 has a higher doping concentration, so that the conductivity of the fourth region 6b of the second doped semiconductor layer 6 is higher, thereby reducing the transmission resistance between the second electrode 7 and the fourth region 6b, which is more conducive to the transmission of carriers and reduces current loss. At the same time, the thickness of the doped semiconductor, or the number of openings, or the opening area can be further reduced, saving material costs and reducing damage caused by the process.
[0076] In this application, C a2 >C b2 , that is, the doping concentration C of the first element in the second region 3b a2 greater than the doping concentration C of the second element in the fourth region 6b b2 Such an arrangement makes the conductivity of the second region 3b of the thinner first doped semiconductor layer 3 closer to the conductivity of the fourth region 6b of the thicker second doped semiconductor layer 6, thereby reducing the current difference between the first electrode 5 and the first doped semiconductor layer 3 and between the second electrode 7 and the second doped semiconductor layer 6, reducing the current loss of the battery and ensuring the performance of the battery.
[0077] Optionally, C a2 and C b2 They are the doping concentrations when the second region 3b and the fourth region 6b extend to the same depth inside the semiconductor substrate 1, for example, the doping concentration of the outermost surface of the doped semiconductor layer, or the doping concentration when extending from the outermost surface to the inside of the semiconductor substrate to 10nm, or 20nm, or 25nm, or 30nm, or 40nm, or 50nm. In order to avoid instability or loss of the test data of the outermost surface doping concentration, it is preferred to extend to 20nm, 25nm or 30nm from the perspective of easier evidence collection.
[0078] If the first region 3a and the second region 3b, as well as the third region 6a and the fourth region 6b are all distributed in a direction parallel to the first surface of the semiconductor substrate 1. In this case, the first region 3a refers to the region where the first doped semiconductor layer does not correspond to the groove region of the dielectric layer, and the second region 3b refers to the region where the first doped semiconductor layer corresponds to the groove region of the dielectric layer. The third region 6a refers to the region where the second doped semiconductor layer does not correspond to the groove region of the dielectric layer, and the fourth region 6b refers to the region where the second doped semiconductor layer corresponds to the groove region of the dielectric layer. Among them, the average value of the doping concentration calculated for several sites in the first region 3a is C a1 , the average value of the doping concentration of several sites in the third region 6a is calculated as C b1 .
[0079] In actual use, the solid solubility of the P element in the first doped semiconductor layer 3 (N-type semiconductor layer) is higher, and the content that can be doped into the semiconductor substrate 1 is higher. Therefore, the thickness of the first doped semiconductor layer (N-type semiconductor layer) will be set smaller. Such a setting can not only reduce the material consumption, but also reduce the parasitic absorption loss caused by the doped semiconductor layer. Under the design idea of reducing the thickness of the first doped semiconductor layer 3 (N-type semiconductor layer), it is necessary to ensure that the conductivity of the first doped semiconductor layer 3 is maintained at a comparable level before thinning. Therefore, in this application, △C a =C a2 -Ca1 , △C b =C b2 -C b1 , △C a >△C b In other words, the difference in doping concentration between the second region 3b and the first region 3a of the first doped semiconductor layer 3 is greater than the difference in doping concentration between the third region 6a and the fourth region 6b of the second doped semiconductor layer 6. This arrangement ensures that the current transmission efficiency of the first doped semiconductor layer 3 can be maintained at a comparable level before thinning; in addition, it can also reduce the current difference between the first electrode 5 and the first doped semiconductor layer 3 and between the second electrode 7 and the second doped semiconductor layer 6, thereby reducing the current loss of the battery.
[0080] In some embodiments, if ΔC a If △C is too large, the process complexity will increase and the raw material cost of the first element will increase. a If the doping concentration of the second region 3b is too small, the efficiency of the carrier extraction of the second region 3b will be affected. 3 ≤△C a ≤9*E22atom / cm 3 , to ensure the efficiency of carrier extraction in the second region 3b, while reducing the process difficulty and the cost of raw materials. a Can be 4*E21atom / cm 3 、6*E21atom / cm 3 、7*E21atom / cm 3 、8*E21atom / cm 3 、9*E21atom / cm 3 、1*E22atom / cm 3 、2*E22atom / cm 3 、4*E22atom / cm 3 、5*E22atom / cm 3 、7*E22atom / cm 3 、8*E22atom / cm 3 or 9*E22atom / cm 3 wait.
[0081] In this technical solution, 3*E19atom / cm 3 ≤△C b ≤2*E21 atom / cm 3, to ensure that the fourth region 6b has a higher conductivity, the fourth region 6b has a higher efficiency in exporting carriers, and at the same time reduce the process difficulty and the raw material cost of the second element. For example, △C b Can be 3*E19atom / cm 3 、5*E19atom / cm 3 、6*E19atom / cm 3 、8*E19atom / cm 3 、9*E19atom / cm 3 、9*E19atom / cm 3 、9*E19atom / cm 3 、1*E20atom / cm 3 、2*E20atom / cm 3 、4*E20atom / cm 3 、6*E20atom / cm 3 、8*E20atom / cm 3 、9*E20atom / cm 3 、1*E21atom / cm 3 or 2*E21atom / cm 3 wait.
[0082] In some embodiments, K a =C a2 / C a1 , K b =C b2 / C b1 , K a ≥K b In other words, the ratio of the doping concentration between the second region 3b and the first region 3a of the first doped semiconductor layer 3 is greater than or equal to the difference in doping concentration between the fourth region 6b and the third region 6a of the second doped semiconductor layer 6. With this technical solution, the doping concentration of the second region 3b and the doping concentration of the fourth region 6b can be adjusted according to actual conditions, thereby making the conductivity of the second region 3b closer to that of the fourth region 6b, balancing the extraction efficiency of holes and electrons, and reducing current loss.
[0083] ΔC of the first doped semiconductor layer 3 a Larger and / or K aThe thickness of the first doped semiconductor layer 3 is larger, which is further conducive to making the thickness of the first doped semiconductor layer 3 thinner, or the number of openings corresponding to the first doped semiconductor layer 3 is smaller or the opening area is smaller. Such a setting further brings three beneficial effects, which can not only save material costs, but also improve the carrier transmission capacity of the first doped semiconductor layer 3, reduce the carrier recombination rate, improve the photoelectric conversion efficiency of the solar cell, and reduce the damage of the first doped semiconductor layer 3 during the preparation process.
[0084] In some embodiments, if K a If K is too small, the doping concentration of the second region 3b is low, resulting in a low conductivity of the second region 3b, which affects the efficiency of the second region 3b in extracting carriers. a If it is too large, the complexity of the process will increase, and the cost of the raw materials of the first element will increase. In view of the above situation, in this technical solution, 2≤K a ≤1000, so as to ensure the efficiency of carrier extraction in the second region 3b, while reducing the process difficulty and the cost of raw materials. a It can be 2, 50, 100, 150, 200, 250, 300, 350, 400, 450, 500, 550, 600, 650, 700, 750, 800, 850, 900, 950 or 1000.
[0085] In this technical solution, 2≤K b ≤1000, so as to ensure that the fourth region 6b has a high conductivity, the fourth region 6b has a high efficiency in exporting carriers, and at the same time reduce the process difficulty and the raw material cost of the second element. b It can be 2, 50, 100, 150, 200, 250, 300, 350, 400, 450, 500, 550, 600, 650, 700, 750, 800, 850, 900, 950 or 1000.
[0086] In some embodiments, since the surface of the second region 3b of the first doped semiconductor layer 3 is in contact with the first electrode 5 or other conductive member, the higher the doping concentration of the surface of the second region 3b of the first doped semiconductor layer 3, the higher the efficiency of the carrier extraction of the second region 3b of the first doped semiconductor layer 3. In view of the above situation, in this technical solution, the doping concentration of the first element of the second region 3b gradually decreases along the direction close to the semiconductor substrate 1, that is, along the direction of the second region 3b away from the first electrode 5, the doping concentration of the first element of the second region 3b gradually decreases. Such a setting ensures that the doping concentration of the first element on the surface of the second region 3b in contact with the first electrode 5 or other conductive member is the highest, thereby maximizing the conductivity between the second region 3b and the conductive member, further reducing the current loss.
[0087] In some embodiments, since the surface of the fourth region 6b of the second doped semiconductor layer 6 is in contact with the second electrode 7 or other conductive member, the higher the doping concentration of the surface of the fourth region 6b of the second doped semiconductor layer 6, the higher the efficiency of the carrier extraction of the fourth region 6b of the second doped semiconductor layer 6. In view of the above situation, in this technical solution, the doping concentration of the second element of the fourth region 6b gradually decreases along the direction close to the semiconductor substrate 1, that is, along the direction of the fourth region 6b away from the second electrode 7, the doping concentration of the second element of the fourth region 6b gradually decreases. Such a setting ensures that the doping concentration of the second element on the surface of the fourth region 6b in contact with the second electrode 7 or other conductive member is the highest, thereby maximizing the conductivity between the fourth region 6b and the second electrode 7 or other conductive member, and further reducing the current loss.
[0088] In some embodiments, along the direction away from the semiconductor substrate 1, the second region 3b includes a first sub-region 3b1 and a second sub-region 3b2 arranged in sequence, and the second sub-region 3b2 is farther away from the semiconductor substrate 1 than the first sub-region 3b1. Figure 3 As shown, the second sub-region 3b2 is a region from the surface of the second region away from the semiconductor substrate in the direction toward the semiconductor substrate to the point where the doping concentration of the second region is equal to the doping concentration of the first region. The first sub-region 3b1 is a region from the position where the doping concentration of the second region is equal to the doping concentration of the first region in the direction toward the semiconductor substrate 1 to the point where the surface of the second region is close to the semiconductor substrate.
[0089] The doping concentration of the second sub-region 3b2 is greater than the doping concentration of the first sub-region 3b1. The second sub-region 3b2 is a region in contact with the first electrode 5 or other conductive member. In this technical solution, the doping concentration of the first element in the second sub-region 3b2 is greater, thereby reducing the contact resistance between the second sub-region 3b2 and the first electrode 5 or other conductive member, thereby reducing current loss.
[0090] In some embodiments, along the direction away from the semiconductor substrate 1, the fourth region 6b includes a third sub-region 6b1 and a fourth sub-region 6b2 arranged in sequence, and the fourth sub-region 6b2 is farther away from the semiconductor substrate 1 than the third sub-region 6b1. Figure 4 As shown, the fourth sub-region 6b2 is a region from the surface of the fourth region away from the semiconductor substrate in the direction toward the semiconductor substrate to the point where the doping concentration of the fourth region is equal to the doping concentration of the third region. The third sub-region 6b1 is a region from the position where the doping concentration of the fourth region is equal to the doping concentration of the third region in the direction toward the semiconductor substrate to the surface of the fourth region close to the semiconductor substrate.
[0091] The doping concentration of the fourth sub-region 6b2 is greater than the doping concentration of the third sub-region 6b1. The fourth sub-region 6b2 is a region in contact with the second electrode 7 or other conductive member. In this technical solution, the doping concentration of the second element in the fourth sub-region 6b2 is greater, thereby reducing the contact resistance between the fourth sub-region 6b2 and the second electrode 7 or other conductive member, thereby reducing current loss.
[0092] In some embodiments, along the thickness direction of the semiconductor substrate 1, the thickness of the second sub-region 3b2 is h1, that is, the depth of laser activation in the second region is h1. Along the direction from the surface of the first doped semiconductor layer 3 away from the semiconductor substrate 1 to the inside thereof, within the range of depth h1, the doping concentration of the first element in the second region 3b is greater than the doping concentration of the first element in the first region 3a; and within the range of depth greater than h1, the doping concentration of the first element in the second region 3b can be equal to or less than the doping concentration of the first element in the first region 3a. Such a setting ensures that the doping concentration of the first element near the position where the second region 3b is connected to the first electrode 5 or other conductive parts is relatively large. During the manufacturing process, only the doping concentration near the position where the second region 3b is connected to the first electrode 5 or other conductive parts is increased, which not only saves the raw material of the first element, but also reduces the process difficulty and is more conducive to processing and manufacturing.
[0093] In other embodiments, along the thickness direction of the semiconductor substrate 1, the thickness of the fourth sub-region 6b2 is h2, that is, the depth of laser activation in the fourth region is h2. Similar to the design mechanism of the first doped semiconductor layer 3, in the second doped semiconductor layer 6, along the direction close to the semiconductor substrate 1, the doping concentration of the second element in the fourth region 6b within the range of depth h2 is greater than the doping concentration of the second element in the third region 6a. This is similar to the effect that in the first doped semiconductor layer 3, the doping concentration of the first element in the second region 3b within the range of depth h1 is greater than the doping concentration of the first element in the first region 3a, and will not be repeated here.
[0094] Since the solid solubility of the doping elements of the second doped semiconductor layer, such as the B element, is lower, the conductivity of the layer is poor, which is not conducive to carrier transport. Therefore, the technical solution is designed to activate the surface of the second doped semiconductor layer more deeply, in order to improve the carrier transport performance of the layer and match it with the first doped semiconductor layer, so h1≤h2. In this way, the depth h1 of the higher doping concentration of the second element in the fourth region 6b is greater, which is also conducive to reducing the current difference between the first electrode 5 and the first doped semiconductor layer 3 and between the second electrode 7 and the second doped semiconductor layer 6, thereby reducing the current loss of the battery.
[0095] In some embodiments, the thickness of the first doped semiconductor layer 3 is d1, 0.1≤h1 / d1≤0.9, so that the thickness h1 of the second sub-region 3b2 can be ensured to be within a reasonable range, which can ensure that the second region 3b has a higher conductivity near the position where it contacts the first electrode 5 or other conductive parts, and at the same time reduce the process difficulty and facilitate processing and manufacturing. For example, h1 / d1 can be 0.1, 0.15, 0.2, 0.25, 0.3, 0.35, 0.4, 0.45, 0.5, 0.55, 0.6, 0.65, 0.7, 0.75, 0.8, 0.85 or 0.9, etc.
[0096] In some embodiments, the thickness of the second doped semiconductor layer 6 is d2, 0.1≤h2 / d2≤0.9. In this way, the thickness h2 of the fourth sub-region 6b2 can be ensured to be within a reasonable range, which can ensure that the fourth region 6b has a higher conductivity near the position where it contacts the second electrode 7 or other conductive parts, while reducing the process difficulty and facilitating processing and manufacturing. For example, h2 / d2 can be 0.1, 0.15, 0.2, 0.25, 0.3, 0.35, 0.4, 0.45, 0.5, 0.55, 0.6, 0.65, 0.7, 0.75, 0.8, 0.85 or 0.9, etc.
[0097] In some embodiments, if h1 is too small, it cannot be guaranteed that the second region 3b has a high conductivity near the position where it contacts the first electrode 5 or other conductive member, resulting in increased current loss; if h1 is too large, it may increase the process difficulty and waste the raw materials of the first element. In view of the above situation, in this technical solution, 0.01μm≤h1≤0.13μm is used to ensure that the second sub-region 3b2 has a high conductivity, while reducing the process difficulty, improving the processing efficiency, and saving the raw materials of the first element. For example, h1 can be 0.01μm, 0.03μm, 0.05μm, 0.08μm, 0.1μm, 0.02μm or 0.13μm, etc.
[0098] In some embodiments, if h2 is too small, it cannot be guaranteed that the fourth region 6b has a high conductivity near the position where it contacts the second electrode 7 or other conductive member, resulting in increased current loss; if h2 is too large, it may increase the process difficulty and waste the raw materials of the second element. In view of the above situation, in this technical solution, 0.01μm≤h2≤0.15μm is used to ensure that the fourth sub-region 6b2 has a high conductivity, while reducing the process difficulty, improving the processing efficiency, and saving the raw materials of the second element. For example, h2 can be 0.01μm, 0.03μm, 0.05μm, 0.08μm, 0.1μm, 0.02μm or 0.15μm, etc.
[0099] In addition, the embodiment of the present invention does not specifically limit the thickness of the first doped semiconductor layer 3 and the second doped semiconductor layer 6, as long as they can be applied to the solar cell provided in the embodiment of the present invention. Exemplarily, the thickness of the first doped semiconductor layer 3 is d1, 10nm≤d1≤400nm, for example, d1 can be 10μm, 50μm, 100μm, 150μm, 200μm, 250μm, 300μm, 350μm or 400μm. In addition, the thickness of the second doped semiconductor layer 6 is d2, 10nm≤d2≤400nm, for example, d2 can be 10μm, 50μm, 100μm, 150μm, 200μm, 250μm, 300μm, 350μm or 400μm.
[0100] In some embodiments, from the surface of the second sub-region 3b2 along the direction parallel to the thickness of the semiconductor substrate 1, the absolute value of the change rate of the doping concentration of the first element in the second sub-region 3b2 is V1, and the absolute value of the change rate of the doping concentration of the second element in the fourth sub-region 6b2 is |V2|, |V1|≥|V2|. In other words, from the surface of the first doped semiconductor layer 3 to the inside thereof, the depth is within the range of h1. The absolute value of the decrease rate of the doping concentration of the first element in the second region 3b is greater than or equal to the absolute value of the decrease rate of the doping concentration of the second element in the fourth region 6b. By adopting this technical solution, the change of the doping concentration in the second region 3b is more adapted to the transmission efficiency of the first doped semiconductor layer 3 collecting carriers, and at the same time, the change of the doping concentration in the fourth region 6b is more adapted to the transmission efficiency of the second doped semiconductor layer 6 collecting carriers, thereby ensuring the overall carrier transmission efficiency of the solar cell.
[0101] like Figure 3 As shown, Figure 3 The horizontal axis is the depth from the surface of the first doped semiconductor layer 3 to the inside thereof, and the vertical axis is the doping concentration of the first element. Figure 4 As shown, Figure 4 The horizontal axis is the depth from the surface of the second doped semiconductor layer 6 to the inside thereof, and the vertical axis is the doping concentration of the second element. Figure 3 and Figure 4 It can be seen that the rate of change of the doping concentration of the first element in the second region 3 b with depth is significantly greater than the rate of change of the doping concentration of the second element in the fourth region 6 b with depth.
[0102] As for the doping concentration of the first element in the second region 3b and the doping concentration of the second element in the fourth region 6b, any concentration is acceptable as long as it can be applied to the solar cell provided in the embodiment of the present invention. For example, the doping concentration of the first element in the second region 3b is 5*E21 to 6*E22 atoms / cm 3, which can prevent the doping concentration from being too high and affecting the crystalline distribution to meet the current transmission efficiency, and can also save the raw materials of the first element. For example, the doping concentration of the first element in the second region 3b is 5*E21atom / cm 3 、6*E21atom / cm 3 、7*E21atom / cm 3 、8*E21atom / cm 3 、9*E21atom / cm 3 、1*E22atom / cm 3 、3*E22atom / cm 3 、4*E22atom / cm 3 、5*E22atom / cm 3 or 6*E22atom / cm 3 The doping concentration of the second element in the fourth region 6b is 1*E20 to 3*E21 atom / cm 3 , which can prevent the doping concentration from being too high and affecting the crystalline distribution to meet the current transmission efficiency, and can also save the raw materials of the second element. For example, the doping concentration of the second element in the fourth region 6b is 1*E20atom / cm 3 、3*E20atom / cm 3 、5*E20atom / cm 3 、8*E20atom / cm 3 、1*E21atom / cm 3 、2*E21atom / cm 3 or 3*E21atom / cm 3 Etc. Among them, the doping concentration of the first element in the second region 3b is the average doping concentration of the first element in the second region 3b; the doping concentration of the second element in the fourth region 6b is the average doping concentration of the second element in the fourth region 6b.
[0103] In some embodiments, the total area of the orthographic projection of the second region 3b on the surface of the semiconductor substrate 1 is smaller than the total area of the orthographic projection of the fourth region 6b on the surface of the semiconductor substrate 1. In the process of manufacturing the electrode, since the activity of the fourth region 6b is lower than that of the second region 3b, the total area of the fourth region 6b is made larger than the total area of the second region 3b, so that the total area of the fourth region 6b with lower activity is larger, thereby reducing the difficulty of the subsequent plating process.
[0104] In other embodiments, Figure 5 As shown, Figure 5 The middle horizontal axis is the depth from the side of the second region 3 b away from the semiconductor substrate 1 to the side close to the semiconductor substrate 1 , Figure 5The vertical axis is the doping concentration of the first element. Figure 5 It can be seen that the first element at the edge position of the second region 3b away from the semiconductor substrate 1 and the first element in the middle part are distributed more evenly. In other words, the first element at the second region 3b away from the semiconductor substrate 1 is evenly distributed along the direction parallel to the first surface. Specifically, the difference between the doping concentration of the first element at the edge position of the second region 3b and the doping concentration of the first element in the middle part of the second region 3b fluctuates less than or equal to 5%. The conductivity of the surface of the second region 3b is set more uniformly in this way, so that the second region 3b is in contact with the first electrode 5 or other conductive parts to transmit current more evenly, avoiding the situation of excessive local heat. In addition, in the process of laser opening, due to different laser types and processes (parameters and / or steps), the energy distribution of the laser may be uneven at the edge position of the opening and the middle part of the opening, so the doping concentration of the first element at the edge position of the second region 3b may also be greater than or less than the doping concentration of the first element in the middle part of the second region 3b. Exemplarily, the difference between the doping concentration of the first element at the edge position of the second region 3b and the doping concentration of the first element in the middle part of the second region 3b fluctuates less than or equal to 100atom / cm 3 ; For example, the difference can be 100atom / cm 3 、90atom / cm 3 、80atom / cm 3 、70atom / cm 3 、60atom / cm 3 、50atom / cm 3 、40atom / cm 3 、30atom / cm 3 、20atom / cm 3 or 10atom / cm 3 wait.
[0105] In other embodiments, Figure 6 As shown, Figure 6 The middle abscissa is the depth from the side of the fourth region 6 b away from the semiconductor substrate 1 to the side close to the semiconductor substrate 1 , Figure 6 The vertical axis is the doping concentration of the second element. Figure 6It can be seen that the second element at the edge position of the surface of one side of the fourth region 6b away from the semiconductor substrate 1 and the second element in the middle part are distributed more evenly. In other words, the second element of the surface of the one side of the fourth region 6b away from the semiconductor substrate 1 is evenly distributed along the direction parallel to the first surface. Specifically, the difference between the doping concentration of the first element at the edge position of the fourth region and the doping concentration of the first element in the middle part of the fourth region fluctuates less than or equal to 5%; in other words, the second element of the fourth region 6b is evenly distributed along the direction parallel to the first surface, so that the conductivity of the surface of the fourth region 6b is more uniform, so that the fourth region 6b is in contact with the second electrode 7 or other conductive parts to transmit current more evenly, avoiding the situation of excessive local heat. Similarly to the above, the doping concentration of the second element at the edge position of the fourth region 6b can also be greater than or less than the doping concentration of the second element in the middle part of the fourth region 6b. Exemplarily, the difference between the doping concentration of the second element at the edge position of the fourth region 6b and the doping concentration of the second element in the middle part of the fourth region 6b can be 100atom / cm 3 ; For example, the difference can be 100atom / cm 3 、90atom / cm 3 、80atom / cm 3 、70atom / cm 3 、60atom / cm 3 、50atom / cm 3 、40atom / cm 3 、30atom / cm 3 、20atom / cm 3 or 10atom / cm 3 wait.
[0106] In some embodiments, the doping concentration of the first element in the second region 3b near the edge of the solar cell is equal to the doping concentration of the first element in the second region 3b near the center of the solar cell. Of course, the doping concentration of the first element in the second region 3b near the edge of the solar cell may also be greater than or less than the doping concentration of the first element in the second region 3b near the center of the solar cell. The doping concentration of the second element in the fourth region 6b near the edge of the solar cell is equal to the doping concentration of the second element in the third region 6a near the center of the solar cell. Of course, the doping concentration of the second element in the fourth region 6b near the edge of the solar cell may also be greater than or less than the doping concentration of the second element in the third region 6a near the center of the solar cell.
[0107] In some embodiments, the number of the second regions is multiple and the multiple second regions are discontinuously arranged. In this way, the multiple second regions are discontinuous, which reduces the laser activation area, thereby reducing the damage of the laser to the semiconductor substrate 1; at the same time, the carrier collection and extraction efficiency of the first doped semiconductor layer 3 is guaranteed. Specifically, the second region can be any shape such as a circle, an ellipse, a rectangle, a rounded rectangle, etc.
[0108] The number of the fourth regions is multiple and the multiple fourth regions are discontinuously arranged, and similarly, the laser activation area is reduced, thereby reducing the damage of the laser to the semiconductor substrate 1; at the same time, the carrier collection and extraction efficiency of the first doped semiconductor layer 3 is guaranteed. Specifically, the fourth region can be any shape such as a circle, an ellipse, a rectangle, a rounded rectangle, etc.
[0109] It can be understood that in the process of manufacturing the first doped semiconductor layer 3, a portion of the first element will diffuse into the interior of the semiconductor substrate 1, and the depth of the first element diffused from the surface of the semiconductor substrate 1 to the interior is the first inward diffusion depth. In the process of manufacturing the second doped semiconductor layer 6, a portion of the second element will diffuse into the interior of the semiconductor substrate 1, and the depth of the second element diffused from the surface of the semiconductor substrate 1 to the interior is the second inward diffusion depth. Among them, the first inward diffusion depth is less than or equal to the second inward diffusion depth, so that the transmission resistance between the semiconductor substrate 1 and the first doped semiconductor layer 3 can be reduced, and the contact resistance between the semiconductor substrate 1 and the second doped semiconductor layer 6 can be reduced, while reducing the difference in carrier collection efficiency between the first doped semiconductor layer 3 and the second doped semiconductor layer 6, reducing current loss.
[0110] As for the range of the first inner expansion depth and the second inner expansion depth, as long as the carrier generation efficiency of the semiconductor substrate 1 is satisfied, no specific limitation is made in the present application. Exemplarily, the range of the first inner expansion depth is 50nm to 150nm, for example, the first inner expansion depth can be 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm or 150nm. The range of the second inner expansion depth is 50nm to 150nm, for example, the second inner expansion depth can be 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm or 150nm.
[0111] In some embodiments, the first region 3a may be a first non-laser action region, and the second region 3b may be a first laser action region. Specifically, laser is used to irradiate the second region 3b of the first doped semiconductor layer 3, and more first elements are activated by the laser. For example, when the first element is phosphorus, the heat of the laser is used to replace the position of silicon atoms in the lattice with the phosphorus element, forming more substitutional diffusion and converting into active phosphorus.
[0112] In some embodiments, the third region 6a is a second non-laser action region, and the fourth region 6b is a second laser action region. Specifically, the fourth region 6b of the second doped semiconductor layer 6 is irradiated with laser, and more second elements are activated by laser. For example, when the first element is boron, the heat of the laser is used to replace the position of silicon atoms in the lattice with the boron element, forming more substitutional diffusion and converting into active boron.
[0113] In some embodiments, the material of the semiconductor substrate 1 can be selected from materials such as silicon (Si) or germanium (Ge) or materials such as gallium arsenide (GaAs). Obviously, in terms of conductivity type, the semiconductor substrate 1 can be an intrinsic conductive substrate, an n-type conductive substrate or a p-type conductive substrate. Optionally, the semiconductor substrate 1 is a p-type conductive substrate or an n-type conductive substrate. Compared with the intrinsic conductive substrate, the p-type conductive substrate or the n-type conductive substrate has better conductivity, so that the final solar cell has a lower body resistivity, thereby improving the efficiency of the solar cell.
[0114] In addition, the materials of the first doped semiconductor layer 3 and the second doped semiconductor layer 6 can be silicon (Si), germanium (Ge), silicon carbide (SiCx) or gallium arsenide (GaAs) and the like. Taking the case where the materials of the first doped semiconductor layer 3 and the second doped semiconductor layer 6 are both silicon (Si) as an example, the first doped semiconductor layer 3 can be doped polycrystalline silicon, and the second semiconductor layer can also be doped polycrystalline silicon. In addition, the first doped semiconductor layer 3 can also be one or more of doped single crystal silicon, doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon. The second doped layer can also be one or more of doped single crystal silicon, doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon. In this case, the doped polycrystalline silicon layer has higher carrier transport characteristics, so when the first doped semiconductor layer 3 and / or the second doped semiconductor layer 6 is a doped polycrystalline silicon layer, the carrier transport efficiency is higher, which is conducive to improving the photoelectric conversion efficiency of the solar cell.
[0115] In some embodiments, the solar cell may further include a first interface layer 2, which is located at least between the first doped semiconductor layer 3 and the semiconductor substrate 1. In this case, the passivation contact structure composed of the first interface layer 2 and the first doped semiconductor layer 3 has an excellent interface passivation effect, and can achieve selective collection of carriers, reduce the carrier recombination rate in the region of the semiconductor substrate 1 where the first semiconductor layer is formed, and further improve the photoelectric conversion efficiency of the solar cell. The material and thickness of the first interface layer 2 can be set according to the material of the first semiconductor layer and actual needs, and are not specifically limited here.
[0116] Among them, the material of the above-mentioned first interface layer 2 can be determined according to the material of the first doped semiconductor layer 3. For example: when the first doped semiconductor layer 3 includes a doped polysilicon layer, the first interface layer 2 is a tunneling oxide layer; in this way, the first doped semiconductor layer 3 and the first interface layer 2 form a tunneling oxide layer passivation contact, and the tunneling oxide layer passivation technology can form a tunneling film between the first electrode 5 and the semiconductor substrate 1, isolating the electrode from contacting the semiconductor substrate 1, reducing contact recombination losses, and electrons can tunnel through the film without affecting current transfer. At the same time, passivation can bend the surface energy band, reduce the surface recombination loss of the silicon wafer, and effectively improve the front passivation and metal contact problems. For another example: when the first doped semiconductor layer 3 includes a doped amorphous silicon layer, the first interface layer 2 includes an intrinsic amorphous silicon layer. Secondly, the embodiment of the present invention does not specifically limit the material of the first interface layer 2.
[0117] In some embodiments, the solar cell may further include a second interface layer, which is at least located between the second doped semiconductor layer 6 and the semiconductor substrate 1. The projection of the second interface layer on the semiconductor substrate 1 may overlap with the projection of the second doped semiconductor layer 6 on the semiconductor substrate 1. In this case, the passivation contact structure composed of the second interface layer and the second doped semiconductor layer 6 can realize the selective collection of carriers and reduce the carrier recombination rate in the region of the semiconductor substrate 1 where the second doped semiconductor layer 6 is formed. The material and thickness of the second interface layer can be set according to the material of the second doped semiconductor layer 6 and actual needs, and are not specifically limited here. For example: when the material of the second doped semiconductor layer 6 includes one or more of doped amorphous silicon, doped microcrystalline silicon, and doped nanocrystalline silicon, the second interface layer includes one or more of an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, and an intrinsic nanocrystalline silicon. For another example, when the material of the second doped semiconductor layer 6 includes doped polycrystalline silicon, the second interface layer includes a tunneling oxide layer.
[0118] In some embodiments, the solar cell further includes a dielectric layer 4 covering the first doped semiconductor layer 3 and the second doped semiconductor layer 6, and the dielectric layer 4 is located on the side of the first doped semiconductor layer 3 and the second doped semiconductor layer 6 away from the semiconductor substrate 1. The material of the dielectric layer 4 may include one or more of silicon nitride (SiNx, x can be any value), silicon oxynitride, and silicon oxide, which can passivate the surface of the semiconductor substrate 1 or the doped layer, reduce its carrier recombination rate, and further improve the photoelectric conversion efficiency of the solar cell.
[0119] The dielectric layer 4 has a first opening that penetrates the thickness of the dielectric layer 4 at a position corresponding to the second region 3b, and the first electrode 5 is electrically connected to the first doped semiconductor layer 3 through the first opening. The dielectric layer 4 has a second opening that penetrates the thickness of the dielectric layer 4 at a position corresponding to the fourth region 6b. The second electrode 7 is electrically connected to the second doped semiconductor layer 6 through the second opening. In this way, the conductive effect between the first electrode 5 and the first doped semiconductor layer 3 and the second electrode 7 and the second doped semiconductor layer 6 is ensured.
[0120] In some embodiments, Figure 7 As shown, the first electrode 5 includes a first seed layer 8 and the first seed layer 8 is in contact with the first doped semiconductor layer 3; the second electrode 7 includes a second seed layer 9 and the second seed layer 9 is in contact with the second doped semiconductor layer 6. In this technical solution, a good contact effect is achieved through the first seed layer 8 and the second seed layer 9, and the metal elements in the first electrode 5 and the second electrode 7 thereon are blocked from diffusing into the semiconductor substrate 1, which can reduce recombination. At the same time, the remaining parts of the first electrode 5 and the second electrode 7 have more options, and some metals with mature processes and low prices can be selected to replace silver, which can reduce the cost of the electrode, and thus reduce the cost of the solar cell.
[0121] Among them, the thickness of the first seed layer 8 is greater than that of the second seed layer 9. Specifically, the first doped semiconductor layer 3 (for example, phosphorus doping) is usually negatively charged, the second doped semiconductor layer (for example, boron doping) is usually positively charged, and metal ions are usually positively charged. According to the principle that like charges repel each other and unlike charges attract each other, the first doped semiconductor layer 3 is more likely to attract and recombine positively charged metal ions than the second doped semiconductor layer. Therefore, a thicker first seed layer 8 is required to block the infiltration of metal ions in the first electrode 5, while only a thinner second seed layer 9 is required to have a good blocking effect on the metal ions in the second electrode 7.
[0122] In some embodiments, the ratio of the thickness of the first seed layer 8 to the thickness of the second seed layer 9 is greater than 1 and less than or equal to 2. The thickness ratio of the two is controlled within this range, which has a good blocking effect on the penetration of metal ions in the first electrode 5 and the second electrode 7, and the thickness difference between the two is not too large, thereby avoiding the introduction of cracks and other poor mechanical properties during the lamination process.
[0123] For example, the ratio of the thickness of the first seed layer 8 to the thickness of the second seed layer 9 can be 1.01, 1.03, 1.05, 1.1, 1.2, 1.15, 1.3, 1.35, 1.4, 1.45, 1.5, 1.55, 1.6, 1.65, 1.7, 1.75, 1.8, 1.85, 1.9, 1.95, or 2.
[0124] The difference between the thickness of the first seed layer 8 and the thickness of the second seed layer 9 is greater than 0 and less than or equal to 200 nm. The thickness difference between the two is controlled within this range, which has a good blocking effect on the penetration of metal ions in the first electrode 5 and the second electrode 7. Moreover, the thickness difference between the two is not too large, which will not bring adverse effects in the subsequent preparation process of the first metal layer and the second metal layer, and will not cause mechanical damage in the subsequent lamination process.
[0125] For example, the difference between the thickness of the first seed layer 8 and the thickness of the second seed layer 9 may be 1 nm, 10 nm, 50 nm, 70 nm, 30 nm, 5 nm, 100 nm, 120 nm, 150 nm, 180 nm, 190 nm, or 200 nm.
[0126] In the present application, the thickness of the first seed layer 8 can be 460nm, 500nm, 550nm, 562nm, 562.2nm, 600nm, 605.4nm, 606nm, 629nm, 700nm, 754.8nm, 755nm, 843nm, 1300nm, 800nm, 900nm, 1000nm, 1100nm, 1200nm, 1400nm, 1500nm. The thickness of the second seed layer 9 can be 260nm, 300nm, 350nm, 400nm, 448.2nm, 448nm, 504nm, 500nm, 503nm, 503.2nm, 504nm, 600nm, 743nm, 700nm, 800nm, 900nm, 1000nm, 1100nm, 1200nm, 1300nm.
[0127] Optionally, the material of the second seed layer 9 is selected from: at least one of titanium (Ti), tungsten (W), chromium (Cr), nickel (Ni), cobalt (Co), molybdenum (Mo), tin (Sn), lead (Pb), palladium (Pd), copper (Cu), niobium (Nb), ruthenium (Ru), indium (In), zinc (Zn), titanium boride (TiBx), tantalum nitride (TaNx), tungsten nitride (WNx), titanium nitride (TiNx), titanium tungsten alloy (TiWx), titanium silicon compound (TiSix), titanium silicon nitride (TiSiN), tantalum silicon nitride (TaSiNx), nickel vanadium (NiV), and hexagonal boron nitride (WBN); And / or, the material of the first seed layer 8 is selected from at least one of titanium (Ti), tungsten (W), chromium (Cr), nickel (Ni), cobalt (Co), molybdenum (Mo), tin (Sn), lead (Pb), palladium (Pd), copper (Cu), niobium (Nb), ruthenium (Ru), indium (In), zinc (Zn), titanium boride (TiBx), tantalum nitride (TaNx), tungsten nitride (WNx), titanium nitride (TiNx), titanium tungsten alloy (TiWx), titanium silicon compound (TiSix), titanium silicon nitride (TiSiN), tantalum silicon nitride (TaSiNx), nickel vanadium (NiV), and hexagonal boron nitride (WBN). Specifically, the materials of the first seed layer 8 and the second seed layer 9 are selected from the above materials, and the properties of the above materials such as resistance and barrier properties to metal elements are more suitable for seed layers. In particular, nickel and / or zinc are selected as the materials of the first seed layer 8 and the second seed layer 9. On the first hand, both nickel and zinc have good contact properties; on the second hand, nickel and zinc basically do not penetrate into the semiconductor substrate 1, and there is less recombination; on the third hand, nickel and zinc have a good barrier effect on the metal in the metal layer thereon, which can prevent the metal in the metal layer from penetrating into the semiconductor substrate 1, thereby reducing recombination. Whether the materials of the first seed layer 8 and the second seed layer 9 are the same is not specifically limited, and they can be the same or different. It should be noted that x in the above chemical formula is a number greater than 0. The materials of the first seed layer 8 and the second seed layer 9 can be the same or different, and there is no specific limitation on this.
[0128] In addition, an embodiment of the present application further provides a photovoltaic assembly, which includes an electrical connector and any of the above-mentioned solar cells. The electrical connector can be electrically connected to the first electrode and / or the second electrode in the solar cell.
[0129] Compared with the prior art, the beneficial effects of the photovoltaic module provided in the embodiment of the present application are the same as the beneficial effects of the above-mentioned solar cell, which will not be elaborated here.
[0130] In the description of the above embodiments, specific features, structures, materials or characteristics may be combined in a suitable manner in any one or more embodiments or examples.
[0131] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.
Claims
1. A solar cell, characterized in that: include: Semiconductor substrate; A first doped semiconductor layer, disposed on the surface of the semiconductor substrate and doped with a first element; A second doped semiconductor layer, disposed on the surface of the semiconductor substrate and doped with a second element, wherein the conductivity type of the second doped semiconductor layer is opposite to that of the first doped semiconductor layer; The first doped semiconductor layer has a first region and a second region, and the first region and the second region are arranged in a direction parallel to the surface of the semiconductor substrate; the doping concentration of the first element in the first region is C a1 , the doping concentration of the first element in the second region is C a2 , C a2 >C a1 ; The second doped semiconductor layer has a third region and a fourth region, and the third region and the fourth region are arranged in a direction parallel to the surface of the semiconductor substrate; the doping concentration of the second element in the third region is C b1 , the doping concentration of the second element in the fourth region is C b2 , C b2 >C b1 ; And, C a2 >C b2 .
2. The solar cell according to claim 1, characterized in that △C a =C a2 -C a1 ,△C b =C b2 -C b1 ,△C a >△C b ; and / or, K a =C a2 / C a1 , K b =C b2 / C b1 , K a ≥K b .
3. The solar cell according to claim 1, characterized in that K a =C a2 / C a1 , 2≤K a ≤1000; and / or, K b =C b2 / C b1 , 2≤K b ≤1000; and / or, △C a =C a2 -C a1 , 4*E21atom / cm 3 ≤△C a ≤9*E22 atom / cm 3 ; and / or, △C b =C b2 -C b1 , 3*E19atom / cm 3 ≤△C b ≤2*E21 atom / cm 3 .
4. The solar cell according to claim 1, characterized in that The doping concentration of the first element in the second region gradually decreases along a direction approaching the semiconductor substrate; and / or, Along the direction approaching the semiconductor substrate, the doping concentration of the second element in the fourth region gradually decreases.
5. The solar cell according to claim 1, characterized in that: Along a direction away from the semiconductor substrate, the second region includes a first sub-region and a second sub-region arranged in sequence, and the doping concentration of the second sub-region is greater than the doping concentration of the first sub-region; Along a direction away from the semiconductor substrate, the fourth region includes a third sub-region and a fourth sub-region arranged in sequence, and a doping concentration of the fourth sub-region is greater than a doping concentration of the third sub-region.
6. The solar cell according to claim 5, characterized in that Along the thickness direction of the semiconductor substrate, the depth of the second sub-region is h1, and the depth of the fourth sub-region is h2; h1≤h2.
7. The solar cell according to claim 5, characterized in that: Along the thickness direction of the semiconductor substrate, the depth of the second sub-region is h1, and the depth of the fourth sub-region is h2; The thickness of the first doped semiconductor layer is d1, 0.1≤h1 / d1≤0.9; and / or the thickness of the second doped semiconductor layer is d2, 0.1≤h2 / d2≤0.
9.
8. The solar cell according to claim 5, characterized in that: Along the thickness direction of the semiconductor substrate, the depth of the second sub-region is h1, and the depth of the fourth sub-region is h2; 0.01 μm ≤ h1 ≤ 0.13 μm; and / or, 0.01 μm ≤ h2 ≤ 0.15 μm; And / or, the thickness of the first doped semiconductor layer is d1, 10 nm≤d1≤400 nm; and / or, the thickness of the second doped semiconductor layer is d2, 10 nm≤d2≤400 nm.
9. The solar cell according to claim 5, characterized in that: From the surface of the second sub-region along the direction parallel to the thickness of the semiconductor substrate, the absolute value of the change rate of the doping concentration of the first element in the second sub-region is |V1|, and the absolute value of the change rate of the doping concentration of the second element in the fourth sub-region is |V2|, |V1|≥|V2|.
10. The solar cell according to any one of claims 5 to 9, wherein the second sub-region is a region from the surface of the second region away from the semiconductor substrate in a direction toward the semiconductor substrate to a point where the doping concentration of the second region is equal to the doping concentration of the first region; The first sub-region is a region from a position where the doping concentration of the second region is equal to the doping concentration of the first region along a direction toward the semiconductor substrate to a region of the second region close to the surface of the semiconductor substrate; The fourth sub-region is a region from the surface of the fourth region away from the semiconductor substrate in the direction toward the semiconductor substrate to the point where the doping concentration of the fourth region is equal to the doping concentration of the third region. The third sub-region is from a position where the doping concentration of the fourth region is equal to that of the third region along a direction toward the semiconductor substrate to a region of the fourth region close to the surface of the semiconductor substrate.
11. The solar cell according to any one of claims 1 to 9, characterized in that: The doping concentration of the first element in the second region is 5*E21-6*E22 atom / cm 3 and / or, The doping concentration of the second element in the fourth region is 1*E20 to 3*E21 atom / cm 3 .
12. The solar cell according to any one of claims 1 to 9, characterized in that: The total area of the orthographic projections of the second regions on the surface of the semiconductor substrate is smaller than the total area of the orthographic projections of the fourth regions on the surface of the semiconductor substrate.
13. The solar cell according to any one of claims 1 to 9, characterized in that: There are multiple second regions and the multiple second regions are discontinuously arranged, there are multiple fourth regions and the multiple fourth regions are discontinuously arranged, a first electrode is arranged on a side of the second region away from the semiconductor substrate, and a second electrode is arranged on a side of the fourth region away from the semiconductor substrate.
14. A photovoltaic module, characterized in that: include: An electrical connector and a solar cell according to any one of claims 1 to 13; the solar cell further comprising a dielectric layer, a first electrode and a second electrode, the dielectric layer covering the first doped semiconductor layer and the second doped semiconductor layer, the dielectric layer being provided with a first opening and a second opening, the first electrode being electrically connected to the first doped semiconductor layer through the first opening, and the second electrode being electrically connected to the second doped semiconductor layer through the second opening; The electrical connection member is electrically connected to the first electrode and / or the second electrode in the solar cell.
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