Display panel and display device

Abstract

The invention provides a display panel and a display device, and the display panel comprises a substrate; the at least one transistor is arranged on one side of the substrate; the first flat layer is arranged on one side, far away from the substrate, of the at least one transistor; the second flat layer is arranged on one side, far away from the substrate, of the first flat layer; wherein a trapezoidal structure is arranged at the position, corresponding to any transistor, of the first flat layer, and the orthographic projection, on the substrate, of the trapezoidal structure covers the orthographic projection, on the substrate, of any transistor. The trapezoidal structure is configured such that a slope angle is determined according to refractive indexes of the first flat layer and the second flat layer.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] At present, in the field of display technology, according to the manufacturing technology and material classification of thin film transistors (TFT), TFT can include amorphous silicon (a-Si) TFT, low temperature polysilicon (LTPS) TFT, oxide (Oxide, for example, Indium Gallium Zinc Oxide (IGZO)) TFT, etc. Among them, oxide TFT is widely used in the display field because of its low leakage characteristics.

[0003] However, since oxide TFTs are sensitive to light, TFT threshold voltage (Vth) drift is prone to occur, causing corresponding device failure and ultimately resulting in defective products.

[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to those skilled in the art. Summary of the invention

[0005] In view of this, the present application proposes a display panel and a display device to solve or partially solve the above problems.

[0006] Based on the above objectives, in a first aspect, the present application provides a display panel, including:

[0007] substrate substrate;

[0008] At least one transistor is disposed on one side of the substrate;

[0009] A first planar layer is disposed on a side of the at least one transistor away from the substrate;

[0010] A second flat layer is disposed on a side of the first flat layer away from the base substrate;

[0011] Among them, a trapezoidal structure is arranged at the position corresponding to the first flat layer and any transistor, the orthographic projection of the trapezoidal structure on the substrate covers the orthographic projection of any transistor on the substrate, and the trapezoidal structure is configured so that the slope angle is determined according to the refractive index of the first flat layer and the second flat layer.

[0012] In some exemplary embodiments, the refractive index of the second planar layer is greater than the refractive index of the first planar layer.

[0013] In some exemplary embodiments, the slope angle of the trapezoidal structure is determined according to an arcsine function value of a ratio of refractive indices of the first flat layer and the second flat layer.

[0014] In some exemplary embodiments, the slope angle of the trapezoidal structure is [20°, 60°].

[0015] In some exemplary embodiments, a refractive index of the second planar layer is greater than or equal to 1.2 times a refractive index of the first planar layer.

[0016] In some exemplary embodiments, the display panel further includes:

[0017] The light-shielding metal layer is disposed on a side of the trapezoidal structure facing the second flat layer.

[0018] In some exemplary embodiments, the light-shielding metal layer is divided into a plurality of conductive line regions, which are arranged at intervals on a side of the trapezoidal structure facing the second planar layer;

[0019] At least one of the plurality of conductor areas is disposed on the upper bottom surface of the trapezoidal structure, and at least two of the plurality of conductor areas are disposed on two waist surfaces of the trapezoidal structure, respectively.

[0020] In some exemplary embodiments, the cross-sectional area of ​​the conductive wire region located on the upper bottom surface of the trapezoidal structure is greater than or equal to the cross-sectional area of ​​the conductive wire region located on two waist surfaces of the trapezoidal structure.

[0021] In some exemplary embodiments, a spacing between the plurality of conductive line regions is between 2 μm and 3 μm.

[0022] In some exemplary embodiments, the spacing between the conductive line regions located at two waist surfaces of the trapezoidal structure gradually increases in a direction away from the upper bottom surface of the trapezoidal structure.

[0023] In some exemplary embodiments, the first planar layer further includes:

[0024] The shading dam is arranged between adjacent trapezoidal structures.

[0025] Based on the same concept, in a second aspect, the present application also provides a display device, comprising the display panel as described in the first aspect above.

[0026] As can be seen from the above, the present application provides a display panel and a display device, the display panel comprising: a substrate; at least one transistor, arranged on one side of the substrate; a first flat layer, arranged on a side of the at least one transistor away from the substrate; a second flat layer, arranged on a side of the first flat layer away from the substrate; wherein a trapezoidal structure is arranged at a position of the first flat layer corresponding to any transistor, the orthographic projection of the trapezoidal structure on the substrate covers the orthographic projection of any transistor on the substrate, and the trapezoidal structure is configured such that a slope angle is determined according to the refractive indices of the first flat layer and the second flat layer. The present application transforms the first flat layer so that a corresponding trapezoidal structure is formed above each transistor, and the slope angle of the trapezoidal structure is related to the refractive index of the first flat layer and the second flat layer, so that when the light passes through the second flat layer and reaches the first flat layer, it will be reflected back when it hits the waist of the trapezoidal structure. At the same time, because the trapezoidal structure covers the corresponding transistor, it reduces or even eliminates the light from hitting the transistor. At the same time, as long as the illumination level of the oxide transistor is kept below a certain amount, it is difficult for the threshold voltage to drift, or the drift amount can be ignored. Finally, this structure is used to reduce the drift of the transistor threshold voltage, prevent the corresponding device from failing, and improve the product yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0028] Figure 1 A schematic diagram of a partial hierarchical structure of an exemplary display panel provided in an embodiment of the present application.

[0029] Figure 2 A schematic diagram of a partial hierarchical structure of another exemplary display panel provided in an embodiment of the present application.

[0030] Figure 3 A schematic diagram of the relationship between the slope angle of the trapezoidal structure and the reflection of light provided in an embodiment of the present application.

[0031] Figure 4 A partial top view structural schematic diagram of a light-shielding metal layer in different configurations of an exemplary display panel provided in an embodiment of the present application. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solutions and advantages of this specification more clearly understood, this specification is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0033] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should be understood by people with ordinary skills in the field to which the present application belongs. The "first", "second" and similar words used in the embodiments of the present application do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements, objects or method steps appearing before the word cover the elements, objects or method steps listed after the word and their equivalents, without excluding other elements, objects or method steps. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0034] As described in the background technology section, since oxide thin film transistors are sensitive to light, when the amount of light exposure to the oxide thin film transistor reaches a certain level, it is easy for the threshold voltage to drift significantly, thereby causing the device in which the oxide thin film transistor is located to fail. Among them, the threshold voltage (Vth) drift refers to the phenomenon that the threshold voltage of the thin film transistor (TFT) changes over time.

[0035] Furthermore, in some embodiments, a shielding metal layer may be provided above the thin film transistor to prevent light from irradiating the thin film transistor. Figure 1 As shown, the thin film transistor 120 is generally disposed on the substrate 110. In some specific scenarios, a buffer layer Buffer may be disposed between the thin film transistor 120 and the substrate 110. Then, for the specific structure of the thin film transistor 120, in addition to the transistor body of the thin film transistor 120, it may further include a gate TG, a source and drain SD, and a back gate BG, and these structures may be isolated by using corresponding insulating layers or dielectric layers, for example Figure 1 The first gate insulating layer GI1, the second gate insulating layer GI2 and the interlayer dielectric layer ILD shown in FIG.

[0036] Afterwards, at least one flat layer PLN may be disposed above the thin film transistor 120, that is, on the side of the thin film transistor 120 away from the substrate 110. Specifically, in one embodiment, as shown in FIG. Figure 1Two planar layers are provided, where the first planar layer PLN1 is marked as 130 and the second planar layer PLN2 is marked as 140. In a more specific scenario, a protection layer PVX for protecting the thin film transistor 120 may be provided between the thin film transistor 120 and the planar layer PLN.

[0037] Furthermore, in order to block the light, a metal layer may be provided above the flat layer for blocking. Figure 1 As shown, the anode layer Anode can be modified or arranged above the second flat layer 140 to cover the entire thin film transistor 120 to block the light above; on this basis, other metal layers can be arranged above the first flat layer 130 to further block the light, such as Figure 1 An SD2 layer connected to the source and drain electrodes SD is provided.

[0038] However, the applicant further discovered that although such a design can block the light directly above the thin film transistor 120, there will be gaps between the metal layers. In some cases, light will still enter this part and eventually irradiate the thin film transistor 120, thereby causing the threshold voltage to drift. As a result, in some specific scenarios, the solution of this embodiment is not ideal.

[0039] In this way, combined with the above-mentioned actual situation, the embodiment of the present application further provides a display panel. The present application transforms the first flat layer so that a corresponding trapezoidal structure is formed above each transistor, and the slope angle of the trapezoidal structure is related to the refractive index of the first flat layer and the second flat layer. In this way, when the light passes through the second flat layer to reach the first flat layer, it will be reflected back when it hits the waist of the trapezoidal structure. At the same time, because the trapezoidal structure covers the corresponding transistor, it reduces or even eliminates the light from hitting the transistor. At the same time, as long as the illumination level of the oxide transistor is kept below a certain amount, it is difficult for the threshold voltage to drift, or the drift amount can be ignored. Finally, this structure is used to reduce the drift of the transistor threshold voltage, prevent the corresponding device from failing, and improve the product yield.

[0040] Figure 2 A schematic diagram of a partial hierarchical structure of an exemplary display panel provided in an embodiment of the present application is shown.

[0041] Combination Figure 2As shown, a display panel 100 of an embodiment of the present application includes: a base substrate 110; at least one transistor 120, which is arranged on one side of the base substrate 110; a first planar layer 130, which is arranged on a side of the at least one transistor 120 away from the base substrate 110; and a second planar layer 140, which is arranged on a side of the first planar layer 130 away from the base substrate 110; wherein a trapezoidal structure 150 is arranged at a position corresponding to the first planar layer 130 and any transistor 120, and the orthographic projection of the trapezoidal structure 150 on the base substrate 110 covers the orthographic projection of any transistor 120 on the base substrate 110, and the trapezoidal structure 150 is configured such that the slope angle θ is determined according to the refractive index of the first planar layer 130 and the second planar layer 140.

[0042] In this embodiment, the base substrate 110 can be used to carry other components in the display panel 100. At least one transistor 120 can be used to implement specific functions in the corresponding circuit, such as a driving transistor, a light-emitting control transistor, a data writing transistor, etc. in a pixel circuit; a driving transistor, a reset transistor, etc. in a gate driving circuit. In order to protect other structures in the display panel 100, such as isolating water and oxygen corrosion, and to smooth the surface, at least one flat layer is provided on the side away from the base substrate 110, and in this embodiment, at least a first flat layer 130 and a second flat layer 140 are included.

[0043] Furthermore, considering that light can be isolated by reflection, a reflection surface for reflecting light can be set above the transistor 120. Based on this, the first flat layer 130 is modified to form a trapezoidal structure 150 corresponding to the position of the transistor 120, so that the waist surface of the trapezoidal structure 150 can be used to reflect light. At the same time, in order to further improve the reflection effect, the slope angle θ of the trapezoidal structure 150 can be limited to be related to the refractive index of the first flat layer 130 and the second flat layer 140, so that the waist surface of the trapezoidal structure 150 formed according to the slope angle θ can better reflect the light reaching the first flat layer 130 from the second flat layer 140. In this way, the trapezoidal structure 150 is used to reflect the light, so that most of the irradiated light is reflected, so that the illumination level of the corresponding transistor 120 is controlled within a certain range, thereby eliminating the influence of the threshold voltage drift of the transistor 120, or making the drift of the threshold voltage within a certain range, which will not affect the circuit device.

[0044] It should be noted that the waist surfaces of the trapezoidal structure 150 mentioned in this embodiment are two non-parallel surfaces in the trapezoid; and the two parallel surfaces in the trapezoidal structure 150 can be called bottom surfaces, and generally the shorter bottom surface can be called the upper bottom surface, and the longer bottom surface can be called the lower bottom surface. Of course, in specific application scenarios, the names can be changed according to specific needs, and there is no specific limitation on this.

[0045] In some embodiments, in order to enhance the reflection effect of the trapezoidal structure 150 , the refractive indexes of the second flat layer 140 and the first flat layer 130 may be limited so that the refractive index of the second flat layer 140 is greater than that of the first flat layer 130 , thereby making it easier for light to be reflected when it passes through the second flat layer 140 and irradiates the trapezoidal structure 150 of the first flat layer 130 .

[0046] Furthermore, in order to make the waist surface of the trapezoidal structure 150 reflect light more effectively, or even achieve the effect of total reflection, the slope angle θ can be further limited, and specifically, the slope angle θ can be determined according to the inverse sine function value of the ratio of the refractive index of the first flat layer 130 and the second flat layer 140. Assuming that the refractive index of the first flat layer 130 is n1 and the refractive index of the second flat layer 140 is n2, the slope angle θ can be θ≥arcsin(n2 / n1) or θ≥arcsin(n1 / n2), etc. In this way, when light enters from the second flat layer 140 with a high refractive index to the first flat layer 130 with a low refractive index, when the slope angle θ meets the above conditions, the light will be totally reflected back, so as to avoid the light from affecting the characteristics of the corresponding transistor 120.

[0047] Furthermore, for the light reflecting surface, the larger the angle between the reflecting surface and the light, the better the reflection effect, and the better the light blocking effect. Figure 3 As shown, the slope angle θ of the trapezoidal structure 150 is equivalent to the incident and reflection angles of the light, which means that the larger the slope angle θ, the better the reflection effect and the blocking effect. However, considering that the core function of the first flat layer 130 or the entire flat layer is to make the device surface flatter, a slope angle θ that is too large will inevitably affect the overall flat effect. Finally, in combination with the above situation, in some embodiments, the range of the slope angle θ can be limited to [20°, 60°], so as to improve the blocking effect while reducing its impact on the flat effect. That is, in some embodiments, the slope angle θ of the trapezoidal structure 150 is [20°, 60°].

[0048] Afterwards, for the second flat layer 140 and the first flat layer 130, considering their specific functions and reflection effects, the refractive indexes of the second flat layer 140 and the first flat layer 130 can be further limited, so that the refractive index of the second flat layer 140 is at least 1.2 times the refractive index of the first flat layer 130, so that the trapezoidal structure 150 formed in this way can have a better reflection effect. That is, in some embodiments, the refractive index of the second flat layer is greater than or equal to 1.2 times the refractive index of the first flat layer.

[0049] In some more specific application scenarios, the waist surface of the trapezoidal structure 150 can be roughened or frosted, so that the uneven waist surface can be used to enhance the diffuse reflection effect of light, thereby further enhancing the reflection effect of the trapezoidal structure 150 on light.

[0050] In some embodiments, in order to further improve the light shielding effect, such as Figure 2 As shown, a light shielding metal layer 160 can be laid on the top of the trapezoidal structure 150, that is, a light shielding metal layer 160 can be provided on the side of the trapezoidal structure 150 facing the second flat layer 140. The light shielding effect is further improved by the light shielding metal layer 160. Of course, the light shielding metal layer 160 can be connected to any metal layer to achieve corresponding functions, such as connecting with SD to form an SD2 layer, etc.

[0051] Furthermore, since the trapezoidal structure 150 itself will reflect light and achieve an isolation effect for most of the light, if the light-shielding metal layer 160 is set as a whole-surface structure, although it can improve the isolation effect to a certain extent, the room for improvement is not very large. In combination with the above, for the transistor 120, it only needs to ensure that the light intensity is within a certain range, and the drift of its threshold voltage will hardly affect the corresponding device, and there is no need for very strict light control. Therefore, the light-shielding metal layer 160 can be divided into multiple areas in combination with corresponding wiring design considerations, such as forming a plurality of wires to connect to multiple signal sources, so as to achieve a certain light isolation effect while achieving the transmission effect of multiple signals. Figure 2 and Figure 4 As shown, Figure 4 (a) is a top view of the entire light shielding metal layer 160. Since it is an integrated structure, even if it is combined with wiring considerations, it can only transmit one signal; and Figure 4In (b), the light-shielding metal layer 160 is divided into a plurality of wire regions 161, each of which can transmit a signal, so that the wiring layout design can be more reasonably optimized on the basis of providing a certain light isolation. That is, in some embodiments, the light-shielding metal layer 160 is divided into a plurality of wire regions 161, which are arranged at intervals on the side of the trapezoidal structure 150 facing the second flat layer 140; at least one of the plurality of wire regions 161 is arranged on the upper bottom surface of the trapezoidal structure 150, and at least two are arranged on the two waist surfaces of the trapezoidal structure 150 respectively.

[0052] Furthermore, if Figure 2 As shown, since the upper bottom surface of the trapezoidal structure 150 does not have an inclined surface to effectively reflect light, the cross-sectional area of ​​the wire area 161 on this surface can be larger; and on the two waist surfaces of the trapezoidal structure 150, since there are inclined surfaces to reflect light, the cross-sectional area of ​​the wire area 161 on this surface can be smaller. Of course, in specific application scenarios, the cross-sectional area of ​​the wire area 161 can be set according to specific requirements or the signal requirements connected to the wire area 161, and it is not specifically limited here. That is, in some embodiments, the cross-sectional area of ​​the wire area 161 located on the upper bottom surface of the trapezoidal structure 150 is greater than or equal to the cross-sectional area of ​​the wire area 161 located on the two waist surfaces of the trapezoidal structure 150.

[0053] Furthermore, for the embodiment of setting a plurality of wire regions 161, considering the crosstalk problem that may be caused by too small spacing between the signals transmitted by the wire regions 161, and the fact that too large spacing is not conducive to the light shielding effect, the spacing between the wire regions 161 can be limited, and considering the above situation comprehensively, the spacing between the plurality of wire regions 161 can be set between 2μm and 3μm.

[0054] Furthermore, the trapezoidal structure 150 itself covers the entire transistor 120. In order to facilitate design and processing, the trapezoidal structure 150 and the transistor 120 can generally be set on the same central axis, and the closer to the edge of the trapezoidal structure 150, the farther away from the transistor 120, and the lower the requirement for blocking light. In this way, combined with the possible crosstalk problem between the aforementioned signals, the spacing between the wire areas 161 on the waist surface of the trapezoidal structure 150 can be made larger and larger, the closer to the upper bottom surface of the trapezoidal structure 150, the smaller the spacing between the wire areas 161; the farther away from the upper bottom surface of the trapezoidal structure 150, the larger the spacing between the wire areas 161. That is, in some embodiments, the spacing between the wire areas 161 located on the two waist surfaces of the trapezoidal structure 150 gradually increases in the direction away from the upper bottom surface of the trapezoidal structure 150.

[0055] In some embodiments, Figure 2 As shown, the transistor 120 is generally positioned according to the corresponding rule requirements, and the two trapezoidal structures 150 corresponding thereto are not necessarily adjacent, and in some embodiments, the second flat layer 140 can be directly used to fill these areas. In other embodiments, in order to further enhance the light blocking effect, a light shielding dam 170 can be further provided between the trapezoidal structures 150, so as to further block the light using the light shielding dam 170. That is, in some embodiments, the first flat layer 130 further includes: a light shielding dam 170, which is provided between the adjacent trapezoidal structures 150.

[0056] As can be seen from the above, the present application provides a display panel, the display panel includes: a substrate; at least one transistor, arranged on one side of the substrate; a first flat layer, arranged on the side of the at least one transistor away from the substrate; a second flat layer, arranged on the side of the first flat layer away from the substrate; wherein the first flat layer is provided with a trapezoidal structure at a position corresponding to any transistor, the positive projection of the trapezoidal structure on the substrate covers the positive projection of any transistor on the substrate, and the trapezoidal structure is configured such that the slope angle is determined according to the refractive index of the first flat layer and the second flat layer. The present application transforms the first flat layer so that a corresponding trapezoidal structure is formed above each transistor, and the slope angle of the trapezoidal structure is related to the refractive index of the first flat layer and the second flat layer, so that when the light passes through the second flat layer and reaches the first flat layer, it will be reflected back when it is irradiated to the waist surface of the trapezoidal structure, and at the same time, because the trapezoidal structure covers the corresponding transistor, the light irradiation to the transistor is reduced or even eliminated, and at the same time, as long as the illumination level of the oxide transistor is kept below a certain amount, it is difficult for the threshold voltage to drift, or the drift amount can be ignored. Ultimately, this structure was used to reduce transistor threshold voltage drift, prevent corresponding device failure, and improve product yield.

[0057] Based on the same concept, the present application also provides a display device, comprising a display panel as described in any of the aforementioned embodiments.

[0058] The display device of the above embodiment is used to apply the corresponding display panel in the above embodiment, and has the beneficial effects of the embodiment of the corresponding display panel, which will not be described in detail here.

[0059] It can be understood that the display device is a product with an image display function, and it is generally driven by multiple driving circuits. For example, it can be: a display, a television, a billboard, a digital photo frame, a laser printer with a display function, a telephone, a mobile phone, a personal digital assistant (PDA), a digital camera, a portable camcorder, a viewfinder, a navigator, a vehicle, a large-area wall, a home appliance, an information query device (such as business query equipment and monitors of e-government, banks, hospitals, power and other departments).

[0060] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present application (including the claims) is limited to these examples. In line with the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

[0061] In addition, to simplify the description and discussion, and in order not to make the embodiments of the present application difficult to understand, the known power supply / ground connection with the integrated circuit (IC) chip and other components may or may not be shown in the provided drawings. In addition, the device can be shown in the form of a block diagram to avoid making the embodiments of the present application difficult to understand, and this also takes into account the fact that the details of the implementation of these block diagram devices are highly dependent on the platform to be implemented in the embodiments of the present application (that is, these details should be fully within the scope of understanding of those skilled in the art). In the case of elaborating specific details (e.g., circuits) to describe exemplary embodiments of the present application, it is obvious to those skilled in the art that the embodiments of the present application can be implemented without these specific details or when these specific details are changed. Therefore, these descriptions should be considered to be illustrative rather than restrictive.

[0062] Although the present application has been described in conjunction with specific embodiments of the present application, many replacements, modifications and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may use the embodiments discussed.

[0063] The embodiments of the present application are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the scope of protection of the present application.

Claims

1. A display panel, characterized in that: include: substrate substrate; At least one transistor is disposed on one side of the substrate; A first planar layer is disposed on a side of the at least one transistor away from the substrate; A second flat layer is disposed on a side of the first flat layer away from the base substrate; Among them, a trapezoidal structure is arranged at the position corresponding to the first flat layer and any transistor, the orthographic projection of the trapezoidal structure on the substrate covers the orthographic projection of any transistor on the substrate, and the trapezoidal structure is configured so that the slope angle is determined according to the refractive index of the first flat layer and the second flat layer.

2. The display panel according to claim 1, characterized in that: The refractive index of the second flat layer is greater than the refractive index of the first flat layer.

3. The display panel according to claim 2, characterized in that: The slope angle of the trapezoidal structure is determined according to an inverse sine function value of a ratio of a refractive index of the first flat layer to that of the second flat layer.

4. The display panel according to claim 3, characterized in that: The slope angle of the trapezoidal structure is [20°, 60°].

5. The display panel according to claim 1, characterized in that: The refractive index of the second flat layer is greater than or equal to 1.2 times the refractive index of the first flat layer.

6. The display panel according to claim 1, characterized in that: Also includes: The light-shielding metal layer is disposed on a side of the trapezoidal structure facing the second flat layer.

7. The display panel according to claim 6, characterized in that: The light shielding metal layer is divided into a plurality of conductive line regions, which are arranged at intervals on a side of the trapezoidal structure facing the second flat layer; At least one of the plurality of conductor areas is disposed on the upper bottom surface of the trapezoidal structure, and at least two of the plurality of conductor areas are disposed on two waist surfaces of the trapezoidal structure, respectively.

8. The display panel according to claim 7, characterized in that: The cross-sectional area of ​​the conductor area located on the upper bottom surface of the trapezoidal structure is greater than or equal to the cross-sectional area of ​​the conductor areas located on the two waist surfaces of the trapezoidal structure.

9. The display panel according to claim 7, characterized in that: The spacing between the plurality of conductive line regions is between 2 μm and 3 μm.

10. The display panel according to claim 7, characterized in that: The spacing between the wire regions located on the two waist surfaces of the trapezoidal structure gradually increases in a direction away from the upper bottom surface of the trapezoidal structure.

11. The display panel according to claim 1, characterized in that: The first planar layer further includes: The shading dam is arranged between adjacent trapezoidal structures.

12. A display device, characterized in that: include: A display panel as claimed in any one of claims 1 to 11.

Images