Display panel, preparation method thereof and display device

By setting partition openings and partitions in the pixel definition layer of the OLED display panel, the problem of horizontal crosstalk between pixels is solved, and better display effect and power consumption reduction are achieved.

CN119947429APending Publication Date: 2025-05-06BEIJING VISIONOX TECHNOLOGY CO LTD +1

Patent Information

Application Number
CN202510120830.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-24
Publication Date
2025-05-06

AI Technical Summary

Technical Problem

The horizontal crosstalk between pixels in the OLED display panel causes the display effect to be affected.

Method used

A partition opening is provided in the pixel definition layer. The partition part is located in the partition opening. The part surface facing away from the substrate and the part side wall corresponding to the partition opening of the pixel definition layer encloses a first groove, so that the functional film layer is disconnected at the partition part to avoid the generation of lateral current between pixels.

Benefits of technology

Effectively block lateral current between adjacent pixels, eliminate lateral crosstalk, reduce power consumption, and improve display effect.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a display panel, a preparation method thereof and a display device. The display panel comprises a substrate; the pixel definition layer is located on one side of the substrate, the pixel definition layer comprises a plurality of pixel openings and partition openings, and the partition openings are located between the adjacent pixel openings; the partition part is located in the partition opening, a first groove is defined by the partial surface, away from the substrate, of the partition part and the partial side wall, corresponding to the partition opening, of the pixel definition layer, the first groove is sunken towards the substrate, and the partial side wall of the first groove is sunken towards the pixel definition layer. The functional film layers located in the adjacent pixel openings are disconnected at the partition parts, so that the generation of transverse current between pixels is avoided; the first groove enables part of the functional film layer to be continuous at the partition part, and power consumption is prevented from being increased. According to the technical scheme, transverse current between adjacent pixels can be prevented, so that transverse crosstalk between the adjacent pixels is eliminated, power consumption can be reduced, and the display effect can be improved.
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Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a method for preparing the same, and a display device. Background Art

[0002] The preparation process of organic light emitting diode (OLED) generally includes evaporation process. OLED includes multiple film layers, some of which are formed by fine metal mask (FMM), and some are formed by common metal mask (CMM). Therefore, the continuous functional film layers included in OLED will generate lateral current between adjacent pixels, resulting in lateral crosstalk between pixels, thus affecting the display effect of the screen. Summary of the invention

[0003] In view of this, the embodiments of the present application are directed to providing a display panel and a method for manufacturing the same, and a display device, so as to solve the problem that lateral crosstalk between pixels affects the display effect.

[0004] In a first aspect, the present application provides a display panel, comprising: a substrate; a pixel definition layer, located on one side of the substrate, the pixel definition layer comprising a plurality of pixel openings and a partition opening, the partition opening being located between adjacent pixel openings; a partition portion, located within the partition opening, a portion of the surface of the partition portion facing away from the substrate and a portion of the side wall of the pixel definition layer corresponding to the partition opening enclosing a first groove, the first groove being recessed toward the substrate, and a portion of the side wall of the first groove being recessed toward the pixel definition layer.

[0005] In one embodiment, along a direction perpendicular to the plane where the substrate is located and away from the substrate, the partition opening includes a first hole area and a second hole area arranged adjacent to each other, and the orthographic projection of the first hole area on the substrate covers at least a portion of the orthographic projection of the second hole area on the substrate; preferably, the side wall of the partition opening includes a first sub-side wall and a second sub-side wall arranged adjacent to each other along a direction away from the substrate, the first sub-side wall encloses the first hole area, and the second sub-side wall encloses the second hole area; preferably, in the direction away from the substrate, the aperture of the second hole area gradually increases, and the aperture of the first hole area remains unchanged; preferably, the orthographic projection of the minimum cross-section of the second hole area on the substrate is located within the orthographic projection of the first hole area on the substrate, and the orthographic projection of the maximum cross-section of the second hole area on the substrate covers the orthographic projection of the first hole area on the substrate; preferably, the partition portion includes a second groove, and the opening of the second groove is located on the surface of the partition portion facing away from the substrate; the orthographic projection of the boundary line of the first bottom wall and the second sub-side wall on the substrate is located within the orthographic projection range of the second groove on the substrate.

[0006] In one embodiment, the display panel also includes a light-emitting device, at least part of which is located in the pixel opening, the light-emitting device includes an organic functional layer, part of which is located on the side of the pixel definition layer and the partition portion away from the substrate, and the organic functional layer is disconnected at the first groove.

[0007] In one embodiment, the light-emitting device further comprises a first electrode layer, the first electrode layer is located on the side of the organic functional layer facing away from the substrate, and the first electrode layer is continuous at the first groove; preferably, the light-emitting device further comprises a second electrode layer, located on the side of the organic functional layer close to the substrate; the second electrode layer and the partition portion are arranged in the same layer, and in a direction perpendicular to the substrate, the thickness of the partition portion is greater than the thickness of the second electrode layer; preferably, the thickness of the partition portion is greater than or equal to 0.5 and less than or equal to 1.5 microns.

[0008] In one embodiment, the partition portion is strip-shaped; preferably, in the direction in which the pixel opening extends, the length of the partition portion adjacent to the pixel opening is greater than the length of the pixel opening; preferably, the material of the partition portion includes one or more of silicon nitride, silicon oxide, and silicon oxynitride.

[0009] In one embodiment, the partition portion is mesh-shaped, and the pixel opening is located in the mesh holes of the partition portion; preferably, the partition portion includes an insulating portion and a conductive portion adjacently arranged in a direction parallel to the substrate, and the conductive portion is located between the insulating portion and the pixel definition layer; at the first groove, the conductive portion contacts the first electrode layer; preferably, the material of the conductive portion includes one or more metals selected from molybdenum, aluminum, titanium, and silver; preferably, the material of the conductive portion includes one or two metal oxides selected from indium tin oxide and indium zinc oxide; preferably, the material of the insulating portion includes one or more selected from silicon nitride, silicon oxide, and silicon oxynitride.

[0010] In one embodiment, in a direction perpendicular to the substrate, the depth of the second groove is greater than or equal to 100 angstroms and less than or equal to 5000 angstroms; preferably, in a direction parallel to the substrate, the distance between the orthographic projection of the boundary line of the side wall of the second groove and the bottom wall of the second groove on the substrate and the orthographic projection of the boundary line of the first bottom wall and the second sub-side wall on the substrate is greater than or equal to 0.02 microns and less than or equal to 2 microns.

[0011] The second aspect of the present application provides a method for preparing a display panel, comprising: preparing a partition portion on one side of a substrate, the substrate comprising a second electrode layer, the partition portion and the second electrode layer are arranged in the same layer, the second electrode layer comprises a plurality of second electrodes, and the partition portion is located between adjacent second electrodes; preparing a pixel definition material layer on the side of the partition portion away from the substrate; patterning the pixel definition material layer to form a plurality of pixel openings and partition openings to obtain a pixel definition layer, the pixel openings exposing at least a portion of the second electrode, and the partition openings exposing a portion of the partition portion; performing surface treatment on the partition portion in the partition opening to form a first groove, the first groove being formed by enclosing a portion of the surface of the partition portion away from the substrate and a portion of the side wall of the pixel definition layer corresponding to the partition opening.

[0012] In one embodiment, a partition portion is prepared on one side of a substrate, including: preparing an insulating material layer on one side of the substrate; patterning the insulating material layer to form an insulating portion; preparing a conductive material layer on one side of the substrate, the conductive material layer covering the insulating portion; patterning the conductive material layer to form a conductive portion, the conductive portion surrounding the side wall of the insulating portion.

[0013] A third aspect of the present application provides a display device, comprising the display panel mentioned in any of the above embodiments.

[0014] The technical solution provided by the present application is to set a plurality of partition openings in the pixel definition layer, which are located between adjacent pixel openings, and to set a partition part in the partition opening, so that the functional film layer located in the adjacent pixel openings is disconnected at the partition part, thereby avoiding the generation of lateral current between pixels. Furthermore, a first groove is enclosed by a part of the surface of the partition part away from the substrate and a part of the side wall of the pixel definition layer corresponding to the partition opening, the first groove is recessed toward the substrate, and a part of the side wall of the first groove is recessed toward the pixel definition layer, so that a part of the functional film layer located on the side of the pixel definition layer away from the substrate is continuous at the partition part. This arrangement avoids affecting the conductive properties of a part of the functional film layer located on the side of the pixel definition layer away from the substrate, and avoids increasing power consumption. In summary, the technical solution of the embodiment of the present application can prevent the lateral current between adjacent pixels, thereby eliminating the lateral crosstalk between adjacent pixels, and is conducive to reducing power consumption and improving display effects.

[0015] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present application, nor is it intended to limit the scope of the present application. Other features of the present application will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0017] Figure 1 Shown is a schematic structural diagram of a display panel provided in one embodiment of the present application.

[0018] Figure 2 FIG. 1 is a schematic structural diagram of the connection between a pixel definition layer and a partition portion provided in an embodiment of the present application.

[0019] Figure 3 FIG. 1 is a schematic structural diagram of the connection between a pixel definition layer and a partition portion provided by another embodiment of the present application.

[0020] Figure 4 Shown is a schematic structural diagram of a display panel provided in another embodiment of the present application.

[0021] Figure 5 Shown is a schematic structural diagram of a display panel provided in yet another embodiment of the present application.

[0022] Figure 6 FIG. 1 is a schematic plan view of a display panel provided in accordance with an embodiment of the present application.

[0023] Figure 7 Shown is a plan view of a display panel provided in another embodiment of the present application.

[0024] Figure 8 Shown is a schematic structural diagram of a display panel provided in yet another embodiment of the present application.

[0025] Fig. 9 FIG. 1 is a schematic diagram of a process for preparing a display panel provided in an embodiment of the present application.

[0026] Fig.10 Shown is a schematic flow chart of a method for preparing a partition portion provided in one embodiment of the present application.

[0027] Fig.11 FIG. 1 is a schematic flow chart of a method for preparing a display panel provided in another embodiment of the present application. DETAILED DESCRIPTION

[0028] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0029] Figure 1 FIG. 1 is a schematic diagram of the structure of a display panel provided in an embodiment of the present application. Figure 1 As shown, the display panel includes: a substrate 101; a pixel definition layer 102, which is located on one side of the substrate 101, and the pixel definition layer 102 includes a plurality of pixel openings 1021 and a partition opening 1022, and the partition opening 1022 is located between adjacent pixel openings 1021; a partition portion 103, which is located in the partition opening 1022, and a portion of the surface of the partition portion 103 facing away from the substrate 101 and a portion of the side wall of the pixel definition layer 102 corresponding to the partition opening 1022 enclose a first groove 1031, and the first groove 1031 is recessed toward the substrate 101, and a portion of the side wall of the first groove 1031 is recessed toward the pixel definition layer 102.

[0030] Specifically, the substrate 101 is used to carry the functional film layer in the display panel. The material of the substrate 101 may include glass or flexible organic materials. Photolithography or etching is performed on the pixel definition layer 102 to obtain a plurality of pixel openings 1021, and the pixel openings 1021 are used to define the position of the pixel and accurately control the shape and size of the pixel. A partition opening 1022 is formed between adjacent pixel openings 1021 to accommodate the partition part 103. The partition part 103 separates the film layer located in the adjacent pixel openings 1021 to prevent the charge in the film layer in the adjacent pixel openings 1021 from migrating, thereby improving the crosstalk between adjacent pixels. A first groove 1031 is enclosed by a portion of the surface of the partition part 103 away from the substrate 101 and a portion of the side wall of the pixel definition layer 102 corresponding to the partition opening 1022, and a portion of the side wall of the first groove 1031 is recessed toward the pixel definition layer 102, so that a portion of the film layer located on the side of the pixel definition layer 102 away from the substrate 101 is deposited in the first groove 1031. Part of the film layer is disconnected at the first groove 1031 , and the other part of the film layer is continuous on the bottom wall and the side wall of the first groove 1031 .

[0031] The technical solution of this embodiment is to set a plurality of partition openings 1022 in the pixel definition layer 102, which are located between adjacent pixel openings 1021, and to set a partition part 103 in the partition openings 1022, so that the functional film layer located in the adjacent pixel openings 1021 is disconnected at the partition part 103, thereby avoiding the generation of lateral current between pixels. Furthermore, a first groove 1031 is enclosed by a part of the surface of the partition part 103 away from the substrate 101 and a part of the side wall of the pixel definition layer 102 corresponding to the partition opening 1022, and a part of the side wall of the first groove 1031 is recessed toward the pixel definition layer 102, so that a part of the functional film layer located on the side of the pixel definition layer 102 away from the substrate 101 is continuous at the partition part 103. This arrangement avoids affecting the conductive properties of a part of the functional film layer located on the side of the pixel definition layer 102 away from the substrate 101, and avoids increasing power consumption. In summary, the technical solution of this embodiment can prevent the lateral current between adjacent pixels, thereby eliminating the lateral crosstalk between adjacent pixels, and is conducive to reducing power consumption and improving display effects.

[0032] Figure 2 The figure is a schematic diagram of the structure of the connection between the pixel definition layer and the partition part provided by an embodiment of the present application. Figure 3 FIG. 2 is a schematic diagram showing a structure of a connection between a pixel definition layer and a partition portion provided by another embodiment of the present application. Figure 2 and Figure 3, along a direction perpendicular to the plane where the substrate 101 is located and away from the substrate 101, the isolated opening 1022 includes a first hole area 1032 and a second hole area 1033 arranged adjacent to each other, and the orthographic projection of the first hole area 1032 on the substrate 101 covers at least a portion of the orthographic projection of the second hole area 1033 on the substrate 101; preferably, the side wall of the isolated opening 1022 includes a first sub-side wall 1023 and a second sub-side wall 1025 arranged adjacent to each other along a direction away from the substrate 101, the first sub-side wall 1023 encloses the first hole area 1032, the second sub-side wall 1025 encloses the second hole area 1033, and the boundary line between the first sub-side wall 1023 and the first bottom wall 1024 is located at a boundary line between the first bottom wall 1024 and the second sub-side wall 1025 close to the pixel definition layer 102. side; preferably, in the direction away from the substrate 101, the aperture of the second hole area 1033 gradually increases, and the aperture of the first hole area 1032 remains unchanged; preferably, the orthographic projection of the minimum cross-section of the second hole area 1033 on the substrate 101 is located within the orthographic projection of the first hole area 1032 on the substrate 101, and the orthographic projection of the maximum cross-section of the second hole area 1033 on the substrate 101 covers the orthographic projection of the first hole area 1032 on the substrate 101; preferably, the partition portion 103 includes a second groove 1034, and the opening of the second groove 1034 is located on the surface of the partition portion 103 away from the substrate 101; the orthographic projection of the boundary line of the first bottom wall 1024 and the second sub-side wall 1025 on the substrate 101 is located within the range of the orthographic projection of the second groove 1034 on the substrate 101.

[0033] Specifically, see Figure 2, along a direction perpendicular to the plane of the substrate 101 and away from the substrate 101, a first hole area 1032 is enclosed by the first sub-side wall 1023 separating the opening 1022, and a second hole area 1033 is enclosed by the second sub-side wall 1025 separating the opening 1022. Exemplarily, in a direction away from the substrate 101, the aperture of the second hole area 1033 gradually increases. Furthermore, the boundary line between the first sub-side wall 1023 and the first bottom wall 1024 is located at the side of the boundary line between the first bottom wall 1024 and the second sub-side wall 1025 close to the pixel definition layer 102, that is, the boundary line between the first bottom wall 1024 and the second sub-side wall 1025 is recessed into the partition opening 1022 relative to the boundary line between the first sub-side wall 1023 and the first bottom wall 1024, so that the size of the first hole area 1032 is larger than the size of the minimum aperture of the second hole area 1033, and the orthographic projection of the first hole area 1032 on the substrate 101 at least partially covers the orthographic projection of the second hole area 1033 on the substrate 101. Therefore, the surface of the partition portion 103 facing away from the substrate 101 and the first sub-side wall 1023, the first bottom wall 1024 and the second sub-side wall 1025 of the partition opening 1022 together form a first groove 1031, and its side wall forms an inscribed structure. The inscribed structure of the first groove 1031 enables a portion of the film layer located on the side of the pixel definition layer away from the substrate 101 to be disconnected at the first groove 1031 , thereby further isolating a portion of the film layer of adjacent pixels and eliminating lateral crosstalk between adjacent pixels.

[0034] See also Figure 3 , the partitioning portion 103 includes a second groove 1034, and the orthographic projection of the boundary line of the first bottom wall 1024 and the second sub-side wall 1025 on the substrate 101 is located within the orthographic projection range of the second groove 1034 on the substrate 101, that is, the boundary line of the first bottom wall 1024 and the second sub-side wall 1025 is recessed into the partition opening 1022 relative to the side wall of the second groove 1034, and the side wall of the second groove 1034 and the part of the first bottom wall 1024 and the second sub-side wall 1025 of the partition opening 1022 together form an inscribed structure. The part of the film layer located on the side of the pixel definition layer away from the substrate 101 is disconnected at the second groove 1034, thereby further isolating the part of the film layer of the adjacent pixels and eliminating the lateral crosstalk between the adjacent pixels.

[0035] In this embodiment, the side walls of the partition opening 1022 are used to enclose a first hole area 1032 and a second hole area 1033 of different sizes, forming an inscribed structure in the first groove 1031; a second groove 1034 is set in the partition portion 103 to form an inscribed structure with part of the side walls of the partition opening 1022, which can further isolate part of the film layer of adjacent pixels and eliminate lateral crosstalk between adjacent pixels, which is further beneficial to improving the display effect.

[0036] Figure 4FIG. 1 is a schematic diagram of the structure of a display panel provided by another embodiment of the present application. Figure 4 As shown, the display panel also includes a light-emitting device, at least part of which is located in the pixel opening 1021, and the light-emitting device includes an organic functional layer 104, part of which is located on the side of the pixel definition layer 102 and the partition portion 103 away from the substrate 101, and the organic functional layer 104 is disconnected at the first groove 1031.

[0037] Specifically, the display panel includes a light-emitting device, and one or more light-emitting devices constitute a pixel. The light-emitting device includes an organic functional layer 104, which is usually composed of a series of organic compound films. Exemplarily, the organic functional layer 104 may include a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer. The organic functional layer 104 can be obtained using an evaporation process. They are precisely deposited on various parts of the light-emitting device. When current passes through these layers, electrons and holes meet and recombine in the light-emitting layer, thereby generating visible light to form an image on the display panel. The organic functional layer 104 is arranged on the side of the pixel definition layer 102 away from the substrate 101, part of the organic functional layer 104 is located on the side of the pixel definition layer 102 and the partition portion 103 away from the substrate 101, and part of the organic functional layer 104 is located in the pixel opening 1021. At the partition opening 1022, the inscribed structure of the first groove 1031 allows part of the organic functional layer 104 to fall into the first groove 1031 and contact the bottom wall of the first groove 1031 (i.e., the surface of the partition portion 103 facing away from the substrate 101), and the remaining part of the organic functional layer 104 is located on the side wall of the first groove 1031. Therefore, there is a step difference between the organic functional layer 104 located on the side wall of the first groove 1031 and the organic functional layer 104 located on the bottom wall of the first groove 1031, so that the organic functional layer 104 is disconnected at the first groove 1031, thereby further isolating adjacent pixels and eliminating lateral crosstalk between adjacent pixels.

[0038] In this embodiment, the organic functional layer 104 is disconnected at the first groove 1031 , which can further enhance the isolation between pixels and prevent electrical signal interference between adjacent pixels, thereby facilitating further improving the display effect.

[0039] Figure 5 FIG. 1 is a schematic diagram of the structure of a display panel provided by another embodiment of the present application. Figure 5As shown, the light-emitting device also includes a first electrode layer 105, which is located on the side of the organic functional layer 104 away from the substrate 101, and the first electrode layer 105 is continuous at the first groove 1031; preferably, the light-emitting device also includes a second electrode layer 106, which is located on the side of the organic functional layer 104 close to the substrate 101; the second electrode layer 106 and the partition portion 103 are arranged in the same layer, and in the direction perpendicular to the substrate 101, the thickness of the partition portion 103 is greater than the thickness of the second electrode layer 106; preferably, the thickness of the partition portion 103 is greater than or equal to 0.5 and less than or equal to 1.5 microns.

[0040] Specifically, a first electrode layer 105 is disposed on a side of the organic functional layer 104 facing away from the substrate 101, and at the first groove 1031, the first electrode layer 105 covers the surface of the organic functional layer 104 facing away from the substrate 101. Exemplarily, the first electrode layer 105 is a cathode. The first electrode layer 105 is continuous at the first groove 1031 to ensure the conductivity of the first electrode layer 105. A second electrode layer 106 is disposed on a side of the organic functional layer 104 close to the substrate 101, and forms a pair of electrodes with the first electrode layer 105 for applying a voltage to drive the organic functional layer 104. Exemplarily, the second electrode layer 106 is an anode.

[0041] See also Figure 5 , part of the second electrode layer 106 is located in the pixel opening 1021. In the direction perpendicular to the substrate 101, the thickness of the partition portion 103 is greater than the thickness of the second electrode layer 106, so that the second electrode layer 106 is disconnected at the partition portion 103. The thickness of the partition portion 103 is preferably limited to between 0.5 microns and 1.5 microns, so that adjacent pixels can be partitioned more accurately.

[0042] In this embodiment, the first electrode layer 105 is set to be continuous at the first groove 1031, which can provide better conductive effect, reduce voltage drop, and thus reduce power consumption; the thickness of the partition portion 103 is set to be greater than the thickness of the second electrode layer 106, which can further enhance the isolation between pixels, thereby helping to further improve the display effect.

[0043] Figure 6 FIG. 1 is a schematic plan view of a display panel provided by an embodiment of the present application. Figure 6 As shown, the partition portion 103 is strip-shaped; preferably, in the direction in which the pixel opening 1021 extends, the length of the partition portion 103 adjacent to the pixel opening 1021 is greater than the length of the pixel opening 1021; preferably, the material of the partition portion 103 includes one or more of silicon nitride, silicon oxide, and silicon oxynitride.

[0044] Specifically, the partition portion 103 is strip-shaped. In some embodiments, any two partition portions 103 do not contact each other. In the direction in which the pixel opening 1021 extends, if the length of the partition portion 103 adjacent to the pixel opening 1021 is greater than the length of the pixel opening 1021, then the partition portion 103 is wider or longer than the pixel opening 1021 in a certain direction, and the partition effect is better. Exemplarily, the material of the partition portion 103 includes one or more of silicon nitride, silicon oxide, and silicon oxynitride. These materials generally have good insulation and chemical stability, which is conducive to improving the partition effect.

[0045] In this embodiment, by setting the partition portion 103 to be strip-shaped and in the direction in which the pixel opening 1021 extends, the length of the partition portion 103 adjacent to the pixel opening 1021 is greater than the length of the pixel opening 1021, thereby further enhancing the partition effect between pixels and eliminating lateral crosstalk between adjacent pixels, thereby facilitating further improving the display effect.

[0046] Figure 7 FIG. 1 is a schematic plan view of a display panel provided by another embodiment of the present application. Figure 8 FIG. 2 is a schematic diagram of the structure of a display panel provided by another embodiment of the present application. Figure 7 and Figure 8 The partition portion 103 is mesh-shaped, and the pixel opening 1021 is located in the mesh of the partition portion 103; preferably, the partition portion 103 includes an insulating portion 1035 and a conductive portion 1036 adjacently arranged in a direction parallel to the substrate 101, and the conductive portion 1036 is located between the insulating portion 1035 and the pixel definition layer 102; at the first groove 1031, the conductive portion 1036 is in contact with the first electrode layer 105; preferably, the material of the conductive portion 1036 includes one or more metals selected from molybdenum, aluminum, titanium, and silver; preferably, the material of the conductive portion 1036 includes one or two metal oxides selected from indium tin oxide and indium zinc oxide; preferably, the material of the insulating portion 1035 includes one or more of silicon nitride, silicon oxide, and silicon oxynitride.

[0047] Specifically, see Figure 7 , a plurality of partitioning parts 103 intersect to form a mesh structure, and the pixel opening 1021 is located in the mesh of the partitioning part 103, thereby isolating the pixel. Figure 8, the partition portion 103 includes an insulating portion 1035, and the insulating portion 1035 isolates the organic functional layer 104 and the second electrode layer 106. The partition portion 103 also includes a conductive portion 1036 distributed between the insulating portion 1035 and the pixel definition layer 102. At the first groove 1031, the conductive portion 1036 contacts the first electrode layer 105 to improve the conductivity of the first electrode layer 105. In some embodiments, each conductive portion 1036 is connected to a negative power supply voltage to form an auxiliary cathode, further reducing the voltage drop of the cathode. In other embodiments, the conductive portion 1036 forms a mesh structure and is connected to the negative power supply voltage at the edge area of ​​the display panel, further reducing the voltage drop of the cathode and reducing power consumption.

[0048] Exemplarily, the material of the conductive part 1036 includes metals such as molybdenum, aluminum, titanium, and silver, and metal oxides such as indium tin oxide and indium zinc oxide, which have good electrical conductivity and optical properties. The material of the insulating part 1035 includes silicon nitride, silicon oxide, silicon oxynitride, etc., which have good insulation and chemical stability, and are conducive to improving the isolation effect of the insulating part 1035.

[0049] In this embodiment, the partitioning portion 103 is set to be mesh-shaped, and the partitioning portion 103 includes an insulating portion 1035 and a conductive portion 1036, and the conductive portion 1036 is in contact with the first electrode layer 105, so that the conductive performance of the first electrode layer 105 is enhanced while the adjacent pixels are partitioned. This arrangement further enhances the partitioning effect between pixels, eliminates the lateral crosstalk between adjacent pixels, and reduces the voltage drop of the cathode, thereby reducing power consumption, which is conducive to further improving the display effect.

[0050] In one embodiment, in a direction perpendicular to the substrate 101, the depth of the second groove 1034 is greater than or equal to 100 angstroms and less than or equal to 5000 angstroms; preferably, in a direction parallel to the substrate 101, the distance between the orthographic projection of the boundary line of the side wall of the second groove 1034 and the bottom wall of the second groove 1034 on the substrate 101 and the orthographic projection of the boundary line of the first bottom wall 1024 and the second sub-side wall 1025 on the substrate 101 is greater than or equal to 0.02 microns and less than or equal to 2 microns.

[0051] Specifically, in a direction perpendicular to the substrate 101, the depth of the second groove 1034 is defined to be between 100 angstroms and 5000 angstroms, so that there is a step difference between the organic functional layer 104 falling into the bottom of the first groove 1031 and the organic functional layer 104 located on the side wall of the first groove 1031, so that the organic functional layer 104 is disconnected at the first groove 1031. In a direction parallel to the substrate 101, the distance between the orthographic projection of the boundary line of the side wall of the second groove 1034 and the bottom wall of the second groove 1034 on the substrate 101 and the orthographic projection of the boundary line of the first bottom wall 1024 and the second sub-side wall 1025 on the substrate 101 is between 0.02 microns and 2 microns, ensuring the reliability of the isolation of the organic functional layer 104. Exemplarily, the distance between the orthographic projection of the boundary line of the side wall of the second groove 1034 and the bottom wall of the second groove 1034 on the substrate 101 and the orthographic projection of the boundary line of the first bottom wall 1024 and the second sub-side wall 1025 on the substrate 101 can be set to 0.02 microns, 0.05 microns, 0.1 microns or 1 micron, etc.

[0052] In this embodiment, by limiting the size of the second groove 1034 , it is beneficial to achieve accurate isolation of the organic functional layer 104 , thereby further reducing the lateral current between adjacent pixels and eliminating the lateral crosstalk between adjacent pixels.

[0053] Fig. 9 FIG. 1 is a schematic diagram of a method for preparing a display panel according to an embodiment of the present application, and the method is suitable for preparing a display panel. Fig. 9 As shown, the method includes:

[0054] S110, preparing a partition portion on one side of a substrate, the substrate comprising a second electrode layer, the partition portion and the second electrode layer are arranged in the same layer, the second electrode layer comprises a plurality of second electrodes, and the partition portion is located between adjacent second electrodes.

[0055] Specifically, a partition is prepared between adjacent second electrodes, and the partition and the second electrode are located in the same layer to achieve the isolation of adjacent second electrodes. Exemplarily, the second electrode is an anode. Exemplarily, the material of the partition includes silicon nitride, silicon oxide or silicon oxynitride.

[0056] S120, preparing a pixel definition material layer on a side of the partition portion facing away from the substrate.

[0057] Specifically, a pixel definition material layer is prepared on the side of the partition portion facing away from the substrate, and the pixel definition material layer covers the surface of the partition portion and the second electrode facing away from the substrate. Exemplarily, the material of the pixel definition material layer includes polyimide.

[0058] S130, patterning the pixel definition material layer to form a plurality of pixel openings and isolation openings to obtain a pixel definition layer, wherein the pixel openings expose at least a portion of the second electrode, and the isolation openings expose a portion of the isolation portion.

[0059] Specifically, a plurality of pixel openings and partition openings are formed by etching the pixel definition material layer using a photolithography process to form a pixel definition layer. The pixel openings expose at least a portion of the second electrode to define the position and shape of the pixel. The partition openings are located between adjacent pixel openings, and the partition openings expose a portion of the partitioning portion to partition adjacent pixels.

[0060] S140, performing surface treatment on the partition portion in the partition opening to form a first groove, wherein the first groove is formed by a portion of the surface of the partition portion facing away from the substrate and a portion of the side wall of the pixel definition layer corresponding to the partition opening.

[0061] Specifically, the partition part in the partition opening is surface treated by plasma bombardment or dry etching, and a portion of the surface of the partition part facing away from the substrate is removed, and a first groove is formed by enclosing a portion of the surface of the partition part facing away from the substrate and a portion of the side wall of the pixel definition layer corresponding to the partition opening. The first groove is recessed toward the pixel definition layer, so that a portion of the film layer located on the side of the pixel definition layer facing away from the substrate is deposited in the first groove.

[0062] The technical solution of this embodiment is to prepare a partition part on one side of the substrate, and to prepare a pixel definition material layer on the side of the partition part away from the substrate, so as to form a plurality of pixel openings and partition openings. The partition openings expose part of the partition part, so that the adjacent second electrodes are disconnected at the partition part, thereby avoiding the generation of lateral current between pixels. The partition part in the partition opening is surface treated, and a first groove is enclosed by using the part of the surface of the partition part away from the substrate and the part of the side wall of the pixel definition layer corresponding to the partition opening. The first groove is recessed toward the pixel definition layer, so that part of the functional film layer located on the side of the pixel definition layer away from the substrate is continuous at the partition part. This arrangement avoids affecting the conductive properties of part of the functional film layer located on the side of the pixel definition layer away from the substrate, and avoids increasing power consumption. In summary, the technical solution of this embodiment can prevent the lateral current between adjacent pixels, thereby eliminating the lateral crosstalk between adjacent pixels, and is conducive to reducing power consumption and improving display effects.

[0063] Fig.10 FIG. 1 is a schematic flow chart of a method for preparing a partition portion provided in an embodiment of the present application, and the method is suitable for preparing a partition portion. Fig.10 As shown, the method includes:

[0064] S210, preparing an insulating material layer on one side of the substrate.

[0065] Exemplarily, the material of the insulating material layer includes silicon nitride, silicon oxide, silicon oxynitride, or the like.

[0066] S220, patterning the insulating material layer to form an insulating portion.

[0067] Specifically, the insulating material layer is patterned to form an insulating portion located between adjacent second electrodes. The insulating portion has good insulating performance and separates adjacent second electrodes.

[0068] S230, preparing a conductive material layer on one side of the substrate, wherein the conductive material layer covers the insulating portion.

[0069] Exemplarily, the material of the conductive material layer includes metals such as molybdenum, aluminum, titanium, silver, and metal oxides such as indium tin oxide and indium zinc oxide. These materials have good electrical conductivity and optical properties.

[0070] S240, patterning the conductive material layer to form a conductive portion, wherein the conductive portion surrounds a side wall of the insulating portion.

[0071] Specifically, the conductive material layer is patterned to form a conductive portion, which surrounds the side wall of the insulating portion and together with the insulating portion constitutes a partition portion. In some embodiments, each conductive portion is connected to a negative power supply voltage to form an auxiliary cathode, further reducing the voltage drop of the cathode. In other embodiments, the conductive portion forms a mesh structure and is connected to the negative power supply voltage at the edge area of ​​the display panel, further reducing the voltage drop of the cathode and reducing power consumption.

[0072] In this embodiment, the insulating part and the conductive part are separately prepared to form a partition part, and the conductive part is in contact with the conductive film layer located on the side of the partition part away from the substrate while isolating adjacent pixels. This arrangement further enhances the partition effect between pixels, eliminates lateral crosstalk between adjacent pixels, and reduces voltage drop, thereby reducing power consumption, which is conducive to further improving the display effect.

[0073] Fig.11 FIG. 1 is a schematic flow chart of a method for preparing a display panel provided by another embodiment of the present application, and the method is applicable to preparing a display panel. Fig.11 As shown, after surface treatment is performed on the partition portion in the partition opening to form a first groove, the method includes:

[0074] S310, preparing an organic functional layer on the side of the pixel definition layer facing away from the substrate, and the organic functional layer is disconnected at the first groove.

[0075] Specifically, an organic functional layer is prepared on the side of the pixel definition layer facing away from the substrate by an evaporation process. Exemplarily, the organic functional layer may include a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer. At the partition opening, the inscribed structure of the first groove allows part of the organic functional layer to fall into the first groove and contact the bottom wall of the first groove (i.e., the surface of the partition portion facing away from the substrate), and the remaining part of the organic functional layer is located on the side wall of the first groove. Therefore, there is a step difference between the organic functional layer located on the side wall of the first groove and the organic functional layer located on the bottom wall of the first groove, so that the organic functional layer is disconnected at the first groove.

[0076] S320, preparing a first electrode layer on the side of the organic functional layer facing away from the substrate, the first electrode layer being continuous on the sidewall and the bottom wall of the first groove, and the first electrode layer comprising a first electrode.

[0077] Specifically, a first electrode layer is prepared on the side of the organic functional layer away from the substrate by using an evaporation process. Exemplarily, the first electrode is a cathode. The first electrode layer is continuous at the first groove to ensure the conductivity of the first electrode.

[0078] S330, preparing a packaging layer on a side of the first electrode layer facing away from the substrate.

[0079] Specifically, the encapsulation layer may include a stack of alternating inorganic material layers and organic material layers, and the encapsulation layer is used to protect the display panel and increase the service life of the display panel.

[0080] In this embodiment, the organic functional layer is disconnected at the first groove, which further enhances the isolation between pixels; the first electrode layer is continuous at the first groove, which can provide better conductivity, reduce voltage drop, and thus reduce power consumption, which is beneficial to further improve the display effect.

[0081] An embodiment of the present application also provides a display device, which includes a display panel as mentioned in any of the above embodiments, and has the beneficial effects of the display panel mentioned in the above embodiments. Its technical principles and effects are similar and will not be repeated here.

[0082] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps recorded in this application can be executed in parallel, sequentially or in different orders, as long as the expected results of the technical solution of this application can be achieved, and this document is not limited here.

[0083] The above specific implementations do not constitute a limitation on the protection scope of this application. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of this application should be included in the protection scope of this application.

Claims

1. A display panel, characterized in that: include: substrate; A pixel definition layer, located on one side of the substrate, the pixel definition layer comprises a plurality of pixel openings and a partition opening, the partition opening being located between adjacent pixel openings; The partition portion is located in the partition opening, and the partial surface of the partition portion facing away from the substrate and the partial side wall of the pixel definition layer corresponding to the partition opening enclose a first groove, the first groove is recessed toward the substrate, and part of the side wall of the first groove is recessed toward the pixel definition layer.

2. The display panel according to claim 1, characterized in that: Along a direction perpendicular to the plane where the substrate is located and away from the substrate, the isolation opening includes a first hole area and a second hole area that are adjacently arranged, and the orthographic projection of the first hole area on the substrate covers at least a portion of the orthographic projection of the second hole area on the substrate; Preferably, the side wall of the partition opening comprises a first sub-side wall and a second sub-side wall adjacently arranged in a direction away from the substrate, the first sub-side wall and the second sub-side wall are connected through a first bottom wall of the pixel definition layer toward a side of the partition portion away from the substrate, the first sub-side wall encloses the first hole area, and the second sub-side wall encloses the second hole area; Preferably, in a direction away from the substrate, the aperture of the second hole region gradually increases, and the aperture of the first hole region remains unchanged; Preferably, the orthographic projection of the minimum cross section of the second hole area on the substrate is located within the orthographic projection of the first hole area on the substrate, and the orthographic projection of the maximum cross section of the second hole area on the substrate covers the orthographic projection of the first hole area on the substrate; Preferably, the partition portion includes a second groove, the opening of which is located on the surface of the partition portion facing away from the substrate; and the orthographic projection of the boundary line of the first bottom wall and the second sub-side wall on the substrate is within the orthographic projection range of the second groove on the substrate.

3. The display panel according to claim 1, characterized in that: It also includes a light-emitting device, at least part of which is located in the pixel opening, and the light-emitting device includes an organic functional layer, part of which is located on the side of the pixel definition layer and the partition portion away from the substrate, and the organic functional layer is disconnected at the first groove.

4. The display panel according to claim 3, characterized in that: The light emitting device further comprises a first electrode layer, the first electrode layer is located on a side of the organic functional layer away from the substrate, and the first electrode layer is continuous at the first groove; Preferably, the light emitting device further comprises a second electrode layer, which is located on a side of the organic functional layer close to the substrate; the second electrode layer and the partition portion are arranged in the same layer, and in a direction perpendicular to the substrate, the thickness of the partition portion is greater than the thickness of the second electrode layer; Preferably, the thickness of the partition portion is greater than or equal to 0.5 micrometers and less than or equal to 1.5 micrometers.

5. The display panel according to claim 4, characterized in that: The partition part is in strip shape; Preferably, in the direction in which the pixel opening extends, the length of the partition portion adjacent to the pixel opening is greater than the length of the pixel opening; Preferably, the material of the partition portion includes one or more of silicon nitride, silicon oxide, and silicon oxynitride.

6. The display panel according to claim 4, characterized in that: The partition part is mesh-shaped, and the pixel opening is located in the mesh of the partition part; Preferably, the partition portion includes an insulating portion and a conductive portion adjacently arranged in a direction parallel to the substrate, the conductive portion is located between the insulating portion and the pixel definition layer; at the first groove, the conductive portion is in contact with the first electrode layer; Preferably, the material of the conductive part includes one or more metals selected from the group consisting of molybdenum, aluminum, titanium and silver; Preferably, the material of the conductive part includes one or two metal oxides selected from the group consisting of indium tin oxide and indium zinc oxide; Preferably, the material of the insulating portion includes one or more of silicon nitride, silicon oxide, and silicon oxynitride.

7. The display panel according to claim 2, characterized in that: In a direction perpendicular to the substrate, a depth of the second groove is greater than or equal to 100 angstroms and less than or equal to 5000 angstroms; Preferably, in a direction parallel to the substrate, the distance between the orthographic projection of the boundary line of the side wall of the second groove and the bottom wall of the second groove on the substrate and the orthographic projection of the boundary line of the first bottom wall and the second sub-side wall on the substrate is greater than or equal to 0.02 microns and less than or equal to 2 microns.

8. A method for preparing a display panel, characterized in that: include: A partition portion is prepared on one side of a substrate, the substrate includes a second electrode layer, the partition portion and the second electrode layer are arranged in the same layer, the second electrode layer includes a plurality of second electrodes, and the partition portion is located between adjacent second electrodes; Prepare a pixel definition material layer on a side of the partition portion away from the substrate; Patterning the pixel definition material layer to form a plurality of pixel openings and partition openings to obtain a pixel definition layer, wherein the pixel openings expose at least a portion of the second electrode, and the partition openings expose a portion of the partition portion; The partition portion in the partition opening is subjected to surface treatment to form a first groove, wherein the first groove is formed by a portion of the surface of the partition portion facing away from the substrate and a portion of the side wall of the pixel definition layer corresponding to the partition opening.

9. The method for preparing a display panel according to claim 8, characterized in that: The step of preparing a partition portion on one side of the substrate comprises: preparing an insulating material layer on one side of the substrate; Patterning the insulating material layer to form an insulating portion; Prepare a conductive material layer on one side of the substrate, wherein the conductive material layer covers the insulating portion; The conductive material layer is patterned to form a conductive portion, wherein the conductive portion surrounds a side wall of the insulating portion.

10. A display device, characterized in that: include: A display panel as claimed in any one of claims 1 to 7.

Citation Information

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