Composite metal oxide thin film transistor, preparation method and application

Abstract

The invention discloses a composite metal oxide thin film transistor, a preparation method and application, an active layer of the metal oxide thin film transistor comprises a threshold negative drift metal oxide active layer and a threshold positive drift metal oxide active layer, and the two oxides are arranged in parallel and connected in parallel. According to the invention, the problem caused by threshold drift of the thin film transistor due to stress is improved. The invention provides a scheme which is controllable in cost, simple in process and easy for industrial production for the design of the driving circuit of the flexible display equipment.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to a composite metal oxide thin film transistor, a preparation method and an application thereof. Background Art

[0002] Flexible electronics refers to the emerging electronic technology that makes organic / inorganic materials on flexible / ductile substrates. It has attracted extensive attention from the scientific and industrial communities due to its great flexibility and adaptability to the working environment. Flexible electronics involves a high degree of cross-integration of multiple disciplines such as materials science, electronics, and biology, and has a wide range of applications. It is an indispensable technology in emerging products such as wearable devices, flexible displays, medical sensors, and smart textiles, and has broad application prospects. In recent years, the market size of flexible display devices has continued to expand, and the demand for bendable display screens has become increasingly strong.

[0003] In flexible display devices, the pixel driving circuit is the most critical component, which generates different driving currents through different driving signals to control the screen brightness. However, when bent and stretched, mechanical stress can cause the threshold voltage of the transistor to drift, resulting in unstable driving current and uneven light emission. Summary of the invention

[0004] Purpose of the invention: In order to solve the problems existing in the above-mentioned prior art, the present invention discloses a composite metal oxide thin film transistor, a preparation method and an application.

[0005] Technical solution: The present invention provides a composite metal oxide thin film transistor, the active layer of which includes a threshold negative drift metal oxide active layer and a threshold positive drift metal oxide active layer, and the two oxides are arranged in parallel and connected in parallel.

[0006] Furthermore, the width-to-length ratio of the threshold negative-shift metal oxide active layer is 3:1; and the width-to-length ratio of the threshold positive-shift metal oxide active layer is 1:1.

[0007] Furthermore, the active layer includes an IGZO active layer and an ITO active layer.

[0008] A method for preparing a composite metal oxide thin film transistor comprises the following steps:

[0009] Step 1: preparing a substrate and growing a dielectric layer on the substrate;

[0010] Step 2: preparing a gate electrode layer: generating a patterned photoresist on the dielectric layer, then forming a metal layer by a magnetron sputtering process, and finally obtaining a patterned gate electrode layer by a lift-off process;

[0011] Step 3: preparing a gate dielectric layer: covering the gate electrode layer with a gate dielectric layer;

[0012] Step 4: preparing an active layer: generating a patterned photoresist on the surface of the gate dielectric layer, and forming two active layers arranged in parallel and connected in parallel by two magnetron sputtering processes;

[0013] Step 5: generating a patterned photoresist on the surface of the gate dielectric layer, and then removing the gate dielectric layer in the area not covered by the photoresist, thereby exposing the gate electrode layer;

[0014] Step 6: Prepare source and drain electrodes: Cover the active layer with a metal layer, generate a patterned photoresist on the metal layer, etch the metal layer with a metal etching solution, and obtain the source and drain after removing the resist, and the source and drain are in contact with the gate electrode layer exposed in step 5.

[0015] Furthermore, the dielectric layer is grown at 300° C. using PECVD technology, and the dielectric layer is made of silicon oxide.

[0016] Furthermore, in step 3, the gate dielectric layer is prepared by using PECVD technology, and the gate dielectric layer is made of silicon dioxide with a thickness of 100 nm.

[0017] Furthermore, in step 5, an ICP dry etching process is used to remove the gate dielectric layer in the area not covered by the photoresist.

[0018] Furthermore, in step 6, a direct current sputtering process is used to cover the metal layer on the active layer.

[0019] A pixel driving circuit of a composite metal oxide thin film transistor comprises a switch module and a driving module connected to each other; the driving module comprises a composite metal oxide thin film transistor and a light emitting component, the gate of the composite metal oxide thin film transistor is connected to the switch module, the source is grounded, and the drain is connected to the light emitting component.

[0020] Furthermore, the switch module includes a transistor and a capacitor; the drain of the transistor is connected to the data signal V data Connection, gate connection switch signal V scan , the source is connected to one end of the capacitor, and the other end of the capacitor is connected to the driving module.

[0021] Beneficial effects: Based on the complementary threshold drift characteristics of metal oxide thin film transistors with different active layers under the same stress, the present invention prepares stress-insensitive metal oxide thin film transistors by connecting active layers in parallel, thereby improving the problem of threshold drift of thin film transistors caused by stress. The problem of current instability caused by threshold drift of transistors under bending stress is solved. A cost-controlled, simple process, and easy industrial production solution is provided for the design of driving circuits for flexible display devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 FIG. 4 is a schematic diagram of a high stress stabilization circuit according to the present embodiment.

[0023] Figure 2 is a cross-sectional view of a second metal oxide thin film transistor structure of this embodiment;

[0024] Figure 3 is a top view of the second metal oxide thin film transistor structure of this embodiment;

[0025] Figure 4 is a flow chart of a method for preparing a second metal oxide thin film transistor device according to this embodiment;

[0026] Figure 5 FIG. 4 is a diagram showing the effect of the high stress stabilization circuit of this embodiment. DETAILED DESCRIPTION

[0027] The accompanying drawings, which constitute a part of the present invention, are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute improper limitations on the present invention.

[0028] Figure 1 The high stress stability circuit is composed of metal oxide thin film transistors, including: a switch module, a high stress stability driving module. The switch module includes a transistor M1 and a capacitor C1; wherein: the drain of the transistor M1 is connected to the data input terminal V data Connect the gate to the switch signal V scan The source is connected to the upper plate of capacitor C1, and the lower plate of capacitor C1 is grounded GND.

[0029] The high stress stable driving module includes a metal oxide thin film transistor P1 and a light emitting diode LED, wherein: the drain of the metal oxide thin film transistor is connected to the cathode of the light emitting diode LED, the gate is connected to the upper plate of the capacitor C1, and the source is grounded GND. The anode of the light emitting diode LED is connected to the power supply V DD The equivalent circuit of P1 is as follows Figure 1 As shown, it includes D1 and M2; the switch module is used to control the data signal V dataWhen the gate M1 of the transistor receives the switch signal to a high level, the transistor M1 is turned on and the data signal V data The voltage flows from the drain of M1 to the source and is stored on C1 by charging the capacitor C1. When the gate of M1 receives the low level of the switch signal, the receiving is turned off. At this time, C1 maintains the gate voltage of the metal oxide thin film transistor of the driving tube and waits for the next data input.

[0030] The driving module is used to provide a stable current. When the transistor is subjected to bending stress, its threshold value drifts. In this embodiment, the threshold value of the thin film transistor D1 of the metal oxide thin film transistor P1 drifts negatively when subjected to bending stress, and its drift value is recorded as △V1 (△V1<0); the threshold value of the thin film transistor M2 drifts positively when subjected to bending stress, and its drift value is recorded as △V2 (△V2>0). According to the formula:

[0031] Id=K(V gs -V th ) 2

[0032] Where K = 1 / 2 μC ox W / L. μ is the mobility of the metal oxide thin film transistor, V gs is the voltage difference between the gate and drain of the metal oxide thin film transistor, V th is the threshold value of the metal oxide thin film transistor, C ox is the gate oxide layer capacitance of the metal oxide thin film transistor. Taking into account the change in threshold, the currents provided by the thin film transistor D1 and the thin film transistor M2 are respectively:

[0033] I D1 =K1(V gs -V th1 +△V1) 2

[0034] I M2 =K2(V gs -V th2 +△V2) 2

[0035] Then the change in current generated by the D1 thin film transistor and the M2 thin film transistor under the change in threshold value is:

[0036]

[0037]

[0038] In this embodiment, ΔV1≈-ΔV2, and the ratio of the current changes of the D1 thin film transistor and the M2 thin film transistor can be expressed as:

[0039]

[0040] In this embodiment, 2μ1=μ2, the threshold offset range varies with the degree of bending, and it can be considered that the range of |△V| is between 0 and 0.5. Considering the total current on the driving module and the current matching of the two active layers, the width-to-length ratios of the active layer represented by the D1 thin film transistor and the active layer represented by the M2 thin film transistor are respectively: Then we can get That is, the metal oxide thin film transistor prepared by connecting two different active layers in parallel can achieve the effect of current complementation, thereby solving the problem of current instability caused by threshold drift under bending stress.

[0041] The plan view of the metal oxide thin film transistor structure of this embodiment is as follows Figure 2 As shown, the top view is Figure 3 As shown, it includes a substrate 110 , a gate electrode layer 120 , a gate dielectric layer 130 , parallel-layered metal oxide active layers 140 and 142 , a source electrode 150 and a drain electrode 152 .

[0042] The flow chart of the method for preparing the metal oxide thin film transistor of the present embodiment is as follows: Figure 4 As shown:

[0043] S10, obtaining a substrate.

[0044] The substrate is a rigid substrate (e.g., glass) or a flexible substrate (e.g., PI). In this embodiment, the substrate is a flexible substrate, such as a PET / PI substrate. The substrate is ultrasonically cleaned for five minutes at a power of 100 W in the order of deionized water, acetone, anhydrous ethanol, and deionized water to obtain a substrate for subsequent operations.

[0045] S20, forming a buffer layer on the substrate.

[0046] The buffer layer is a single layer of silicon oxide or silicon nitride, or a stacked combination thereof. In this embodiment, the buffer layer is 500 nm silicon oxide grown by PECVD at 300 degrees Celsius.

[0047] S30, forming a gate electrode layer on the buffer layer.

[0048] By performing photoresist coating, photolithography, drying, exposure and development on the surface of the buffer layer, a patterned photoresist is obtained, a photoresist stripper is used to treat the residual glue that may exist in the pattern area, a titanium / molybdenum metal layer is formed on the buffer layer by a magnetron sputtering process, and a patterned gate electrode layer is further obtained by a lift-off process. In this embodiment, the thickness of the prepared gate electrode layer is 100nm.

[0049] S40, forming a gate dielectric layer on the gate electrode layer.

[0050] In this embodiment, a gate dielectric layer is covered on the gate electrode layer by a PECVD process, and the gate dielectric layer is made of silicon dioxide. In this embodiment, the thickness of the prepared gate dielectric layer is 100 nm.

[0051] S50, forming a parallel metal oxide active layer on the gate dielectric layer.

[0052] In this embodiment, a patterned photoresist is obtained by performing photolithography, drying, exposure and development processes on the surface of the gate dielectric layer, and a stripper is used to process residual glue that may exist in the graphic area. Two radio frequency magnetron sputtering processes are used to form two parallel active layers of 40nm IGZO and 4nm ITO arranged in parallel on the gate dielectric layer of the second metal oxide thin film transistor (P1) (the two parallel active layers satisfy the complementary threshold drift trends under the same stress, including but not limited to IGZO, ITO, IZO, etc.).

[0053] S60, forming a through hole on the gate dielectric layer.

[0054] By performing coating, photolithography, drying, exposure and development on the surface of the gate dielectric layer, a patterned photoresist is obtained, and the gate dielectric layer in the area not covered by the photoresist is removed by ICP dry etching, so that the gate electrode layer that needs to contact the source and drain electrodes is exposed. In this embodiment, ion beam dry etching or hydrofluoric acid (HF) solution can also be used for wet etching.

[0055] S70, forming a source electrode and a drain electrode on the metal oxide active layer.

[0056] A molybdenum metal layer is covered on the surface of the metal oxide active layer by a DC sputtering process, and a patterned photoresist is obtained on the surface of the molybdenum metal layer through photolithography, drying, exposure and development. The molybdenum metal layer is etched with a mixed acid metal etching solution, and a source and a drain can be formed after a de-germing process.

[0057] At the end of step S70, the parallel active layer metal oxide thin film transistor is prepared.

[0058] Figure 5 is a current compensation effect diagram of an embodiment of the present invention, |△V th |=0 represents the current diagram of the 2T1C circuit when the threshold drift is 0 without bending, |△V th|=0.5 represents the current diagram of the 2T1C circuit under bending stress when the threshold drift is 0.5. It can be seen that the current offset rate in both cases does not exceed 1%, thus achieving the effect of current stability.

[0059] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the present invention will not further describe various possible combinations.

Claims

1. A composite metal oxide thin film transistor, characterized in that: The active layer of the metal oxide thin film transistor comprises a threshold negative drift metal oxide active layer and a threshold positive drift metal oxide active layer, and the two oxides are arranged in parallel and connected in parallel.

2. The composite metal oxide thin film transistor according to claim 1, characterized in that: The width-to-length ratio of the threshold negative drift metal oxide active layer is 3:1; the width-to-length ratio of the threshold positive drift metal oxide active layer is 1:

1.

3. The composite metal oxide thin film transistor according to claim 1, characterized in that: The active layer includes an IGZO active layer and an ITO active layer.

4. A method for preparing a composite metal oxide thin film transistor according to claim 1, characterized in that: The specific steps include: Step 1: preparing a substrate and growing a dielectric layer on the substrate; Step 2: preparing a gate electrode layer: generating a patterned photoresist on the dielectric layer, then forming a metal layer by a magnetron sputtering process, and finally obtaining a patterned gate electrode layer by a lift-off process; Step 3: preparing a gate dielectric layer: covering the gate electrode layer with a gate dielectric layer; Step 4: preparing an active layer: generating a patterned photoresist on the surface of the gate dielectric layer, and forming two active layers arranged in parallel and connected in parallel by two magnetron sputtering processes; Step 5: generating a patterned photoresist on the surface of the gate dielectric layer, and then removing the gate dielectric layer in the area not covered by the photoresist, thereby exposing the gate electrode layer; Step 6: Prepare source and drain electrodes: Cover the active layer with a metal layer, generate a patterned photoresist on the metal layer, etch the metal layer with a metal etching solution, and obtain the source and drain after removing the resist, and the source and drain are in contact with the gate electrode layer exposed in step 5.

5. The method for preparing a composite metal oxide thin film transistor according to claim 4, characterized in that: The dielectric layer is grown at 300° C. using PECVD technology, and the dielectric layer uses silicon oxide.

6. The method for preparing a composite metal oxide thin film transistor according to claim 4, characterized in that: In step 3, the gate dielectric layer is prepared by using PECVD technology. The gate dielectric layer is made of silicon dioxide and has a thickness of 100 nm.

7. The method for preparing a composite metal oxide thin film transistor according to claim 4, characterized in that: In step 5, an ICP dry etching process is used to remove the gate dielectric layer in the area not covered by the photoresist.

8. The method for preparing a composite metal oxide thin film transistor according to claim 4, characterized in that: In step 6, a direct current sputtering process is used to cover the metal layer on the active layer.

9. A pixel driving circuit using a composite metal oxide thin film transistor as claimed in claim 1, characterized in that: It comprises a switch module and a driving module connected to each other; the driving module comprises a composite metal oxide thin film transistor and a light emitting component, the gate of the composite metal oxide thin film transistor is connected to the switch module, the source is grounded, and the drain is connected to the light emitting component.

10. A pixel driving circuit according to claim 9, characterized in that: The switch module includes a transistor and a capacitor; the drain of the transistor is connected to the data signal V data Connection, gate connection switch signal V scan , the source is connected to one end of the capacitor, and the other end of the capacitor is connected to the driving module.

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