Display device and manufacturing method thereof

Abstract

The invention provides a display device and a manufacturing method thereof. The display device includes: a first substrate including an open portion; a pad portion disposed on the first substrate and exposed through the open portion; a second substrate disposed on the pad portion and including a first contact hole; a first connection line disposed on the second substrate and inserted in the first contact hole to be connected to the pad portion; a second connection line disposed in a layer between the second substrate and the first connection line and connected to the first connection line; the pixel circuit is electrically connected with the second connecting line; a driver board inserted in the open portion of the first substrate and including a base member disposed at a lower portion of the pad portion and having a side surface tapering from an upper surface, and a lead extending along a lower surface and the side surface of the base member; and a connection portion electrically connecting the pad portion and the lead.

Description

Technical Field

[0001] The present invention relates to a display device and a method for manufacturing the same. Background Art

[0002] With the development of the information society, the requirements for display devices for displaying images have increased in various forms. For example, display devices are suitable for various electronic devices such as smart phones, digital cameras, notebook computers, navigation and smart TVs. The display device can be a flat panel display device such as a liquid crystal display device (Liquid Crystal Display Device), a field emission display device (Field Emission Display Device), an organic light emitting display device (Organic Light Emitting Display Device), etc. In such a flat panel display device, the light emitting display device includes a light emitting element that enables each pixel of the display panel to emit light by itself, so that the image can be displayed even without a backlight unit that provides light to the display panel. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a display device and a manufacturing method thereof which can save manufacturing costs by including a driving board manufactured together with a display panel so as to omit an additional soft film or a flexible printed circuit board.

[0004] The technical problem to be solved by the present invention is to provide a display device and a manufacturing method thereof which can save manufacturing time and manufacturing cost by minimizing the area of ​​a non-display region and simplifying the manufacturing process.

[0005] The technical problems of the present invention are not limited to the technical problems mentioned above, and those skilled in the art can clearly understand other technical problems not mentioned through the following description.

[0006] In order to solve the technical problem, a display device according to one embodiment includes: a first substrate, including an open portion; a pad portion, arranged on the first substrate and exposed through the open portion; a second substrate, arranged on the pad portion and including a first contact hole; a first connecting line, arranged on the second substrate and inserted in the first contact hole to be connected to the pad portion; a second connecting line, arranged in a layer between the second substrate and the first connecting line, and connected to the first connecting line; a pixel circuit, electrically connected to the second connecting line; a driving board, inserted in the open portion of the first substrate, and including a base member and a lead, the base member is arranged at the lower part of the pad portion and has a side surface tapered from the upper surface, the lead extending along the lower surface and side surface of the base member; and a connecting portion, electrically connecting the pad portion and the lead.

[0007] The base member and the second substrate include the same material and are formed in the same process.

[0008] The display device may further include: a gate insulating layer, which is arranged on the second substrate and includes a second contact hole overlapping the first contact hole, and an interlayer insulating layer, which is arranged on the gate insulating layer and includes a third contact hole overlapping the first contact hole and the second contact hole; the first connecting line is inserted from the first contact hole to the third contact hole and contacts the pad portion.

[0009] The connection portion may be formed by sintering a conductive ink, a metal paste, or a metal-organic decomposition ink containing silver (Ag), copper (Cu), aluminum (Al), or chromium (Cr).

[0010] The driving board may also include: a barrier insulating layer, which is adhered to the lower surface of the pad portion through a bonding member, a gate insulating layer, which is arranged on the lower surface and side surfaces of the base member, and an interlayer insulating layer, which is arranged between the gate insulating layer and the lead; the lead and the first connecting line contain the same material and are formed in the same process.

[0011] The driving board may further include: a gate insulating layer, which is arranged on the lower surface and side surfaces of the base member, and an interlayer insulating layer, which is arranged between the gate insulating layer and the lead; the base member is attached to the lower surface of the pad portion by an adhesive member, and the lead and the first connecting line contain the same material and are formed in the same process.

[0012] The driving board may further include a barrier insulating layer attached to the lower surface of the pad portion through an adhesive member, the lead is directly arranged on the lower surface and side surfaces of the base member, and the lead and the first connecting line contain the same material and are formed in the same process.

[0013] The driving board may also include: a barrier insulating layer, which is adhered to the lower surface of the pad portion through a bonding member, a gate insulating layer, which is arranged on the lower surface and side surfaces of the base member, and an interlayer insulating layer, which is arranged between the gate insulating layer and the lead; the lead includes a first line layer and a second line layer, the first line layer, the second line layer and the first connecting line contain the same material and are formed in the same process, and the second line layer is arranged on the first line layer.

[0014] The driving board may further include: a barrier insulating layer adhered to the lower surface of the pad portion through a bonding member, and a gate insulating layer arranged on the lower surface and side surfaces of the base member; the lead and the second connecting line contain the same material and are formed in the same process.

[0015] The driving board may also include: a blocking insulating layer, which is adhered to the lower surface of the pad portion through a bonding member, an auxiliary line, which is a layer arranged between the blocking insulating layer and the base member, a gate insulating layer, which is arranged on the lower surface and side surfaces of the base member, and an interlayer insulating layer, which is a layer arranged between the gate insulating layer and the lead; the lead and the first connecting line contain the same material and are formed in the same process, and the lead is in contact with the auxiliary line.

[0016] The driving board may also include: a barrier insulating layer, which is adhered to the lower surface of the pad portion through a bonding member, a gate insulating layer, which is arranged on the lower surface and side surfaces of the base member, an auxiliary line, which is arranged on the gate insulating layer, and an interlayer insulating layer, which is arranged on the auxiliary line; the lead and the first connecting line contain the same material and are formed in the same process, and the auxiliary line and the second connecting line contain the same material and are formed in the same process.

[0017] The lead wire may be inserted into a contact hole provided in the interlayer insulating layer and contact the auxiliary line, and an end portion of the lead wire may be spaced apart from an end portion of the auxiliary line.

[0018] The display device may further include: a first through hole layer, arranged on the pixel circuit, a second through hole layer, arranged on the first through hole layer, a plurality of pixel electrodes, arranged on the second through hole layer, and a pixel definition film, for insulating the plurality of pixel electrodes. The driving board may further include a protective component, which is arranged on the lead and the interlayer insulating layer and contains the same substance as at least one of the first through hole layer, the second through hole layer and the pixel definition film and is formed in the same process.

[0019] The driving board may further include a partition wall disposed between the leads and made of the same material as the protection member and formed in the same process.

[0020] In order to solve the technical problem, a manufacturing method of a display device according to an embodiment includes: a step of preparing a first substrate; a step of forming a pad portion on the first substrate; a step of forming a second substrate including a first contact hole and a base member on the pad portion; a step of forming a first connecting line and a lead, the first connecting line is a connecting line arranged on the second substrate and inserted into the first contact hole, and the lead is a line arranged on the base member; a step of forming an opening portion of the first substrate and removing the first substrate for supporting the base member, the opening portion is formed by etching the lower portion of the first substrate and can expose the pad portion; a step of cutting along a cutting line between the first connecting line and the lead to separate a driving board, the driving board including the base member and the lead; a step of inserting the driving board into the opening portion so that the driving board is arranged on the lower surface of the pad portion; and a step of forming a connecting portion that electrically connects the lead and the pad portion of the driving board.

[0021] The manufacturing method of the display device may further include: a step of forming a blocking insulating layer on the first substrate, a step of forming a gate insulating layer on the second substrate and the base member, and a step of forming an interlayer insulating layer on the gate insulating layer; the step of separating the driving board includes: a step of separating the driving board including the blocking insulating layer, the base member, the gate insulating layer, the interlayer insulating layer and the lead.

[0022] The manufacturing method of the display device may further include: a step of forming a gate insulating layer on the second substrate and the base member, and a step of forming an interlayer insulating layer on the gate insulating layer; the step of separating the driving board includes: a step of separating the driving board including the base member, the gate insulating layer, the interlayer insulating layer and the lead.

[0023] The method for manufacturing a display device may further include the step of forming a blocking insulating layer on the first substrate, and the step of separating the driving board includes: the step of separating the driving board including the blocking insulating layer, the base member, and the lead wires.

[0024] The step of forming the lead may include: forming the lead including a first line layer and a second line layer, the first line layer being arranged on the base member, and the second line layer being arranged on the first line layer.

[0025] The step of separating the driving board may include the step of spacing the end of the lead wire apart from the cutting line.

[0026] Specific details of other embodiments are included in the detailed description and drawings.

[0027] (Effects of the Invention)

[0028] The display device and the manufacturing method thereof according to the embodiment include a driving board manufactured together with the display panel to save an additional soft film or a flexible printed circuit board, thereby saving manufacturing costs. In addition, the display device and the manufacturing method thereof according to the embodiment minimize the area of ​​the non-display region and simplify the manufacturing process, thereby saving manufacturing time and manufacturing costs.

[0029] The effects corresponding to the embodiments are not limited to the above-exemplified contents, and more effects are included in this specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 FIG. 1 is a top view showing a display device according to an embodiment.

[0031] Figure 2 is a cross-sectional view showing a display device according to an embodiment.

[0032] Figure 3 It is along Figure 1 An example of a cross-sectional view taken along line II'.

[0033] Figure 4 FIG. 1 is a bottom view showing a display device according to an embodiment.

[0034] Figure 5 FIG. 1 is a plan view showing a portion of a non-display area of ​​a display device according to an embodiment.

[0035] Figure 6 is a cross-sectional view showing a portion of a display device according to an embodiment.

[0036] Figure 7 FIG. 1 is a cross-sectional view showing a driving board of a display device according to an embodiment.

[0037] Figure 8 is a cross-sectional view showing a driving board of a display device according to another embodiment.

[0038] Fig. 9 is a cross-sectional view showing a driving board of a display device according to still another embodiment.

[0039] Fig.10 is a cross-sectional view showing a driving board of a display device according to still another embodiment.

[0040] Fig.11 is a cross-sectional view showing a driving board of a display device according to still another embodiment.

[0041] Fig.12 is a cross-sectional view showing a driving board of a display device according to still another embodiment.

[0042] Fig.13 is a cross-sectional view showing a driving board of a display device according to still another embodiment.

[0043] Figures 14 to 19 1 is a cross-sectional view showing a manufacturing process of a display device according to an embodiment.

[0044] Fig. 20 FIG. 1 is a top view showing an example of cutting lines of a display panel and a driving board in a manufacturing process of a display device according to an embodiment.

[0045] Fig.21 FIG. 1 is a top view showing another example of cutting lines of a display panel and a driving board in a manufacturing process of a display device according to an embodiment.

[0046] Fig. 22 FIG. 1 is a top view showing another example of cutting lines of a display panel and a driving board in a manufacturing process of a display device according to an embodiment.

[0047] Fig.23 The present invention is a top view showing another example of cutting lines of a display panel and a driving board in a manufacturing process of a display device according to an embodiment.

[0048] Description of Reference Numerals

[0049] 100: display panel; DSB: driver board; SUB1, SUB2: first and second substrates; BIL1, BIL2: first and second blocking insulating layers; SOP: open part; PAD: pad part; CWL1, CWL2: first and second connecting wires; EML: light emitting element layer; TFEL: encapsulation layer; LDL: lead; CTP: connecting part; DIC: display driver; SIC: scan driver DETAILED DESCRIPTION

[0050] The advantages, features and methods of implementing the present invention can be clearly understood by referring to the accompanying drawings and the embodiments described in detail below. However, the present invention is not limited to the embodiments disclosed below, but can be implemented in a variety of different ways. However, the embodiments are provided to fully disclose the present invention and to fully indicate the scope of the present invention to ordinary technicians in the technical field to which the present invention belongs. The present invention is only defined by the scope of the attached claims.

[0051] If an element or layer is described as being "on" another element or layer, it includes the case where it is directly disposed on another element or layer, or the case where another layer or element is interposed therebetween. Throughout the specification, the same reference numerals refer to the same constituent elements. The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for illustrating the embodiments are merely illustrative, and the present invention is not limited to the contents illustrated.

[0052] Although the terms first, second, etc. are used to describe a variety of components, these components are obviously not limited by these terms. These terms are used only to distinguish one component from another component. Thus, the first component mentioned below can obviously also be the second component within the technical concept of the present invention.

[0053] The various features of the various embodiments of the present invention may be partially or completely combined or combined with each other, and various linkages and drives may be technically realized. The various embodiments may be implemented independently of each other, or may be implemented together in an associated relationship.

[0054] Specific embodiments are described below with reference to the accompanying drawings.

[0055] Figure 1 FIG. 1 is a top view showing a display device according to an embodiment.

[0056] Reference Figure 1 The display device 10 can be applied to portable electronic devices such as mobile phones, smart phones, tablet personal computers, mobile communication terminals, electronic manuals, electronic books, portable multimedia players (PMP), navigation, ultra mobile PCs (UMPC), etc. As another example, the display device 10 can be applied as a display unit of a television, a notebook, a display, a billboard, or the Internet of Things (IOT). As another example, the display device 10 can be applied to wearable devices such as smart watches, watch phones, glasses-type displays, and head mounted displays (HMD).

[0057] The display device 10 may be configured in a planar shape similar to a quadrilateral. For example, the corner where the side in the X-axis direction and the side in the Y-axis direction of the display device 10 meet may be rounded or formed at a right angle in a manner having a prescribed curvature. The planar shape of the display device 10 is not limited to a quadrilateral, but may be formed in a shape similar to other polygons, a circle, or an ellipse.

[0058] The display device 10 may include a display area DA and a non-display area NDA. The display area DA may include a plurality of pixels to display an image. Each of the plurality of pixels may include: an organic light emitting diode (OLED) including an organic light emitting layer, a quantum dot light emitting element (Quantum DotLED) including a quantum dot light emitting layer, an inorganic light emitting diode (Inorganic LED) including an inorganic semiconductor, or an ultra-small light emitting diode (MicroLED). The following description will focus on the case where each of the plurality of pixels includes an organic light emitting diode, but is not limited thereto.

[0059] A plurality of pixels may be arranged along a plurality of rows and columns on the display area DA. Each of the plurality of pixels may include a light emitting area EA defined by a pixel definition film or a bank, and may emit light having a prescribed peak wavelength through the light emitting area EA. The light emitting area EA may be an area where light generated by a light emitting element of the display device 10 is released to the outside of the display device 10.

[0060] The display area DA of the display device 10 may include a light-shielding area BA surrounding the plurality of light-emitting areas EA. The light-shielding area BA may prevent light released from the light-emitting areas EA from mixing colors.

[0061] The non-display area NDA may be arranged around the display area DA and surround the display area DA, and may not display an image. The non-display area NDA may include a scan driver SIC that supplies a scan signal to the display area DA. The scan driver SIC may be arranged on the left and right sides of the non-display area NDA. The scan driver SIC may generate a scan signal based on a scan control signal. The scan control signal may include a start signal, a clock signal, and a power supply voltage, but is not limited thereto. The scan driver SIC may supply a scan signal to a scan line of the display area DA in a set order.

[0062] Figure 2 is a cross-sectional view showing a display device according to an embodiment.

[0063] Reference Figure 2The display panel 100 may include a display unit DU, a touch sensing unit TSU, and an optical member POL. The display unit DU may include a first substrate SUB1, a blocking insulating layer BIL, a second substrate SUB2, a transistor layer TRL, a light emitting element layer EML, and an encapsulation layer TFEL.

[0064] The first substrate SUB1 may support the display device 10. The first substrate SUB1 may be a base substrate or a base member. The first substrate SUB1 may be a flexible substrate that can be bent, folded, rolled, etc. For example, the first substrate SUB1 may include an insulating material such as a polymer resin such as polyimide (PI), but is not limited thereto. As another example, the first substrate SUB1 may be a rigid substrate including a glass material.

[0065] The blocking insulating layer BIL may be disposed on the first substrate SUB1. The blocking insulating layer BIL may include an inorganic film capable of preventing air or moisture from penetrating. For example, the blocking insulating layer BIL may include at least one of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, an aluminum oxide layer, and an amorphous silicon layer, but is not limited thereto.

[0066] The second substrate SUB2 may be disposed on the blocking insulating layer BIL. The second substrate SUB2 may be a base substrate or a base member. The second substrate SUB2 may be a flexible substrate that can be bent, folded, rolled, etc. For example, the second substrate SUB2 may include an insulating material such as a polymer resin such as polyimide (PI), but is not limited thereto.

[0067] The transistor layer TRL may be disposed on the second substrate SUB2. The transistor layer TRL may include a plurality of transistors for constituting a pixel circuit of a pixel. The transistor layer TRL may include a scan line, a data line, and a power line connected to the pixel. Each transistor may include a semiconductor region, a source electrode, a drain electrode, and a gate electrode. For example, in the case where the scan drive unit is formed on one side of the non-display area NDA of the display panel 100, the scan drive unit may include a transistor.

[0068] The transistor layer TRL may be disposed in the display area DA and the non-display area NDA. The transistors of each pixel of the transistor layer TRL, the scan lines, the data lines and the power lines may be disposed in the display area DA. The transistors of the scan driving unit SIC may be disposed in the non-display area NDA.

[0069] The light emitting element layer EML may be disposed on the transistor layer TRL. The light emitting element layer EML may include: a plurality of light emitting elements, which are sequentially stacked with a pixel electrode, a light emitting layer, and a common electrode and are used to emit light; and a pixel definition film, which is used to define a pixel. The plurality of light emitting elements of the light emitting element layer EML may be disposed in the display area DA.

[0070] For example, the light-emitting layer may be an organic light-emitting layer containing an organic substance. The light-emitting layer may include a hole transport layer, an organic light-emitting layer, and an electron transport layer. When the pixel electrode receives a specified voltage through the transistor of the transistor layer TRL, and the common electrode receives a cathode voltage, holes move to the organic light-emitting layer through the hole transport layer and electrons move to the organic light-emitting layer through the electron transport layer, thereby combining holes and electrons in the organic light-emitting layer to emit light. For example, the pixel electrode may be an anode electrode, and the common electrode may be a cathode electrode, but is not limited thereto.

[0071] As another example, the plurality of light emitting elements may include: a quantum dot light emitting diode including a quantum dot light emitting layer, an inorganic light emitting diode including an inorganic semiconductor, or an ultra-small light emitting diode.

[0072] The encapsulation layer TFEL may cover the upper surface and the side surface of the light emitting element layer EML to protect the light emitting element layer EML. The encapsulation layer TFEL may include at least one inorganic film and at least one organic film for encapsulating the light emitting element layer EML.

[0073] The touch sensing unit TSU may be disposed on the encapsulation layer TFEL. The touch sensing unit TSU may include: a plurality of touch electrodes that sense the user's touch in a capacitive manner; and a touch line that supplies a touch drive signal to the plurality of touch electrodes. For example, the touch sensing unit TSU may sense the user's touch in a mutual capacitance manner or a self-capacitance manner.

[0074] The plurality of touch electrodes of the touch sensing unit TSU may be disposed in a touch sensing area overlapping with the display area DA, and the touch lines of the touch sensing unit TSU may be disposed in a touch peripheral area overlapping with the non-display area NDA.

[0075] The optical component POL can be configured on the touch sensing unit TSU. The optical component POL can be attached to the touch sensing unit TSU using a transparent adhesive film (Optically Clear Adhesive, OCA film) or a transparent adhesive resin (Optically Clear Resin, OCR). For example, the optical component POL can include a linear polarizer and a phase delay film, and the phase delay film can be a λ / 4 wave plate (Quarter-Wave Plate). The phase delay film and the linear polarizer can be stacked on the touch sensing unit TSU in sequence. The optical component POL can reduce the reflected light caused by external light, thereby preventing color distortion caused by external light reflection.

[0076] The first substrate SUB1 may include an open portion SOP. The open portion SOP of the first substrate SUB1 may be etched from the lower surface of the first substrate SUB1 and penetrate to the upper surface of the first substrate SUB1. For example, the lower width of the open portion SOP may be greater than the upper width of the open portion SOP. During the manufacturing process of the display device 10, the pad portion provided on the blocking insulating layer BIL may be exposed through the open portion SOP of the first substrate SUB1. The pad portion may be electrically connected to the display driver DIC through a driver board DSB inserted into the open portion SOP.

[0077] The driving board DSB may be disposed at the lower portion of the first substrate SUB1. A portion of the driving board DSB may be inserted into the open portion SOP of the first substrate SUB1 and electrically connected to the pad portion. The driving board DSB may support the display driving portion DIC. The driving board DSB may transmit a signal and a voltage of the display driving portion DIC to the transistor layer TRL. The driving board DSB may supply a scan control signal to the scan driving portion SIC.

[0078] The display driver DIC may be mounted on the driver board DSB. The display driver DIC may be an integrated circuit (IC). The display driver DIC may convert digital video data into analog data voltages based on data control signals received from a timing control unit (not shown), and supply the data lines of the display area DA through the driver board DSB. The display driver DIC may supply the power supply voltage received from a power supply unit (not shown) to the power lines of the display area DA through the driver board DSB. The display device 10 includes a driver board DSB electrically connected to the pad portion in the open portion SOP of the first substrate SUB1, so that the area of ​​the non-display area NDA can be minimized.

[0079] Figure 3 It is along Figure 1 An example of a cross-sectional view taken along line II'.

[0080] Reference Figure 3 The display area DA of the display device 10 may include a plurality of light emitting areas EA. Each light emitting area EA may be an area that releases light generated in the light emitting element ED to the outside of the display device 10.

[0081] The display panel 100 may include a first substrate SUB1, a first blocking insulating layer BIL1, a second blocking insulating layer BIL2, a second substrate SUB2, a transistor layer TRL, a light emitting element layer EML, an encapsulation layer TFEL, a touch sensing part TSU, a planarization layer OC, and an optical member POL.

[0082] The first substrate SUB1 may support the display panel 100. The first substrate SUB1 may be a base substrate or a base member. The first substrate SUB1 may be a flexible substrate that can be bent, folded, rolled, etc. For example, the first substrate SUB1 may include an insulating material such as a polymer resin such as polyimide (PI), but is not limited thereto. As another example, the first substrate SUB1 may be a rigid substrate including a glass material.

[0083] The first blocking insulating layer BIL1 may be disposed on the first substrate SUB1. The first blocking insulating layer BIL1 may include an inorganic film capable of preventing air or moisture from penetrating. For example, the first blocking insulating layer BIL1 may include at least one of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, an aluminum oxide layer, and an amorphous silicon layer, but is not limited thereto.

[0084] The second barrier insulating layer BIL2 may be disposed on the first barrier insulating layer BIL1. The second barrier insulating layer BIL2 may include an inorganic film capable of preventing air or moisture from penetrating. For example, the second barrier insulating layer BIL2 may be formed into a double-layer structure including silicon oxide (SiOx) and amorphous silicon (a-Si). The second barrier insulating layer BIL2 includes amorphous silicon (a-Si) to increase the bonding force between the upper and lower layers to improve the peeling failure.

[0085] The second substrate SUB2 may be disposed on the second blocking insulating layer BIL2. The second substrate SUB2 may be a base substrate or a base member. The second substrate SUB2 may be a flexible substrate that can be bent, folded, rolled, etc. For example, the second substrate SUB2 may include an insulating material such as a polymer resin such as polyimide (PI), but is not limited thereto.

[0086] The transistor layer TRL may be disposed on the second substrate SUB2 and may include an active layer ACTL, a gate insulating layer GI, a gate layer GTL, an interlayer insulating layer ILD, a first source metal layer SDL1, a first via layer VIA1, a second source metal layer SDL2, and a second via layer VIA2.

[0087] The active layer ACTL may be disposed on the second substrate SUB2. The active layer ACTL may include a semiconductor region ACT, a drain electrode DE, and a source electrode SE of the transistor TR. The semiconductor region ACT may overlap with the gate electrode GE and be insulated from the gate electrode GE by the gate insulating layer GI. The drain electrode DE and the source electrode SE may be obtained by making the material of the semiconductor region ACT conductive. The transistor TR may constitute a pixel circuit of each pixel in a plurality of pixels.

[0088] The gate insulating layer GI may be disposed on the active layer ACTL. The gate insulating layer GI may insulate the semiconductor region ACT of the transistor TR from the gate electrode GE. The gate insulating layer GI may include a contact hole through which the connection electrode CNE penetrates.

[0089] The gate layer GTL may be disposed on the gate insulating layer GI. The gate layer GTL may include a gate electrode GE of the transistor TR. The gate electrode GE may overlap the semiconductor region ACT via the gate insulating layer GI. The gate electrode GE may receive a scan signal from a scan line. For example, the gate layer GTL may be formed as a single layer or multilayer structure including at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), silver (Ag), titanium (Ti), nickel (Ni), palladium (Pd), indium (In), neodymium (Nd), and copper (Cu).

[0090] The interlayer insulating layer ILD may be disposed on the gate layer GTL. The interlayer insulating layer ILD may insulate the gate layer GTL from the first source metal layer SDL1. The interlayer insulating layer ILD may include a contact hole through which the connection electrode CNE passes.

[0091] The first source metal layer SDL1 may be disposed on the interlayer insulating layer ILD. The first source metal layer SDL1 may include a connection electrode CNE. The connection electrode CNE may be inserted into a contact hole penetrating the interlayer insulating layer ILD and the gate insulating layer GI, and connected to the source electrode SE of the transistor TR. The connection electrode CNE may electrically connect the transistor TR to the anode connection electrode ANE. The connection electrode CNE may supply a driving current received from the pixel circuit to the light emitting element ED through the anode connection electrode ANE. For example, the first source metal layer SDL1 may be formed as a single layer or multilayer structure including at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), silver (Ag), titanium (Ti), nickel (Ni), palladium (Pd), indium (In), neodymium (Nd) and copper (Cu).

[0092] The first via layer VIA1 may be disposed on the first source metal layer SDL1. The first via layer VIA1 may planarize the upper end of the pixel circuit and protect the pixel circuit. The first via layer VIA1 may include an organic insulating material such as polyimide (PI). The first via layer VIA1 may include a contact hole through which the anode connection electrode ANE passes.

[0093] The second source metal layer SDL2 may be disposed on the first via layer VIA1. The second source metal layer SDL2 may include an anode connection electrode ANE, a data line DL, and a power line VL. The second source metal layer SDL2 may include the substances exemplified in the first source metal layer SDL1.

[0094] The anode connection electrode ANE may be inserted into a contact hole penetrating the first via layer VIA1 and connected to the connection electrode CNE. The anode connection electrode ANE may electrically connect the connection electrode CNE to the pixel electrode AE ​​of the light emitting element ED. The anode connection electrode ANE may supply a driving current received from the connection electrode CNE to the light emitting element ED.

[0095] The data line DL may extend along the Y-axis direction on the display area DA. The data line DL may be electrically connected to the transistor TR. The data line DL may supply a data voltage to the pixel circuit.

[0096] The power line VL may extend along the Y-axis direction on the display area DA. The power line VL may be electrically connected to the transistor TR or the light emitting element ED. For example, the power line VL may be a high potential line, a low potential line, an initialization voltage line, a reference voltage line, or a bias voltage line, but is not limited thereto.

[0097] The second via layer VIA2 may be disposed on the second source metal layer SDL2. The second via layer VIA2 may planarize the upper end of the transistor layer TRL. The second via layer VIA2 may include an organic insulating material such as polyimide (PI). The second via layer VIA2 may include a contact hole through which the pixel electrode AE ​​passes.

[0098] The light emitting element layer EML may be disposed on the transistor layer TRL. The light emitting element layer EML may include a light emitting element ED and a pixel definition layer PDL.

[0099] The light emitting element ED may be arranged in the light emitting area EA on the second through hole layer VIA2. The light emitting element ED of each pixel in the plurality of pixels may include a pixel electrode AE, a light emitting layer EL and a common electrode CE. The pixel electrode AE ​​may be arranged on the second through hole layer VIA2. The pixel electrode AE ​​may overlap with one of the plurality of light emitting areas EA defined by the pixel definition film PDL. For example, the pixel electrode AE ​​may receive a driving current from the pixel circuit through the anode connection electrode ANE and the connection electrode CNE.

[0100] The light-emitting layer EL may be disposed on the pixel electrode AE. For example, the light-emitting layer EL may be an organic light-emitting layer composed of an organic substance, but is not limited thereto. When the light-emitting layer EL corresponds to the organic light-emitting layer, when the pixel circuit of the pixel applies a prescribed voltage to the pixel electrode AE ​​and the common electrode CE receives a common voltage or a cathode voltage, holes may move to the light-emitting layer EL through the hole transport layer and electrons may move to the light-emitting layer EL through the electron transport layer, whereby holes and electrons may combine with each other on the light-emitting layer EL to release light.

[0101] The common electrode CE may be disposed on the light-emitting layer EL. For example, the common electrode CE may be implemented in the form of an electrode shared by all pixels, rather than being distinguished for each of the plurality of pixels. The common electrode CE may be disposed on the light-emitting layer EL of the plurality of light-emitting regions, and may be disposed on the pixel definition film PDL of the region other than the plurality of light-emitting regions.

[0102] The pixel definition film PDL may be disposed in the light shielding area BA on the second via layer VIA2. The pixel definition film PDL may define a plurality of light emitting areas EA or a plurality of opening areas. The pixel definition film PDL may separate and insulate the pixel electrodes AE of each pixel in the plurality of pixels.

[0103] The encapsulation layer TFEL may be disposed on the common electrode CE and cover the plurality of light emitting elements ED. The encapsulation layer TFEL may include at least one inorganic film to prevent oxygen or moisture from penetrating into the plurality of light emitting elements ED. The encapsulation layer TFEL may protect the plurality of light emitting elements ED from foreign matter such as dust by including at least one organic film.

[0104] The touch sensing unit TSU may be disposed on the encapsulation layer TFEL. The touch sensing unit TSU may include a bridge electrode BRG, a first insulating layer IL1, a touch electrode TE, and a second insulating layer IL2.

[0105] The bridge electrode BRG may be disposed on the encapsulation layer TFEL. The bridge electrode BRG may be disposed on a layer different from the touch electrodes TE, and electrically connect adjacent touch electrodes TE.

[0106] The first insulating layer IL1 may be disposed on the bridge electrode BRG. The first insulating layer IL1 may have insulating and optical properties. For example, the first insulating layer IL1 may be an inorganic film including at least one of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer. As another example, the first insulating layer IL1 may include an organic film.

[0107] The touch electrode TE may be arranged in the light shielding area BA on the first insulating layer IL1. The touch electrode TE may sense the user's touch in a capacitive manner. For example, the touch sensing unit TSU may sense the user's touch in a mutual capacitance (Mutual Capacitance) manner formed between a plurality of touch electrodes TE or a self-capacitance (Self-Capacitance) manner formed by each touch electrode in a plurality of touch electrodes TE. The touch electrode TE may be formed as a single-layer structure of molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), indium tin oxide (Indium Tin Oxide, ITO), or may be formed as a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and ITO (ITO / Al / ITO), an APC alloy, and a stacked structure of an APC alloy and ITO (ITO / APC / ITO).

[0108] The second insulating layer IL2 may be disposed on the touch electrode TE. The second insulating layer IL2 may have insulating and optical properties. The second insulating layer IL2 may be composed of the materials exemplified in the first insulating layer IL1.

[0109] The planarization layer OC may be disposed on the touch sensing unit TSU and may planarize the upper end of the touch sensing unit TSU. For example, the planarization layer OC may include an organic insulating material.

[0110] The optical component POL can be configured on the planarization layer OC. The optical component POL can be attached to the touch sensing unit TSU using a transparent adhesive film (Optically Clear Adhesive, OCA film) or a transparent adhesive resin (Optically Clear Resin, OCR). For example, the optical component POL may include a linear polarizer and a phase delay film, and the phase delay film may be a λ / 4 wave plate (Quarter-Wave Plate). The phase delay film and the linear polarizer may be stacked on the touch sensing unit TSU in sequence. The optical component POL can reduce the reflected light caused by external light, thereby preventing color distortion caused by external light reflection.

[0111] Figure 4 FIG. 1 is a bottom view showing a display device according to an embodiment.

[0112] Reference Figure 4 , the driving board DSB may be arranged at the lower part of the first substrate SUB1. The driving board DSB may be arranged at the edge of the lower surface of the display panel 100. The driving board DSB may be attached to the lower surface of the pad part PAD through an adhesive member. The lead line of the driving board DSB may be electrically connected to the pad part PAD through a connecting part. The pad part PAD may be arranged in the non-display area NDA, but is not limited thereto.

[0113] The display driving unit DIC may be mounted on the driving board DSB. The display driving unit DIC may be an integrated circuit (IC). The display driving unit DIC may convert digital video data into analog data voltages based on data control signals received from a timing control unit (not shown), and supply the data lines DL of the display area DA through the driving board DSB. The display driving unit DIC may supply the power supply voltage received from a power supply unit (not shown) to the power supply line VL of the display area DA through the driving board DSB. The display driving unit DIC may supply a scan control signal to the scan driving unit SIC through the driving board DSB. The display device 10 may minimize the area of ​​the non-display area NDA by including a pad unit PAD disposed on the first substrate SUB1, a driving board DSB disposed at the bottom of the first substrate SUB1, and a display driving unit DIC.

[0114] Figure 5 FIG. 1 is a plan view showing a portion of a non-display area of ​​a display device according to an embodiment.

[0115] Reference Figure 5, the non-display area NDA may include: a signal line SL, a high potential line VDL, a low potential line VSL, and a touch line TL. The signal line SL, the high potential line VDL, the low potential line VSL, and the touch line TL may extend from the pad area PDA to the display area DA. The signal line SL may be electrically connected to the data line DL and supply a data voltage, and may be electrically connected to the scan drive unit SIC and supply a scan control signal. The high potential line VDL may be electrically connected to the power line VL of the display area DA, thereby supplying a high potential voltage to the pixel circuit. The low potential line VSL may be electrically connected to the common electrode CE of the light emitting element ED and supply a low potential voltage. The touch line TL may be electrically connected to the touch electrode TE of the touch sensing unit TSU and supply a touch drive signal. The signal line SL, the high potential line VDL, the low potential line VSL, and the touch line TL may receive a signal or voltage from the drive board DSB configured at the lower portion of the display panel 100 through the pad portion PAD.

[0116] The non-display area NDA may further include an anti-static circuit ESD. The anti-static circuit ESD may overlap with the signal line SL and be electrically connected to the signal line SL. Thus, the anti-static circuit ESD may prevent static electricity flowing in from the outside from flowing to the display area DA through the signal line SL.

[0117] Figure 5 A solid line 101 indicates a boundary of the display panel 100 corresponding to one corner of the display panel 100 . Figure 5 A solid line 102 is an imaginary line indicating a boundary between the non-display area NDA and the display area DA of the display panel 100 . Figure 5 The solid line 103 is a line indicating the configuration boundary of the encapsulation layer TFEL of the display panel 100. Thus, the signal line SL, the high potential line VDL, and the low potential line VSL may extend toward the pad portion PAD along the non-display area NDA inside the configuration boundary of the encapsulation layer TFEL. The signal line SL, the high potential line VDL, and the low potential line VSL may not be configured outside the encapsulation layer TFEL.

[0118] Figure 6 is a cross-sectional view showing a portion of a display device according to an embodiment, Figure 7 1 is a cross-sectional view showing a driving board of a display device according to an embodiment.

[0119] Reference Figure 6 and Figure 7The display device 10 may include: a first substrate SUB1, a first blocking insulating layer BIL1, a pad portion PAD, a second blocking insulating layer BIL2, a second substrate SUB2, a transistor layer TRL, a light emitting element layer EML, an encapsulation layer TFEL, a dam portion DAM, an anti-static circuit ESD, a crack prevention portion CDM, a touch sensing portion TSU, a planarization layer OC, an optical member POL, a driving board DSB and a display driving portion DIC.

[0120] The pad portion PAD is arranged on the first blocking insulating layer BIL1 and can be inserted into the contact hole provided on the first blocking insulating layer BIL1. During the manufacturing process of the display device 10, the pad portion PAD can be exposed through the open portion SOP of the first substrate SUB1. The pad portion PAD can electrically connect the driving board DSB to the first connecting line CWL1. The pad portion PAD can be electrically connected to the lead LDL of the driving board DSB through the connecting portion CTP. The pad portion PAD can be formed into a single-layer or multi-layer structure including at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), silver (Ag), titanium (Ti), nickel (Ni), palladium (Pd), indium (In), neodymium (Nd) and copper (Cu).

[0121] The second blocking insulating layer BIL2 may be disposed on the pad portion PAD. The second blocking insulating layer BIL2 may be patterned to expose an upper surface of the pad portion PAD.

[0122] The second substrate SUB2 may include a first contact hole CNT1. The first contact hole CNT1 may be etched from the upper surface of the second substrate SUB2 and penetrate to the lower surface of the second substrate SUB2. The upper area of ​​the first contact hole CNT1 may be greater than the lower area of ​​the first contact hole CNT1. During the formation of the first contact hole CNT1, the upper surface of the pad portion PAD may be exposed.

[0123] The gate insulating layer GI may be disposed on the second substrate SUB2. The gate insulating layer GI may be inserted into the first contact hole CNT1 of the second substrate SUB2 and may include a second contact hole CNT2 overlapping the first contact hole CNT1. A portion of the gate insulating layer GI may cover a portion of the upper surface of the pad portion PAD exposed by the first contact hole CNT1. The area on the plane of the second contact hole CNT2 may be smaller than the area on the plane of the first contact hole CNT1.

[0124] The interlayer insulating layer ILD may be disposed on the gate insulating layer GI. The interlayer insulating layer ILD may include a third contact hole CNT3 inserted into the first contact hole CNT1 of the second substrate SUB2 and overlapping the first and second contact holes CNT1 and CNT2. A portion of the upper surface of the gate insulating layer GI adjacent to the second contact hole CNT2 may be exposed through the third contact hole CNT3. The area on the plane of the third contact hole CNT3 may be greater than the area on the plane of the second contact hole CNT2, and smaller than the area on the plane of the first contact hole CNT1.

[0125] The first connection line CWL1 may be disposed on the interlayer insulating layer ILD. The first connection line CWL1 may include the same material as the first source metal layer SDL1 of the display area DA and be formed in the same process. One end of the first connection line CWL1 may be sequentially inserted into the first contact hole CNT1, the third contact hole CNT3, and the second contact hole CNT2 and contact the upper surface of the pad portion PAD. The other end of the first connection line CWL1 may penetrate the interlayer insulating layer ILD and contact the second connection line CWL2. The first connection line CWL1 may electrically connect the pad portion PAD with the second connection line CWL2. The first connection line CWL1 may supply a data voltage or a power supply voltage received from the pad portion PAD to the second connection line CWL2.

[0126] The second connection line CWL2 may be disposed on the gate insulating layer GI. The second connection line CWL2 may include the same material as the gate layer GTL of the display area DA and be formed in the same process. The second connection line CWL2 may supply the data voltage received from the first connection line CWL1 to the data line DL, and supply the power voltage received from the first connection line CWL1 to the power line VL. For example, the second connection line CWL2 may be equivalent to Figure 5 signal line SL, or is electrically connected to the signal line SL.

[0127] The encapsulation layer TFEL may include first to third encapsulation layers TFE1 , TFE2 , TFE3 .

[0128] The first encapsulation layer TFE1 may be disposed on the light emitting element layer EML. The first encapsulation layer TFE1 may include an inorganic substance to prevent oxygen or moisture from penetrating into the light emitting element layer EML. The first encapsulation layer TFE1 may extend to the crack prevention portion CDM across the display area DA and the embankment DAM. For example, the first encapsulation layer TFE1 may include at least one of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, an aluminum oxide layer, and an amorphous silicon layer, but is not limited thereto.

[0129] The second encapsulation layer TFE2 may be disposed on the first encapsulation layer TFE1. The second encapsulation layer TFE2 may contain an organic substance to protect the light emitting element layer EML from foreign matter such as dust. The second encapsulation layer TFE2 may extend beyond the display area DA to the embankment DAM. The second encapsulation layer TFE2 may be formed by filling in the area surrounded by the embankment DAM. For example, the second encapsulation layer TFE2 may include an organic film such as an acrylic resin (Acryl Resin), an epoxy resin (Epoxy Resin), a phenolic resin (Phenolic Resin), a polyamide resin (Polyamide Resin), or a polyimide resin (Polyimide Resin). The second encapsulation layer TFE2 may be formed by hardening a monomer (Monomer) or coating a polymer (Polymer).

[0130] The third encapsulation layer TFE3 may be disposed on the second encapsulation layer TFE2. The third encapsulation layer TFE3 may contain an inorganic substance to prevent oxygen or moisture from penetrating into the light emitting element layer EML. The third encapsulation layer TFE3 may extend across the display area DA and the embankment DAM to the crack prevention portion CDM. The third encapsulation layer TFE3 may be disposed on the second encapsulation layer TFE2 on the inner side of the embankment DAM, and may be disposed on the first encapsulation layer TFE1 on the inner side of the crack prevention portion CDM. For example, the third encapsulation layer TFE3 may be composed of the substances exemplified in the first encapsulation layer TFE1.

[0131] The bank DAM may surround the display area DA, may include the same material as the pixel definition layer PDL and may be formed in the same process, and may have a predetermined height to prevent the second encapsulation layer TFE2 including an organic material from going over the bank DAM.

[0132] The anti-static circuit ESD may be disposed between the display area DA and the crack prevention portion CDM. The anti-static circuit ESD may include at least one transistor. The anti-static circuit ESD may be electrically connected to the second connection line CWL2. Thus, the anti-static circuit ESD may prevent static electricity flowing in from the outside from flowing into the display area DA through the second connection line CWL2.

[0133] The crack preventing portion CDM may surround the bank portion DAM. The crack preventing portion CDM may be disposed at the outermost periphery of the display panel 100 to prevent cracks from occurring in the display panel 100. The first and third encapsulation layers TFE1 and TFE3 and the planarization layer OC may be formed in a region surrounded by the crack preventing portion CDM.

[0134] The crack prevention part CDM may include first to third layers LAY1, LAY2, LAY3. The first layer LAY1 of the crack prevention part CDM may cover the upper surface of the first connection wire CWL1 inserted into the first to third contact holes CNT1, CNT2, CNT3. The first layer LAY1 may fill the step generated by the first contact hole CNT1 of the second substrate SUB2. The first layer LAY1 may include the same material as the first through hole layer VIA1 and be formed in the same process.

[0135] The second layer LAY2 of the crack prevention part CDM may be disposed on the first layer LAY1. The second layer LAY2 and the second via layer VIA2 may include the same material and be formed in the same process.

[0136] The third layer LAY3 of the crack prevention portion CDM may be disposed on the second layer LAY2. The third layer LAY3 may include the same material as the pixel definition layer PDL and may be formed in the same process.

[0137] The driving board DSB may be disposed at the lower portion of the first substrate SUB1. One side of the driving board DSB may be inserted into the opening portion SOP of the first substrate SUB1 and electrically connected to the pad portion PAD. The driving board DSB may be attached to the pad portion PAD and the lower surface of the first blocking insulating layer BIL1 by means of an adhesive member ADM. The driving board DSB may be manufactured by including a portion of the layer of the display panel 100 during the manufacturing process of the display panel 100. The driving board DSB may be separated from the display panel 100, turned upside down, and inserted into the opening portion SOP of the first substrate SUB1.

[0138] The driving board DSB may include a first blocking insulating layer BIL1, a second blocking insulating layer BIL2, a second substrate SUB2, a gate insulating layer GI, an interlayer insulating layer ILD, leads LDL, and a protection member PRT.

[0139] The first blocking insulating layer BIL1 of the driving board DSB may be attached to the pad portion PAD and the lower surface of the first blocking insulating layer BIL1 of the display panel 100 by an adhesive member ADM. The first blocking insulating layers BIL1 of the display panel 100 and the driving board DSB may include the same material and be formed in the same process.

[0140] The second blocking insulating layer BIL2 of the driving board DSB may be disposed on the first blocking insulating layer BIL1. The second blocking insulating layer BIL2 of the display panel 100 and the driving board DSB may include the same material and be formed in the same process.

[0141] The second substrate SUB2 of the driving board DSB may be arranged on the second blocking insulating layer BIL2. The second substrate SUB2 may be a base substrate or a base member of the driving board DSB. The second substrate SUB2 may include a side surface tapered from the upper surface. With the upper surface of the second substrate SUB2 as a reference, the inclination angle of the side surface of the second substrate SUB2 may be less than 80 degrees. For example, the angle between the upper surface of the second substrate SUB2 facing the second blocking insulating layer BIL2 and the side surface of the second substrate SUB2 facing the gate insulating layer GI may be 45 degrees to 80 degrees, but is not limited thereto. The second substrates SUB2 of the display panel 100 and the driving board DSB may each contain the same material and be formed in the same process.

[0142] The gate insulating layer GI of the driving board DSB may be disposed on the second substrate SUB2. The gate insulating layer GI may cover the lower surface and side surfaces of the second substrate SUB2. The gate insulating layers GI of the display panel 100 and the driving board DSB may include the same material and be formed in the same process.

[0143] The interlayer insulating layer ILD of the driving board DSB may be disposed on the gate insulating layer GI. The interlayer insulating layers ILD of the display panel 100 and the driving board DSB may include the same material and be formed in the same process.

[0144] The lead LDL may be disposed on the interlayer insulating layer ILD. The lead LDL may extend along the lower surface and the side surface of the interlayer insulating layer ILD. One end of the lead LDL may be connected to the bump electrode DLE of the display driving unit DIC, and the other end of the lead LDL may be connected to the connecting portion CTP. The lead LDL may electrically connect the bump electrode DLE of the display driving unit DIC and the pad portion PAD of the display panel 100. The lead LDL may include the same material as the first source metal layer SDL1 of the display panel 100 and be formed in the same process. For example, the lead LDL may have a stacked structure of titanium / aluminum / titanium (Ti / Al / Ti), but is not limited thereto.

[0145] The protective member PRT may be disposed on the lead LDL and the interlayer insulating layer ILD. The protective member PRT may be disposed at the bottom of the driving board DSB and protect the driving board DSB. The protective member PRT may prevent moisture penetration and inflow of external air. The protective member PRT may protect the connection portion CTP and the lead LDL not covered by the cover layer CRD. The protective member PRT may include the same material as the crack prevention portion CDM of the display panel 100 and may be formed in the same process.

[0146] The protection member PRT may include first to third layers LAY1, LAY2, and LAY3. The first layer LAY1 of the protection member PRT may be disposed on the lead LDL and the interlayer insulating layer ILD. The first layer LAY1 of the crack prevention part CDM and the protection member PRT may include the same material as the first via layer VIA1 and be formed in the same process.

[0147] The second layer LAY2 of the protection member PRT may be disposed on the first layer LAY1. The second layer LAY2 of the crack preventing portion CDM and the protection member PRT may include the same material as the second via layer VIA2 and may be formed in the same process.

[0148] The third layer LAY3 of the protection member PRT may be disposed on the second layer LAY2. The third layer LAY3 of each of the crack prevention portion CDM and the protection member PRT may include the same material as the pixel definition layer PDL and may be formed in the same process.

[0149] The display driving part DIC may be mounted on the driving board DSB. The bump electrode DLE of the display driving part DIC may be arranged on the lower surface of the second substrate SUB2. The bump electrode DLE of the display driving part DIC may be electrically connected to the pad part PAD through the lead LDL and the connection part CTP. The display driving part DIC may be an integrated circuit (IC). The display driving part DIC may convert the digital video data into an analog data voltage based on the data control signal received from the timing control part (not shown), and may be supplied to the data line DL of the display area DA through the driving board DSB and the pad part PAD. The display driving part DIC may supply the power supply voltage received from the power supply part (not shown) to the power line VL of the display area DA through the driving board DSB and the pad part PAD. The display device 10 includes a pad part PAD arranged on the first substrate SUB1, first and second connection lines CWL1, CWL2, and a driving board DSB and a display driving part DIC arranged at the lower part of the first substrate SUB1, so that the area of ​​the non-display area NDA can be minimized.

[0150] The connection portion CTP may cover the lead LDL exposed from the side of the driving board DSB. The connection portion CTP may contact the lead LDL disposed on the tapered side of the second substrate SUB2. The connection portion CTP may electrically connect the lead LDL and the pad portion PAD and protect the lead LDL.

[0151] For example, the connection part CTP can be formed by low temperature sintering of a conductive ink containing nanoparticles and a polymer. The nanoparticles may include metal particles of nano units such as silver (Ag), copper (Cu), aluminum (Al) or chromium (Cr), and the polymer may include acrylic resin or epoxy resin, but is not limited thereto. The conductive ink may include a polymer as a binder for connecting the metal particles, and the nanoparticles may be tightly agglomerated with each other through a sintering process. The connection part CTP may have conductivity by including sintered nanoparticles.

[0152] As another example, the connection portion CTP can be formed by low temperature sintering of metal organic decomposition ink (MOD Ink). The metal organic decomposition ink can contain liquid metal organic decomposition substances smaller than nanoparticles, and the liquid metal organic decomposition substances can be converted into metal substances through a sintering process. Thus, the connection portion CTP can have conductivity.

[0153] The connection part CTP can be formed by printing conductive ink or metal paste on the open part SOP of the first substrate SUB1 using a silicon pad, and then sintering using an intense pulsed light (IPL) or laser. During the sintering process, the metal particles in the connection part CTP are closely agglomerated due to the heat of the light pulse or laser, thereby reducing the specific resistance.

[0154] The cover layer CRD may be disposed on the connection portion CTP and protect the connection portion CTP. The cover layer CRD may include an organic film such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc. The cover layer CRD may be formed by hardening a monomer or coating a polymer.

[0155] The display device 10 includes a driving board DSB manufactured together with the display panel 100, thereby eliminating an additional soft film or a flexible printed circuit board, thereby saving manufacturing costs. The display device 10 electrically connects the lead LDL and the pad portion PAD through a connection portion CTP using a metal paste, rather than using ultrasonic bonding or thermocompression bonding, so that the manufacturing process is simplified, thereby saving manufacturing time and manufacturing costs.

[0156] Figure 8 is a cross-sectional view showing a driving board of a display device according to another embodiment. Figure 8 The driver board is from Figure 7 The driving board is obtained by omitting the first and second blocking insulating layers BIL1 and BIL2. For the structure that is the same as the aforementioned structure, the description will be briefly given or omitted.

[0157] Reference Figure 8 , the driving board DSB may include a second substrate SUB2, a gate insulating layer GI, an interlayer insulating layer ILD, leads LDL, and a protection member PRT.

[0158] The second substrate SUB2 of the driving board DSB may be directly attached to the bonding member ADM. The second substrate SUB2 may be attached to the pad portion PAD and the lower surface of the first blocking insulating layer BIL1 through the bonding member ADM. The second substrate SUB2 may be a base substrate or a base member of the driving board DSB. The second substrate SUB2 may include a side surface tapered from the upper surface.

[0159] The gate insulating layer GI of the driving board DSB may be disposed on the second substrate SUB2. The gate insulating layer GI may cover the lower surface and the side surface of the second substrate SUB2. The interlayer insulating layer ILD of the driving board DSB may be disposed on the gate insulating layer GI.

[0160] The lead LDL may be disposed on the interlayer insulating layer ILD. The lead LDL may extend along the lower surface and the side surface of the interlayer insulating layer ILD. The lead LDL may electrically connect the bump electrode DLE of the display driving unit DIC and the pad portion PAD of the display panel 100. The lead LDL may include the same material as the first source metal layer SDL1 of the display panel 100 and be formed in the same process. For example, the lead LDL may have a stacked structure of titanium / aluminum / titanium (Ti / Al / Ti), but is not limited thereto.

[0161] The protection member PRT may be disposed on the lead line LDL and the interlayer insulating layer ILD. The protection member PRT may be disposed at a lower portion of the driving board DSB and protect the driving board DSB.

[0162] Fig. 9 is a cross-sectional view showing a driving board of a display device according to still another embodiment. Fig. 9 The driver board is from Figure 8 The gate insulating layer GI and the interlayer insulating layer ILD are omitted in the driving board, and the structure that is the same as the aforementioned structure will be briefly described or omitted.

[0163] Reference Fig. 9 , the driving board DSB may include a second substrate SUB2 , leads LDL, and a protection member PRT.

[0164] The second substrate SUB2 of the driving board DSB may be attached to the pad portion PAD and the lower surface of the first blocking insulating layer BIL1 of the display panel 100 through an adhesive member ADM. The second substrate SUB2 may be a base substrate or a base member of the driving board DSB. The second substrate SUB2 may include a side surface tapered from the upper surface.

[0165] The lead LDL may be disposed on the second substrate SUB2. The lead LDL may extend along the lower surface and the side surface of the second substrate SUB2. The lead LDL may electrically connect the bump electrode DLE of the display driving unit DIC and the pad portion PAD of the display panel 100. The lead LDL may include the same material as the first source metal layer SDL1 of the display panel 100 and be formed in the same process. For example, the lead LDL may have a stacked structure of titanium / aluminum / titanium (Ti / Al / Ti), but is not limited thereto.

[0166] The protection member PRT may be disposed on the lead LDL and the second substrate SUB2. The protection member PRT may be disposed under the driving board DSB and protect the driving board DSB.

[0167] Fig.10 is a cross-sectional view showing a driving board of a display device according to still another embodiment. Fig.10 The driver board is in Figure 7 The driving board further includes a second line layer LDL2, and the structure that is the same as the aforementioned structure will be briefly described or omitted.

[0168] Reference Fig.10 , the driving board DSB may include a first blocking insulating layer BIL1, a second blocking insulating layer BIL2, a second substrate SUB2, a gate insulating layer GI, an interlayer insulating layer ILD, leads LDL, and a protection member PRT.

[0169] The first blocking insulating layer BIL1 of the driving board DSB may be attached to the pad portion PAD and the lower surface of the first blocking insulating layer BIL1 of the display panel 100 through an adhesive member ADM. The second blocking insulating layer BIL2 of the driving board DSB may be disposed on the first blocking insulating layer BIL1.

[0170] The second substrate SUB2 of the driving board DSB may be disposed on the second blocking insulating layer BIL2. The second substrate SUB2 may be a base substrate or a base member of the driving board DSB. The second substrate SUB2 may include a side surface tapered from an upper surface.

[0171] The gate insulating layer GI of the driving board DSB may be disposed on the second substrate SUB2. The gate insulating layer GI may cover the lower surface and the side surface of the second substrate SUB2. The interlayer insulating layer ILD of the driving board DSB may be disposed on the gate insulating layer GI.

[0172] The lead line LDL may be disposed on the interlayer insulating layer ILD. The lead line LDL may extend along the lower surface and the side surface of the interlayer insulating layer ILD. The lead line LDL may electrically connect the bump electrode DLE of the display driving part DIC and the pad part PAD of the display panel 100. The lead line LDL may include a first line layer LDL1 and a second line layer LDL2.

[0173] The first line layer LDL1 may be disposed on the interlayer insulating layer ILD. The first line layer LDL1 may include the same material as the first source metal layer SDL1 of the display panel 100 and may be formed in the same process.

[0174] The second line layer LDL2 may be disposed on the first line layer LDL1. For example, the second line layer LDL2 may include the same material as the second source metal layer SDL2 of the display panel 100 and may be formed in the same process. As another example, the second line layer LDL2 may include the same material as the metal layer on the second source metal layer SDL2 and may be formed in the same process. As another example, the second line layer LDL2 may include the same material as the pixel electrode AE ​​of the display panel 100 and may be formed in the same process.

[0175] The protection member PRT may be disposed on the second line layer LDL2 and the interlayer insulating layer ILD. The protection member PRT may be disposed at a lower portion of the driving board DSB and protect the driving board DSB.

[0176] Fig.11 is a cross-sectional view showing a driving board of a display device according to still another embodiment. Fig.11 The driver board is from Figure 7 The driving board is obtained by omitting the interlayer insulating layer ILD and changing the metal layer of the lead LDL. For the structure that is the same as the above-mentioned structure, the description will be briefly given or omitted.

[0177] Reference Fig.11 , the driving board DSB may include first and second barrier insulating layers BIL1 , BIL2 , a second substrate SUB2 , a gate insulating layer GI, leads LDL, and a protection member PRT.

[0178] The first blocking insulating layer BIL1 of the driving board DSB may be attached to the pad portion PAD and the lower surface of the first blocking insulating layer BIL1 of the display panel 100 through an adhesive member ADM. The second blocking insulating layer BIL2 of the driving board DSB may be disposed on the first blocking insulating layer BIL1.

[0179] The second substrate SUB2 of the driving board DSB may be disposed on the second blocking insulating layer BIL2. The second substrate SUB2 may be a base substrate or a base member of the driving board DSB. The second substrate SUB2 may include a side surface tapered from an upper surface.

[0180] The gate insulating layer GI of the driving board DSB may be disposed on the second substrate SUB2. The gate insulating layer GI may cover the lower surface and side surfaces of the second substrate SUB2.

[0181] The lead LDL may be disposed on the gate insulating layer GI. The lead LDL may extend along the lower surface and the side surface of the gate insulating layer GI. The lead LDL may electrically connect the bump electrode DLE of the display driving unit DIC and the pad portion PAD of the display panel 100. The lead LDL may include the same material as the gate layer GTL of the display panel 100 and be formed in the same process.

[0182] The protection member PRT may be disposed on the lead line LDL and the gate insulating layer GI. The protection member PRT may be disposed at a lower portion of the driving board DSB and protect the driving board DSB.

[0183] Fig.12 is a cross-sectional view showing a driving board of a display device according to still another embodiment. Fig.12 The driver board is in Figure 7 The driving board further includes an auxiliary line ALDL, and the structure that is the same as the aforementioned structure will be briefly described or omitted.

[0184] Reference Fig.12 The driving board DSB may include a first blocking insulating layer BIL1, an auxiliary line ALDL, a second blocking insulating layer BIL2, a second substrate SUB2, a gate insulating layer GI, an interlayer insulating layer ILD, a lead line LDL, and a protection member PRT.

[0185] The first blocking insulating layer BIL1 of the driving board DSB may be attached to the pad portion PAD and the lower surface of the first blocking insulating layer BIL1 of the display panel 100 through an adhesive member ADM.

[0186] The auxiliary line ALDL may be disposed on the first blocking insulating layer BIL1. The auxiliary line ALDL may extend in a layer between the first and second blocking insulating layers BIL1 and BIL2 of the driving board DSB. The auxiliary line ALDL may be electrically connected to the lead line LDL, and a side surface of the auxiliary line ALDL may be in contact with the connection portion CTP. The driving board DSB may maximize the contact efficiency between the lead line LDL and the connection portion CTP by further including the auxiliary line ALDL. The auxiliary line ALDL may include the same material as the pad portion PAD of the display panel 100 and be formed in the same process.

[0187] The second blocking insulating layer BIL2 of the driving board DSB may be disposed on the auxiliary line ALDL.

[0188] The second substrate SUB2 of the driving board DSB may be disposed on the second blocking insulating layer BIL2. The second substrate SUB2 may be a base substrate or a base member of the driving board DSB. The second substrate SUB2 may include a side surface tapered from an upper surface.

[0189] The gate insulating layer GI of the driving board DSB may be disposed on the second substrate SUB2. The gate insulating layer GI may cover the lower surface and the side surface of the second substrate SUB2. The interlayer insulating layer ILD of the driving board DSB may be disposed on the gate insulating layer GI.

[0190] The lead LDL may be disposed on the interlayer insulating layer ILD. The lead LDL may extend along the lower surface and the side surface of the interlayer insulating layer ILD. The lead LDL may be inserted into a contact hole provided in the second barrier insulating layer BIL2 and contact the auxiliary line ALDL. The lead LDL may electrically connect the bump electrode DLE of the display driving unit DIC and the pad portion PAD of the display panel 100. The lead LDL may include the same material as the first source metal layer SDL1 of the display panel 100 and be formed in the same process. For example, the lead LDL may have a stacked structure of titanium / aluminum / titanium (Ti / Al / Ti), but is not limited thereto.

[0191] The protection member PRT may be disposed on the lead line LDL and the interlayer insulating layer ILD. The protection member PRT may be disposed at a lower portion of the driving board DSB and protect the driving board DSB.

[0192] Fig.13 is a cross-sectional view showing a driving board of a display device according to still another embodiment. Fig.13 The driver board is in Figure 7 The driving board is obtained by changing the structure of the lead line LDL and further including an auxiliary line ALDL. For the structure that is the same as the aforementioned structure, the description will be briefly given or omitted.

[0193] Reference Fig.13 The driving board DSB may include first and second blocking insulating layers BIL1 and BIL2 , a second substrate SUB2 , a gate insulating layer GI, an auxiliary line ALDL, an interlayer insulating layer ILD, a lead line LDL, and a protection member PRT.

[0194] The first blocking insulating layer BIL1 of the driving board DSB may be attached to the pad portion PAD and the lower surface of the first blocking insulating layer BIL1 of the display panel 100 through an adhesive member ADM. The second blocking insulating layer BIL2 of the driving board DSB may be disposed on the first blocking insulating layer BIL1.

[0195] The second substrate SUB2 of the driving board DSB may be disposed on the second blocking insulating layer BIL2. The second substrate SUB2 may be a base substrate or a base member of the driving board DSB. The second substrate SUB2 may include a side surface tapered from an upper surface.

[0196] The gate insulating layer GI of the driving board DSB may be disposed on the second substrate SUB2. The gate insulating layer GI may cover the lower surface and side surfaces of the second substrate SUB2.

[0197] The auxiliary line ALDL may be disposed on the gate insulating layer GI. The auxiliary line ALDL may extend in a layer between the gate insulating layer GI and the interlayer insulating layer ILD of the driving board DSB. The auxiliary line ALDL may be electrically connected to the lead line LDL, and a side of the auxiliary line ALDL may be in contact with the connection portion CTP. The driving board DSB may maximize the contact efficiency between the lead line LDL and the connection portion CTP by further including the auxiliary line ALDL. The auxiliary line ALDL may include the same material as the gate layer GTL of the display panel 100 and be formed in the same process.

[0198] The interlayer insulating layer ILD of the driving board DSB may be disposed on the auxiliary line ALDL.

[0199] The lead LDL may be disposed on the interlayer insulating layer ILD. The lead LDL may extend along the lower surface and the side surface of the interlayer insulating layer ILD. The lead LDL may be inserted into a contact hole provided in the interlayer insulating layer ILD and contact the auxiliary line ALDL. The lead LDL may electrically connect the bump electrode DLE of the display driving unit DIC and the pad portion PAD of the display panel 100. The lead LDL may include the same material as the first source metal layer SDL1 of the display panel 100 and be formed in the same process.

[0200] The end of the lead LDL may be spaced apart from the ends of the first and second blocking insulating layers BIL1, BIL2, the gate insulating layer GI, the auxiliary line ALDL, and the interlayer insulating layer ILD. The ends of the first and second blocking insulating layers BIL1, BIL2, the gate insulating layer GI, the auxiliary line ALDL, and the interlayer insulating layer ILD may be formed during the cutting and separation process of the display panel 100 and the driving board DSB. The end of the lead LDL may be spaced apart from the cutting line of the cutting process of the display panel 100 and the driving board DSB. Thus, the driving board DSB can prevent the lead LDL from being damaged during the cutting process.

[0201] The protection member PRT may be disposed on the lead line LDL and the interlayer insulating layer ILD. The protection member PRT may be disposed at a lower portion of the driving board DSB and protect the driving board DSB.

[0202] Figures 14 to 19 1 is a cross-sectional view showing a manufacturing process of a display device according to an embodiment.

[0203] exist Fig.14 In the embodiment, the first substrate SUB1 may support the display device 10. The first substrate SUB1 may be a base substrate or a base member.

[0204] The first blocking insulating layer BIL1 may be disposed on the first substrate SUB1. The first blocking insulating layer BIL1 may include an inorganic film capable of preventing air or moisture from penetrating.

[0205] The pad portion PAD may be disposed on the first blocking insulating layer BIL1. The pad portion PAD may be inserted into a contact hole provided in the first blocking insulating layer BIL1.

[0206] The second blocking insulating layer BIL2 may be disposed on the pad portion PAD. The second blocking insulating layer BIL2 may include an inorganic film capable of preventing air or moisture from penetrating.

[0207] The second substrate SUB2 may be disposed on the second blocking insulating layer BIL2. The second substrate SUB2 may be a base substrate or a base member.

[0208] The mask MSK may be disposed on the second substrate SUB2. The area of ​​the second substrate SUB2 not disposed with the mask MSK may be etched (Etching). Thus, the second substrate SUB2 may be patterned by a photolithography process using the mask MSK, and the first contact hole CNT1 may be formed. For example, the mask MSK may be a hard mask including indium zinc oxide (IZO), but the constituent material of the mask MSK is not limited thereto. The first contact hole CNT1 may be etched from the upper surface of the second substrate SUB2 and penetrate to the lower surface of the second substrate SUB2. The upper area of ​​the first contact hole CNT1 may be larger than the lower area of ​​the first contact hole CNT1. During the formation of the first contact hole CNT1, the upper surface of the pad portion PAD may be exposed.

[0209] exist Fig.15 In the embodiment of the present invention, the gate insulating layer GI may be arranged on the second substrate SUB2. The gate insulating layer GI may be inserted into the first contact hole CNT1 of the second substrate SUB2, and the gate insulating layer GI may be patterned to form the second contact hole CNT2. The second contact hole CNT2 may overlap with the first contact hole CNT1. A portion of the gate insulating layer GI may cover a portion of the upper surface of the pad portion PAD exposed by the first contact hole CNT1. The area on the plane of the second contact hole CNT2 may be smaller than the area on the plane of the first contact hole CNT1.

[0210] The second connection line CWL2 may be disposed on the gate insulating layer GI. The second connection line CWL2 may include the same material as the gate layer GTL of the display area DA and may be formed in the same process.

[0211] The interlayer insulating layer ILD may be disposed on the gate insulating layer GI. The interlayer insulating layer ILD may be inserted into the first contact hole CNT1 of the second substrate SUB2, and the interlayer insulating layer ILD may be patterned to form a third contact hole CNT3. The third contact hole CNT3 may overlap with the first and second contact holes CNT1 and CNT2. A portion of the upper surface of the gate insulating layer GI adjacent to the second contact hole CNT2 may be exposed through the third contact hole CNT3. The area on the plane of the third contact hole CNT3 may be greater than the area on the plane of the second contact hole CNT2, and less than the area on the plane of the first contact hole CNT1.

[0212] The first connection line CWL1 may be disposed on the interlayer insulating layer ILD. The first connection line CWL1 may include the same material as the first source metal layer SDL1 of the display area DA and be formed in the same process. One end of the first connection line CWL1 may be sequentially inserted into the first contact hole CNT1, the third contact hole CNT3, and the second contact hole CNT2 and contact the upper surface of the pad portion PAD. The other end of the first connection line CWL1 may penetrate the interlayer insulating layer ILD and contact the second connection line CWL2. The first connection line CWL1 may electrically connect the pad portion PAD and the second connection line CWL2. The first connection line CWL1 may supply a data voltage or a power supply voltage received from the pad portion PAD to the second connection line CWL2.

[0213] The crack prevention part CDM may include first to third layers LAY1, LAY2, LAY3. The first layer LAY1 of the crack prevention part CDM may cover the upper surface of the first connection wire CWL1 inserted into the first to third contact holes CNT1, CNT2, CNT3. The first layer LAY1 may fill the step generated by the first contact hole CNT1 of the second substrate SUB2. The first layer LAY1 may include the same material as the first through hole layer VIA1 and be formed in the same process.

[0214] The second layer LAY2 of the crack prevention part CDM may be disposed on the first layer LAY1. The second layer LAY2 and the second via layer VIA2 may include the same material and be formed in the same process.

[0215] The third layer LAY3 of the crack prevention portion CDM may be disposed on the second layer LAY2. The third layer LAY3 may include the same material as the pixel definition layer PDL and may be formed in the same process.

[0216] The protection member PRT may include first to third layers LAY1, LAY2, and LAY3. The first layer LAY1 of the protection member PRT may be disposed on the lead LDL and the interlayer insulating layer ILD. The first layer LAY1 of the crack prevention part CDM and the protection member PRT may include the same material and be formed in the same process.

[0217] The second layer LAY2 of the protection member PRT may be disposed on the first layer LAY1. The second layer LAY2 of the crack preventing portion CDM and the protection member PRT may include the same material and be formed in the same process.

[0218] The third layer LAY3 of the protection member PRT may be disposed on the second layer LAY2. The third layer LAY3 of the crack prevention portion CDM and the protection member PRT may include the same material and be formed in the same process.

[0219] exist Fig.16In the embodiment, one side of the first substrate SUB1 can be etched to form an open portion SOP. For one side of the first substrate SUB1, at least one of a wet etching process, a dry etching process, a plasma etching process, and a laser etching process can be performed. By setting the open portion SOP on the first substrate SUB1, the pad portion PAD can be exposed. One open portion SOP can expose multiple pad portions PAD, but is not limited to this.

[0220] The first substrate SUB1 for supporting the driving board DSB may be etched. The first substrate SUB1 for supporting the driving board DSB may be removed in advance in a process before the driving board DSB is cut and separated from the display panel 100.

[0221] exist Fig.17 In the process of manufacturing the display panel 100, the display panel 100 and the driver substrate DSB can be cut and separated along the cutting line. Thus, the driver board DSB can be manufactured by including a part of the layer of the display panel 100. After the driver board DSB is separated from the display panel 100, the driver board DSB can be turned upside down and inserted into the opening SOP of the first substrate SUB1.

[0222] exist Fig.18 In the embodiment, the driving board DSB may be attached to the pad portion PAD and the lower surface of the first blocking insulating layer BIL1 by the adhesive member ADM. The driving board DSB may be fixed to the lower surface of the pad portion PAD by the adhesive member ADM.

[0223] exist Fig.19 In the embodiment, the connection portion CTP may cover the lead LDL and the pad portion PAD. The connection portion CTP may electrically connect the lead LDL disposed on the side surface of the second substrate SUB2 and the lower surface of the pad portion PAD.

[0224] The conductive ink may be coated on the lead LDL and the pad PAD. The conductive ink may include nanoparticles and polymers. The connection portion CTP may be formed by low temperature sintering the conductive ink.

[0225] The sintered conductive ink, metal paste or metal organic decomposition ink can cover multiple pads PAD and multiple leads LDL inserted in an open part SOP at one time, and multiple cutting parts formed in the laser patterning process can separate multiple connection parts CTP. The connection part CTP can be separated from the adjacent connection part CTP by multiple cutting parts, and one connection part CTP can electrically connect one pad part PAD and one lead LDL.

[0226] The cover layer CRD may be disposed on the connection portion CTP and protect the connection portion CTP. The cover layer CRD may include an organic film such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc. The cover layer CRD may be formed by hardening a monomer or coating a polymer.

[0227] Thus, the display device 10 electrically connects the lead LDL and the pad portion PAD by using the connection portion CTP, so that the lead LDL of the driving board DSB can be electrically connected to the pad portion PAD without using ultrasonic bonding or thermocompression bonding. In addition, the display device 10 can simplify the manufacturing process, thereby saving manufacturing time and manufacturing costs.

[0228] Fig. 20 FIG. 1 is a top view showing an example of cutting lines of a display panel and a driving board in a manufacturing process of a display device according to an embodiment. Fig. 20 It can be shown Fig.17 A top view of the manufacturing process. Figures 7 to 12 The driver board DSB shown can be Fig. 20 The manufacturing process is obtained.

[0229] Reference Fig. 20 The first connection line CWL1 of the display panel 100 may be disposed on the interlayer insulating layer ILD. The lead line LDL of the driving board DSB may be disposed on the interlayer insulating layer ILD. Thus, the first connection line CWL1 and the lead line LDL may include the same material and be formed in the same process.

[0230] The crack preventing part CDM may be disposed on the first connection line CWL1 and the interlayer insulating layer ILD. The crack preventing part CDM may be disposed on the outermost periphery of the display panel 100 to prevent cracks of the display panel 100. The first and third encapsulation layers TFE1 and TFE3 and the planarization layer OC may be formed in the area surrounded by the crack preventing part CDM.

[0231] The protection member PRT may be disposed on the lead LDL and the interlayer insulating layer ILD. The protection member PRT may protect the driving board DSB by preventing moisture penetration and inflow of external air.

[0232] Each of the plurality of partition walls WAL may be disposed between a plurality of leads LDL. The partition wall WAL may extend from the crack prevention portion CDM to the protection member PRT. The partition wall WAL may prevent contact between the connection portions CTP covering the adjacent leads LDL. The connection portion CTP may be formed in an area divided by the partition wall WAL. Thus, one connection portion CTP may electrically connect one pad portion PAD and one lead LDL. The crack prevention portion CDM, the protection member PRT, and the partition wall WAL may contain the same material and be formed in the same process.

[0233] The display panel 100 and the driving board DSB may be cut and separated along a cutting line.

[0234] Fig.21 FIG. 1 is a top view showing another example of cutting lines of a display panel and a driving board in a manufacturing process of a display device according to an embodiment. Fig.21 The display device is from Fig. 20 The display device is obtained by omitting the partition wall WAL, and the structure that is the same as the aforementioned structure will be briefly described or omitted.

[0235] Reference Fig.21 , the display panel 100 and the driving board DSB can be cut and separated along a cutting line.

[0236] After the driving board DSB is attached to the lower surface of the pad part PAD through the adhesive member ADM, the sintered conductive ink or metal paste can cover multiple pad parts PAD and multiple leads LDL inserted in an open part SOP at one time. The connection part CTP can be separated corresponding to each lead LDL through a laser patterning process. The connection part CTP can be separated from the adjacent connection part CTP through a laser patterning process, and one connection part CTP can electrically connect one pad part PAD and one lead LDL.

[0237] Fig. 22 FIG. 1 is a top view showing another example of cutting lines of a display panel and a driving board in a manufacturing process of a display device according to an embodiment. Fig. 22 The display device is in Fig. 20 The display device is obtained by changing the structure of the lead LDL, and the structure that is the same as the above structure will be briefly described or omitted. Fig.13The driver board DSB shown can be Fig. 22 The manufacturing process is obtained.

[0238] Reference Fig. 22 The first connection line CWL1 of the display panel 100 may be disposed on the interlayer insulating layer ILD. The lead line LDL of the driving board DSB may be disposed on the interlayer insulating layer ILD. Thus, the first connection line CWL1 and the lead line LDL may include the same material and be formed in the same process.

[0239] The ends of the first connection wires CWL1 and the leads LDL may be spaced apart from a cut line, thereby preventing the leads LDL from being damaged during a cutting process of the driving board DSB.

[0240] Each of the plurality of partition walls WAL may be disposed between the plurality of leads LDL. The partition wall WAL may extend from the crack prevention portion CDM to the protection member PRT. The partition wall WAL may prevent contact between the connection portions CTP covering the adjacent leads LDL.

[0241] The display panel 100 and the driving board DSB may be cut and separated along a cutting line.

[0242] Fig.23 FIG. 1 is a top view showing another example of cutting lines of a display panel and a driving board in a manufacturing process of a display device according to an embodiment. Fig.23 The display device is from Fig. 22 The display device is obtained by omitting the partition wall WAL, and the structure that is the same as the aforementioned structure will be briefly described or omitted.

[0243] Reference Fig.23 , the display panel 100 and the driving board DSB can be cut and separated along a cutting line.

[0244] After the driving board DSB is attached to the lower surface of the pad part PAD through the adhesive member ADM, the sintered conductive ink or metal paste can cover multiple pad parts PAD and multiple leads LDL inserted in an open part SOP at one time. The connection part CTP can be separated corresponding to each lead LDL through a laser patterning process. The connection part CTP can be separated from the adjacent connection part CTP through a laser patterning process, and one connection part CTP can electrically connect one pad part PAD and one lead LDL.

[0245] Although the embodiments of the present invention are described above with reference to the accompanying drawings, it should be understood by those skilled in the art that the present invention may be implemented in other specific ways without changing the technical concept or essential features of the present invention. Therefore, the embodiments described above are exemplary in all aspects and should not be understood as limiting.

Claims

1. A display device, in, include: A first substrate including an open portion; A pad portion, disposed on the first substrate and exposed through the opening portion; A second substrate, disposed on the pad portion and comprising a first contact hole; A first connecting wire is disposed on the second substrate and inserted into the first contact hole to connect with the pad portion; a second connecting line, disposed in a layer between the second substrate and the first connecting line, and connected to the first connecting line; a pixel circuit, electrically connected to the second connecting line; a driving board inserted in the open portion of the first substrate and comprising a base member and leads, the base member being arranged at the lower portion of the pad portion and having a side surface tapered from an upper surface, the leads extending along a lower surface and a side surface of the base member; and The connection portion electrically connects the pad portion and the lead.

2. The display device according to claim 1, wherein: The base member and the second substrate include the same material and are formed in the same process.

3. The display device according to claim 1, wherein: Also includes: a gate insulating layer disposed on the second substrate and comprising a second contact hole overlapping the first contact hole, and an interlayer insulating layer, disposed on the gate insulating layer and comprising a third contact hole overlapping the first contact hole and the second contact hole; The first connection line is inserted into the first to third contact holes and contacts the pad portion.

4. The display device according to claim 1, wherein: The connection portion is formed by sintering a conductive ink, a metal paste, or a metal-organic decomposition ink containing silver (Ag), copper (Cu), aluminum (Al), or chromium (Cr).

5. The display device according to claim 1, wherein: The driving board also includes: The insulating barrier layer is attached to the lower surface of the pad portion through a bonding member. a gate insulating layer disposed on the lower surface and the side surfaces of the base member, and An interlayer insulating layer, a layer disposed between the gate insulating layer and the lead; The lead wire and the first connecting wire are made of the same material and are formed in the same process.

6. The display device according to claim 1, wherein: The driving board also includes: a gate insulating layer disposed on the lower surface and the side surfaces of the base member, and An interlayer insulating layer, a layer disposed between the gate insulating layer and the lead; The base member is attached to the lower surface of the pad portion via an adhesive member, and the lead and the first connection line are made of the same material and are formed in the same process.

7. The display device according to claim 1, wherein: The driving board further includes a blocking insulating layer attached to the lower surface of the pad portion through a bonding member, The leads are directly disposed on the lower surface and the side surfaces of the base member, and the leads and the first connecting wires are made of the same material and are formed in the same process.

8. The display device according to claim 1, wherein: The driving board also includes: The insulating barrier layer is attached to the lower surface of the pad portion through a bonding member. a gate insulating layer disposed on the lower surface and the side surfaces of the base member, and An interlayer insulating layer, a layer disposed between the gate insulating layer and the lead; The lead includes a first line layer and a second line layer. The first line layer, the second line layer and the first connecting line contain the same material and are formed in the same process. The second line layer is arranged on the first line layer.

9. The display device according to claim 1, wherein: The driving board also includes: a barrier insulating layer attached to the lower surface of the pad portion through a bonding member, and a gate insulating layer disposed on the lower surface and the side surfaces of the base member; The lead wire and the second connection wire are made of the same material and are formed in the same process.

10. The display device according to claim 1, wherein: The driving board also includes: The insulating barrier layer is attached to the lower surface of the pad portion through a bonding member. an auxiliary line, arranged in a layer between the blocking insulating layer and the base member, a gate insulating layer disposed on the lower surface and the side surfaces of the base member, and An interlayer insulating layer, a layer disposed between the gate insulating layer and the lead; The lead wire and the first connection wire are made of the same material and are formed in the same process, and the lead wire is in contact with the auxiliary wire.

11. The display device according to claim 1, wherein: The driving board also includes: The insulating barrier layer is attached to the lower surface of the pad portion through a bonding member. a gate insulating layer disposed on the lower surface and the side surface of the base member, an auxiliary line, arranged on the gate insulating layer, and An interlayer insulating layer, disposed on the auxiliary line; The lead wire and the first connection wire are made of the same material and are formed in the same process, and the auxiliary wire and the second connection wire are made of the same material and are formed in the same process.

12. The display device according to claim 11, wherein: The lead wire is inserted into a contact hole provided in the interlayer insulating layer and contacts the auxiliary wire, and an end portion of the lead wire is spaced apart from an end portion of the auxiliary wire.

13. The display device according to claim 12, wherein: Also includes: A first through hole layer is arranged on the pixel circuit. A second through hole layer is arranged on the first through hole layer, A plurality of pixel electrodes are arranged on the second through hole layer, and A pixel definition film, used for insulating the plurality of pixel electrodes; The driving board further includes a protection member, which is disposed on the lead and the interlayer insulating layer and includes the same material as at least one of the first through hole layer, the second through hole layer, and the pixel definition film and is formed in the same process.

14. The display device according to claim 13, wherein: The driving board also includes: The partition wall is arranged between the leads and is made of the same material as the protection member and is formed in the same process.

15. A method for manufacturing a display device, in, include: A step of preparing a first substrate; forming a pad portion on the first substrate; forming a second substrate including a first contact hole and a base member on the pad portion; forming a first connection line and a lead, wherein the first connection line is a connection line arranged on the second substrate and inserted into the first contact hole, and the lead is a line arranged on the base member; forming an opening portion of the first substrate and removing the first substrate for supporting the base member, the opening portion being formed by etching a lower portion of the first substrate and capable of exposing the pad portion; A step of cutting along a cutting line between the first connecting line and the lead to separate a driving board, wherein the driving board includes the base member and the lead; inserting the driving board into the opening portion so that the driving board is arranged on the lower surface of the pad portion; and A step of forming a connection portion that electrically connects the lead of the driving board and the pad portion.

16. The method for manufacturing a display device according to claim 15, wherein: Also includes: forming a blocking insulating layer on the first substrate, forming a gate insulating layer on the second substrate and the base member, and forming an interlayer insulating layer on the gate insulating layer; The step of separating the driving board comprises: The step of separating the driving board including the barrier insulating layer, the base member, the gate insulating layer, the interlayer insulating layer, and the lead wires.

17. The method for manufacturing a display device according to claim 15, wherein: Also includes: forming a gate insulating layer on the second substrate and the base member, and forming an interlayer insulating layer on the gate insulating layer; The step of separating the driving board comprises: A step of separating a driving board including the base member, the gate insulating layer, the interlayer insulating layer, and the lead wires.

18. The method for manufacturing a display device according to claim 15, wherein: The method further comprises forming a blocking insulating layer on the first substrate. The step of separating the driving board comprises: The step of separating the driving board including the barrier insulating layer, the base member and the lead wires.

19. The method for manufacturing a display device according to claim 15, wherein: The steps of forming the lead include: The step of forming a lead including a first wire layer and a second wire layer, wherein the first wire layer is arranged on the base member, and the second wire layer is arranged on the first wire layer.

20. The method for manufacturing a display device according to claim 15, wherein: The step of separating the driving board comprises: A step of spacing the end of the lead wire away from the cutting line.

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