Piezoelectric structure and preparation method thereof

By introducing a protective layer into the piezoelectric structure, the problem that it is difficult to accurately control the etching depth when the high-doped aluminum nitride film is etched under a small size is solved, effectively protecting the electrode layer, ensuring the integrity of the etching hole and the stability of the signal connection.

CN119968097AInactive Publication Date: 2025-05-09CHENGDU FIBER SOUND TECH CO LTD

Patent Information

Application Number
CN202510443521.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-10
Publication Date
2025-05-09
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

The prior art is difficult to accurately control the etching depth of the etching holes of the high-doped aluminum nitride film under small sizes, resulting in difficulty in sufficient etching without excessive etching, affecting the signal connection of the electrode layer.

Method used

A protective layer is introduced into the piezoelectric structure, and the etch selection ratio of the protective layer is lower than the etch selection ratio of the piezoelectric layer but higher than the etch selection ratio of the electrode layer, so that the protection electrode layer is not over-etched during the etching process.

Benefits of technology

By introducing a protective layer, the etching depth can be controlled more accurately when etching the micro-etching holes, ensuring that the piezoelectric layer is fully etched without damage to the electrode layer, and protecting the electrode layer below the etching hole.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119968097A_ABST
    Figure CN119968097A_ABST
Patent Text Reader

Abstract

The invention provides a piezoelectric structure and a preparation method thereof, and relates to the technical field of semiconductors. The piezoelectric structure comprises a substrate layer, at least two electrode layers on the substrate layer and a piezoelectric layer arranged between the two adjacent electrode layers, a protective layer is arranged between the electrode layers and the piezoelectric layer on the electrode layers, one surface of the protective layer is attached to the electrode layers, and the other surface of the protective layer is attached to the piezoelectric layer; when the piezoelectric layer is etched, the etching selection ratio of an etching material of the piezoelectric layer to the protective layer is lower than that of the etching material of the piezoelectric layer to the piezoelectric layer; when the protective layer is etched, the etching selection ratio of the protective layer etching material to the protective layer is higher than the etching selection ratio of the protective layer etching material to the electrode layer; an etching hole is formed in the piezoelectric structure, the top of the etching hole is located on the upper surface of the piezoelectric structure, the bottom of the etching hole is located on the surface, facing the lowermost electrode layer, of the protective layer, a first area located in the protective layer is divided on the etching hole, and the outer contour of the side face of the first area is located in the outer contour of the side face of the protective layer. The piezoelectric structure can protect the electrode layer below the etching hole.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a piezoelectric structure and a method for preparing the same. Background Art

[0002] With the popularity of MEMS sensors in the market, the improvement of the tape-out process based on MEMS technology has become the focus of research and development of various companies. The performance improvement of piezoelectric materials is the top priority of tape-out process improvement. With the widespread use of highly doped aluminum nitride films in the preparation of piezoelectric layers, improving the etching of highly doped aluminum nitride films is also the focus of technological innovation for major manufacturers.

[0003] Compared with the conventional aluminum nitride film etching process, the chemical reaction of highly doped aluminum nitride film is not particularly sufficient during the etching process due to the presence of certain doping elements, and the etching rate is relatively low. Therefore, it is difficult to accurately control the etching progress of a highly doped aluminum nitride film of a certain thickness, especially in small area etching, such as etching holes of microscopic size, or etching of slit penetrating structures, etc.

[0004] like Figure 1 As shown, generally when etching the piezoelectric stack structure 10, especially when etching at a micro size, it is necessary to accurately stay at a predetermined position. Figure 1 The bottom electrode 11 needs to be etched, and it is best to stop at the upper surface of the bottom electrode 11. Obviously, if the bottom electrode 11 is not etched, for example, part of the piezoelectric film 12 still remains above the bottom electrode 11, and the etching is not sufficient at this time, then when the metal material fills the hole 13, the signal of the bottom electrode 11 cannot be pulled out. If the etching is excessive, the bottom electrode 11 will be obviously over-etched, which is also easy to affect the signal connection problem of the bottom electrode 11.

[0005] Therefore, for highly doped aluminum nitride films, etching a structure like hole 13 at a tiny size is difficult to control with the current process manufacturing level in order to fully etch the structure without over-etching. Summary of the invention

[0006] The purpose of the present application is to provide a piezoelectric structure and a method for preparing the same in view of the deficiencies in the above-mentioned prior art, which can solve the problem of difficulty in accurately controlling the etching depth when etching tiny holes in the piezoelectric layer, thereby well protecting the electrode layer under the etching holes.

[0007] To achieve the above purpose, the technical solution adopted in the embodiment of the present application is as follows: According to one aspect of an embodiment of the present application, a piezoelectric structure is provided, comprising: a base layer, at least two electrode layers stacked on the base layer along a first direction, and a piezoelectric layer arranged between two adjacent electrode layers, a protective layer is arranged between part of the electrode layer and the piezoelectric layer located on the electrode layer, one surface of the protective layer is bonded to the electrode layer, and the other opposite surface is bonded to the piezoelectric layer; when etching the piezoelectric layer, the etching selectivity of the piezoelectric layer etching material to the protective layer is lower than the etching selectivity to the piezoelectric layer; when etching the protective layer, the etching selectivity of the protective layer etching material to the protective layer is higher than the etching selectivity to the electrode layer; an etching hole is arranged in the piezoelectric structure, the top of the etching hole is located on the upper surface of the piezoelectric structure, the bottom is located on the surface of the protective layer facing the lowest electrode layer, the etching hole is divided into a first area located in the protective layer, and the side outer contour of the first area is located within the side outer contour of the protective layer.

[0008] Optionally, the protective layer covers a portion of the electrode layer.

[0009] Optionally, the thickness of the protective layer is less than or equal to 20% of the thickness of the piezoelectric layer.

[0010] Optionally, the cross-sectional area of ​​the protection layer is less than or equal to 150% of the maximum cross-sectional area of ​​the etched hole.

[0011] Optionally, a thermal oxide layer is provided between the substrate layer and the lowermost electrode layer.

[0012] Optionally, the etched hole does not overlap with the electrode layer above the protective layer.

[0013] Another aspect of the embodiment of the present application provides a method for preparing a piezoelectric structure, comprising: providing a substrate layer, and forming a composite film layer structure on the substrate layer along a first direction, wherein the composite film layer structure comprises at least two electrode layers, and a piezoelectric layer arranged between two adjacent electrode layers, a protective layer is arranged between part of the electrode layer and the piezoelectric layer located on the electrode layer, when etching the piezoelectric layer, the etching selectivity of the piezoelectric layer etching material to the protective layer is lower than the etching selectivity to the piezoelectric layer, and when etching the protective layer, the etching selectivity of the protective layer etching material to the protective layer is higher than the etching selectivity to the electrode layer The invention relates to a method for etching the piezoelectric layer along a second direction to form a first etching hole on the piezoelectric layer, wherein the second direction is opposite to the first direction, the bottom of the first etching hole is located on the upper surface of the protective layer, and the outer contour of the bottom of the first etching hole is located within the outer contour of the upper surface of the protective layer; the protective layer is etched along the second direction by the protective layer etching material to form a second etching hole on the protective layer, wherein the bottom of the second etching hole is located on the lower surface of the protective layer, and the outer contour of the bottom of the second etching hole is located within the outer contour of the lower surface of the protective layer.

[0014] Optionally, providing a base layer and forming a composite membrane layer structure on the base layer along a first direction includes: providing a base layer and sequentially forming an electrode layer and a protective layer on the base layer along the first direction; and forming at least one group of piezoelectric layers and electrode layers on the protective layer along the first direction.

[0015] Optionally, the composite membrane layer structure includes a bottom electrode layer, a top electrode layer and at least one middle electrode layer stacked between the bottom electrode layer and the top electrode layer, and a protective layer is provided between at least part of the middle electrode layer and the piezoelectric layer located on the middle electrode layer.

[0016] Optionally, providing a base layer and forming a composite film layer structure on the base layer along a first direction includes: providing a base layer and forming a thermal oxide layer on the base layer; and forming a composite film layer structure on the thermal oxide layer along the first direction.

[0017] The beneficial effects of this application include: The present application provides a piezoelectric structure, comprising: a substrate layer, at least two electrode layers stacked on the substrate layer along a first direction, and a piezoelectric layer arranged between two adjacent electrode layers, a protective layer is arranged between at least part of the electrode layer and the piezoelectric layer located on the electrode layer, one surface of the protective layer is bonded to the electrode layer, and the other opposite surface is bonded to the piezoelectric layer; when etching the piezoelectric layer, the etching selectivity of the piezoelectric layer etching material to the protective layer is lower than the etching selectivity to the piezoelectric layer; when etching the protective layer, the etching selectivity of the protective layer etching material to the protective layer is higher than the etching selectivity to the electrode layer; an etching hole is arranged in the piezoelectric structure, the top of the etching hole is located on the upper surface of the piezoelectric structure, the bottom is located on the surface of the protective layer facing the lowest electrode layer, the etching hole is divided into a first area located in the protective layer, and the side outer contour of the first area is located within the side outer contour of the protective layer. The piezoelectric structure adds a protective layer between the electrode layer and the piezoelectric layer above the electrode layer, and the etching selectivity of the protective layer is lower than the etching selectivity of the piezoelectric layer and higher than the etching selectivity of the electrode layer. In the process of forming the etching hole, the protective layer can make the piezoelectric layer be fully etched to form a through hole, and can also well protect the electrode layer below the piezoelectric layer from being over-etched. Therefore, the provision of the protective layer can easily solve the problem of difficulty in accurately controlling the etching depth when etching a tiny etching hole in the piezoelectric layer, thereby well protecting the electrode layer below the etching hole. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0019] Figure 1It is a structural schematic diagram of a piezoelectric stack structure in the prior art; Figure 2 A schematic diagram of the structure of the piezoelectric structure provided in an embodiment of the present application; Figure 3 One of the flow charts of the method for preparing a piezoelectric structure provided in an embodiment of the present application; Figure 4 One of the schematic diagrams of the preparation process of the piezoelectric structure provided in the embodiment of the present application; Figure 5 The second schematic diagram of the preparation process of the piezoelectric structure provided in the embodiment of the present application; Figure 6 The third schematic diagram of the preparation process of the piezoelectric structure provided in the embodiment of the present application; Figure 7 Flow chart 2 of the method for preparing a piezoelectric structure provided in an embodiment of the present application; Figure 8 This is a third flow chart of the method for preparing a piezoelectric structure provided in an embodiment of the present application.

[0020] Icon: 10-piezoelectric stack structure; 11-bottom electrode; 12-piezoelectric film; 13-hole; 100-piezoelectric structure; 110-base layer; 120-composite film layer structure; 121-electrode layer; 1211-bottom electrode layer; 1212-top electrode layer; 1213-middle electrode layer; 122-piezoelectric layer; 123-protective layer; 130-etched hole; 131-first etched hole; 132-second etched hole; 133-third etched hole; 140-thermal oxide layer; 150-other film layers; X1-first direction; X2-second direction. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0022] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for protection, but merely represents selected embodiments of the present application. It should be noted that, in the absence of conflict, the various features in the embodiments of the present application can be combined with each other, and the combined embodiments are still within the scope of protection of the present application.

[0023] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0024] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, or the positions or positional relationships in which the product of the application is usually placed when in use. They are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0025] In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0026] Please refer to Figure 1 When etching a small-sized hole 13 in a highly doped aluminum nitride film, the etching time is difficult to control, so in order to ensure that a through hole can be formed on the highly doped aluminum nitride film, it is usually necessary to extend the etching time. However, after the etching time is extended, the very thin electrode structure such as the bottom electrode 11 is prone to obvious wear, and the degree of electrode wear also has a great impact on the electrical properties of the piezoelectric stack structure 10. Therefore, for highly doped aluminum nitride films, etching structures such as holes 13 at a tiny size is difficult to control in the current process manufacturing level if you want to fully etch the structure without over-etching.

[0027] In order to solve the above technical problems, one aspect of the embodiments of the present application is as follows: Figure 2 , a piezoelectric structure 100 is provided, comprising: a base layer 110, at least two electrode layers 121 stacked on the base layer 110 along a first direction X1, and a piezoelectric layer 122 disposed between two adjacent electrode layers 121. A protective layer 123 is disposed between a portion of the electrode layer 121 and the piezoelectric layer 122 located on the electrode layer 121, one surface of the protective layer 123 is bonded to the electrode layer 121, and the other opposite surface is bonded to the piezoelectric layer 122.

[0028] When etching the piezoelectric layer 122 , the etching selectivity of the piezoelectric layer etching material to the protective layer 123 is lower than that to the piezoelectric layer 122 ; when etching the protective layer 123 , the etching selectivity of the protective layer etching material to the protective layer 123 is higher than that to the electrode layer 121 .

[0029] An etched hole 130 is provided in the piezoelectric structure 100, the top of the etched hole 130 is located on the upper surface of the piezoelectric structure 100, and the bottom is located on the surface of the protective layer 123 facing the lowest electrode layer 121. The etched hole 130 is divided into a first area located in the protective layer 123, and the side outer contour of the first area is located within the side outer contour of the protective layer 123.

[0030] It should be noted that the base layer 110 at least plays a supporting role, and the electrode layer 121 and the piezoelectric layer 122 are stacked on the surface of the base layer 110 along the first direction X1, and the first direction X1 is preferably a direction perpendicular to the surface of the base layer 110. At least one piezoelectric layer 122 is arranged between two adjacent electrode layers 121. The electrode layer 121 and the base layer 110, and the electrode layer 121 and the piezoelectric layer 122 can be directly bonded, or other film layers can be arranged.

[0031] A protective layer 123 may be provided between the electrode layer 121 and the piezoelectric layer 122 located on the side of the electrode layer 121 away from the substrate layer 110 and adjacent to the electrode layer 121, and the protective layer 123 is bonded to both the electrode layer 121 and the piezoelectric layer 122. The location of the protective layer 123 corresponds to the location where the etched hole 130 needs to be formed on the piezoelectric structure 100. The material of the protective layer 123 may be silicon dioxide, silicon, aluminum nitride, silicon nitride, and the like. There is at least one protective layer 123, and except for the topmost electrode layer 121, the protective layer 123 may be provided on the side of all the remaining electrode layers 121 away from the substrate layer 110, or the protective layer 123 may be provided on only the side of some of the electrode layers 121 away from the substrate layer 110.

[0032] The piezoelectric structure 100 is etched on the upper surface of the piezoelectric structure 100 to form an etched hole 130. In this process, when the piezoelectric layer etching material is used to etch the piezoelectric layer 122, a relatively sufficient reaction time can be selected so that the piezoelectric layer 122 is fully etched to form a through hole. Since the etching selectivity of the piezoelectric etching material to the protective layer 123 is lower than the etching selectivity of the piezoelectric layer 122, even if the etching time is increased, the protective layer 123 below is still difficult to be etched by the piezoelectric etching material, and the electrode layer 121 below is well protected. When the protective layer etching material is used to etch the protective layer 123 in the next step, since the etching selectivity of the piezoelectric etching material to the protective layer 123 is higher than the etching selectivity of the electrode layer 121, the etching can stay more accurately on the lower surface of the protective layer 123 (that is, the surface of the protective layer 123 facing the electrode layer 121) without excessively damaging the electrode layer 121.

[0033] It can be understood that the cross-sectional area of ​​the protective layer 123 should be at least larger than the cross-sectional area (the cross-sectional area perpendicular to the first direction X1) of the first region where the etching hole 130 is located in the protective layer 123, so as to ensure that the side profile of the first region is completely located within the side profile of the protective layer. The greater the difference in etching selectivity between the protective layer 123 and the piezoelectric layer 122, and between the protective layer 123 and the electrode layer 121, the better the electrode layer 121 can be protected.

[0034] The above-mentioned piezoelectric structure 100 adds a protective layer 123 between the electrode layer 121 and the piezoelectric layer 122 above the electrode layer 121. When etching the piezoelectric layer, the etching selectivity of the piezoelectric layer etching material to the protective layer is lower than the etching selectivity to the piezoelectric layer; when etching the protective layer, the etching selectivity of the protective layer etching material to the protective layer is higher than the etching selectivity to the electrode layer. In the process of forming the etching hole 130, the protective layer 123 can make the piezoelectric layer 122 be fully etched to form a through hole, and can also well protect the electrode layer 121 below the piezoelectric layer 122 from being over-etched. Therefore, the provision of the protective layer 123 can easily solve the problem that it is difficult to accurately control the etching depth when etching the piezoelectric layer 122 into a tiny etching hole 130, thereby well protecting the electrode layer 121 below the etching hole 130.

[0035] Optionally, the protection layer 123 covers a portion of the electrode layer 121 .

[0036] That is, the protective layer 123 only covers a portion of the surface of the electrode layer 121, and the surface of the electrode layer 121 exposed by the protective layer 123 is in contact with the piezoelectric layer 122. The smaller the surface area of ​​the protective layer 123, the smaller the impact on the piezoelectric structure 100.

[0037] Optionally, the cross-sectional area of ​​the protection layer 123 is less than or equal to 150% of the maximum cross-sectional area of ​​the etched hole 130. In this way, the electrode layer 121 below can be effectively protected and the impact on the piezoelectric structure 100 can be reduced.

[0038] Optionally, the thickness of the protection layer 123 is less than or equal to 20% of the thickness of the piezoelectric layer 122 .

[0039] The protective layer 123 mainly plays the role of protecting the electrode layer 121 , and therefore, the thickness can be set to be relatively thin to minimize the impact on the piezoelectric structure 100 , and at the same time, the etching time of the protective layer 123 can also be reduced.

[0040] Optionally, each protection layer 123 corresponds to at least two etching holes 130 .

[0041] The surface area of ​​the protection layer 123 can be set larger so as to correspond to two or more etching holes 130 at the same time, so that when two or more etching holes 130 are etched on a certain electrode layer 121, the electrode layer 121 can be effectively protected.

[0042] Optionally, the etching hole 130 does not overlap with the electrode layer 121 above the protection layer 123. In this way, it is possible to avoid damaging the electrode layer 121 above the protection layer when forming the etching hole 130, and it is also possible to avoid conduction between the two electrode layers 121 through the etching hole 130.

[0043] Optionally, a thermal oxide layer 140 is provided between the base layer 110 and the lowermost electrode layer 121 .

[0044] Optionally, a thermal oxide layer 140 is disposed above the uppermost electrode layer 121 facing away from the base layer 110 .

[0045] The thermal oxide layer 140 can play the role of electrical insulation, protection, isolation, surface flattening, etc., thereby improving the reliability and life of the piezoelectric structure 100.

[0046] This embodiment also provides a method for preparing a piezoelectric structure. Figure 3 ,include: S100: Provide a base layer, and form a composite film layer structure on the base layer along a first direction, wherein the composite film layer structure includes at least two electrode layers, and a piezoelectric layer arranged between two adjacent electrode layers, and a protective layer is arranged between part of the electrode layer and the piezoelectric layer located on the electrode layer, and when etching the piezoelectric layer, the etching selectivity of the piezoelectric layer etching material to the protective layer is lower than the etching selectivity to the piezoelectric layer, and when etching the protective layer, the etching selectivity of the protective layer etching material to the protective layer is higher than the etching selectivity to the electrode layer.

[0047] Please refer to Figures 4 to 6The composite film layer structure 120 includes at least an electrode layer 121, a piezoelectric layer 122 and a protective layer 123, and may also include other film layers. The electrode layer 121 and the piezoelectric layer 122 are alternately formed on the substrate layer 110, wherein the formation process of the electrode layer 121 may be to first deposit a layer of electrode material to form a complete electrode film, and then perform a patterning process on the electrode film to remove part of the electrode material, thereby forming the electrode layer 121. The formation process of the piezoelectric layer 122 may be to deposit a layer of piezoelectric material to form a complete piezoelectric film 12, and then perform a flattening process on the surface of the piezoelectric film 12 to form the piezoelectric layer 122.

[0048] A protective layer 123 may be disposed between the electrode layer 121 and the piezoelectric layer 122 located on the side of the electrode layer 121 facing away from the substrate layer 110 and adjacent to the electrode layer 121, and the protective layer 123 is bonded to both the electrode layer 121 and the piezoelectric layer 122. The protective layer 123 may be formed by depositing a layer of protective material to form a complete protective film, and then patterning the protective film to remove part of the protective material, thereby forming the protective layer 123.

[0049] The material of the base layer 110 can be silicon, the material of the piezoelectric layer 122 can be scandium-doped aluminum nitride, aluminum nitride, lead iron zirconate titanate, etc., the material of the electrode layer 121 can be metal, and the material of the protective layer 123 can be silicon dioxide, silicon, aluminum nitride, silicon nitride, etc.

[0050] S200: Etching the piezoelectric layer along a second direction using a piezoelectric layer etching material to form a first etching hole on the piezoelectric layer, wherein the second direction is opposite to the first direction, the bottom of the first etching hole is located on the upper surface of the protective layer, and the outer contour of the bottom of the first etching hole is located within the outer contour of the upper surface of the protective layer.

[0051] Please refer to Figure 6 , starting from the side of the composite membrane structure 120 away from the base layer 110, a first etching hole 131 is etched into the piezoelectric layer 122 along the second direction X2 using a piezoelectric layer etching material. Since the etching selectivity of the piezoelectric layer etching material to the protective layer 123 is lower than that of the piezoelectric layer 122, when etching the piezoelectric layer 122 above the protective layer 123, a relatively sufficient reaction time can be selected so that the piezoelectric layer 122 is fully etched to form a through hole. In this process, the protective layer 123 is difficult to be etched, and can well protect the electrode layer 121 below.

[0052] It can be understood that if the area of ​​the piezoelectric layer 122 used to form the first etching hole 131 is also covered with other film layers 150 (such as a protective layer) in addition to the electrode layer 121, other etching materials can be used to first form a third etching hole 133 on the other film layer 150 to expose the area to be etched of the underlying piezoelectric layer 122.

[0053] S300: etching the protective layer along a second direction using a protective layer etching material to form a second etching hole on the protective layer, wherein the bottom of the second etching hole is located on the lower surface of the protective layer, and the outer contour of the bottom of the second etching hole is located within the outer contour of the lower surface of the protective layer.

[0054] Please refer to Figure 2 Starting from the bottom of the first etching hole 131, a second etching hole 132 is etched into the protective layer 123 along the second direction X2 using a protective layer etching material. Since the etching selectivity of the protective layer etching material to the protective layer 123 is higher than the etching selectivity of the electrode layer 121, when etching the protective layer 123, it is possible to stay more accurately on the lower surface of the protective layer 123 (i.e., the surface of the protective layer 123 facing the electrode layer 121) without excessively damaging the electrode layer 121.

[0055] In the method for preparing the piezoelectric structure, a protective layer 123 is added between the electrode layer 121 and the piezoelectric layer 122 above the electrode layer 121. When etching the piezoelectric layer 122, the etching selectivity of the piezoelectric layer etching material to the protective layer 123 is lower than the etching selectivity to the piezoelectric layer 122; when etching the protective layer 123, the etching selectivity of the protective layer etching material to the protective layer 123 is higher than the etching selectivity to the electrode layer 121. In the process of forming the etching hole 130, the protective layer 123 can make the piezoelectric layer 122 be fully etched to form a through hole, and can also well protect the electrode layer 121 below the piezoelectric layer 122 from being over-etched. Therefore, the prepared piezoelectric structure 100 can ensure that the piezoelectric layer 122 is fully etched, and can ensure that the electrode layer 121 is not over-etched. It can easily solve the problem of difficulty in accurately controlling the etching depth when etching tiny etching holes 130 in the piezoelectric layer 122, thereby well protecting the electrode layer 121 under the etching holes 130.

[0056] Optionally, see Figure 7 , providing a base layer, and forming a composite film layer structure on the base layer along a first direction, including: S110: providing a base layer, and forming a thermal oxide layer on the base layer.

[0057] S120: forming a composite film layer structure along a first direction on the thermal oxide layer.

[0058] Please refer to Figure 4 Before forming the composite film layer structure 120, a thermal oxide layer 140 is first formed on the base layer 110. The thermal oxide layer 140 can play the role of electrical insulation, protection, isolation, and surface smoothing of the base layer 110, thereby improving the reliability and life of the prepared piezoelectric structure 100.

[0059] The formation process of the thermal oxide layer 140 may be to deposit a layer of thermal oxide material, thereby forming the thermal oxide layer 140. The material of the thermal oxide layer 140 may be silicon dioxide.

[0060] Optionally, see Figure 8 , providing a base layer, and forming a composite film layer structure on the base layer along a first direction, including: S130: providing a base layer, and sequentially forming an electrode layer and a protective layer on the base layer along a first direction.

[0061] S140: forming at least one group of piezoelectric layers and electrode layers on the protective layer along a first direction.

[0062] Please refer to Figures 4 to 6 Generally speaking, the bottom electrode layer 121 is more prone to over-etching, while the middle electrode layer 121 is less prone to over-etching. Therefore, when forming the composite film layer structure 120, after forming the bottom electrode layer 121, a protective layer 123 is first formed, and then a piezoelectric layer 122 and other electrode layers 121 are formed on the protective layer 123, thereby effectively protecting the bottom electrode layer 121. Whether to set a protective layer 123 on other electrode layers 121 can be considered as appropriate.

[0063] Optionally, the composite membrane layer structure 120 includes a bottom electrode layer 1211, a top electrode layer 1212, and at least one middle electrode layer 1213 stacked between the bottom electrode layer 1211 and the top electrode layer 1212, and a protective layer 123 is provided between at least part of the middle electrode layer 1213 and the piezoelectric layer 122 located on the middle electrode layer 1213.

[0064] The protective layer 123 is disposed above the middle electrode layer 1213 to effectively protect the middle electrode layer 121. Generally speaking, the closer the middle electrode layer 121 is to the bottom, the easier it is to have over-etching. Whether to dispose the protective layer 123 can be considered according to the position of the middle electrode layer 1213.

[0065] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

[0066] Although the various steps in the flow chart are shown in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear description in this article, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flow chart may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

Claims

1. A piezoelectric structure, characterized in that: include: A base layer, at least two electrode layers stacked on the base layer along a first direction, and a piezoelectric layer arranged between two adjacent electrode layers, a protective layer is arranged between part of the electrode layers and the piezoelectric layer located on the electrode layers, one surface of the protective layer is bonded to the electrode layer, and the other opposite surface is bonded to the piezoelectric layer; When etching the piezoelectric layer, the etching selectivity of the piezoelectric layer etching material to the protective layer is lower than the etching selectivity to the piezoelectric layer; when etching the protective layer, the etching selectivity of the protective layer etching material to the protective layer is higher than the etching selectivity to the electrode layer; An etched hole is provided in the piezoelectric structure, the top of the etched hole is located on the upper surface of the piezoelectric structure, and the bottom is located on the surface of the protective layer facing the bottommost electrode layer. The etched hole is divided into a first area located in the protective layer, and the side outer contour of the first area is located within the side outer contour of the protective layer.

2. The piezoelectric structure according to claim 1, characterized in that The protective layer covers a portion of the electrode layer.

3. The piezoelectric structure according to claim 1, characterized in that: The thickness of the protective layer is less than or equal to 20% of the thickness of the piezoelectric layer.

4. The piezoelectric structure according to claim 1, characterized in that: The cross-sectional area of ​​the protection layer is less than or equal to 150% of the maximum cross-sectional area of ​​the etching hole.

5. The piezoelectric structure according to claim 1, characterized in that: A thermal oxygen layer is provided between the base layer and the lowermost electrode layer.

6. The piezoelectric structure according to claim 1, wherein: The etching hole does not overlap with the electrode layer above the protection layer.

7. A method for preparing a piezoelectric structure, characterized in that: include: A base layer is provided, and a composite film layer structure is formed on the base layer along a first direction, wherein the composite film layer structure includes at least two electrode layers, and a piezoelectric layer arranged between two adjacent electrode layers, a protective layer is arranged between part of the electrode layers and the piezoelectric layer located on the electrode layers, when etching the piezoelectric layer, the etching selectivity of the piezoelectric layer etching material to the protective layer is lower than the etching selectivity to the piezoelectric layer, and when etching the protective layer, the etching selectivity of the protective layer etching material to the protective layer is higher than the etching selectivity to the electrode layer; Etching the piezoelectric layer along a second direction using the piezoelectric layer etching material to form a first etching hole on the piezoelectric layer, wherein the second direction is opposite to the first direction, the bottom of the first etching hole is located on the upper surface of the protective layer, and the outer contour of the bottom of the first etching hole is located within the outer contour of the upper surface of the protective layer; The protective layer is etched along the second direction using the protective layer etching material to form a second etching hole on the protective layer, wherein the bottom of the second etching hole is located at the lower surface of the protective layer, and the outer contour of the bottom of the second etching hole is located within the outer contour of the lower surface of the protective layer.

8. The method for preparing a piezoelectric structure according to claim 7, characterized in that: The step of providing a base layer and forming a composite film layer structure on the base layer along a first direction comprises: Providing a base layer, and sequentially forming an electrode layer and a protective layer on the base layer along a first direction; At least one group of piezoelectric layers and the electrode layer are formed on the protection layer along the first direction.

9. The method for preparing a piezoelectric structure according to claim 7, characterized in that: The composite membrane layer structure includes a bottom electrode layer, a top electrode layer and at least one middle electrode layer stacked between the bottom electrode layer and the top electrode layer, and a protective layer is provided between at least part of the middle electrode layer and the piezoelectric layer located on the middle electrode layer.

10. The method for preparing a piezoelectric structure according to claim 7, characterized in that: The step of providing a base layer and forming a composite film layer structure on the base layer along a first direction comprises: providing a base layer, and forming a thermal oxide layer on the base layer; A composite film layer structure is formed on the thermal oxide layer along a first direction.

Citation Information

Patent Citations

  • Bulk acoustic wave device and manufacturing method thereof

    CN114465588A

  • Bulk acoustic wave resonator and manufacturing method thereof

    CN114900147A

  • Acoustic piezoelectric structure and preparation method thereof

    CN119053227A

Cited By

  • Piezoelectric diaphragm structure and acoustic device

    CN120151746A

  • MEMS piezoelectric device

    CN121672403A