Quantum circuit optimization method and system based on CCZS gate

Abstract

The application relates to the technical field of quantum computing, in particular to a quantum circuit optimization method and system based on a CCZS gate, which constructs a key quantum gate of a quantum circuit by using a CCZS gate, the key quantum gate comprises a quantum fan-out gate, a quantum parity check gate, a control phase gate and a local full connection CZ gate, the CCZS gate is a three-qubit gate comprising one control bit and two target bits, and the state of the target bit is changed by using the state of the control bit; the key quantum gate constructed based on the CCZS gate is used for optimizing a target quantum algorithm quantum circuit, so that the fidelity and execution time of the target quantum algorithm quantum circuit are optimized by adjusting the circuit depth and / or the number of gates of the target quantum algorithm quantum circuit. The application can reduce the quantum circuit depth, improve the fidelity of the quantum algorithm, improve the execution efficiency of complex quantum algorithms such as quantum Fourier transform and quantum approximate optimization algorithm, and reduce the demand of the algorithm on quantum hardware resources.

Description

Technical Field

[0001] This invention relates to the field of quantum computing technology, and in particular to a quantum circuit optimization method and system based on CCZS gates. Background Technology

[0002] With the rapid development of quantum computing technology, quantum computers have shown great potential in many fields. However, limited by qubit decoherence and quantum gate errors, current and near-term superconducting quantum computers can only run low-depth quantum circuits to achieve acceptable fidelity. Traditional quantum computing typically relies on single-qubit and two-qubit gates as a universal gate set, which leads to a significant increase in quantum circuit depth due to complex quantum algorithms or the decomposition of multi-qubit entanglement.

[0003] In recent years, generating efficient multi-qubit gates by simultaneously applying two-qubit gates has become a research hotspot. In particular, the Controlled-CPHASE-SWAP (CCZS) gate, due to its faster speed and ability to be implemented at the coherence limit compared to using a Controlled-Z (CZ) gate alone, has shown great potential in quantum circuit synthesis. However, how to effectively apply CCZS gates to quantum circuit synthesis to improve the execution efficiency and fidelity of quantum algorithms remains a problem to be solved. Summary of the Invention

[0004] To address this issue, the present invention provides a quantum circuit optimization method and system based on CCZS gates, which solves the problem of unsatisfactory algorithm execution efficiency and fidelity of existing CCZS gates in quantum circuit synthesis applications.

[0005] According to the design scheme provided by this invention, on the one hand, a quantum circuit optimization method based on CCZS gates is provided, comprising:

[0006] A key quantum gate for quantum circuits is constructed using a CCZS gate, which is a three-qubit gate containing one control bit and two target bits. The state of the target bit is changed by the state of the control bit. The key quantum gate includes a quantum fan-out gate, a quantum parity check gate, and a control phase gate.

[0007] Key quantum gates constructed based on CCZS gates are used to optimize the quantum circuit of the target quantum algorithm, thereby improving the fidelity and running time of the target quantum algorithm quantum circuit by adjusting the line depth and / or the number of gates.

[0008] As a quantum circuit optimization method based on CCZS gates in this invention, further, a quantum fan-out door is constructed using CCZS gates, comprising:

[0009] Set the corresponding data qubits and auxiliary qubits according to the number of qubits in the quantum fan-out, and set the auxiliary qubits to the |1> state;

[0010] An H gate is set on the quantum circuit of each of the remaining qubits other than the first data qubit. The auxiliary qubit is used as the control bit of the CCZS gate. The two target bits of the CCZS gate are used to execute the SWAP gate and the CZ gate. An H gate is set on the quantum circuit of each of the remaining qubits other than the last data qubit.

[0011] As a quantum circuit optimization method based on CCZS gates in this invention, a quantum parity check gate is further constructed using CCZS gates, comprising:

[0012] By adding an H gate before and after the control NOT gate of the quantum parity check gate, the control-target relationship of the control NOT gate is adjusted, and the quantum parity check gate is equivalent to a quantum fan-out gate.

[0013] A quantum fan-door equivalent to a quantum parity gate is constructed using CCZS gates.

[0014] As a quantum circuit optimization method based on CCZS gates in this invention, further, a control phase gate is constructed using CCZS gates, comprising:

[0015] Two CCZS gates and a middle single-qubit rotation gate are set up to decompose the control phase gate into two CCZS gates and a single-qubit rotation gate.

[0016] Based on CCZS gates and single-qubit rotation gates, auxiliary qubits, control qubits, and target qubit circuits are set up so that the states of the control qubits and target qubits can be controlled through CCZS gates and the phase of the auxiliary qubits can be rotated through single-qubit rotation gates.

[0017] Furthermore, this invention also provides a quantum circuit optimization system based on CCZS gates, comprising: a gate circuit equivalent module and a quantum circuit optimization module, wherein,

[0018] A gate circuit equivalent module is used to construct key quantum gates for quantum circuits using CCZS gates. The CCZS gate is a three-qubit gate containing one control bit and two target bits, and the state of the target bit is changed by the state of the control bit. The key quantum gates include a quantum fan-out gate, a quantum parity check gate, and a control phase gate.

[0019] The quantum circuit optimization module is used to optimize the target quantum algorithm quantum circuit based on key quantum gates constructed using CCZS gates. This optimization aims to improve the fidelity and runtime of the target quantum algorithm quantum circuit by adjusting the circuit depth and / or the number of gates.

[0020] Furthermore, this invention also provides a method for implementing a quantum Fourier transform algorithm based on quantum circuit optimization, which is implemented based on the aforementioned quantum circuit optimization method. The implementation process includes:

[0021] Constructing a phase control gate in a quantum Fourier transform quantum circuit using CCZS gates;

[0022] The controlled phase gate in the quantum Fourier transform quantum circuit is replaced by a controlled phase gate constructed using a CCZS gate, and an equivalent quantum circuit for quantum Fourier transform is obtained, which is then used to realize the quantum Fourier transform.

[0023] As a further step in implementing the quantum Fourier transform algorithm based on quantum circuit optimization according to the present invention, the phase control gate in the quantum Fourier transform quantum circuit is constructed using a CCZS gate, comprising:

[0024] The quantum processor is configured according to the quantum Fourier transform algorithm, and the auxiliary qubits in the quantum processor are locked in the |0> state;

[0025] A control phase gate, equivalent to a controlled phase gate, is constructed using two CCZS gates and an intermediate single-qubit rotation gate. This allows for the control of the state of the control qubit and the target qubit in the quantum circuit via the CCZS gate, and the phase rotation of the auxiliary qubit via the single-qubit rotation gate.

[0026] Furthermore, this invention also provides a method for implementing a quantum approximation optimization algorithm based on quantum circuit optimization, which is implemented based on the aforementioned quantum circuit optimization method. The implementation process includes:

[0027] Obtain the controlled NOT gate in the quantum approximation optimized quantum circuit, and convert the controlled NOT gate into a CZ gate and a single-bit gate;

[0028] The quantum processor is configured according to the quantum approximation optimization algorithm, and the auxiliary qubits in the quantum processor are placed in the |1> quantum state so as to use the auxiliary qubits as control qubits to activate the CZ gate between the target qubit pairs;

[0029] We construct an equivalent gate structure circuit for CZ gates in quantum approximation optimization quantum circuits using CCZS gates, and achieve locally fully connected CZ gates between target qubits using the equivalent gate structure circuit.

[0030] The beneficial effects of this invention are:

[0031] This invention utilizes CCZS gates to construct efficient equivalent quantum gates to optimize quantum algorithms, significantly reducing the depth of quantum circuits and improving the fidelity of quantum algorithms. In complex quantum algorithms such as quantum Fourier transform and quantum approximation optimization algorithms, it can improve the execution efficiency of the algorithms, reduce the algorithm's requirements for quantum hardware resources, and improve the computational efficiency of quantum computing devices, showing good application prospects in the field of quantum computing. Attached image description:

[0032] Figure 1 This is the initial mapping of the 5-qubit quantum fan-out door in the embodiment and the circuit diagram implemented with CCZS gates;

[0033] Figure 2 This is a schematic diagram of the process of constructing a control phase gate based on a CCZS gate in the embodiment;

[0034] Figure 3 This is a schematic diagram of the coupling of a 5-qubit quantum processor in the embodiment;

[0035] Figure 4 This is a schematic diagram of a 4-qubit quantum Fourier circuit structure in the embodiment;

[0036] Figure 5 This is a schematic diagram of the equivalent gate structure constructed by the locally fully connected CZ gate in the network topology in the embodiment. Detailed implementation method:

[0037] To make the objectives, technical solutions, and advantages of this invention clearer and more understandable, the invention will be further described in detail below with reference to the accompanying drawings and technical solutions.

[0038] This invention provides a quantum circuit optimization method based on CCZS gates, comprising:

[0039] A key quantum gate for quantum circuits is constructed using a CCZS gate, which is a three-qubit gate containing one control bit and two target bits. The state of the target bit is changed by the state of the control bit. The key quantum gate includes a quantum fan-out gate, a quantum parity check gate, and a control phase gate.

[0040] Key quantum gates constructed based on CCZS gates are used to optimize the quantum circuit of the target quantum algorithm, thereby improving the fidelity and running time of the target quantum algorithm quantum circuit by adjusting the line depth and / or the number of gates.

[0041] The Controlled-CPHASE-SWAP (CCZS) gate is a three-qubit gate commonly used in quantum computing. It combines the functionality of Controlled-PHASE (CPHASE) and SWAP gates, enabling complex operations on three qubits. Specifically, a CCZS gate contains one control bit and two target bits, and the state of the target bits is changed by the state of the control bit. When constructing an equivalent gate structure circuit using CCZS gates, appropriate CCZS gate parameters, such as the SWAP angle θ, SWAP phase φ, and CPHASE phase γ, can be selected according to the specific requirements of the quantum circuit to achieve the desired quantum logic operations. Based on the requirements of the quantum algorithm, a quantum circuit structure incorporating CCZS gates is designed. By rationally arranging the position and order of the CCZS gates, key steps in the quantum algorithm are implemented. By adjusting the parameters and circuit structure of the CCZS gates, the quantum circuit depth can be reduced, the fidelity and execution time of the quantum circuit can be optimized, and the performance requirements of the quantum algorithm can be met.

[0042] The CCZS gate, a highly entangled three-qubit gate, can be operated by simultaneously applying two CZ gates on three qubits with nearest-neighbor coupling. In this embodiment, the parameters of the CCZS gate can be set as θ = π / 2, φ = 0, and γ = 0. These parameters are chosen based on previous research and experimental verification, ensuring the efficiency and robustness of the CCZS gate in quantum circuit synthesis.

[0043] Among them, the quantum fan door constructed using CCZS gates can be designed to include:

[0044] Set the corresponding data qubits and auxiliary qubits according to the number of qubits in the quantum fan-out, and set the auxiliary qubits to the |1> state;

[0045] An H gate is set on the quantum circuit of each of the remaining qubits other than the first data qubit. The auxiliary qubit is used as the control bit of the CCZS gate. The two target bits of the CCZS gate are used to execute the SWAP gate and the CZ gate. An H gate is set on the quantum circuit of each of the remaining qubits other than the last data qubit.

[0046] In quantum computing, the quantum fan-out door is a fundamental and important logic gate that can copy the state of one qubit to multiple target qubits. Traditional implementations of quantum fan-out doors typically require a large number of quantum gates and a long circuit depth, resulting in limited implementation efficiency and fidelity. In this embodiment, a quantum fan-out door based on a CCZS gate can be constructed, which can reduce the number of required quantum gates and the circuit depth, thereby improving the fidelity and efficiency of the fan-out door.

[0047] like Figure 1As shown, taking the construction of a 5-qubit quantum fan-out door as an example, first, prepare 5 data qubits (Q1, Q2, Q3, Q4, Q5) and 4 auxiliary qubits (A1, A2, A3, A4) set to the |1> state. Each auxiliary qubit is set as the control qubit of a CCZS gate, and simultaneous SWAP and CZ operations are performed between the data qubits using CCZS gates. By activating different auxiliary qubits one by one to execute the CCZS gate, the CZ gate on the data qubits can be gradually implemented. During this process, since the CCZS gate has a built-in SWAP operation, a Hadamard gate needs to be applied to the data qubits (except for the Q1 qubit) to correct the phase. In this way, an efficient quantum fan-out door can be constructed using fewer quantum gates and a shallower circuit depth.

[0048] Among them, the quantum parity check gate constructed using CCZS gates can be designed to include:

[0049] By adding an H gate before and after the control NOT gate of the quantum parity check gate, the control-target relationship of the control NOT gate is adjusted, and the quantum parity check gate is equivalent to a quantum fan-out gate.

[0050] A quantum fan door equivalent to a quantum parity gate is constructed using CCZS gates.

[0051] A quantum parity check gate (QGG) is a logic gate used to check the overall state (odd number of 1s or even number of 1s) of multiple qubits. It has important applications in quantum error correction and quantum algorithms. In this embodiment, when constructing a QGG based on a CCZS gate, an H-gate is added before and after the control qubit and target qubit of each CNOT gate in the parity check gate. This reverses the control-target relationship, resulting in a circuit equivalent to a quantum fan-out gate. In this way, a quantum fan-out gate is first constructed using CCZS gates, and then the parity check gate is constructed. By cleverly utilizing the properties of CCZS gates, efficient quantum parity checking can be achieved without adding additional SWAP gates.

[0052] The method of constructing a control phase gate using a CCZS gate can include:

[0053] Two CCZS gates and a middle single-qubit rotation gate are set up to decompose the control phase gate into two CCZS gates and a single-qubit rotation gate.

[0054] Based on CCZS gates and single-qubit rotation gates, auxiliary qubits, control qubits, and target qubit circuits are set up so that the states of the control qubits and target qubits can be controlled through CCZS gates and the phase of the auxiliary qubits can be rotated through single-qubit rotation gates.

[0055] Traditional control R n Gate decomposition methods typically require multiple CNOT gates and single-qubit rotation gates, leading to increased circuit depth and complexity. However, in this embodiment, this goal can be achieved more simply using CCZS gates.

[0056] Specifically, such as Figure 2 As shown, (a) is the control R n Gate, (b) is for controlling R n The gate decomposition consists of two Controlled-SWAP gates (utilizing two CCZS gate operations to eliminate unwanted CCZ effects, retaining only the required Controlled-SWAP operations) and an intermediate single-qubit rotation gate. The specific implementation can be summarized as follows:

[0057] Initialization: Set the auxiliary qubit to state |0>, and set the control qubit and a target qubit to arbitrary states.

[0058] First CCZS gate operation: The CCZS gate is used to operate on the control qubit and the two target qubits. This step simultaneously performs controlled-swap and CCZ operations, but the CCZ effect can be eliminated in subsequent operations.

[0059] Intermediate rotation: A single-qubit rotation gate Rn is applied to the auxiliary qubit to achieve the desired phase rotation.

[0060] Second CCZS gate operation: The CCZS gate is used again to operate on the control qubit and the target qubit. This step will again implement the Controlled-SWAP and CCZ operations, but when combined with the first operation, the CCZ effects cancel each other out, leaving only the desired control phase effect.

[0061] By following the steps above, the control of the Rn gate can be achieved using only three gates (two CCZS gates and one single-qubit rotation gate), which greatly reduces the number of quantum gates and circuit depth required.

[0062] Furthermore, based on the above method, this embodiment of the invention also provides a quantum circuit optimization system based on CCZS gates, comprising: a gate circuit equivalent module and a quantum circuit optimization module, wherein,

[0063] A gate circuit equivalent module is used to construct key quantum gates for quantum circuits using CCZS gates. The CCZS gate is a three-qubit gate containing one control bit and two target bits, and the state of the target bit is changed by the state of the control bit. The key quantum gates include a quantum fan-out gate, a quantum parity check gate, and a control phase gate.

[0064] The quantum circuit optimization module is used to optimize the target quantum algorithm quantum circuit based on key quantum gates constructed using CCZS gates. This optimization aims to improve the fidelity and runtime of the target quantum algorithm quantum circuit by adjusting the circuit depth and / or the number of gates.

[0065] The quantum Fourier transform (QFT) is a fundamental and widely used algorithm in quantum computing, playing a particularly important role in fields such as quantum chemistry and quantum simulation. However, traditional QFT implementations typically require a large number of fundamental quantum gates (such as CZ gates and H gates), which leads to a significant increase in circuit depth and complexity.

[0066] Furthermore, based on the above-described quantum circuit optimization method, this embodiment of the invention also provides a method for implementing a quantum Fourier transform algorithm based on quantum circuit optimization, comprising:

[0067] Constructing a phase control gate in a quantum Fourier transform quantum circuit using CCZS gates;

[0068] The controlled phase gate in the quantum Fourier transform quantum circuit is replaced by a controlled phase gate constructed using a CCZS gate, and an equivalent quantum circuit for quantum Fourier transform is obtained, which is then used to realize the quantum Fourier transform.

[0069] Specifically, a quantum processor is configured based on the quantum Fourier transform algorithm, and the auxiliary qubits in the quantum processor are locked in the |0> state. A control phase gate, equivalent to a controlled phase gate, is constructed using two CCZS gates and an intermediate single-qubit rotation gate. This allows for the control of the states of the control qubit and the target qubit within the quantum circuit via the CCZS gate, and the phase rotation of the auxiliary qubit via the single-qubit rotation gate.

[0070] Specifically, in order to perform the quantum Fourier transform (QFT) algorithm using CCZS gates, the following can be used: Figure 3 The hardware coupling scheme shown depicts A as an auxiliary qubit locked in the |0> state. Under this coupling structure, a CCZS gate can be implemented between Q1, Q2 (or Q3, Q4), and A, where Q1 is the control qubit, and Q2 (or Q3, Q4) and A are the target qubits. This means that a controlled R can be constructed based on the aforementioned CCZS gate. n The gate method implements controlled R between Q1 and Q2 (or Q3, Q4). n Gates. However, in the QFT algorithm, most controlled R... n Gates have the same target qubit but different control qubits, such as Figure 4 As shown in (a) above. To better utilize this structure to execute the QFT algorithm, the control-target relationship of the controlled Rn gate in the QFT algorithm needs to be adjusted.n Swapping the roles of the control qubit and the target qubit within a gate does not alter its matrix. Therefore, we can obtain... Figure 4 The equivalent quantum bit QFT circuit shown in (b) demonstrates how to better construct the QFT algorithm quantum circuit using CCZS gates.

[0071] On another front, in order to effectively utilize the CCZS gate in the quantum approximation optimization algorithm (QAOA), this embodiment of the invention also provides a method for implementing the quantum approximation optimization algorithm based on quantum circuit optimization. The implementation process, based on the aforementioned quantum circuit optimization method, includes:

[0072] Obtain the controlled NOT gate in the quantum approximation optimized quantum circuit, and convert the controlled NOT gate into a CZ gate and a single-bit gate;

[0073] The quantum processor is configured according to the quantum approximation optimization algorithm, and the auxiliary qubits in the quantum processor are placed in the |1> quantum state so as to use the auxiliary qubits as control qubits to activate the CZ gate between the target qubit pairs;

[0074] We construct an equivalent gate structure circuit for CZ gates in quantum approximation optimization quantum circuits using CCZS gates, and achieve locally fully connected CZ gates between target qubits using the equivalent gate structure circuit.

[0075] Constructing locally fully connected CZ gates on a quantum processor is a key step in implementing the QAOA algorithm. In this embodiment, consider a qubit layout such as... Figure 5 As shown, the diagram includes a central qubit A (auxiliary qubit) and four surrounding qubits Q1, Q2, Q3, and Q4. This arrangement allows for the implementation of a locally fully connected CZ gate structure. The auxiliary qubit A is placed in the quantum state |1> to ensure that, in subsequent CCZS gate operations, A can act as a control qubit to activate CZ operations between the target qubit pairs. Simultaneously, Q1, Q2, Q3, and Q4 are initialized to the desired initial states. For any two qubits Q1, Q2, Q3, and Q4... i and Q j (i,j=1,2,3,4 and i≠j), a single CCZS gate operation can be performed, where A is the control qubit and Q is the control qubit. i and Q j As the target qubit, since A remains in the |1> state, the CCZS gate will simultaneously realize Q. i and Q j The CZ and SWAP operations are involved. However, in the construction of locally fully connected CZ gates, the main focus is on the CZ operation. The SWAP operation can be used to reorder (i.e., remap) the qubits after the entire quantum circuit has been executed to restore the original layout or meet other algorithmic requirements.

[0076] By following the steps described above, a locally fully connected CZ gate structure can be achieved between qubits Q1, Q2, Q3, and Q4 using CCZS gates. This method avoids the use of numerous SWAP gates when constructing CZ gates, thereby reducing circuit complexity and runtime while improving circuit fidelity.

[0077] After constructing a locally fully connected CZ-gate network, these CZ gates and single-qubit gates can be used to implement the QAOA algorithm. Specifically:

[0078] The QAOA algorithm constructs quantum circuits by alternating the application of parameterized quantum gates (typically CNOT gates and single-qubit rotation gates). First, the CNOT gate can be converted into a CZ gate and a single-qubit gate. Consider, for example... Figure 4 The topology shown applies a series of single-qubit rotation gates to each QAOA layer. For CZ gates, CZ gates constructed from CCZS gates are used to realize the interaction between qubits.

[0079] Since the CCZS gate is accompanied by a SWAP operation when constructing the CZ gate, the execution location of the single-bit gate needs to be considered when necessary.

[0080] By following the steps described above, the complex quantum circuits required for the QAOA algorithm can be efficiently implemented on a quantum processor using CCZS gates. Compared to traditional methods, this approach reduces the number of SWAP gates used, lowers noise and decoherence effects during quantum state exchange, thereby improving the execution efficiency and accuracy of the QAOA algorithm.

[0081] Unless otherwise specifically stated, the relative steps, numerical expressions, and values ​​of the components and steps described in these embodiments do not limit the scope of the invention.

[0082] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the systems disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple; relevant parts can be referred to the method section.

[0083] Finally, it should be noted that the above-described embodiments are merely specific implementations of the present invention, used to illustrate the technical solutions of the present invention, and not to limit it. The scope of protection of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments within the technical scope disclosed in the present invention, or make equivalent substitutions for some of the technical features; and these modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A quantum circuit optimization method based on CCZS gates, characterized in that, Include: A key quantum gate for quantum circuits is constructed using a CCZS gate, which is a three-qubit gate containing one control bit and two target bits. The state of the target bit is changed by the state of the control bit. The key quantum gate includes a quantum fan-out gate, a quantum parity check gate, and a control phase gate. The key quantum gates constructed based on CCZS gates are used to optimize the quantum circuit of the target quantum algorithm, so as to optimize the fidelity and running time of the target quantum algorithm quantum circuit by adjusting the line depth and / or the number of gates. The process of constructing a quantum fan-out gate using CCZS gates includes: setting corresponding data qubits and auxiliary qubits based on the number of qubits in the quantum fan-out gate, and setting the auxiliary qubits to... In the state; set an H gate on the quantum circuit of each of the remaining qubits other than the first data qubit, use the auxiliary qubit as the control bit of the CCZS gate, and use the two target bits of the CCZS gate to execute the SWAP gate and the CZ gate. Set an H gate on the quantum circuit of each of the remaining qubits other than the last data qubit. Constructing a quantum parity check gate using CCZS gates involves: adding an H gate before and after the control-NOT gate of the quantum parity check gate to adjust the control-target relationship of the control-NOT gate, thus making the quantum parity check gate equivalent to a quantum fan-out gate; and constructing a quantum fan-out gate equivalent to the quantum parity check gate using CCZS gates. Constructing a control phase gate using CCZS gates involves: setting up two CCZS gates and an intermediate single-qubit rotation gate to decompose the control phase gate into two CCZS gates and a single-qubit rotation gate; setting up auxiliary qubit, control qubit, and target qubit circuits based on the CCZS gates and the single-qubit rotation gate, so that the states of the control qubit and target qubit can be controlled in the quantum circuit through the CCZS gates and the phase of the auxiliary qubit can be rotated through the single-qubit rotation gate.

2. A quantum circuit optimization system based on CCZS gates, characterized in that, The method described in claim 1 includes: a gate circuit equivalent module and a quantum circuit optimization module, wherein... A gate circuit equivalent module is used to construct key quantum gates for quantum circuits using CCZS gates. The CCZS gate is a three-qubit gate containing one control bit and two target bits, and the state of the target bit is changed by the state of the control bit. The key quantum gates include a quantum fan-out gate, a quantum parity check gate, and a control phase gate. The quantum circuit optimization module is used to optimize the target quantum algorithm quantum circuit based on key quantum gates constructed using CCZS gates. This optimization aims to improve the fidelity and runtime of the target quantum algorithm quantum circuit by adjusting the circuit depth and / or the number of gates.

3. A method for implementing a quantum Fourier transform algorithm based on quantum circuit optimization, characterized in that, The implementation is based on the quantum circuit optimization method described in claim 1, and the implementation process includes: Constructing a phase control gate in a quantum Fourier transform quantum circuit using CCZS gates; By replacing the controlled phase gate in the quantum Fourier transform quantum circuit with a control phase gate constructed using CCZS gates, an equivalent quantum circuit for quantum Fourier transform is obtained, which is then used to realize the quantum Fourier transform.

4. The method for implementing the quantum Fourier transform algorithm based on quantum circuit optimization according to claim 3, characterized in that, Constructing phase control gates in quantum Fourier transform quantum circuits using CCZS gates, including: The quantum processor is configured according to the quantum Fourier transform algorithm, and the auxiliary qubits in the quantum processor are locked in the |0> state; A control phase gate, equivalent to a controlled phase gate, is constructed using two CCZS gates and an intermediate single-qubit rotation gate. This allows for the control of the state of the control qubit and the target qubit in the quantum circuit via the CCZS gate, and the phase rotation of the auxiliary qubit via the single-qubit rotation gate.

5. A method for implementing a quantum approximation optimization algorithm based on quantum circuit optimization, characterized in that, The implementation is based on the quantum circuit optimization method described in claim 1, and the implementation process includes: Obtain the controlled NOT gate in the quantum approximation optimized quantum circuit, and convert the controlled NOT gate into a CZ gate and a single-bit gate; The quantum processor is configured according to the quantum approximation optimization algorithm, and the auxiliary qubits in the quantum processor are placed in the |1> quantum state so as to use the auxiliary qubits as control qubits to activate the CZ gate between the target qubit pairs; We construct an equivalent gate structure circuit for CZ gates in quantum approximation optimization quantum circuits using CCZS gates, and achieve locally fully connected CZ gates between target qubits using the equivalent gate structure circuit.

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