Power supply selection circuit, display panel and display device

Abstract

The application discloses a power supply selection circuit, a display panel and a display device. The power supply selection circuit comprises a voltage signal line, which is used for transmitting a voltage signal to a first electrode of a light-emitting sub-pixel and controlling at least two groups of light-emitting sub-pixels to emit light in groups. One group of light-emitting sub-pixels comprises at least one row of light-emitting sub-pixels or at least one row of light-emitting sub-pixel units, and one light-emitting sub-pixel unit comprises at least two different light-emitting sub-pixels. According to the embodiment of the application, independent light-emitting control of each group of light-emitting sub-pixels can be realized, so that the light-emitting sub-pixels can be lit in rows or in groups.

Description

Technical Field

[0001] This application belongs to the field of display technology, and in particular relates to a power selection circuit, a display panel, and a display device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) and flat panel displays based on light-emitting diodes (LEDs) are widely used in various consumer electronics products such as mobile phones, televisions, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body, and wide range of applications, becoming the mainstream of display devices.

[0003] However, the performance of current OLED display products needs to be improved. Summary of the Invention

[0004] This application provides a power selection circuit, a display panel, and a display device, which can solve the technical problem in the prior art that different refresh rates cannot be used to drive different areas when displaying multiple screens simultaneously.

[0005] In a first aspect, embodiments of this application provide a power selection circuit, including a voltage signal line, which is used to transmit a voltage signal to the first electrode of a light-emitting sub-pixel and control at least two groups of light-emitting sub-pixels to emit light one group at a time.

[0006] A group of light-emitting sub-pixels includes at least one row of light-emitting sub-pixels or at least one row of light-emitting sub-pixel units, and a light-emitting sub-pixel unit includes at least two different types of light-emitting sub-pixels.

[0007] In some embodiments, the voltage signal line is interrupted to transmit a voltage signal that is less than the difference between the second electrode voltage of the light-emitting sub-pixel and the turn-on voltage of the light-emitting sub-pixel.

[0008] In some embodiments, the voltage signal line transmits, in a time-division manner, a voltage signal that is less than the difference between the second electrode voltage of the light-emitting sub-pixel and the turn-on voltage of the light-emitting sub-pixel, and a voltage signal that is greater than the difference between the second electrode voltage of the light-emitting sub-pixel and the turn-on voltage of the light-emitting sub-pixel.

[0009] In some embodiments, at least partially different light-emitting sub-pixels of at least two different types are located in different rows.

[0010] In some embodiments, the power selection circuit further includes a first signal module, and the voltage signal line includes a first voltage signal line;

[0011] The first terminal of the first signal module is connected to the first voltage signal line, the second terminal of the first signal module is connected to the first electrode of a group of light-emitting sub-pixels, and the control terminal of the first signal module is connected to the first control signal line.

[0012] During the light-emitting stage, the voltage signal transmitted in the first voltage signal line is less than the difference between the second electrode voltage of the light-emitting sub-pixel and the turn-on voltage of the light-emitting sub-pixel.

[0013] In some embodiments, the power selection circuit further includes a second signal module, and the voltage signal line further includes a second voltage signal line;

[0014] The first terminal of the second signal module is connected to the second voltage signal line, the second terminal of the second signal module is connected to the second terminal of the first signal module, and the control terminal of the second signal module is connected to the second control signal line.

[0015] In the non-light-emitting stage, the voltage signal transmitted in the second voltage signal line is greater than the difference between the second electrode voltage of the light-emitting sub-pixel and the turn-on voltage of the light-emitting sub-pixel.

[0016] In some embodiments, the first signal module includes a first transistor, a first electrode of the first transistor is connected to a first voltage signal line, a second electrode of the first transistor is connected to a first electrode of a group of light-emitting sub-pixels, and the gate of the first transistor is connected to a first control signal line.

[0017] The second signal module includes a second transistor, the first terminal of the second transistor is connected to a second voltage signal line, the second terminal of the second transistor is connected to the second terminal of the first transistor, and the gate of the second transistor is connected to a second control signal line.

[0018] In some embodiments, the types of the first transistor and the second transistor are opposite, and the signals in the first control signal line and the signals in the second control signal line are the same.

[0019] In some embodiments, the first control signal line and the second control signal line are the same signal line.

[0020] In some embodiments, the first transistor and the second transistor are of the same type, and the signal in the first control signal line is the opposite of the signal in the second control signal line.

[0021] In some embodiments, the signals in the first control signal line and the signals in the second control signal line are both step-by-step shift signals.

[0022] In some embodiments, the signal duty cycle in the first control signal line and the signal duty cycle in the second control signal line can both be adjusted.

[0023] Secondly, embodiments of this application provide a display panel, including the power selection circuit of the first aspect, and...

[0024] Multiple groups of light-emitting sub-pixels are arranged in an array. Each group of light-emitting sub-pixels includes at least one row of light-emitting sub-pixels or at least one row of light-emitting sub-pixel units. A light-emitting sub-pixel unit includes at least two different types of light-emitting sub-pixels. The first electrodes of the light-emitting sub-pixels in the same group are electrically connected, and the first electrodes of the light-emitting sub-pixels in different groups are mutually insulated.

[0025] A power selection circuit is connected to the first electrode of a group of light-emitting sub-pixels.

[0026] In some embodiments, the first electrodes of light-emitting sub-pixels in adjacent rows of the same group or in light-emitting sub-pixel units are electrically connected through isolation pillars.

[0027] In some embodiments, the isolation pillars between light-emitting sub-pixels or light-emitting sub-pixels in different groups and adjacent rows are provided with partition grooves. The partition grooves are used to divide the isolation pillars into first sub-isolation pillars and second sub-isolation pillars. The first sub-isolation pillars and the second sub-isolation pillars are insulated from each other. The light-emitting sub-pixels in one row of light-emitting sub-pixels or light-emitting sub-pixel units located in different groups and adjacent rows are electrically connected to the first sub-isolation pillar, and the light-emitting sub-pixels in another row of light-emitting sub-pixels or light-emitting sub-pixel units located in different groups and adjacent rows are electrically connected to the second sub-isolation pillar.

[0028] In some embodiments, the power selection circuit is connected to the isolation post.

[0029] In some embodiments, the isolation column includes a metal isolation column;

[0030] In some embodiments, in the single-group extension direction of the vertical light-emitting sub-pixels, the cross-sectional shape of the conductive portion of the isolation pillar includes a T-shape or an inverted trapezoid.

[0031] In some embodiments, the display panel includes a display area and a non-display area, with light-emitting sub-pixels located in the display area and a power selection circuit located in the non-display area.

[0032] In some embodiments, the non-display area is located on at least one side of the display area.

[0033] In some embodiments, the non-display areas are located on opposite sides of the display area, and each side of the non-display area includes a power selection circuit.

[0034] In some embodiments, the first electrode of a light-emitting sub-pixel in the same row or in a light-emitting sub-pixel unit is connected to multiple power selection circuits.

[0035] In some embodiments, the first electrode of a light-emitting sub-pixel in the same row or light-emitting sub-pixel unit is connected to two power selection circuits. Of the two power selection circuits connected to the first electrode of a light-emitting sub-pixel in the same row or light-emitting sub-pixel unit, one power selection circuit is located in a non-display area on one side of the display area, and the other power selection circuit is located in a non-display area on the opposite side of the display area.

[0036] Thirdly, embodiments of this application provide a display device, including the display panel of the second aspect.

[0037] Compared with the prior art, the power selection circuit, display panel, and display device provided in this application embodiment transmit voltage signals to the first electrode of the light-emitting sub-pixels by setting voltage signal lines, enabling the voltage signals to be transmitted to the light-emitting sub-pixels in the same group. By controlling the time interval for different groups of light-emitting sub-pixels to receive the voltage signals, the sequential illumination of each group of light-emitting sub-pixels can be achieved. When voltage signal lines are set in the display panel, independent illumination control of each group of light-emitting sub-pixels can be achieved through the voltage signal lines, thereby realizing the sequential lighting of rows or groups of light-emitting sub-pixels. Attached Figure Description

[0038] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0039] Figure 1 This is a schematic diagram of the module structure of a power selection circuit provided in an embodiment of this application;

[0040] Figure 2 This is a schematic diagram of the module structure of a power selection circuit provided in another embodiment of this application;

[0041] Figure 3 yes Figure 1 Signal timing diagram of the power selection circuit;

[0042] Figure 4 yes Figure 2 Signal timing diagram of the power selection circuit;

[0043] Figure 5 This is a schematic diagram of the module structure of a power selection circuit provided in another embodiment of this application;

[0044] Figure 6 This is a schematic diagram of the circuit structure of a light-emitting sub-pixel provided in an embodiment of this application;

[0045] Figure 7 This is a schematic diagram of a structure provided in an embodiment of this application, showing that the first electrodes of two adjacent rows of light-emitting sub-pixels are isolated from each other;

[0046] Figure 8 This is a schematic diagram of a partial layer structure of a light-emitting sub-pixel provided in an embodiment of this application;

[0047] Figure 9 This is a schematic diagram of the circuit structure of a power selection circuit provided in an embodiment of this application;

[0048] Figure 10 yes Figure 9 Signal timing diagram of the power selection circuit;

[0049] Figure 11 This is a schematic diagram of the module structure of a power selection circuit provided in another embodiment of this application;

[0050] Figure 12 This is a schematic diagram of the circuit structure of a power selection circuit provided in another embodiment of this application;

[0051] Figure 13 yes Figure 12 Signal timing diagram of the power selection circuit;

[0052] Figure 14 This is a schematic diagram of the circuit structure of a power selection circuit provided in another embodiment of this application;

[0053] Figure 15 yes Figure 14 Signal timing diagram of the power selection circuit;

[0054] Figure 16 This is a schematic diagram of the circuit structure of a display panel provided in an embodiment of this application;

[0055] Figure 17 yes Figure 16 The corresponding signal timing diagram;

[0056] Figure 18 This is a schematic diagram of the circuit structure of a display panel provided in another embodiment of this application;

[0057] Figure 19 yes Figure 15 The corresponding signal timing diagram;

[0058] Figure 20 This is a schematic diagram of the circuit structure of a display panel provided in another embodiment of this application;

[0059] Figure 21 yes Figure 20 The corresponding signal timing diagram;

[0060] Figure 22This is a schematic diagram of the signal timing of a single light-emitting frame in related technologies;

[0061] Figure 23 yes Figure 22 A schematic diagram of the light emission state of each row of light-emitting sub-pixels in the embodiment;

[0062] Figure 24 This is a schematic diagram of the signal timing of a single light-emitting frame in one embodiment of this application;

[0063] Figure 25 yes Figure 24 A schematic diagram of the light emission state of each row of light-emitting sub-pixels in the embodiment;

[0064] Figure 26 This is a signal timing diagram of a single light-emitting frame in another embodiment of this application;

[0065] Figure 27 yes Figure 26 A schematic diagram of the light emission state of each row of light-emitting sub-pixels in the embodiment;

[0066] Figure 28 This is a schematic diagram of a simulation waveform provided in an embodiment of this application;

[0067] Figure 29 This is a schematic diagram of the structure of a display device provided in an embodiment of this application.

[0068] In the attached image:

[0069] 1. Power selection module; 11. First signal module; 12. Second signal module; 20. Light-emitting sub-pixel; 21. Pixel driving circuit; L. Light-emitting element; ELVSS. First voltage signal line; EM. First control signal line; T1. First transistor; T2. Second transistor. Detailed Implementation

[0070] The features and exemplary embodiments of various aspects of this application will be described in detail below. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain this application and not to limit it. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples of this application.

[0071] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0072] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The embodiments will now be described in detail with reference to the accompanying drawings.

[0073] Organic light-emitting diode (OLED) and flat panel display devices based on light-emitting diode (LED) technologies are widely used in various consumer electronics products such as mobile phones, televisions, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body, and wide application range, becoming the mainstream display devices. However, the performance of current OLED display products still needs improvement.

[0074] With the continuous development of display technology, the demand for PPI (Pixels Per Inch) in UI and display devices is gradually increasing. To achieve a higher PPI within a display screen of the same size, the area of ​​a single luminous subpixel needs to be reduced. Since a single luminous subpixel is typically composed of a pixel driving circuit and a light-emitting element assembly, reducing the area of ​​the luminous subpixel usually requires reducing the number of transistors housed within the pixel driving circuit. That is, in display panel products with higher PPI, the number of transistors contained in the pixel driving circuit is usually lower than the number of transistors in currently more conventional pixel driving circuits.

[0075] However, reducing the number of transistors in the pixel driving circuit will result in the loss of corresponding functions. Specifically, if the transistors used in conventional pixel driving circuits to enable sequential pixel illumination are removed, then individual pixel rows within the display panel will no longer be able to emit light sequentially.

[0076] To address the aforementioned technical problems, embodiments of this application provide a power selection circuit, a display panel, and a display device. The display panel provided in this application embodiment will be described first.

[0077] Figure 1 A schematic diagram of a power selection circuit according to an embodiment of this application is shown. The power selection circuit includes a voltage signal line that can transmit a voltage signal to the first electrode of the light-emitting sub-pixel 20.

[0078] In the array of light-emitting sub-pixels 20 arranged in the display panel, multiple light-emitting sub-pixels 20 can be divided into various light-emitting sub-pixel groups. A group of light-emitting sub-pixels 20 includes at least one row of light-emitting sub-pixels 20 or at least one row of light-emitting sub-pixel units. Among them, a light-emitting sub-pixel unit can include at least two different types of light-emitting sub-pixels, and a voltage signal line can control at least two groups of light-emitting sub-pixels 20 to emit light group by group.

[0079] When the voltage signal line does not transmit a voltage signal to the first electrode of the light-emitting sub-pixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 will be less than the activation voltage of the light-emitting sub-pixel 20, and the light-emitting sub-pixel 20 will not emit light at this time.

[0080] For example, such as Figure 1 As shown, the Signal Line is a voltage signal line, node n4 is the first electrode of the light-emitting sub-pixel 20, and node n3 is the second electrode of the light-emitting sub-pixel 20. When the voltage signal line transmits a voltage signal to the first electrode of the light-emitting sub-pixel 20, and the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is greater than the activation voltage of the light-emitting sub-pixel 20, i.e. (Vn3-Vn4)>Von, the light-emitting sub-pixel 20 will emit light.

[0081] When the voltage signal line provides a voltage signal to the same group of light-emitting sub-pixels 20, multiple light-emitting sub-pixels 20 in the same group can emit light or extinguish light synchronously. By adjusting the timing of the voltage signal transmission to different groups of light-emitting sub-pixels 20, the emission times of different groups of light-emitting sub-pixels 20 can be staggered, thereby enabling each group of light-emitting sub-pixels 20 to emit light sequentially.

[0082] It is understood that a group of light-emitting sub-pixels 20 may include at least one row of light-emitting sub-pixels 20. When each group of light-emitting sub-pixels 20 includes a single row of light-emitting sub-pixels 20, it is possible to achieve sequential illumination of each row of light-emitting sub-pixels 20; when each group of light-emitting sub-pixels 20 includes two or more rows of light-emitting sub-pixels 20, it is possible to achieve sequential illumination of two rows or multiple rows of light-emitting sub-pixels 20.

[0083] For light-emitting sub-pixels 20 that have had their transistor count reduced in pursuit of higher PPI, and which cannot achieve row-by-row or multi-row illumination, voltage signals can be provided individually to one or more rows of light-emitting sub-pixels 20 within the same group via voltage signal lines. When the light-emitting sub-pixels 20 are in a non-light-emitting phase, data writing and initialization steps are performed on the light-emitting sub-pixels 20.

[0084] In this embodiment, by setting voltage signal lines, voltage signals can be transmitted to the first electrode of the light-emitting sub-pixel 20, enabling the light-emitting sub-pixel 20 to switch between a light-emitting phase and a non-light-emitting phase, thereby achieving light-emitting control of the light-emitting sub-pixel 20. By controlling the light-emitting phases of different groups of light-emitting sub-pixels 20 to be staggered, each group of light-emitting sub-pixels 20 can be made to emit light sequentially. When voltage signal lines are set in the display panel, independent light-emitting control of each group of light-emitting sub-pixels 20 can be achieved through the voltage signal lines, thereby enabling the row-by-row or group-by-group lighting of the light-emitting sub-pixels.

[0085] In some embodiments, the voltage signal line can intermittently transmit a voltage signal that is less than the difference between the second electrode voltage of the light-emitting sub-pixel 20 and the turn-on voltage of the light-emitting sub-pixel 20.

[0086] When the voltage signal is transmitted to the first electrode of the light-emitting sub-pixel 20 via the voltage signal line, the light-emitting sub-pixel 20 can emit light because the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is greater than the activation voltage of the light-emitting sub-pixel 20.

[0087] A parasitic capacitance exists between the first and second electrodes of the light-emitting sub-pixel 20. When the voltage signal line stops transmitting the voltage signal to the first electrode of the light-emitting sub-pixel 20, due to the characteristic that the voltage across the parasitic capacitance cannot change abruptly, the potential of the first electrode corresponding to each light-emitting sub-pixel 20 remains the signal voltage of the voltage signal. However, as the electrons stored in the parasitic capacitance continuously recombine with holes to emit light, the voltage difference across the parasitic capacitance will gradually decrease, thereby causing the voltage difference between the second and first electrodes of the light-emitting sub-pixel 20 to gradually decrease. That is, when the voltage signal line stops transmitting the voltage signal to the first electrode of the light-emitting sub-pixel 20, the light-emitting sub-pixel 20 will gradually turn off.

[0088] The voltage signal line transmits voltage signals intermittently, which can make the light-emitting sub-pixel 20 emit light when the voltage signal is being transmitted normally, and make the light-emitting sub-pixel 20 turn off when the voltage signal is stopped.

[0089] In some embodiments, two voltage signals can be transmitted in a time-division multiplexing manner in the voltage signal line described above. One voltage signal is less than the difference between the second electrode voltage of the light-emitting sub-pixel 20 and the turn-on voltage of the light-emitting sub-pixel 20, and the other voltage signal is greater than the difference between the second electrode voltage of the light-emitting sub-pixel 20 and the turn-on voltage of the light-emitting sub-pixel 20.

[0090] When the voltage signal transmitted by the voltage signal line is less than the difference between the voltage of the second electrode of the light-emitting sub-pixel 20 and the turn-on voltage of the light-emitting sub-pixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is greater than the turn-on voltage of the light-emitting sub-pixel 20, and the light-emitting sub-pixel 20 can emit light.

[0091] When the amplitude of the voltage signal transmitted by the voltage signal line is greater than the difference between the voltage of the second electrode of the light-emitting sub-pixel 20 and the activation voltage of the light-emitting sub-pixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 will be less than the activation voltage of the light-emitting sub-pixel 20. At this time, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 cannot drive the light-emitting sub-pixel 20 to emit light, and the light-emitting sub-pixel will be turned off.

[0092] like Figure 2 As shown, the Signal Line is a voltage signal line, node n4 is the first electrode of the light-emitting sub-pixel 20, and node n3 is the second electrode of the light-emitting sub-pixel 20. The two voltage signals transmitted in the voltage signal line in a time-division manner can be ELVSS and ELVDD, respectively. When the voltage signal line transmits ELVSS to the first electrode of the light-emitting sub-pixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is greater than the activation voltage of the light-emitting sub-pixel 20, that is, (Vn3-Vn4)>Von, and the light-emitting sub-pixel 20 will emit light; when the voltage signal line transmits ELVDD to the first electrode of the light-emitting sub-pixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is less than the activation voltage of the light-emitting sub-pixel 20, and the light-emitting sub-pixel 20 is turned off.

[0093] Compared to the aforementioned implementation method where voltage signals are intermittently transmitted via voltage signal lines, in this embodiment, the light-emitting sub-pixel 20 is not extinguished by stopping the transmission of voltage signals. Instead, a voltage signal greater than the difference between the voltage of the second electrode of the light-emitting sub-pixel and the activation voltage of the light-emitting sub-pixel is transmitted. Under this voltage signal, the potential of the first electrode of the light-emitting sub-pixel 20 can be rapidly increased, causing the voltage difference between the second and first electrodes of the light-emitting sub-pixel 20 to decrease to below the activation voltage more quickly. In other words, the extinguishing speed of the light-emitting sub-pixel 20 is increased.

[0094] In some embodiments, taking a group of light-emitting sub-pixels comprising at least one row of light-emitting sub-pixel units as an example, a light-emitting sub-pixel unit comprises at least two different types of light-emitting sub-pixels. Wherein, at least a portion of the at least two different light-emitting sub-pixels are located in different rows. For example, when a single light-emitting sub-pixel unit comprises two different light-emitting sub-pixels, these two different light-emitting sub-pixels may be located in different rows; when a single light-emitting sub-pixel unit comprises three or more types of light-emitting sub-pixels, at least two different light-emitting sub-pixels may be located in different rows.

[0095] Please refer to Figure 3 , Figure 3 The diagram illustrates the signal timing of the power selection circuit in an implementation where voltage signals are intermittently transmitted via voltage signal lines. Taking ELVSS as an example, in the P1 interval, the voltage signal line stops transmitting voltage signals. At this time, the potential of node N4, i.e., the potential of the first electrode of the light-emitting sub-pixel 20, gradually rises until the light-emitting sub-pixel 20 is turned off. Within the P1 interval, the Scan signal can provide a high-level pulse as an enable signal to enable data signal writing during the non-light-emitting phase within the enable-enabled interval.

[0096] Within the P2 region, the voltage signal line transmits the voltage signal. At this time, the potential of node N4 is pulled down to ELVSS, and the light-emitting sub-pixel 20 emits light.

[0097] Figure 4 This illustrates the signal timing diagram of the power selection circuit in an implementation where the voltage signal line can transmit two voltage signals in a time-division multiplexing manner. Taking ELVSS and ELVDD as examples, in the P1 interval, the voltage signal line transmits ELVDD. At this time, the potential of node N4, i.e., the potential of the first electrode of the light-emitting sub-pixel 20, will be rapidly pulled up to ELVDD, causing the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 to decrease to less than the turn-on voltage, and the light-emitting sub-pixel 20 will turn off. Within the P1 interval, the Scan signal can provide a high-level pulse as an enable signal to enable data signal writing during the non-light-emitting stage within the enable effective interval.

[0098] Within the P2 region, the voltage signal line transmits ELVSS. At this time, the potential of node N4 is pulled low to ELVSS, and the light-emitting sub-pixel 20 emits light.

[0099] Please refer to Figure 5 In some embodiments, the power selection circuit described above may include a first signal module 11, and the voltage signal line may include a first voltage signal line ELVSS.

[0100] like Figure 9As shown, the first signal module 11 includes a first terminal, a second terminal, and a control terminal. The first terminal of the first signal module 11 is connected to the first voltage signal line ELVSS, the second terminal of the first signal module 11 is connected to the first electrode corresponding to a group of light-emitting sub-pixels 20, and the control terminal of the first signal module 11 is connected to the first control signal line EM.

[0101] During the light-emitting phase, the voltage signal provided by the first voltage signal line ELVSS is less than the difference between the voltage of the second electrode of the light-emitting sub-pixel 20 and the activation voltage of the light-emitting sub-pixel 20. That is, the second electrode of the light-emitting sub-pixel 20 is the anode, and the first electrode is the cathode. At this time, the light-emitting sub-pixel 20 can emit light.

[0102] like Figure 9 As shown, the potential of N4 is the potential of the first electrode corresponding to the light-emitting sub-pixel 20. The first signal module 11 can be connected to the first electrode corresponding to a group of light-emitting sub-pixels 20. This group of light-emitting sub-pixels 20 can be a row of light-emitting sub-pixels 20 or multiple consecutive rows of light-emitting sub-pixels 20.

[0103] Taking a display panel containing n rows of light-emitting sub-pixels 20 as an example, when each first signal module 11 is connected to the first electrode corresponding to a row of light-emitting sub-pixels 20, the n rows of light-emitting sub-pixels 20 correspond to n first signal modules 11 respectively; and when each first signal module 11 is connected to the first electrode corresponding to x rows of light-emitting sub-pixels 20, where x is a positive integer greater than or equal to 2, since a single first signal module 11 corresponds to x rows of light-emitting sub-pixels 20, the n rows of light-emitting sub-pixels 20 correspond to (n / x) first signal modules 11.

[0104] The first electrode corresponding to the light-emitting sub-pixel 20 connected to the first signal module 11 is insulated from the first electrode corresponding to the light-emitting sub-pixel 20 connected to the other first signal module 11.

[0105] For example, when the first signal module 11 is connected to the first electrode corresponding to a group of light-emitting sub-pixels 20, the first electrode corresponding to the group of light-emitting sub-pixels 20 is insulated from the first electrode corresponding to the previous group of light-emitting sub-pixels 20, and the first electrode corresponding to the group of light-emitting sub-pixels 20 is insulated from the first electrode corresponding to the next group of light-emitting sub-pixels 20.

[0106] When the first signal module 11 is connected to the first electrode corresponding to the x-row light-emitting sub-pixels 20, the first electrodes corresponding to each row of light-emitting sub-pixels 20 in the x-row are electrically connected to each other. The first electrode corresponding to the first row of light-emitting sub-pixels 20 in the x-row is isolated from the first electrode corresponding to the previous row of light-emitting sub-pixels 20, and the first electrode corresponding to the last row of light-emitting sub-pixels 20 in the x-row is isolated from the first electrode corresponding to the next row of light-emitting sub-pixels 20.

[0107] Taking a group of light-emitting sub-pixels 20 including three consecutive rows of light-emitting sub-pixels 20 as an example, when a certain first signal module 11 is connected to the first electrode corresponding to the light-emitting sub-pixels 20 in rows 101-103, the first electrodes corresponding to the light-emitting sub-pixels 20 in rows 101-103 are all electrically connected to each other. The first electrode corresponding to the light-emitting sub-pixels 20 in row 101 is insulated from the first electrode corresponding to the light-emitting sub-pixels 20 in row 100, and the first electrode corresponding to the light-emitting sub-pixels 20 in row 103 is insulated from the first electrode corresponding to the light-emitting sub-pixels 20 in row 104.

[0108] When the first signal module 11 is turned on, the first voltage signal line ELVSS can be connected to the first electrode of one or more rows of light-emitting sub-pixels 20 through the first signal module 11. At this time, the first electrode of the one or more rows of light-emitting sub-pixels 20 can receive the voltage signal provided by the first voltage signal line ELVSS. When the second electrode of the one or more rows of light-emitting sub-pixels 20 can receive the second power signal provided by the second voltage signal line, and the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is greater than the turn-on voltage of the light-emitting sub-pixel 20, that is, (Vn3-Vn4)>Von, the light-emitting sub-pixel 20 can emit light under the drive of the voltage signal and the second power signal.

[0109] As an optional implementation method, such as Figure 6 The light-emitting sub-pixel 20 shown above may include a pixel driving circuit 21 and a light-emitting element L. The first electrode of the light-emitting sub-pixel 20 may be the cathode of the light-emitting element L, and the second electrode of the light-emitting sub-pixel 20 may be the anode of the light-emitting element L. The voltage signal received by the first electrode of the light-emitting sub-pixel 20 may be a negative power supply signal ELVSS, and the second electrode of the light-emitting sub-pixel 20 receives a driving current, the magnitude of which may be controlled by the driving transistor in the pixel driving circuit 21.

[0110] The anode of the light-emitting element L can receive driving current through the pixel driving circuit 21, and the first electrode (e.g., cathode) of the light-emitting element L can receive a negative power supply signal ELVSS through the first voltage signal line ELVSS. The pixel driving circuit 21 can be connected between the positive power supply signal ELVDD and the anode of the light-emitting element L. The driving transistor in the pixel driving circuit 21 can generate driving current according to its gate-source voltage difference to drive the light-emitting element L to emit light.

[0111] Understandable Figure 6 The example described here uses a 2T1C pixel driving circuit 21 as an example. In addition, the pixel driving circuit 21 can also be a 3T1C, 4T2C, 5T1C, 7T1C, 8T1C, etc., and there are no restrictions here.

[0112] In related technologies, the first electrode (e.g., cathode) of the light-emitting element L in the light-emitting sub-pixel 20 covers the entire surface of the display panel. However, in an optional embodiment of this application, an isolation structure is provided between the first electrodes (e.g., cathodes) of the light-emitting elements L. This isolation structure can isolate the first electrodes (e.g., cathodes) between adjacent light-emitting elements L for insulation; or it can connect the first electrodes (e.g., cathodes) between adjacent light-emitting elements L for electrical connection.

[0113] If the isolation structure between the first electrodes (e.g., cathodes) of two adjacent light-emitting sub-pixels 20 is made of conductive material, the first electrodes (e.g., cathodes) of the two adjacent light-emitting sub-pixels 20 can be electrically connected through the isolation structure. When the first voltage signal line ELVSS is electrically connected to one of the first electrodes (e.g., cathodes), the same power signal can be provided to the two first electrodes (e.g., cathodes).

[0114] If the isolation structure between the first electrodes (e.g., cathodes) corresponding to two adjacent light-emitting sub-pixels 20 can play an insulating role, the isolation structure can isolate the first electrodes (e.g., cathodes) corresponding to the two adjacent light-emitting sub-pixels 20. When the first voltage signal line ELVSS is electrically connected to one of the first electrodes (e.g., cathodes), the other first electrode (e.g., cathode) will not receive the power signal provided by the voltage signal line.

[0115] like Figure 7 As shown, taking the first electrode (e.g., cathode) corresponding to two adjacent rows of light-emitting sub-pixels 20 as an example, in this embodiment, each group of light-emitting sub-pixels 20 includes only one row of light-emitting sub-pixels 20. AP is the pixel opening area corresponding to each light-emitting sub-pixel 20, IS is the isolation structure of the light-emitting sub-pixels, and Area is the isolation region in the isolation structure between the two rows of light-emitting sub-pixels. It can be understood that the potential of the first electrode corresponding to the light-emitting sub-pixels 20 in the same row is consistent, while the potential of the first electrodes corresponding to the light-emitting sub-pixels 20 in different rows is insulated and isolated.

[0116] Figure 8 A schematic diagram of a layer structure is shown, in which two rows of light-emitting sub-pixels 20 located in adjacent groups are isolated and insulated by an isolation pillar. The cathodes of the two light-emitting sub-pixels 20 are connected to the same isolation pillar IS. The isolation pillar IS has a partition groove Area, the orthographic projection of which lies between the orthographic projections of the two adjacent groups of light-emitting sub-pixels 20 on the substrate. The partition groove Area can divide the isolation pillar IS into two sub-isolation pillars IS1, achieving insulation between the two sub-isolation pillars IS1, thereby insulating the cathodes of the two light-emitting sub-pixels 20 from each other.

[0117] One way to achieve mutual isolation between the first electrodes corresponding to each row of light-emitting sub-pixels 20 is to isolate the first electrodes corresponding to each row of light-emitting sub-pixels 20 using the aforementioned isolation structure. For example, when the first signal module 11 is connected to the first electrode corresponding to a row of light-emitting sub-pixels 20, the first electrode of that row of light-emitting sub-pixels 20 can be isolated from the first electrodes of the light-emitting sub-pixels 20 in adjacent rows by setting the aforementioned isolation structure, while the first electrodes corresponding to each light-emitting sub-pixel 20 in that row are electrically connected to each other.

[0118] Similarly, when the first signal module 11 is connected to the first electrode corresponding to the multi-row light-emitting sub-pixels 20, the first electrodes of the multi-row light-emitting sub-pixels 20 can be electrically connected to each other by setting the above-mentioned isolation structure.

[0119] When the first voltage signal line ELVSS is connected to the first electrode corresponding to one or more rows of light-emitting sub-pixels 20 through the first signal module 11, the first voltage signal line ELVSS can provide the same voltage signal to all light-emitting elements L in one or more rows of light-emitting sub-pixels 20, while the light-emitting elements L in the remaining rows of light-emitting sub-pixels 20 that are not connected to the first signal module 11 cannot receive the voltage signal through the first signal module 11.

[0120] It should be noted that, in addition to the above-mentioned isolation structure, other methods can be used to achieve insulation isolation between each row of light-emitting sub-pixels 20. For example, the first electrode (e.g., cathode) of the light-emitting element L in the light-emitting sub-pixel 20 may not cover the entire display panel. Instead, the first electrodes of each row of light-emitting sub-pixels 20 are arranged sequentially, and the first electrodes of adjacent rows of light-emitting sub-pixels 20 are mutually insulated.

[0121] In the light-emitting element L of the light-emitting sub-pixel 20, there is a parasitic capacitance between the anode and cathode of the light-emitting element L. When the first signal module 11 is turned on, the light-emitting element L emits light under the driving current provided by the pixel driving circuit 21. At this time, the parasitic capacitance can store a certain amount of charge. When the first signal module 11 is turned off, due to the characteristic that the voltage across the parasitic capacitance cannot change abruptly, the potential of the first electrode corresponding to each light-emitting sub-pixel 20 is still the signal voltage of the voltage signal. However, as the electrons stored in the parasitic capacitance continuously recombine with holes in the light-emitting element L to emit light, the voltage across the parasitic capacitance will gradually decrease, thereby causing the potential of the first electrode of the light-emitting element L to gradually approach the potential of the second electrode. At this time, the brightness of the light-emitting element L will also gradually decrease. When the potential difference between the second electrode and the first electrode of the light-emitting element L, that is, the voltage difference (Vn3-Vn4) between nodes N3 and N4, decreases to below the turn-on voltage Von of the light-emitting element L, the light-emitting element L will turn off. That is, after the first signal module 11 is disconnected, the potential of the first electrode corresponding to the light-emitting sub-pixel 20 connected to the first signal module 11 will gradually approach the potential of the second electrode, and the brightness of the light-emitting element L will gradually decrease until it is turned off.

[0122] When the light-emitting element L of the light-emitting sub-pixel 20 is turned off, it is equivalent to the light-emitting sub-pixel 20 being in a non-light-emitting stage. At this time, data voltage can be written and initialized for one or more rows of light-emitting sub-pixels 20 in the non-light-emitting stage, so that when the light-emitting sub-pixels 20 re-enter the light-emitting stage, they can display the target brightness corresponding to the data voltage.

[0123] In this embodiment, by setting a first signal module 11, one or more rows of light-emitting sub-pixels 20 can be connected to a first voltage signal line ELVSS via the first signal module 11. When the first signal module 11 is turned on, the first electrode of the light-emitting sub-pixel 20 can receive the voltage signal provided by the first voltage signal line ELVSS, and is in the light-emitting stage; while when the first signal module 11 is turned off, the first electrode of the light-emitting sub-pixel 20 cannot receive the voltage signal, and is in the non-light-emitting stage. By controlling the on and off states of the first signal module 11, the light-emitting sub-pixels 20 can be switched between the light-emitting stage and the non-light-emitting stage, thereby achieving independent light-emitting control of each group of light-emitting sub-pixels 20. When multiple first signal modules 11 are set in the display panel, each group of light-emitting sub-pixels 20 can be independently controlled through multiple first signal modules 11, thereby achieving sequential lighting of each group of light-emitting sub-pixels 20.

[0124] Please refer to Figure 9In some embodiments, the first signal module 11 may include a first transistor T1, the first electrode of the first transistor T1 is connected to the first voltage signal line ELVSS, the second electrode of the first transistor T1 is connected to the first electrode of a group of light-emitting sub-pixels 20, and the gate of the first transistor T1 is connected to the first control signal line EM.

[0125] The first control signal line EM can provide light-emitting signals and non-light-emitting signals. The first transistor T1 is turned on when the light-emitting signal is emitted and turned off when the non-light-emitting signal is emitted.

[0126] Please refer to Figure 10 A high-level signal on the first control signal line EM is a non-light-emitting signal, while a low-level signal is a light-emitting signal. When the first control signal line EM provides a high-level signal, the first signal module 11 is disconnected. At this time, the potential of node N4, i.e., the potential of the first electrode, will gradually rise until the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is lower than the activation voltage. During the time interval of the high-level signal provided by the first control signal line EM, the scan signal can provide a high-level pulse as an enable signal, causing the data writing transistor in the pixel driving circuit 21 to conduct. At this time, the data signal Vdata can be written into the light-emitting sub-pixel 20, realizing the data signal writing in the non-light-emitting stage.

[0127] Please refer to Figure 11 In some embodiments, the power selection circuit described above may further include a second signal module 12, and the voltage signal line may further include a second voltage signal line. For example, Figure 11 The second voltage signal line is REF, but it is not limited to this.

[0128] The second signal module 12 includes a first terminal, a second terminal, and a control terminal. The first terminal of the second signal module 12 is connected to a second voltage signal line, the second terminal of the second signal module 12 is connected to the second terminal of the first signal module 11, and the control terminal of the second signal module 12 is connected to a second control signal line. Figure 11 The second control signal line is Ex.

[0129] During the non-light-emitting phase, the voltage signal in the second voltage signal line is greater than the difference between the voltage of the second electrode of the light-emitting sub-pixel 20 and the activation voltage of the light-emitting sub-pixel 20. That is, when the second voltage signal line provides a voltage signal to the first electrode of the light-emitting sub-pixel 20, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is less than the activation voltage of the light-emitting sub-pixel 20, and at this time the light-emitting sub-pixel 20 does not emit light.

[0130] When the second signal module 12 is turned on, the first electrode corresponding to the light-emitting sub-pixel 20 can receive a voltage signal provided by the second voltage signal line through the second signal module 12, and the potential of the first electrode corresponding to the light-emitting sub-pixel 20 becomes the signal voltage of the second voltage signal line. At this time, the voltage difference between the second electrode and the first electrode corresponding to the light-emitting sub-pixel 20 should be lower than the turn-on voltage of the light-emitting sub-pixel 20. That is, when the second signal module 12 is turned on, the second voltage signal line can adjust the potential of the first electrode corresponding to the light-emitting sub-pixel 20 so that the light-emitting element L in the light-emitting sub-pixel 20 is turned off because the voltage difference between its two ends is lower than the turn-on voltage.

[0131] Taking the first electrode as the cathode as an example, in order to make the voltage across the light-emitting element L lower than the activation voltage, the voltage signal should pull the potential of the first electrode higher; that is, the voltage signal voltage should be higher than the voltage signal voltage. However, when the first signal module 11 is turned on, the voltage signal cannot pull the potential of the first electrode higher. Therefore, when the second signal module 12 is turned on, the first signal module 11 is in the off state in order to effectively adjust the potential of the first electrode.

[0132] Please refer to Figure 12 The first signal module 11 mentioned above may include a first transistor T1, the first electrode of the first transistor T1 is connected to the first voltage signal line ELVSS, the second electrode of the first transistor T1 is connected to the first electrode of a group of light-emitting sub-pixels 20, and the gate of the first transistor T1 is connected to the first control signal line EM.

[0133] The second signal module 12 may include a second transistor T2, the first terminal of which is connected to an initialization signal line, the first electrode of which is connected to a second voltage signal line, the second electrode of which is connected to the second electrode of the first transistor T1, and the gate of which is connected to a second control signal line.

[0134] In some embodiments, the type of the first transistor T1 may be opposite to that of the second transistor T2, and the signal in the first control signal line EM is the same as the signal in the second control signal line.

[0135] In some embodiments, the first control signal line EM and the second control signal line can be the same signal line. That is, the same signal line is connected to the gate of the first transistor T1 and the gate of the second transistor T2, respectively.

[0136] Understandably, under the same control signal, different types of transistors will have opposite conduction states. That is, when one transistor is on, the other is off.

[0137] As an optional implementation, one of the first transistor T1 and the second transistor T2 can be an N-type transistor and the other can be a P-type transistor. When the first transistor T1 and the second transistor T2 are N-type and P-type respectively, the two transistors can be made to be in opposite states by the same control signal. That is, only one of the first transistor T1 and the second transistor T2 is in the on state. When the first transistor T1 is on, the light-emitting sub-pixel 20 is in the light-emitting stage, and when the second transistor T2 is on, the light-emitting sub-pixel 20 is in the non-light-emitting stage.

[0138] In some embodiments, the first transistor T1 may be of the same type as the second transistor T2, and the signal in the first control signal line EM may be the opposite of the signal in the second control signal line.

[0139] The signals in the first control signal line EM and the signals in the second control signal line are opposite signals. This means that when the first control signal line EM provides a turn-on signal to drive the first transistor T1 to turn on, the second control signal line provides a cut-off signal to drive the second transistor T2 to turn off; and when the second control signal line provides a turn-on signal to drive the second transistor T2 to turn on, the first control signal line EM provides a cut-off signal to drive the first transistor T1 to turn off.

[0140] In some embodiments, the signals in the first control signal line EM and the signals in the second control signal line are both step-by-step shift signals.

[0141] Taking the first control signal line EM as an example, when each first control signal line EM provides an effective signal for step-by-step shifting to each first signal module 11, each first signal module 11 will disconnect the first electrode of the corresponding light-emitting sub-pixel from the first voltage signal line one by one.

[0142] Similarly, when each of the second control signal lines provides a progressively shifting effective signal to each of the second signal modules 12, each of the second signal modules 12 will sequentially connect the first electrode of the corresponding light-emitting sub-pixel to the second voltage signal line. For a certain group of light-emitting sub-pixels 20, when it is connected to the first voltage signal line, it is in the light-emitting stage, and the light-emitting sub-pixel 20 can emit light when it receives a driving current; when it is disconnected from the first voltage signal line and connected to the second voltage signal line, causing the voltage (Vn3-Vn4) between the second electrode and the first electrode of the light-emitting element L to drop below the turn-on voltage Von of the light-emitting element L, it is in the non-light-emitting stage, and the light-emitting sub-pixel 20 does not emit light.

[0143] In some embodiments, the duty cycle of the first control signal line EM and the duty cycle of the second control signal line can both be adjusted.

[0144] When the first control signal line EM provides a conduction signal, the first transistor T1 is in the conduction state, and the light-emitting sub-pixel 20 connected to the first transistor T1 can emit light. When the first control signal line EM provides a cutoff signal, the first transistor T1 is in the cutoff state, and the light-emitting sub-pixel 20 connected to the first transistor T1 does not emit light. By adjusting the duty cycle of the first control signal line EM, the actual light-emitting time of the light-emitting sub-pixel 20 in the light-emitting phase of a single light-emitting frame can also be adjusted, thereby adjusting the light emission brightness in a PWM driving manner.

[0145] Please refer to Figure 13 In some embodiments, the second voltage signal line can be an initialization signal line, and the second control signal line can be a row drive signal line.

[0146] Taking a single first signal module 11 in a single light-emitting frame as an example, the first control signal line EM can provide a non-light-emitting signal in the first time interval. The first signal module 11 receives the non-light-emitting signal and disconnects in the first time interval. At this time, the light-emitting sub-pixel 20 connected to the first signal module 11 is in the non-light-emitting stage.

[0147] The horizontal drive signal line can provide an initialization control signal during the second time interval, and the second signal module 12 can receive the initialization control signal and be turned on during the second time interval. When the second signal module 12 is turned on, the initialization signal provided by the initialization signal line can raise the potential of the first electrode, so that the voltage across the light-emitting element L drops below the turn-on voltage more quickly, realizing the rapid extinguishing of the light-emitting sub-pixel 20. At this time, in order to raise the potential of the first electrode, it is necessary to avoid connecting the first voltage signal line ELVSS to the first electrode. That is, during the second time interval when the second signal module 12 is turned on, the first signal module 11 should always remain in the off state. Therefore, the first time interval in which the first control signal line EM provides a non-light-emitting signal can cover the second time interval in which the initialization control signal is provided by the horizontal drive signal line, so that when the second signal module 12 is turned on, the first signal module 11 is in a stable off state.

[0148] Please refer to Figure 14 The high-level signal of the first control signal line EM is a non-light-emitting signal, and the low-level signal is a light-emitting signal. When the first control signal line EM provides a high-level signal, the first signal module 11 is disconnected. In the initialization control signal provided by the row drive signal line, the low level is a valid signal. When the row drive signal line is a low-level signal, the second signal module 12 is turned on. At this time, the potential of node N4, that is, the potential of the first electrode, will quickly rise to the initialization voltage Vref, so that the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is lower than the activation voltage.

[0149] During the time interval when the first signal module 11 is off and the second signal module 12 is on, the scan signal Scan2 can provide a high-level pulse as an enable signal, which turns on the data writing transistor in the pixel driving circuit 21. At this time, the data signal Vdata can be written into the light-emitting sub-pixel 20, realizing the writing of data signals in the non-light-emitting stage.

[0150] The first transistor T1 and the second transistor T2 mentioned above can be configured as P-type transistors. In related technologies, transistors disposed within the display panel are typically TFTs (Thin Film Transistors), including N-type TFTs and P-type TFTs. P-type TFTs are typically LTPS (Low Temperature Poly-Silicon) TFTs, while N-type TFTs are typically IGZO (Indium Gallium Zinc Oxide) TFTs, etc. Since LTPS TFTs have advantages over IGZO TFTs, such as smaller area and higher mobility, using P-type transistors connected between the first electrode and the signal line can improve the charging efficiency of the first electrode and reduce the overall area of ​​the power selection circuit.

[0151] In some embodiments, the second voltage signal line may be a positive power supply signal line.

[0152] The positive power signal line can provide a positive power signal ELVDD to the light-emitting sub-pixel 20. When the second signal module 12 is turned on, the first electrode corresponding to the light-emitting sub-pixel 20 is connected to the second voltage signal line. Then, the voltage difference between the second electrode and the first electrode corresponding to the light-emitting sub-pixel 20 is lower than the turn-on voltage, and the light-emitting element L is in the off state.

[0153] Since the positive power signal line is the necessary power signal line for the light-emitting sub-pixel 20 to emit light, directly using the positive power signal line as the second voltage signal line ensures that the potential difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is lower than the turn-on voltage, thus keeping the light-emitting sub-pixel 20 in a non-emitting state. Compared to using a second voltage signal line that provides other voltage signals, directly reusing the second voltage signal line as the second voltage signal line reduces the number of signal traces within the display panel and lowers wiring complexity.

[0154] Please refer to Figure 15, the high-level signal of the first control signal line EM is a non-light-emitting signal, and the low-level signal is a light-emitting signal. When the high-level signal is provided by the first control signal line EM, the first signal module 11 is disconnected and the second signal module 12 is conducted. At this time, the potential of the N4 node, that is, the potential of the first electrode, will quickly rise to the second power supply signal ELVDD, so that the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is lower than the turn-on voltage.

[0155] Within the time interval when the first signal module 11 is disconnected and the second signal module 12 is conducted, the scanning signal Scan can provide a high-level pulse as an enabling effective signal, so that the data writing transistor in the pixel driving circuit 21 is conducted, and at this time the data signal Vdata can be written into the light-emitting sub-pixel 20, realizing data signal writing in the non-light-emitting stage.

[0156] Embodiments of the present application also provide a display panel, which may include a plurality of groups of light-emitting sub-pixels 20 arranged in an array and a power selection module 1. The power selection module 1 may be the power selection module 1 in the above embodiments.

[0157] Among the plurality of groups of light-emitting sub-pixels 20 arranged in an array, taking the number of rows of the light-emitting sub-pixels as n as an example, each group of light-emitting sub-pixels 20 may include x consecutive rows of light-emitting sub-pixels 20 or x rows of light-emitting sub-pixel units, one light-emitting sub-pixel unit includes at least two different light-emitting sub-pixels 20, wherein x < n and x is a positive integer.

[0158] It should be noted that, as Figure 7 shown in the two groups of light-emitting sub-pixels, one group of light-emitting sub-pixels can also be formed by alternately arranging light-emitting sub-pixel units and light-emitting sub-pixels 20.

[0159] When x = 1, the number of groups of the plurality of light-emitting sub-pixels 20 is exactly the number of rows of the light-emitting sub-pixels 20 in the display panel. When x > 1, the number of groups of the plurality of light-emitting sub-pixels 20 is the number of rows of the light-emitting sub-pixels 20 in the display panel divided by the number of rows x of the light-emitting sub-pixels in each group of light-emitting sub-pixels 20, that is (n / x).

[0160] In the same group of light-emitting sub-pixels 20, the first electrodes corresponding to any two light-emitting sub-pixels 20 are electrically connected, that is, in the same group of light-emitting sub-pixels 20, the potentials of the first electrodes corresponding to all light-emitting sub-pixels 20 are the same.

[0161] In different groups of light-emitting sub-pixels 20, the first electrodes corresponding to any two light-emitting sub-pixels 20 are isolated and insulated from each other. That is, for two light-emitting sub-pixels 20 located in different groups of light-emitting sub-pixels 20, their corresponding first electrodes can be the same or different.

[0162] A power selection circuit is connected to the first electrode of a group of light-emitting sub-pixels 20. When the display panel includes multiple groups of light-emitting sub-pixels 20, multiple power selection modules 1 can be configured to be connected one-to-one with each group of light-emitting sub-pixels 20. The first terminal of each power selection module 1 is connected to a voltage signal line, the first terminal of each power selection module 1 is connected to the first electrode corresponding to a group of light-emitting sub-pixels 20, and the control terminal of each power selection module 1 is connected to the first control signal line EM.

[0163] In this embodiment, by setting multiple power selection modules 1 to be connected to the first electrode of each group of light-emitting sub-pixels 20, the light-emitting state of each group of light-emitting sub-pixels 20 can be controlled by the power selection modules 1. By sequentially controlling each power selection module 1 to disconnect, the light-emitting sub-pixels 20 of each group of light-emitting sub-pixels 20 can sequentially enter the non-light-emitting stage; by sequentially controlling each power selection module 1 to turn on, the light-emitting sub-pixels 20 of each group of light-emitting sub-pixels 20 can sequentially enter the light-emitting stage. Since the light-emitting stage and non-light-emitting stage of each group of light-emitting sub-pixels 20 can be adjusted independently, the group of light-emitting sub-pixels 20 can be lit up one group at a time.

[0164] In some embodiments, the first electrodes of light-emitting sub-pixels 20 in adjacent rows of the same group or in light-emitting sub-pixel units in adjacent rows are electrically connected through isolation pillars.

[0165] When a group of light-emitting sub-pixels 20 includes at least two rows of light-emitting sub-pixels 20, the first electrodes of the light-emitting sub-pixels 20 in adjacent rows can be electrically connected through isolation pillars. When the first electrode of any row of light-emitting sub-pixels 20 is connected to the voltage signal line through a power selection circuit, the light-emitting sub-pixels 20 in adjacent rows that are electrically connected to the light-emitting sub-pixels 20 in that row through isolation pillars are also equivalent to being connected to the voltage signal line.

[0166] like Figure 8 As shown, in some embodiments, the isolation pillar IS between light-emitting sub-pixels 20 located in different groups and adjacent rows, or between light-emitting sub-pixels 20 in light-emitting sub-pixel units located in different groups and adjacent rows, is provided with a partition groove Area. The partition groove Area can divide the isolation pillar IS into two sub-isolation pillars IS1, which are a first sub-isolation pillar and a second sub-isolation pillar, respectively. The first sub-isolation pillar and the second sub-isolation pillar are insulated from each other.

[0167] In two adjacent pixel rows located in different groups, one row of light-emitting sub-pixels 20 or the light-emitting sub-pixels 20 in a row of light-emitting sub-pixel units are electrically connected to the first sub-isolation pillar, while the other row of light-emitting sub-pixels 20 or the light-emitting sub-pixels 20 in a other row of light-emitting sub-pixel units are electrically connected to the second sub-isolation pillar. That is, the first electrodes of the two adjacent pixel rows located in different groups are mutually insulated.

[0168] In some embodiments, the aforementioned isolation post may include a metal isolation post.

[0169] In some embodiments, in a single extension direction perpendicular to the light-emitting sub-pixel 20, the cross-sectional shape of the conductive portion of the isolation pillar may include, but is not limited to, a T-shape or an inverted trapezoid.

[0170] As an optional implementation, the power selection circuit can be connected to the isolation pillar. Since the isolation pillar connects two adjacent rows of light-emitting sub-pixels 20 within the same group, when the power selection circuit is turned on, it can transmit the voltage signal from the voltage signal line to the isolation pillar, which can then provide a voltage signal to the first electrode of the two adjacent rows of light-emitting sub-pixels 20. Simultaneously, other rows of light-emitting sub-pixels 20 within the same group that are directly or indirectly electrically connected to these two rows of light-emitting sub-pixels 20 can also receive the voltage signal.

[0171] Please refer to Figure 16 , Figure 16 Taking a single group of light-emitting sub-pixels 20 comprising x consecutive rows of light-emitting sub-pixels 20 as an example, n / 2 power selection modules 1 are correspondingly set in the n rows and m columns of light-emitting sub-pixels 20. For example... Figure 12 As shown, n / 2 power selection modules 1 are connected to the first control signal lines EM_1, EM_2, ..., EM_n / 2 respectively. By outputting light-emitting control signals line by line through multiple first control signal lines EM, the n / 2 power selection modules 1 can be turned on one by one.

[0172] Please refer to Figure 17 When a single group of light-emitting sub-pixels 20 includes x consecutive rows of light-emitting sub-pixels 20, taking the first control signal line EM_1 as an example, when the first control signal line EM_1 provides a high-level signal, the light-emitting sub-pixels 20 in the first and second rows are both in a non-light-emitting state. At this time, data signals can be written to the light-emitting sub-pixels 20 in the first and second rows by sequentially providing scan signals Scan_1 and Scan_2. Similarly, when the first control signal line EM_n / 2 provides a high-level signal, the light-emitting sub-pixels 20 in the (n-1)th and nth rows are both in a non-light-emitting state. At this time, data signals can be written to the light-emitting sub-pixels 20 in the (n-1)th and nth rows by sequentially providing scan signals Scan_1 and Scan_2.

[0173] Similarly, Figure 18 and Figure 20 The circuit structure diagrams of the display panel are shown in two other embodiments of the power selection module 1. Figure 18 and Figure 20 The examples all take a single group of light-emitting sub-pixels 20, which includes x rows of consecutive light-emitting sub-pixels 20. Figure 19for Figure 18 The signal timing diagram corresponding to the circuit architecture. Figure 21 for Figure 20 The signal timing diagram corresponding to the circuit architecture.

[0174] In some embodiments, the display panel may further include multiple scan signal lines, each scan signal line being electrically connected to a corresponding row of light-emitting sub-pixels 20. The multiple scan signal lines can output the enable level of the scan signal row by row, so that each row of light-emitting sub-pixels 20 can write data voltage signals row by row.

[0175] When each group of light-emitting sub-pixels 20 includes one row of light-emitting sub-pixels 20, each row of light-emitting sub-pixels 20 is connected to one power selection module 1 and one scan signal line. When the power selection module 1 corresponding to the row of light-emitting sub-pixels 20 is in the off state, the row of light-emitting sub-pixels 20 is in the non-light-emitting stage. At this time, the scan signal line can provide an enable level for the row of light-emitting sub-pixels 20, so that the data writing transistor in the pixel driving circuit 21 is turned on, and the data voltage can be written into the light-emitting sub-pixels 20 through the data writing transistor.

[0176] When the power selection module 1 is in the on state, the row of light-emitting sub-pixels 20 is in the light-emitting stage. The data voltage signal written in the non-light-emitting stage can cause the driving transistor in the pixel driving circuit 21 to generate a corresponding driving current, so that the light-emitting sub-pixels 20 can display the corresponding target brightness.

[0177] When each group of light-emitting sub-pixels 20 includes at least two rows of light-emitting sub-pixels 20, the number of corresponding scan signal lines in a single group of light-emitting sub-pixels 20 is equal to the number of rows of light-emitting sub-pixels 20. For example, when a single group of light-emitting sub-pixels 20 includes three rows of light-emitting sub-pixels 20, there are three corresponding scan signal lines in a single group of light-emitting sub-pixels 20.

[0178] It is understandable that multiple rows of luminous sub-pixels in the same group of luminous sub-pixels 20 have the characteristic of state synchronization. Taking a single group of luminous sub-pixels 20 including 3 rows of luminous sub-pixels 20 as an example, when the power selection module 1 is turned on, all 3 rows of luminous sub-pixels are in the luminous stage; when the power selection module 1 is turned off, all 3 rows of luminous sub-pixels are in the non-luminous stage.

[0179] In a single luminous frame, the first control signal line EM can provide a non-luminous signal within a first time interval. At this time, the first signal module 11 is in an off state within the first time interval, and all three rows of luminous sub-pixels are in a non-luminous stage. During this non-luminous stage, the three scan signal lines corresponding to the group of luminous sub-pixels 20 can sequentially output the enable level of the three scan signals line by line, thereby enabling the three rows of luminous sub-pixels to complete the writing of data signals line by line.

[0180] In some embodiments, within a single image frame, the duration of the first time interval of the first signal module 11 is t1, and the duration of the time interval of the enable effective level of the scanning signal is t2.

[0181] When a single group of light-emitting sub-pixels 20 includes x rows of light-emitting sub-pixels 20, in order for the first signal module 11 to complete the row-by-row data signal writing of the x rows of light-emitting sub-pixels 20 in the disconnected state, the following should be satisfied:

[0182] t1≥x*t2;

[0183] That is, the time for x rows of light-emitting sub-pixels 20 to sequentially complete x data signal writings should be within the off state of the first signal module 11. That is, the off time of the first signal module 11 should include at least the enable effective level of x scan signals.

[0184] In some embodiments, the display panel may include a display area and a non-display area, with the light-emitting sub-pixels 20 located in the display area and the power selection circuit located in the non-display area.

[0185] The power selection module 1 is located in the non-display area and can be connected to the first electrode corresponding to the light-emitting sub-pixel 20 via signal traces at the boundary between the display area and the non-display area. Since the display area only contains the light-emitting sub-pixels 20, the number of transistors in the pixel driving circuit 21 of each light-emitting sub-pixel 20 can be effectively reduced while still achieving row-by-row illumination of the light-emitting sub-pixels, thereby reducing the area of ​​a single light-emitting sub-pixel 20 and increasing the PPI of the display panel. The fact that the power selection module 1 is located in the non-display area also avoids occupying space in the display area, further increasing the PPI of the display panel.

[0186] In some embodiments, the non-display area may be located on at least one side of the display area. The power selection circuit in the non-display area may connect the signal lines to the first electrode corresponding to the light-emitting sub-pixel 20 at the boundary between the display area and the non-display area.

[0187] In some embodiments, the non-display areas are located on opposite sides of the display area; that is, the non-display areas may include a first non-display area and a second non-display area. The first non-display area is located on one side of the display area along a first direction, and the second non-display area is located on the other side of the display area along the first direction. Both the first and second non-display areas include a power selection circuit.

[0188] For one of the multiple groups of light-emitting sub-pixels 20, the group of light-emitting sub-pixels 20 can be connected to the power selection circuit in the first non-display area or to the power selection circuit in the second non-display area.

[0189] In some embodiments, the first electrode of the light-emitting sub-pixels 20 in the same row or the light-emitting sub-pixel units in the same row is connected to power selection circuits in a plurality of non-display areas.

[0190] For a given group of light-emitting sub-pixels 20, multiple power selection circuits can be connected. These multiple power selection circuits can be controlled by the same control signal. Compared to using a single power selection module 1 connected to a group of light-emitting sub-pixels 20, using multiple power selection modules 1 connected to a group of light-emitting sub-pixels 20 effectively reduces the number of light-emitting sub-pixels 20 that a single power selection module 1 needs to drive, thus improving the driving capability of the power selection module 1.

[0191] In some embodiments, the first electrode of the light-emitting sub-pixels 20 in the same row or the light-emitting sub-pixel units in the same row is connected to two power selection circuits. Among the two power selection circuits connected to the first electrode of the light-emitting sub-pixels 20 in the same row or the light-emitting sub-pixel units in the same row, one power selection circuit is located in the non-display area on one side of the display area, and the other power selection circuit is located in the non-display area on the opposite side of the display area.

[0192] Of the two power selection modules 1 connected to the same row of light-emitting sub-pixels 20, one is connected to the first electrode corresponding to the light-emitting sub-pixel 20 via a signal trace starting from the first non-display area, and the other is connected to the first electrode corresponding to the light-emitting sub-pixel 20 via a signal trace starting from the second non-display area. The same row of light-emitting sub-pixels 20 can be connected to the two power selection modules 1 on opposite sides of the display area.

[0193] Compared to using a single power selection module 1 connected to a group of light-emitting sub-pixels 20, setting two power selection modules 1 on both sides of the display area can effectively reduce the number of light-emitting sub-pixels 20 that a single power selection module 1 needs to drive, thereby improving the driving capability of the power selection module 1. Furthermore, the two power selection modules 1 located on opposite sides of the display area can also avoid the uneven brightness between light-emitting sub-pixels 20 that are farther apart and those that are closer together in the same row, as is the case with a single power module, thus improving the brightness uniformity of the display panel.

[0194] It should be noted that the multiple power selection modules 1 can be configured in the following ways: all power selection modules 1 can be set in the first non-display area; all power selection modules 1 can be set in the second non-display area; or some power selection modules 1 can be set in the first non-display area and other power selection modules 1 can be set in the second non-display area.

[0195] In some embodiments, the two power selection modules 1 corresponding to any two adjacent groups of light-emitting sub-pixels 20 are respectively located in the first non-display area and the second non-display area. That is, multiple power selection modules 1 are alternately set in the first non-display area and the second non-display area.

[0196] By alternately setting multiple power selection modules 1 in the first non-display area and the second non-display area, it is possible to avoid having too many power selection modules 1 in one of the first non-display areas and the second non-display area, thus avoiding an excessively large bezel area and achieving a narrow bezel effect.

[0197] In some embodiments, the display panel may further include a plurality of shift register units.

[0198] Multiple shift register units are located in the non-display area, and each shift register unit is connected to a corresponding first control signal line EM. That is, the multiple shift register units are used to generate light emission control signals line by line. The first control signal line EM can extend in the non-display area and connect to the power selection module 1.

[0199] Both the shift register unit and the first control signal line EM are located in the non-display area, which can greatly reduce the length of the signal traces, thereby avoiding the influence of the impedance on the signal traces on the light emission control signal, and also reducing the number of signal traces in the display area.

[0200] Figures 22 to 27 The signal timing diagrams of a single luminous frame and the luminous state diagrams of each row of luminous sub-pixels 20 are shown under three driving modes. Figure 22 This is a signal timing diagram of the light-emitting sub-pixels 20 that cannot be lit row by row or group by group due to the reduced number of transistors in the pixel driving circuit 21 in the related technology. Figure 23 for Figure 22 The signal timing diagram below shows the illumination state of each row of luminous sub-pixels 20. Figure 23 In the diagram, the horizontal axis represents the sequence number of each stage in a single luminous frame, and the vertical axis represents the row number of each row of luminous sub-pixels 20. That is, the first frame includes n data writing stages and one luminous stage L. The first data writing stage involves writing data to the first row of luminous sub-pixels, and the nth data writing stage involves writing data to the nth row of luminous sub-pixels. Since all luminous sub-pixels 10 need to synchronously enter the non-luminous stage, and data voltage Vdata needs to be written row by row in the non-luminous stage, the duration of the non-luminous stage is at least the sum of the durations of the n data writing stages. This significantly reduces the duration of the luminous stage, greatly increasing the time during which all luminous sub-pixels 10 in a single luminous frame are not luminous. At any given moment, the probability that all pixels are off increases significantly, resulting in a more severe visual flickering phenomenon.

[0201] Figure 24 This is a timing diagram of the signals of each row of light-emitting sub-pixels 20 under the driving method used in the embodiments of this application. Figure 24 As shown, taking each group of light-emitting sub-pixels 20 as an example, the non-light-emitting phases of each group of light-emitting sub-pixels 20 can be staggered, so that at any given time, only some of the light-emitting sub-pixels 20 do not emit light, which can effectively improve the flickering phenomenon.

[0202] Figure 25 for Figure 24 The diagram illustrates the illumination state of each row of luminous sub-pixels 20 under signal timing control. It can be understood that the first row of luminous sub-pixels performs data writing in the first stage, the second row in the second stage, and the nth row in the nth stage. Each row of luminous sub-pixels 20 can independently perform data writing, thus significantly increasing the proportion of the illumination stage duration in a single illumination frame.

[0203] In one alternative implementation, such as Figure 26 As shown, when the shift register unit provides the EM signal for each row of light-emitting sub-pixels 20, the shift register unit can also adjust the duty cycle of the light-emitting control signal. Figure 27 for Figure 26 A schematic diagram showing the light-emitting state of each row of light-emitting sub-pixels 20 under signal timing control. (See diagram for example.) Figure 27 As shown, during the light emission stage, by controlling the duty cycle of the EM signal, the light-emitting sub-pixel can be kept in a non-light-emitting state when the EM signal is an inactive signal. By adjusting the duty cycle of the light emission control signal, the total duration of light emission of the light-emitting sub-pixel 20 during the light emission stage of a single light emission frame can be adjusted and controlled, thereby realizing the PWM (Pulse Width Modulation) dimming function.

[0204] As an example, Figure 28 A schematic diagram of the voltage and current waveforms under the driving light emission method in the above embodiment is shown. Taking the voltage signal in the voltage signal line as ELVDD as an example, when the EM signal transitions from low to high, the voltage of node N4 gradually increases to ELVDD. At this time, the voltage difference between the second electrode and the first electrode of the light-emitting sub-pixel 20 is less than the activation voltage Von, the light-emitting sub-pixel does not emit light, and the light emission current flowing through the light-emitting sub-pixel 20 is basically zero. When the EM signal transitions from high to low, the potential of the first electrode of the light-emitting sub-pixel 20 gradually decreases to ELVSS. At this time, the light-emitting sub-pixel 20 emits light normally, and the light emission current flowing through the light-emitting sub-pixel 20 is related to the data voltage written to the pixel driving circuit 21.

[0205] This application also provides a display device; please refer to [link to relevant documentation]. Figure 29The display device can be a PC, television, monitor, mobile terminal, tablet computer, or wearable device, etc., and the display device can include the display panel provided in the embodiments of this application.

[0206] The functional blocks shown in the above-described structural diagram can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, they can be, for example, electronic circuits, application-specific integrated circuits (ASICs), appropriate firmware, plug-ins, function cards, etc. When implemented in software, the elements of this application are programs or code segments used to perform the required tasks. Programs or code segments can be stored on a machine-readable medium or transmitted over a transmission medium or communication link via data signals carried on a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, radio frequency (RF) links, etc. Code segments can be downloaded via computer networks such as the Internet, intranets, etc.

[0207] It should be noted that, in this document, the terms “comprising,” “including,” or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0208] This document uses specific examples to illustrate the principles and implementation methods of this application. The examples are merely for the purpose of helping to understand the method and core ideas of this application. The above are only preferred embodiments of this application. It should be noted that due to the limitations of written expression, and the existence of an infinite number of specific structures, those skilled in the art can make several improvements, modifications, or changes without departing from the principles of this application, and can also combine the above technical features in an appropriate manner. These improvements, modifications, changes, or combinations, or the direct application of the concept and technical solution of this application to other situations without modification, should all be considered within the scope of protection of this application.

Claims

1. A display panel, characterized in that, It includes a power selection circuit, including a voltage signal line, which is used to transmit a voltage signal to the first electrode of the light-emitting sub-pixel, and by adjusting the time when different groups of light-emitting sub-pixels transmit voltage signals, the light emission time of different groups of light-emitting sub-pixels is staggered, so as to control at least two groups of light-emitting sub-pixels to emit light one group at a time. Wherein, a group of light-emitting sub-pixels includes at least one row of light-emitting sub-pixels or at least one row of light-emitting sub-pixel units, and one light-emitting sub-pixel unit includes at least two different types of light-emitting sub-pixels; the first electrode is the cathode of the light-emitting sub-pixel; The power selection circuit also includes a first signal module and a second signal module, and the voltage signal line includes a first voltage signal line and a second voltage signal line; The first terminal of the first signal module is connected to the first voltage signal line, the second terminal of the first signal module is connected to the first electrode of a group of light-emitting sub-pixels, and the control terminal of the first signal module is connected to the first control signal line. The first terminal of the second signal module is connected to the second voltage signal line, the second terminal of the second signal module is connected to the second terminal of the first signal module, and the control terminal of the second signal module is connected to the second control signal line. Wherein, the first time interval of the non-light-emitting signal provided by the first control signal line can cover the second time interval of the initialization control signal provided by the row drive signal line; the first signal module receives the non-light-emitting signal and disconnects during the first time interval, and the second signal module receives the initialization control signal and turns on during the second time interval; The second voltage signal line multiplexes the initialization signal line, and the second control signal line multiplexes the row drive signal line; Multiple groups of light-emitting sub-pixels are arranged in an array. Each group of light-emitting sub-pixels includes at least one row of light-emitting sub-pixels or at least one row of light-emitting sub-pixel units. One light-emitting sub-pixel unit includes at least two different types of light-emitting sub-pixels. The first electrodes of the light-emitting sub-pixels in the same group are electrically connected, and the first electrodes of the light-emitting sub-pixels in different groups are mutually insulated. One of the power selection circuits is connected to the first electrode of a group of the light-emitting sub-pixels; The first electrodes of the light-emitting sub-pixels in adjacent rows of the same group or in the light-emitting sub-pixel units are electrically connected through isolation pillars.

2. The display panel according to claim 1, characterized in that, The voltage signal line is interrupted to transmit a voltage signal that is less than the difference between the second electrode voltage of the light-emitting sub-pixel and the turn-on voltage of the light-emitting sub-pixel.

3. The display panel according to claim 2, characterized in that, The voltage signal line transmits, in a time-division manner, a voltage signal that is less than the difference between the second electrode voltage of the light-emitting sub-pixel and the turn-on voltage of the light-emitting sub-pixel, and a voltage signal that is greater than the difference between the second electrode voltage of the light-emitting sub-pixel and the turn-on voltage of the light-emitting sub-pixel.

4. The display panel according to claim 2, characterized in that, The at least two different light-emitting sub-pixels, at least partially different, are located in different rows.

5. The display panel according to claim 1, characterized in that, During the light-emitting phase, the voltage signal transmitted in the first voltage signal line is less than the difference between the second electrode voltage of the light-emitting sub-pixel and the turn-on voltage of the light-emitting sub-pixel.

6. The display panel according to claim 5, characterized in that, During the non-light-emitting phase, the voltage signal transmitted in the second voltage signal line is greater than the difference between the second electrode voltage of the light-emitting sub-pixel and the turn-on voltage of the light-emitting sub-pixel.

7. The display panel according to claim 1, characterized in that, The first signal module includes a first transistor, the first electrode of the first transistor is connected to the first voltage signal line, the second electrode of the first transistor is connected to the first electrode of a group of light-emitting sub-pixels, and the gate of the first transistor is connected to the first control signal line. The second signal module includes a second transistor, the first terminal of the second transistor is connected to the second voltage signal line, the second terminal of the second transistor is connected to the second terminal of the first transistor, and the gate of the second transistor is connected to the second control signal line.

8. The display panel according to claim 7, characterized in that, The first transistor is of the opposite type to the second transistor, and the signal in the first control signal line is the same as the signal in the second control signal line.

9. The display panel according to claim 8, characterized in that, The first control signal line and the second control signal line are the same signal line.

10. The display panel according to claim 7, characterized in that, The first transistor and the second transistor are of the same type, and the signal in the first control signal line is the opposite of the signal in the second control signal line.

11. The display panel according to any one of claims 6-10, characterized in that, The signals in the first control signal line and the signals in the second control signal line are both step-by-step shift signals.

12. The display panel according to claim 11, characterized in that, The duty cycle of the signal in the first control signal line and the duty cycle of the signal in the second control signal line can both be adjusted.

13. The display panel according to claim 1, characterized in that, The isolation pillars between the light-emitting sub-pixels or light-emitting sub-pixels in the light-emitting sub-pixel units located in different groups and adjacent rows are provided with partition grooves. The partition grooves are used to divide the isolation pillars into a first sub-isolation pillar and a second sub-isolation pillar. The first sub-isolation pillar and the second sub-isolation pillar are insulated. The light-emitting sub-pixels or light-emitting sub-pixels in the light-emitting sub-pixel units in one row of different groups and adjacent rows are electrically connected to the first sub-isolation pillar. The light-emitting sub-pixels or light-emitting sub-pixels in the light-emitting sub-pixel units in another row of different groups and adjacent rows are electrically connected to the second sub-isolation pillar.

14. The display panel according to claim 1, characterized in that, The power selection circuit is electrically connected to the isolation column.

15. The display panel according to claim 1, characterized in that, The isolation column includes a metal isolation column.

16. The display panel according to claim 1, characterized in that, In a single extension direction perpendicular to the light-emitting sub-pixels, the cross-sectional shape of the conductive portion of the isolation pillar includes a T-shape or an inverted trapezoid.

17. The display panel according to claim 1, characterized in that, The display panel includes a display area and a non-display area, the light-emitting sub-pixels are located in the display area, and the power selection circuit is located in the non-display area.

18. The display panel according to claim 17, characterized in that, The non-display area is located on at least one side of the display area.

19. The display panel according to claim 18, characterized in that, The non-display areas are located on opposite sides of the display areas, and each side of the non-display area includes the power selection circuit.

20. The display panel according to claim 18, characterized in that, The first electrode of the light-emitting sub-pixel in the same row or in the light-emitting sub-pixel unit is connected to a plurality of power selection circuits.

21. The display panel according to claim 18, characterized in that, The first electrode of the light-emitting sub-pixel or the light-emitting sub-pixel unit in the same row is connected to two power selection circuits. Of the two power selection circuits connected to the first electrode of the light-emitting sub-pixel or the light-emitting sub-pixel unit in the same row, one power selection circuit is located in the non-display area on one side of the display area, and the other power selection circuit is located in the non-display area on the opposite side of the display area.

22. A display device, characterized in that, Includes the display panel as described in any one of claims 1-21.

Images