Industrial camera and method for loading thereof

Abstract

The embodiment of the application provides an industrial camera and a loading method thereof, and relates to the technical field of industrial cameras. The industrial camera provided by the embodiment of the application comprises an FPGA module, a control module and a Flash module. The data sending pin of the Flash module is connected with the data receiving pin of the FPGA module and the control module. The reset pin of the FPGA module is connected with the output pin of the control module. After the industrial camera is powered on, the Flash module can send the control module / FPGA loading program to the control module and the FPGA module through the data sending pin based on the instruction of the control module, so that the control module and the FPGA module can start loading. It can be seen that the industrial camera provided by the embodiment of the application can directly send the FPGA loading program to the FPGA module through the Flash module, so that the FPGA module can be quickly loaded, the control module is not required to be used for transparent transmission, and therefore the loading speed of the industrial camera can be improved.

Description

Technical Field

[0001] This invention relates to the field of industrial camera technology, and more particularly to an industrial camera and its loading method. Background Technology

[0002] Industrial cameras are a key component of machine vision systems, and their most fundamental function is to convert light signals into ordered electrical signals. In practical applications, after an industrial camera is powered on, it needs to be loaded, reading the necessary files and information into memory for subsequent use.

[0003] In related technologies, the loading of industrial cameras typically employs a pass-through scheme. This scheme mainly involves: a control module reading data from a coded flash memory module; the control module loading the data; and then the control module passing the loading program of the field-programmable gate array (FPGA) module to the FPGA module. In practical applications, this scheme is extremely slow, taking several minutes, and cannot meet user needs in many application scenarios.

[0004] Therefore, improving the loading speed of industrial cameras has become an urgent technical problem to be solved. Summary of the Invention

[0005] This application provides an industrial camera and a loading method thereof, which is used to improve the loading speed of the industrial camera.

[0006] The first aspect of this application provides an industrial camera, including: a Field Programmable Gate Array (FPGA) module, a microcontroller unit (MCU) control module, and a coded flash memory (Flash) module; a data transmission pin of the Flash module is connected to a data receiving pin of the FPGA module and a data receiving pin of the control module; a reset pin of the FPGA module is connected to an output pin of the control module; the control module is configured to: in response to power-on of the industrial camera, send a first instruction to the data receiving pin of the Flash module via the data transmission pin of the control module; the Flash module is configured to: in response to the first instruction, send a control module loading program via the data transmission pin of the Flash module; the control module is further configured to: receive and load the control module loading program; after loading is completed, control the level of the reset pin of the FPGA module via the output pin of the control module to release the FPGA module from the reset state; and send a second instruction to the data receiving pin of the Flash module via the data transmission pin of the control module; the Flash module is further configured to: in response to the second instruction, send an FPGA loading program via the data transmission pin of the Flash module; the FPGA module is configured to: receive and load the FPGA loading program.

[0007] The industrial camera provided in this application has its Flash module's data transmission pin connected to the FPGA module and the control module's data receiving pin. Thus, after the camera is powered on, the Flash module can send a control / FPGA loading program to the control module and FPGA module's data receiving pin via its data transmission pin, based on instructions sent by the control module. This allows the control / FPGA module to load the program according to the control / FPGA loading program. Simultaneously, the FPGA module's reset pin is connected to the control module's output pin. Before sending a second instruction, the control module controls the level of the FPGA module's reset pin via its output pin to release the FPGA module from its reset state, enabling the FPGA module to receive the FPGA loading program sent by the Flash module.

[0008] As can be seen, in the industrial camera provided in this application embodiment, the Flash module can directly send the FPGA loading program to the FPGA module, enabling the FPGA module to load quickly. Compared to related technologies where the FPGA loading program is transmitted to the FPGA module via the SPI of the control module after the control module has loaded the program, the industrial camera provided in this application embodiment does not require the control module to transmit the program. The FPGA module can directly receive the FPGA loading program sent by the Flash module for loading, thereby improving the loading speed of the industrial camera.

[0009] In conjunction with the first implementation of the first aspect, before controlling the level of the reset pin of the FPGA module through the output pin to release the FPGA module from the reset state, the control module is also configured to: control the level of the reset pin of the FPGA module through the output pin to put the FPGA module into the reset state.

[0010] In conjunction with the second implementation of the first aspect, the chip select pin of the control module is connected to the chip select pin of the Flash module; before sending the first instruction to the data receive pin of the Flash module through the data send pin of the control module, the control module is also configured to control the level of the chip select pin of the Flash module through the chip select pin of the control module to make the Flash module work.

[0011] In conjunction with the third implementation of the first aspect, before sending the second instruction to the data receiving pin of the Flash module through the data sending pin of the control module, the control module is also configured to control the level of the chip select pin of the Flash module through the chip select pin of the control module to make the Flash module work.

[0012] In conjunction with the fourth implementation method of the first aspect, the clock pin of the control module is connected to the clock pin of the Flash module and the clock pin of the FPGA module; before sending the first instruction to the data receiving pin of the Flash module through the data sending pin of the control module, the control module is also configured to send the first synchronization clock through the clock pin of the control module.

[0013] In conjunction with the fifth implementation method of the first aspect, before sending the second instruction to the data receiving pin of the Flash module through the data sending pin of the control module, the control module is also configured to send a second synchronization clock through the clock pin of the control module.

[0014] In conjunction with the sixth implementation method of the first aspect, the completion pin of the FPGA module is connected to the input pin of the control module; after receiving and loading the FPGA loader, the FPGA module is also configured to: after the FPGA loader is loaded, send loading completion information to the input pin of the control module through the completion pin of the FPGA module; the control module is also configured to: receive the loading completion information and determine that the industrial camera loading is complete.

[0015] A second aspect of this application provides a loading method for an industrial camera. The industrial camera includes: a Field Programmable Gate Array (FPGA) module, a microcontroller unit (MCU) control module, and a coded flash memory (Flash) module. The Flash module's data transmission pin is connected to the FPGA module's data receiving pin and the control module's data receiving pin. The FPGA module's reset pin is connected to the control module's output pin. The loading method includes: in response to the industrial camera being powered on, the control module sends a first instruction to the Flash module's data receiving pin via its data transmission pin; after receiving the first instruction, the Flash module sends a control module loading program via its data transmission pin; the control module receives and loads the control module loading program, and after loading is complete, controls the voltage of the FPGA module's reset pin via its output pin to de-reset the FPGA module; the control module sends a second instruction to the Flash module's data receiving pin via its data transmission pin; after receiving the second instruction, the Flash module sends the FPGA loading program via its data transmission pin; and the FPGA module receives and loads the FPGA loading program.

[0016] In conjunction with the first implementation of the second aspect, before controlling the voltage of the reset pin of the FPGA module through the output pin to release the FPGA module from the reset state, the loading method further includes: the control module controlling the voltage of the reset pin of the FPGA module through the output pin to put the FPGA module into the reset state.

[0017] In conjunction with the second implementation of the second aspect, the chip select pin of the control module is connected to the chip select pin of the Flash module; before sending the first instruction to the data receiving pin of the Flash module through the data sending pin of the control module, the loading method further includes: the control module controls the voltage of the chip select pin of the Flash module through the chip select pin of the control module to make the Flash module work.

[0018] In conjunction with the third implementation of the second aspect, before the control module sends the second instruction to the data receiving pin of the Flash module through the data sending pin of the control module, the loading method further includes: the control module controls the voltage of the chip select pin of the Flash module through the chip select pin of the control module to make the Flash module work.

[0019] In conjunction with the fourth implementation method of the second aspect, the clock pin of the control module is connected to the clock pins of the Flash module and the FPGA module. Before sending the first instruction to the data receiving pin of the Flash module through the data sending pin of the control module, the loading method further includes: the control module sending a first synchronization clock through the clock pin of the control module.

[0020] In conjunction with the fifth implementation method of the second aspect, before the control module sends the second instruction to the data receiving pin of the Flash module through the data sending pin of the control module, the loading method further includes: the control module sending a second synchronization clock through the clock pin of the control module.

[0021] In conjunction with the sixth implementation method of the second aspect, the completion pin of the FPGA module is connected to the input pin of the control module. After the FPGA module receives and loads the FPGA loader, the loading method also includes: after the FPGA module completes loading, it sends loading completion information to the input pin of the control module through the completion pin of the FPGA module; after receiving the loading completion information, the control module determines that the industrial camera loading is complete.

[0022] The beneficial effects described in the second aspect can be referred to in the analysis of the beneficial effects in the first aspect, and will not be repeated here. Attached Figure Description

[0023] The accompanying drawings are provided to further understand the technical solutions of the present invention and constitute a part of the specification. They are used together with the embodiments of this application to explain the technical solutions of the present invention and do not constitute a limitation on the technical solutions of the present invention.

[0024] Figure 1 This is a schematic diagram of the structure of an industrial camera provided in an embodiment of this application;

[0025] Figure 2This is a schematic diagram of the structure of another industrial camera provided in an embodiment of this application;

[0026] Figure 3 This application provides a schematic diagram of an industrial camera loading process.

[0027] Figure 4 This is a flowchart illustrating a method for loading an industrial camera, as provided in an embodiment of this application. Detailed Implementation

[0028] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0029] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "a plurality of" means two or more.

[0030] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "connected" and "linked" should be interpreted broadly, for example, as a fixed connection, a detachable connection, or an integral connection. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances. Furthermore, when describing pipelines, the terms "connected" and "linked" as used in this application have the meaning of establishing electrical connection. The specific meaning needs to be understood in conjunction with the context.

[0031] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0032] Before providing a detailed explanation of the embodiments of this application, some terms involved in the embodiments of this application will be explained.

[0033] MCU Module: An MCU module refers to a Microcontroller Unit (MCU) module, also known as a microcontroller. With the advent and development of large-scale integrated circuits, it integrates a computer's Central Processing Unit (CPU), Random Access Memory (RAM), Read Only Memory Image (ROM), timer, and various I / O interfaces onto a single module, forming a miniature computer. Control modules are typically used to control and manage various peripheral devices, such as sensors, actuators, and displays. They can perform various tasks, including data processing, logic control, and communication.

[0034] PHY Module: A PHY module, or Physical Layer module, is the part responsible for physical transmission in network communication. PHY modules typically convert image data into electrical signals and transmit them through a transmission medium. It should be understood that, to improve the performance of industrial cameras, PHY modules can also be used to process image data and perform control tasks.

[0035] FPGA Module: An FPGA (Field-Programmable Gate Array) is a programmable logic device that can be reconfigured and reprogrammed according to user needs. An FPGA module contains a large number of programmable logic units and programmable interconnect resources, which users can program to implement various functions according to specific application requirements.

[0036] Flash Module: A flash (flash memory) module stores data in its internal circuitry. It is a non-volatile memory that retains data even after power is lost. Flash is commonly used to store firmware, operating systems, applications, and other data. Flash modules can also be called flash memory or simply flash storage.

[0037] Transparent transmission, also known as pass-through, refers to a transmission network that, regardless of the type of service being transmitted, is only responsible for delivering the necessary data to the destination node while ensuring transmission quality, without processing the transmitted data. During data transmission, the data remains unchanged in any way—no truncation, grouping, encoding, encryption, or obfuscation—as if the transmission process were transparent, arriving intact at the final receiver.

[0038] It should be understood that the control module in the embodiments of this application can be the aforementioned MCU module, PHY module, or a module integrating the MCU and PHY modules, or it can be other modules with control functions (such as a system-on-a-chip module). In specific applications, the specific control module can be selected according to the requirements, and the embodiments of this application do not impose any limitations on this.

[0039] For ease of description, this article uses the MCU module as the control module as an example, that is, it uses the pins of the control module as the pins of the MCU module. However, this description method is not a limitation. In actual application, the pin names can be changed according to the specific control module.

[0040] It should be noted that the "pull-low / pull-high" mentioned in the embodiments of this application refers to the voltage level of the pin. It should be understood that in some embodiments, when a pin is at a low level, the device / device associated with that pin will begin performing the corresponding function; when a pin is at a high level, the device / device associated with that pin will not perform the corresponding function. In other embodiments, when a pin is at a high level, the device / device associated with that pin will begin performing the corresponding function; when a pin is at a low level, the device / device associated with that pin will not perform the corresponding function.

[0041] For ease of description, this application embodiment uses the example that when a pin is at a low level, the device / device to which the pin belongs will start to perform the corresponding work, and when a pin is at a high level, the device / device to which the pin belongs will not perform the corresponding work. That is, pulling a pin low will cause the device / device to which the pin belongs to start to perform the corresponding work, and pulling a pin high will cause the device / device to which the pin belongs to not to perform the corresponding work. However, this description does not constitute a limitation on the embodiments of this application.

[0042] Please see Figure 1 , Figure 1 This is a schematic diagram of the structure of an industrial camera provided in an embodiment of this application. Figure 1 As shown, the industrial camera 10 includes a control module 11, an FPGA module 12, and a Flash module 13. The control module 11 is the main control module of the industrial camera 10, responsible for controlling the operation of other modules. It also acts as a protocol conversion module, converting the parallel port protocol sent from the FPGA module 12 into a serial port protocol for transmission. The FPGA module 12 is the main program execution module, used to process image data and output it to the control module. The Flash module 13 serves as the offline program storage module for the industrial camera 10, storing all the running code programs of the industrial camera 10.

[0043] In some embodiments, the industrial camera 10 may further include a PHY module to implement a physical layer communication interface.

[0044] As a feasible implementation, the control module 11 can be integrated with the PHY module into a single module. The control module is responsible for processing data and control tasks, while the PHY module is responsible for implementing the physical layer communication interface. This reduces the number of modules within the industrial camera 10 and improves its performance.

[0045] In some embodiments, the industrial camera 10 can be a USB industrial camera, meaning that the industrial camera 10 can include a USB interface. USB interfaces are widely used and are found on various devices. For example, a USB industrial camera can be directly connected to a computer's USB interface and work stably. Furthermore, the USB interface can directly power the USB industrial camera, eliminating the need for a separate power supply.

[0046] It should be pointed out that, Figure 1 The structure shown does not constitute a limitation on the industrial camera. In other embodiments, the industrial camera may include fewer or more components than shown, or combine certain components, or have different component arrangements. This application does not impose any limitations on this.

[0047] It is easy to understand that after the industrial camera 10 is powered on, the control module 11 and the FPGA module 12 need to load the control module loading program and the FPGA loading program stored in the Flash module 13 into their respective memory to ensure the subsequent operation of the control module 11 and the FPGA module 12. This process can be called the loading of the industrial camera.

[0048] In the related technology, the industrial camera, control module 11, FPGA module 12, and Flash module 13 adopt the following... Figure 1 The connection relationships are shown. (By...) Figure 1 It can be seen that there is no direct connection between the FPGA module 12 and the Flash module 13 of the industrial camera 10 in the related technology. After power-on, the control module 11 first reads the control module loading program in the Flash module 13 and loads it. After the control module 11 is loaded, it then transmits the FPGA loading program to the FPGA module 12 through the serial peripheral interface (SPI) of the control module 11.

[0049] In practical applications, this solution loads very slowly, taking several minutes, and cannot meet user needs in many application scenarios.

[0050] Based on this, embodiments of this application provide an industrial camera, such as... Figure 2As shown, the Flash module 13 of the industrial camera 10 includes: a data transmission pin DO and a data reception pin DI; the FPGA module 12 includes: a data reception pin FPGA_CONFIG_DATA0 and a reset pin FPGA_RST; the control module 11 includes: a data transmission pin MCU_MOSI, a data reception pin MCU_MISO, and an output pin MCU_GPIO0.

[0051] The data transmission pin DO of the Flash module 13 is connected to the data receiving pin FPGA_CONFIG_DATA0 of the FPGA module 12 and the data receiving pin MCU_MISO of the control module 11; the reset pin FPGA_RST of the FPGA module 12 is connected to the output pin MCU_GPIO0 of the control module 11.

[0052] The control module 11 is configured to send a first instruction to the data receiving pin DI of the Flash module through the data sending pin MCU_MOSI of the control module in response to the camera power-on.

[0053] Flash module 12 is configured to: in response to the first instruction, send the control module loading program through the Flash module's data transmission pin DO.

[0054] The control module 11 is also configured to: receive and load the control module loader program; after loading is completed, control the voltage of the reset pin FPGA_RST of the FPGA module 12 through the output pin MCU_GPIO0 of the control module 11 to release the FPGA module 12 from the reset state; and send a second instruction to the data receiving pin DI of the Flash module 13 through the data sending pin MCU_MOSI of the control module 11.

[0055] It should be noted that since the output pin MCU_GPIO0 of control module 11 is connected to the reset pin FPGA_RST of FPGA module 12, the output pin MCU_GPIO0 of control module 11 can control the level of the reset pin FPGA_RST of FPGA module 12, thereby controlling the state of FPGA module 12. However, the output pin MCU_GPIO0 of control module 11 is low by default after power-on, meaning that the reset pin FPGA_RST of FPGA module 12 is also low. Therefore, before control module 11 completes loading, FPGA module 12 is in a reset state. Data sent from the data transmission pin DO of control module 11 is not valid for FPGA module 12, and FPGA module 12 cannot load during the loading process of control module 11.

[0056] After the control module 11 is loaded, the reset state of the FPGA module 12 needs to be released. This is done by pulling the level of the reset pin FPGA_RST of the FPGA module 12 high through the output pin MCU_GPIO0 of the control module 11, so that the FPGA module 12 is released from the reset state.

[0057] Flash module 13 is also configured to send the FPGA loading program via the data transmission pin DO of Flash module 13 in response to a second instruction.

[0058] FPGA module 12 is configured to receive and load the FPGA loader.

[0059] As can be seen, in the industrial camera provided in this embodiment, the Flash module 13 can directly send the FPGA loading program to the FPGA module 12, enabling the FPGA module 12 to load quickly. Compared to related technologies where the FPGA loading program is transmitted from the control module 11 to the FPGA module 12 after the control module 11 has loaded the program, the industrial camera provided in this embodiment does not require the control module 11 to transmit the program. The FPGA module 12 can directly receive the FPGA loading program sent by the Flash module 13 and load it, thereby improving the loading speed of the industrial camera.

[0060] In some embodiments, during the loading process, the output pin MCU_GPIO0 of the control module 11 may be pulled high, which may cause the reset pin FPGA_RST of the FPGA module 12 to become high. In other words, the FPGA module 12 may not be fully in the reset state. At this time, the control module loading program sent by the Flash module 13 may affect the FPGA module 12.

[0061] As a feasible implementation method, before the control module 11 controls the level of the reset pin FPGA_RST of the FPGA module 12 through the output pin MCU_GPIO0 to release the FPGA module 12 from the reset state, the control module 11 is also configured to: control the voltage of the reset pin FPGA_RST of the FPGA module through the output pin MCU_GPIO0 to put the FPGA module 12 into the reset state.

[0062] In other words, before releasing the FPGA module 12 from its reset state, the control module 11 first pulls the FPGA_RST reset pin of the FPGA module 12 low once to put the FPGA module 12 into a reset state, clearing the useless data received by the FPGA module 12 and avoiding affecting the subsequent loading of the FPGA module 12.

[0063] In some embodiments, since the industrial camera contains multiple modules, these modules may be connected on the same communication bus. The control module 11, as the main control module, needs to determine which module on the communication bus will process the instruction when issuing it. For example, in this embodiment, the first and second instructions require processing by the Flash module 13. Therefore, before issuing the first and second instructions, the control module 11 needs to send a signal to the Flash module 13 to activate it.

[0064] Based on this, please refer to the following as a feasible implementation method: Figure 2 The industrial camera provided in this application embodiment includes a control module 11 that further includes a chip select pin MCU_CS, and a Flash module 13 that further includes a chip select pin CS. The chip select pin MCU_CS of the control module 11 is connected to the chip select pin CS of the Flash module 13.

[0065] As a feasible implementation method, the industrial camera provided in this application embodiment is configured to, before sending the first instruction to the data receiving pin DI of the Flash module 13 through the data sending pin MCU_MOSI of the control module 11, control the voltage of the chip select pin CS of the Flash module 13 through the chip select pin MCU_CS of the control module 11 so that the Flash module 13 is in working state.

[0066] Before the control module 11 sends the first instruction to the Flash module 13, the chip select pin MCU_CS of the control module 11 pulls the chip select pin CS of the Flash module 13 low, so that the Flash module 13 is in working state. In this way, the control module 11 can read or write to the Flash module 13, that is, it can receive and execute the first instruction sent by the control module 11.

[0067] As a feasible implementation method, before sending the second instruction to the data receiving pin DI of the Flash module 13 through the data sending pin MCU_MOSI of the control module 11, the control module 11 is also configured to control the voltage of the chip select pin CS of the Flash module 13 through the chip select pin MCU_CS of the control module 11 to make the Flash module 13 work.

[0068] Before the control module 11 sends the second instruction to the Flash module 13, the chip select pin MCU_CS of the control module 11 pulls the chip select pin CS of the Flash module 13 low, so that the Flash module 13 is in working state. In this way, the control module 11 can read or write to the Flash module 13, that is, it can receive and execute the second instruction sent by the control module 11.

[0069] In some embodiments, data is transmitted frame by frame in the line. If the frequencies of the data sending end and the data receiving end are inconsistent, slippage may occur, that is, data loss, resulting in erroneous transmitted data. Therefore, before the control module 11 issues the first and second instructions, it is necessary to adjust the control module 11, the FPGA module 12 and the Flash module 13 to the same frequency.

[0070] Based on this, please refer to the following as a feasible implementation method: Figure 2 The industrial camera 10 provided in this application embodiment includes a control module 11 further comprising a clock pin MCU_CLK, an FPGA module 12 further comprising a clock pin FPGA_CONFIG_CLK, and a Flash module 13 further comprising a clock pin CLK. The clock pin MCU_CLK of the control module 11 is connected to the clock pin FPGA_CONFIG_CLK of the FPGA module 12 and the clock pin CLK of the Flash module 13.

[0071] As a feasible implementation method, before sending the first instruction to the data receiving pin DI of the Flash module 13 through the data sending pin MCU_MOSI of the control module 11, the control module 11 is also configured to send the first synchronization clock through the clock pin MCU_CLK of the control module 11.

[0072] The control module 11 sends a first synchronization clock through its clock pin MCU_CLK. Upon receiving this first synchronization clock, the clock pins FPGA_CONFIG_CLK of the FPGA module 12 and CLK of the Flash module 13 ensure that the time stamp data among the control module 11, FPGA module 12, and Flash module 13 is consistent, i.e., adjusted to the same frequency. This prevents data loss when the Flash module 13 sends the control module's loading program, thus avoiding the possibility of the control module 11 failing to load correctly.

[0073] As a feasible implementation method, before sending the second instruction to the data receiving pin DI of the Flash module 13 through the data sending pin MCU_MOSI of the control module 11, the control module 11 is also configured to send the second synchronization clock through the clock pin MCU_CLK of the control module 11.

[0074] The control module 11 sends a second synchronization clock through its clock pin MCU_CLK. Upon receiving this second synchronization clock, the clock pins FPGA_CONFIG_CLK of the FPGA module 12 and CLK of the Flash module 13 ensure that the time stamp data among the control module 11, FPGA module 12, and Flash module 13 is consistent, i.e., adjusted to the same frequency. This prevents data loss when the Flash module 13 sends the FPGA loading program, thus avoiding the inability of the FPGA module 12 to load correctly.

[0075] In some embodiments, since the control module 11 is the master control module (master device), the operation of each module in the industrial camera needs to be controlled by the control module 11. Therefore, the FPGA module 12, as a slave device, needs to inform the control module 11 that it has completed loading after loading, so that the control module 11 can perform subsequent control.

[0076] Based on this, please refer to the following as a feasible implementation method: Figure 2 The industrial camera provided in this application embodiment includes an FPGA module 12 that further includes a completion pin FPGA_Done, and a control module 11 that further includes an input pin MCU_GPIO1. The completion pin FPGA_Done of the FPGA module 12 is connected to the input pin MCU_GPIO1 of the control module 11.

[0077] As a feasible implementation method, after receiving and loading the FPGA loader, the FPGA module 12 is also configured to: after the FPGA loader is loaded, send loading completion information to the input pin MCU_GPIO1 of the control module 11 through the completion pin FPGA_Done of the FPGA module 12; the control module 11 is also configured to: receive the loading completion information and determine that the industrial camera loading is complete.

[0078] After loading is complete, FPGA module 12 sends a loading completion message to control module 11 via its completion pin FPGA_Done, informing control module 11 that it has finished loading. Upon receiving the loading completion message, control module 11 confirms that the industrial camera has finished loading and can perform subsequent operations.

[0079] In some embodiments, please refer to Figure 3 The industrial camera provided in this application embodiment includes the following steps in its loading process after power-on:

[0080] S301. In response to the power-on of the industrial camera, the control module 11 sends the first synchronization clock through the clock pin MCU_CLK of the control module and pulls down the chip select pin CS of the Flash module.

[0081] S302, the control module 11 sends the first instruction to the data receiving pin DI of the flash module 13 through the data sending pin MCU_MOSI of the control module.

[0082] S303 and Flash module 13 respond to the first instruction by sending the control module loading program through the data transmission pin DO of Flash module 13.

[0083] It is understandable that the data transmission pin DO of Flash module 12 is connected to the data reception pin FPGA_CONFIG_DATA0 of FPGA module and the data reception pin MCU_MISO of control module. Therefore, the control module loading program can be sent to control module 11 and FPGA module 12 via the data transmission pin DO of Flash module 12. Since the output pin MCU_GPIO0 of control module 11 is connected to the reset pin FPGA_RST of FPGA module 12, and the output pin MCU_GPIO0 of control module 11 is low by default after power-on, which means that the reset pin FPGA_RST of FPGA module 12 is in a low-level state, FPGA module 12 is in a reset state. FPGA module 12 does not perform any processing upon receiving the control module loading program, while control module 11 can begin loading after receiving the control module loading program.

[0084] S304. The control module 11 receives and loads the control module loading program. After loading is completed, the control module 11 controls the level of the FPGA module 12's reset pin FPGA_RST through the output pin MCU_GPIO0 to put the FPGA module 12 into a reset state.

[0085] It should be noted that, in order to prevent the control module 11 from failing to control the level of the reset pin of the FPGA module 12 during the loading process, the level of the reset pin FPGA_RST of the FPGA module 12 is pulled low again to ensure that the FPGA module 12 is in a reset state before loading.

[0086] S305. The level of the reset pin FPGA_RST of the FPGA module 12 is controlled by the output pin MCU_GPIO0 of the control module 11 to release the FPGA module 12 from the reset state.

[0087] Before FPGA module 12 is loaded, it is necessary to release the reset state of FPGA module 12. This is done by pulling the level of the FPGA module's reset pin FPGA_RST high through the output pin MCU_GPIO0 of control module 11, thereby releasing the reset state of FPGA module 12.

[0088] S306, the control module 11 sends the second synchronization clock through the clock pin MCU_CLK of the control module and pulls low the chip select pin CS of the Flash module 13.

[0089] S307. The second instruction is sent from the data transmission pin MCU_MOSI of the control module 11 to the data reception pin DI of the Flash module 13.

[0090] S308 and Flash module 13 respond to the second instruction by sending the FPGA loading program through the data transmission pin DO of Flash module 13.

[0091] The control module 11 receives the FPGA loading program but does not process it. The FPGA module 12 receives the FPGA loading program and begins loading.

[0092] S309. After the FPGA module 12 is loaded, it sends the loading completion information to the control module 11 through the FPGA_Done pin of the FPGA module 12.

[0093] After receiving the loading completion information, the control module 11 determines that the industrial camera has been loaded.

[0094] This application also provides a loading method for an industrial camera, applicable to the industrial cameras provided in the above embodiments. Please refer to [link to relevant documentation]. Figure 4 The loading method includes the following steps:

[0095] S401. In response to the power-on of the industrial camera, the control module sends the first instruction to the data receiving pin of the Flash module through the data sending pin of the control module.

[0096] After receiving the first instruction, the Flash module sends the control module to load the program via the Flash module's data transmission pin.

[0097] S403. The control module receives and loads the control module loading program, and after loading is completed, controls the voltage of the reset pin of the FPGA module through the output pin of the control module to release the FPGA module from the reset state.

[0098] S404. The control module sends a second instruction to the data receiving pin of the Flash module through the data sending pin of the control module.

[0099] After receiving the second instruction, the S405 and Flash modules send the FPGA loading program through the data transmission pins of the Flash modules.

[0100] S406: The FPGA module receives and loads the FPGA loader.

[0101] As a feasible implementation method, before controlling the voltage of the reset pin of the FPGA module through the output pin to release the FPGA module from the reset state, the loading method also includes: the control module controlling the voltage of the reset pin of the FPGA module through the output pin to put the FPGA module into the reset state.

[0102] As a feasible implementation, the chip select pin of the control module is connected to the chip select pin of the Flash module. Before sending the first instruction to the data receive pin of the Flash module through the data transmit pin of the control module, the loading method further includes: the control module controlling the voltage of the chip select pin of the Flash module through the chip select pin of the control module to make the Flash module in a working state.

[0103] As a feasible implementation method, prior to S404, the loading method also included: the control module controlling the voltage of the chip select pin of the Flash module through the chip select pin of the control module to make the Flash module work.

[0104] As one feasible implementation, the clock pin of the control module is connected to the clock pins of the Flash module and the FPGA module. Before sending the first instruction to the data receiving pin of the Flash module through the data sending pin of the control module, the loading method further includes: the control module sending a first synchronization clock through the clock pin of the control module.

[0105] As a feasible implementation method, prior to S404, the loading method also included: the control module sending a second synchronization clock through the clock pin of the control module.

[0106] As one feasible implementation, the completion pin of the FPGA module is connected to the input pin of the control module. Following S406, the loading method also includes: after loading is complete, the FPGA module sends loading completion information to the input pin of the control module via its completion pin; upon receiving the loading completion information, the control module determines that the industrial camera loading is complete.

[0107] Through the above description of the embodiments, those skilled in the art can clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0108] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another apparatus, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0109] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0110] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0111] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, essentially or in other words, the parts that contribute to the prior art, or all or part of the technical solutions, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, etc.) or processor to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes: USB flash drives, mobile hard drives, ROM, RAM, embedded multimedia controllers (Embedded Multi Media Card, EMMC), electrically erasable programmable read-only memory (EEPROM), magnetic disks, optical disks, and other media capable of storing program code.

[0112] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. An industrial camera, characterized in that, Includes: Field Programmable Gate Array (FPGA) module, control module, and coded flash memory module; The data transmission pin of the Flash module is connected to the data receiving pin of the FPGA module and the data receiving pin of the control module; The reset pin of the FPGA module is connected to the output pin of the control module; after the industrial camera is powered on, the output pin of the control module is used to control the level of the reset pin of the FPGA module, so that the FPGA module is in a reset state. The control module is configured to: in response to the power-on of the industrial camera, send a first instruction to the data receiving pin of the Flash module through the data sending pin of the control module; The Flash module is configured to: in response to the first instruction, send a control module loading program through the data transmission pin of the Flash module; The control module is also configured to: receive and load the control module loading program; after loading is completed, control the level of the reset pin of the FPGA module through the output pin of the control module to release the FPGA module from the reset state; and send a second instruction to the data receiving pin of the Flash module through the data sending pin of the control module. The Flash module is also configured to: in response to the second instruction, send the FPGA loading program through the data transmission pin of the Flash module; The FPGA module is configured to receive and load the FPGA loader.

2. The industrial camera according to claim 1, characterized in that, Before controlling the level of the reset pin of the FPGA module via the output pin to release the FPGA module from the reset state, The control module is also configured to: The output pin controls the level of the reset pin of the FPGA module to put the FPGA module into a reset state.

3. The industrial camera according to claim 1, characterized in that, The chip select pin of the control module is connected to the chip select pin of the Flash module; Before the first instruction is sent from the data transmission pin of the control module to the data reception pin of the Flash module... The control module is also configured to: The chip select pin of the control module is used to control the level of the chip select pin of the Flash module so that the Flash module is in working state.

4. The industrial camera according to claim 3, characterized in that, Before the second instruction is sent from the data transmission pin of the control module to the data reception pin of the Flash module. The control module is also configured to: The chip select pin of the control module is used to control the level of the chip select pin of the Flash module so that the Flash module is in working state.

5. The industrial camera according to any one of claims 1-4, characterized in that, The clock pin of the control module is connected to the clock pin of the Flash module and the clock pin of the FPGA module; Before the first instruction is sent from the data transmission pin of the control module to the data reception pin of the Flash module. The control module is also configured to: The first synchronization clock is sent through the clock pin of the control module.

6. The industrial camera according to claim 5, characterized in that, Before the second instruction is sent from the data transmission pin of the control module to the data reception pin of the Flash module. The control module is also configured to: The second synchronization clock is sent through the clock pin of the control module.

7. The industrial camera according to any one of claims 1-4, characterized in that, The completion pin of the FPGA module is connected to the input pin of the control module; After receiving and loading the FPGA loader, The FPGA module is also configured to: After the FPGA loader is loaded, a loading completion message is sent from the FPGA module's completion pin to the control module's input pin. The control module is also configured to receive the loading completion information and determine that the industrial camera has been loaded.

8. A loading method for an industrial camera, characterized in that, The industrial camera includes: a field-programmable gate array (FPGA) module, a control module, and a coded flash memory module; The data transmission pin of the Flash module is connected to the data receiving pin of the FPGA module and the data receiving pin of the control module; The reset pin of the FPGA module is connected to the output pin of the control module; after the industrial camera is powered on, the output pin of the control module is used to control the level of the reset pin of the FPGA module, so that the FPGA module is in a reset state. The loading method includes: In response to the power-on of the industrial camera, the control module sends a first command to the data receiving pin of the Flash module through the data sending pin of the control module; After receiving the first instruction, the Flash module sends the control module to load the program through the data transmission pin of the Flash module. The control module receives and loads the control module loading program, and after loading is completed, controls the voltage of the reset pin of the FPGA module through the output pin of the control module to release the FPGA module from the reset state; The control module sends a second instruction to the data receiving pin of the Flash module through the data sending pin of the control module; After receiving the second instruction, the Flash module sends the FPGA loading program through the data sending pin of the Flash module; The FPGA module receives and loads the FPGA loader.

9. The loading method according to claim 8, characterized in that, Before controlling the voltage of the reset pin of the FPGA module via the output pin to release the FPGA module from the reset state, the loading method further includes: The control module controls the voltage of the reset pin of the FPGA module through the output pin to put the FPGA module into a reset state.

10. The loading method according to claim 8, characterized in that, The chip select pin of the control module is connected to the chip select pin of the Flash module; Before sending the first instruction to the data receiving pin of the Flash module via the data sending pin of the control module, the loading method further includes: The control module controls the voltage of the chip select pin of the Flash module through the chip select pin of the control module to make the Flash module work. Before the control module sends the second instruction to the Flash module's data receiving pin via its data sending pin. The loading method further includes: The control module controls the voltage of the chip select pin of the Flash module through the chip select pin of the control module to enable the Flash module to operate.

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