Direct current fault current limiting method applied to modular multilevel converter

Abstract

The application discloses a DC fault current limiting method applied to a modular multilevel converter, and comprises the following steps: after a DC fault occurs, the DC fault current limiting method is started, absolute values of three-phase differential-mode voltages of the modular multilevel converter are sorted, the differential-mode voltage refers to half of the difference between a lower bridge arm voltage and an upper bridge arm voltage of the same phase, common-mode voltages of the three phases are independently controlled, the common-mode voltage refers to an average value of the upper bridge arm voltage and the lower bridge arm voltage of the same phase, and the common-mode voltage of the phase with the minimum differential-mode voltage absolute value is adjusted to be k times of the second largest differential-mode voltage absolute value, k can be a value between 0.9 and 1.1; the common-mode voltages of the two phases with larger differential-mode voltage absolute values are reset to the differential-mode voltage absolute values of the two phases respectively. Once the DC fault is eliminated, the fault current limiting method stops working. The application can effectively limit the DC fault current and reduce the bridge arm current stress without changing the amplitude and phase of the alternating output voltage.

Description

Technical Field

[0001] This invention belongs to the field of modular multilevel converters, specifically a DC fault current limiting method applied to modular multilevel converters (MMC). Background Technology

[0002] Modular multilevel converters (MMCs) based on half-bridge submodules (consisting of one energy storage capacitor, two IGBTs, and two anti-parallel freewheeling diodes) require a direct current circuit breaker (DCCB) to clear DC fault currents. However, DC circuit breakers are currently expensive and the technology is still immature. Therefore, limiting the DC fault current before the DCCB interrupts it helps reduce the requirements on the DCCB.

[0003] DC fault current limiting can be achieved by reducing the DC voltage at the MMC DC outlet or increasing the DC-side inductance of the MMC. However, increasing the DC inductance increases the cost and size of the DC transmission system and negatively impacts its dynamic performance. Therefore, reducing the DC voltage avoids these problems and thus has better application prospects.

[0004] The MMC's arm reference voltages include differential-mode and common-mode voltages, which can be obtained using a conventional dual-loop vector control method. These determine the MMC's AC and DC output voltages, respectively. Reducing the MMC's DC voltage can be achieved by reducing the common-mode voltage component of the arm reference voltage. However, since half-bridge submodules cannot output negative voltages, the range of arm output voltages is limited. Reducing the common-mode voltage while keeping the differential-mode voltage constant easily leads to overmodulation, severely limiting the MMC's DC fault current limiting capability.

[0005] Therefore, some studies employ methods that simultaneously reduce both common-mode and differential-mode voltages to avoid overmodulation and thus improve the fault current limiting capability of the MMC. However, these methods significantly reduce the amplitude of the AC output voltage, potentially leading to severe AC system overcurrent and MMC arm overcurrent.

[0006] Subsequently, some methods have attempted to mitigate AC system overcurrent or arm overcurrent during fault current limiting. For example, improving the inner loop control of the circulating current has mitigated arm overcurrent during fault current limiting (Jiang Q, Tao Y, Li B, et al. Joint Limiting Control Strategy Based on Virtual Impedance Shaping for Suppressing DC Fault Current and Arm Current in MMC-HVDC Systems[J]. Journal of Modern Power Systems and Clean Energy, 2023, 11(6): 2003-2014.), but this method does not consider AC system overcurrent. Others have used virtual impedance control to limit AC current during fault current limiting, but this method comes at the cost of altering the reactive power transmitted between the converter and the AC system, and it reduces the effectiveness of DC fault current limiting (Gong Z, Zhao S, Wu X, et al. A global fault current limiting strategy for the MMC-HVDC grid with a reduced DC reactor[J]. International Journal of Electrical Power & Energy Systems, 2022, 140.). Furthermore, AC system overcurrent cannot be completely avoided in this method. It is worth noting that the fault current limiting scheme typically activates before the DCCB is turned on to maximize the DC fault current limiting effect, thus increasing the likelihood of malfunction in the current limiting scheme. Therefore, sacrificing the amplitude or phase of the AC output voltage to limit the fault current may lead to AC system instability due to malfunction. To date, existing research has struggled to enhance the fault current limiting capability of the MMC without altering the AC output voltage amplitude and phase. Summary of the Invention

[0007] The purpose of this invention is to propose a method for limiting DC fault current in modular multilevel converters.

[0008] The technical solution to achieve the purpose of this invention is: a DC fault current limiting method applied to a modular multilevel converter, which independently controls the common-mode voltage of the three phases in the modular multilevel converter after a DC fault occurs, reduces the common-mode voltage of each phase according to the differential-mode component in the reference value of each phase arm voltage, and limits the minimum common-mode voltage of the three phases.

[0009] Preferably, a DC fault current limiting method applied to a modular multilevel converter includes:

[0010] After a DC fault occurs, the absolute values ​​of the three-phase differential-mode voltages of the modular multilevel converter are sorted; the common-mode voltage of the phase with the smallest absolute value of differential-mode voltage is equal to k times the absolute value of the second largest absolute value of differential-mode voltage among the three phases, where k takes a value between 0.9 and 1.1.

[0011] The common-mode voltages of the two phases with larger absolute differential-mode voltages are reset to their corresponding absolute differential-mode voltages.

[0012] Preferably, the specific method for making the common-mode voltage of the phase with the smallest absolute value of differential-mode voltage equal to k times the absolute value of the second largest absolute value of differential-mode voltage among the three phases is as follows:

[0013] For the phase with the smallest absolute value of differential mode voltage, if the original upper bridge arm voltage was greater than the lower bridge arm voltage, then the upper bridge arm voltage is calculated by multiplying the second largest absolute value of differential mode voltage by k and adding the smallest absolute value of differential mode voltage; the lower bridge arm voltage is calculated by multiplying the second largest absolute value of differential mode voltage by k and subtracting the smallest absolute value of differential mode voltage. Otherwise, the upper bridge arm voltage is calculated by multiplying the second largest absolute value of differential mode voltage by k and subtracting the smallest absolute value of differential mode voltage; the lower bridge arm voltage is calculated by multiplying the second largest absolute value of differential mode voltage by k and adding the smallest absolute value of differential mode voltage.

[0014] Preferably, the specific method for resetting the common-mode voltages of the two phases with larger absolute values ​​of differential-mode voltage to the corresponding absolute values ​​of differential-mode voltage is as follows:

[0015] For two phases with a larger absolute value of differential mode voltage, the voltage of the bridge arm with the larger voltage in the upper and lower arms of each phase is adjusted to twice the absolute value of the differential mode voltage, and the other is adjusted to 0.

[0016] Compared with the prior art, the present invention has the following significant advantages: the present invention effectively reduces DC fault current and bridge arm current stress without changing the amplitude and phase of AC output voltage. Attached Figure Description

[0017] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts.

[0018] Figure 1 This is a schematic diagram of the modular multilevel converter used in this invention.

[0019] Figure 2 This is the reduction in common-mode voltage (u) when the present invention is applied. iΔ ) and the reduced common-mode voltage (u idc (a) refers to the allowable u when each phase is considered independently. iΔ(a) Scope; (b) Allowable u when considering all three phases together iΔ Scope; (c) u when each phase is considered independently idc (d) u ​​when considering all three phases idc .

[0020] Figure 3 This invention presents the basic process of relaxing circulating current control to reduce DC fault current.

[0021] Figure 4 The figure shows the simulation results of the method proposed in this invention in Matlab / Simulink.

[0022] Figure 5 This is a diagram of the experimental setup for verifying the method proposed in this invention.

[0023] Figure 6 This is a diagram showing the experimental results of the method proposed in this invention. Detailed Implementation

[0024] It is readily understood that, based on the technical solution of this invention, various embodiments of the invention can be conceived by those skilled in the art without altering the essential spirit of the invention. Therefore, the following detailed embodiments and accompanying drawings are merely illustrative examples of the technical solution of this invention and should not be considered as the entirety of the invention or as limitations or restrictions on the technical solution of this invention. Rather, these embodiments are provided to enable those skilled in the art to gain a more thorough understanding of the invention. The embodiments of the invention are described in detail below with reference to the accompanying drawings, which constitute a part of this application and, together with the embodiments of the invention, serve to illustrate the innovative concept of the invention.

[0025] The present invention is a DC fault current limiting method applied to a modular multilevel converter (MMC). After a DC fault occurs, the common-mode voltage of the three phases in the MMC is independently controlled. The common-mode voltage of each phase is reasonably reduced according to the differential-mode voltage of the three phases, which can avoid excessive circulating current to a certain extent. Thus, without changing the amplitude and phase of the AC output voltage, the DC fault current and bridge arm current stress are effectively reduced.

[0026] The structure of MMC is as follows Figure 1 As shown, the arm reference voltage in the MMC is determined by the i-phase common-mode voltage u. ic (where i = a, b, c) and the phase differential voltage u of phase i id (where i = a, b, c) constitute

[0027]

[0028] Among them, u pi and u niThese represent the upper and lower arm voltages of the i-th phase (where i = a, b, c), respectively. ic and u id This is achieved through the traditional dual-closed-loop vector control method.

[0029] Furthermore, without changing u id In this case, u of each phase pi and u ni Reduce the same amount u iΔ Then the total modulus voltage of that phase will be 2u ic Reduced to 2u ic -2u iΔ The minimum allowable value for the bridge arm voltage is zero. Therefore, as... Figure 2 As shown in (a) and (2), to prevent overmodulation, the maximum u in each phase is... iΔ equal to u pi and u ni The smaller value in the range. Where, u idc (where i = a, b, c) represents the common-mode voltage of phase i after reduction.

[0030] u idc =u pi +u ni -2u iΔ =|u pi -u ni |=2|u id |(2)

[0031] After a fault occurs, the instantaneous common-mode voltage of each phase is controlled in the manner of (2), thereby significantly reducing the DC voltage and effectively improving the fault current limiting capability of the MMC.

[0032] Under the concept of independently controlled three-phase common-mode voltage, the DC voltage v dc1 This represents the strongest DC fault current limiting effect, where v adc ,v bdc ,v cdc These represent the DC voltages of phases a, b, and c, respectively.

[0033]

[0034] However, this method completely ignores the limitation of circulating current, which may increase the stress on the bridge arm current to some extent. Circulating current is caused by unequal three-phase common-mode voltages. If the minimum common-mode voltage in the three phases is limited to the second largest common-mode voltage, excessive circulating current can be avoided to some extent, while having little impact on the DC fault current limiting capability of the MMC. Thus, the DC voltage v dc3 Become

[0035]

[0036] Where Max represents the differential-mode voltage u of phases a, b, and c. ad ,u bd ,u cd The maximum absolute value, Mid, represents the differential-mode voltage u of phases a, b, and c. ad ,u bd ,u cd The second largest value in absolute terms.

[0037] The specific implementation of this invention is as follows: after a DC fault occurs, the common-mode voltage of the three phases in the MMC is independently controlled. Specifically, the common-mode voltage of each phase is reasonably reduced based on the differential-mode components of the three phases. The specific steps are as follows:

[0038] Figure 3 The operational sequence of the proposed DC fault current limiting method is described. After a DC fault occurs, the DC fault current limiting method is activated, limiting the absolute value (u) of the three-phase differential mode voltage of the modular multilevel converter. ad ,u bd ,u cd The comparisons and sorting are as shown in (5), where u Min The minimum absolute value of the three-phase differential-mode voltage, u Mid The second largest absolute value of the three-phase differential-mode voltage, u Max This refers to the maximum absolute value of the three-phase differential mode voltage.

[0039]

[0040] Independent control of three-phase common-mode voltage, including: making u Min The common-mode voltage of that phase is adjusted to k times u. Mid k can take values ​​between 0.9 and 1.1, making u Mid u Max The common-mode voltage of the corresponding phase is reset to the absolute value of the differential-mode voltage of that phase.

[0041] In a further embodiment, when u Min The common-mode voltage of that phase is adjusted to k times u. Mid At that time, u Min The bridge arm reference voltage for this phase can be calculated using the following method:

[0042] If the voltage of the upper bridge arm is greater than that of the lower bridge arm, then the voltage of the upper bridge arm is the absolute value of the second largest differential mode voltage multiplied by k plus the absolute value of the smallest differential mode voltage, and the voltage of the lower bridge arm is the absolute value of the second largest differential mode voltage multiplied by k minus the absolute value of the smallest differential mode voltage; otherwise, the voltage of the upper bridge arm is the absolute value of the second largest differential mode voltage multiplied by k minus the absolute value of the smallest differential mode voltage, and the voltage of the lower bridge arm is the absolute value of the second largest differential mode voltage multiplied by k plus the absolute value of the smallest differential mode voltage, as shown in equations (6) and (7).

[0043]

[0044] Among them, v pi0 and v ni0 V represents the upper arm voltage and lower arm voltage of phase i (i = a, b, c) before adjustment, respectively. pi1 and v ni1 These represent the adjusted upper and lower bridge arm voltages of phase i (i = a, b, c), respectively.

[0045] In a further embodiment, u Mid and u Max The bridge arm reference voltages for these two phases can be calculated using the following method:

[0046] The voltage of the bridge arm with the larger voltage in the upper and lower arms of the same phase is adjusted to twice the absolute value of the differential voltage, and the other is adjusted to 0, as shown in equations (8) and (9).

[0047]

[0048] After the DC fault is cleared, the fault current limiting method proposed in this invention stops operating, and the three-phase common-mode voltage is no longer independently controlled.

[0049] Table I compares the proposed method with existing methods. Method 1 is a typical fault current limiting method proposed in (Yu J, Zhang Z, Xu Z. An Active DC Fault Current Limiting Control for Half-bridge Modular Multilevel Converter Based on Arm Voltage Reconstruction[J]. IEEE Transactions on PowerDelivery, 2024, 39(1): 565-577.). This method reduces DC voltage at the expense of AC output voltage offset. Method 2 (Ni B et al. An adaptive fault current limiting control for MMC and its application in DC grid[J]. IEEE Transactions on PowerDelivery, 2020, 36(2): 920-931.) is another typical fault current limiting method, which reduces DC voltage at the expense of significantly reducing AC output voltage.

[0050] Table I: Comparison of the method proposed in this invention with existing methods

[0051]

[0052] Compared to Method 1, both the proposed method and Method 2 have stronger DC fault current limiting capabilities. However, Method 2 can lead to AC system overcurrent and arm overcurrent in the MMC. While the proposed method increases circulating current, it reduces AC system current and arm current stress, indicating better compatibility with AC systems and converters. Existing solutions may affect the amplitude or phase of the AC voltage, while the proposed solution does not affect the amplitude or phase of the AC voltage.

[0053] Example 1

[0054] A symmetrical unipolar MMC-HVDC (Modular Multilevel Converter - High Voltage Direct Current Transmission) model was built in Matlab / Simulink to verify the proposed method. Here, after a DC fault occurs, the common-mode voltage of the phase with the smallest absolute value of the differential-mode voltage is specifically adjusted to u. MidThat is, k is set to 1, and Table II gives the relevant parameters. The DC-side pole-to-pole short-circuit fault occurs at t = 0.5s, the MMC starts limiting the DC fault current at t = 0.501s, and the DCCB turns on at t = 0.505s. Therefore, the main focus is on the performance of the method proposed in this invention during the period from 0.5s to 0.505s.

[0055] Table II MMC Parameters

[0056]

[0057] Figure 4 (a) shows the simulation results without using the method proposed in this invention. From the occurrence of the fault to the opening of the DC circuit breaker, the DC voltage drops slightly because the MMC maintains the AC voltage, and the AC current remains within a controllable range without overcurrent. However, the DC current increases significantly, reaching a peak of 4.65 kA. At t = 0.505 seconds, the maximum arm current is 3 kA.

[0058] Figure 4 (b) shows the simulation results of the current limiting scheme proposed in this invention. From the occurrence of the fault to the opening of the DC circuit breaker, the DC voltage drops significantly, by nearly half. The DC current is also effectively limited, with a peak value of 3.28 kA. At t = 0.505 seconds, the arm current drops to 2.4 kA. The AC current remains fully controllable. These results demonstrate that the proposed scheme effectively limits the DC fault current and arm current without distorting the AC current, which is consistent with the theoretical analysis.

[0059] Example 2

[0060] The advantages of the proposed method were verified by using three-phase MMC experiments, such as... Figure 5 As shown. Here, after a DC fault occurs, the common-mode voltage of the phase with the smallest absolute value of the differential-mode voltage is specifically adjusted to u. Mid That is, k is 1, and the experimental setup parameters are shown in Table II.

[0061] Figure 6 (a) shows the experimental results without using the method proposed in this invention. After the DC fault occurred, the DC voltage decreased slightly. When the DCCB was turned on, the DC current reached 17.4 A, and the maximum arm current stress was 8.6 A.

[0062] Figure 6(b) shows the experimental results using the method proposed in this invention. After adopting the proposed DC fault current limiting method, the DC voltage is significantly reduced. When the DC-DC converter is open, the DC current is 9 A, and the maximum arm current stress is 6.2 A. These results demonstrate that the method proposed in this invention can reduce DC fault current and arm current stress without affecting the AC current. The experimental results are consistent with the simulation results.

[0063] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for limiting DC fault current in a modular multilevel converter, characterized in that, After a DC fault occurs, the common-mode voltage of the three phases in the modular multilevel converter is independently controlled. The common-mode voltage of each phase is reduced based on the differential-mode component in the reference value of each phase arm voltage, limiting the minimum common-mode voltage among the three phases, including: After a DC fault occurs, the absolute values ​​of the three-phase differential-mode voltages of the modular multilevel converter are sorted. The common-mode voltage of the phase with the smallest absolute differential-mode voltage is equal to k times the absolute value of the second largest absolute differential-mode voltage among the three phases, where k takes a value between 0.9 and 1.

1. The specific method is as follows: For the phase with the smallest absolute value of differential mode voltage, if the original upper bridge arm voltage was greater than the lower bridge arm voltage, then the upper bridge arm voltage is calculated by multiplying the second largest absolute value of differential mode voltage by k and adding the smallest absolute value of differential mode voltage; the lower bridge arm voltage is calculated by multiplying the second largest absolute value of differential mode voltage by k and subtracting the smallest absolute value of differential mode voltage. Otherwise, the upper bridge arm voltage is calculated by multiplying the second largest absolute value of differential mode voltage by k and subtracting the smallest absolute value of differential mode voltage; the lower bridge arm voltage is calculated by multiplying the second largest absolute value of differential mode voltage by k and adding the smallest absolute value of differential mode voltage. The common-mode voltage of the phase with the smallest absolute value of differential-mode voltage is reset to kU. Mid u Mid The bridge arm reference voltages for the phase with the smallest absolute value of differential mode voltage are: (This is the second largest value among the three-phase differential mode voltages.) ； ； Among them, u Min The minimum absolute value of the three-phase differential mode voltage, v pi0 and v ni0 These represent the upper and lower arm voltages of phase i before adjustment, respectively. pi1 and v ni1 Let i represent the adjusted upper and lower bridge arm voltages of phase i, respectively, where i = a, b, c; The common-mode voltages of the two phases with larger absolute differential-mode voltages are reset to their corresponding absolute differential-mode voltages.

2. The DC fault current limiting method applied to a modular multilevel converter according to claim 1, characterized in that, The specific method for resetting the common-mode voltages of the two phases with larger absolute differential-mode voltages to their corresponding absolute differential-mode voltages is as follows: For two phases with a larger absolute value of differential mode voltage, the voltage of the bridge arm with the larger voltage in the upper and lower arms of each phase is adjusted to twice the absolute value of the differential mode voltage, and the other is adjusted to 0.

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