Sensor pixel unit, signal processing device and electronic equipment

Abstract

The embodiment of the invention discloses a sensor pixel unit, a signal processing device and electronic equipment, and the sensor pixel unit comprises k photosensitive units which are connected in parallel and an output control unit. Each light sensing unit is connected with the output control unit; wherein k is an integer greater than 1; in the first exposure stage, each photosensitive unit in the k photosensitive units converts received optical signals into photo-generated charges and stores the photo-generated charges; in a first reading stage, the output control unit reads out the photo-generated charges stored in each of the k photosensitive units one by one, outputs k first signals and executes reset operation; in the second exposure stage, each photosensitive unit in the k photosensitive units converts the received light signals into photo-generated charges and stores the photo-generated charges; and in a second read-out stage, the output control unit reads out all the photo-generated charges stored in the k light sensing units at one time and outputs a second signal.

Description

Technical Field

[0001] The present disclosure relates to the field of sensor technology, and in particular to a sensor pixel unit, a signal processing device and an electronic device. Background Art

[0002] Image sensors have been widely used in digital cameras, mobile phones, medical treatment, automobiles, drones, machine recognition and other fields. In particular, the rapid development of complementary metal oxide semiconductor (CMOS) image sensor technology has led to higher requirements for the output image quality of image sensors. CMOS image sensors can be divided into two categories based on the signal acquisition method: one method is to set the exposure time of the pixel and then measure the change in the voltage signal; the second method is to set the voltage change of the pixel and then measure the exposure time. This type of image sensor is called a pulse sequence image sensor. During the operation of the pixel, each reset of the pixel will bring random reset noise, and the transmission path of the pixel signal from the pixel readout to the column circuit will also introduce noise and errors. Summary of the invention

[0003] Embodiments of the present disclosure provide a sensor pixel unit, a signal processing device, and an electronic device.

[0004] In one aspect of an embodiment of the present disclosure, a sensor pixel unit is provided, comprising: k photosensitive units connected in parallel and an output control unit; each of the photosensitive units is connected to the output control unit respectively; wherein k is an integer greater than 1;

[0005] In the first exposure stage, each of the k photosensitive units converts the received light signal into photogenerated charge and stores it;

[0006] In the first readout stage, the output control unit reads out the photogenerated charges stored in each of the k photosensitive units one by one, outputs k first signals and performs a reset operation;

[0007] In the second exposure stage, each of the k photosensitive units converts the received light signal into photogenerated charge and stores it;

[0008] In the second readout stage, the output control unit reads out all the photogenerated charges stored in the k photosensitive units at one time and outputs a second signal.

[0009] Optionally, the light sensing unit includes a photodiode, a first switch transistor, a cache capacitor and a second switch transistor;

[0010] The photodiode is used to receive light signals in the first exposure stage and the second exposure stage to generate photogenerated charges;

[0011] The first switch transistor connects the photodiode and the cache capacitor, and in response to the first switch transistor being turned on, transfers the photogenerated charge accumulated in the photodiode to the cache capacitor for storage;

[0012] The second switch transistor connects the cache capacitor and the output control unit, and transmits the photogenerated charges stored in the cache capacitor to the output control unit in response to the second switch transistor being turned on.

[0013] Optionally, the output control unit includes: a reset transistor, a floating diffusion capacitor, a source follower transistor and a readout transistor;

[0014] The reset transistor is used to be turned on or off according to the control of the reset signal, and when the reset transistor is turned on, a reset operation is performed on the k photodiodes or the floating diffusion capacitors;

[0015] The floating diffusion capacitor is used to receive and store the photogenerated charge stored in at least one of the photosensitive units when the k photosensitive units are connected to the output control unit;

[0016] The source follower transistor is used to generate the corresponding first signal or the second signal according to the change amount of the photogenerated charge stored in the floating diffusion capacitor;

[0017] The readout transistor is used to be turned on or off according to the control of a readout control signal, and output the first signal or the second signal in response to the readout transistor being turned on.

[0018] Optionally, the reset transistor is used to be turned on or off according to the control of a reset signal, and in response to the reset transistor, the k first switch transistors and the k second switch transistors being turned on at the same time, a reset operation is performed on the k photodiodes;

[0019] In response to the reset transistor being turned on, the k first switch transistors and the k second switch transistors are turned off, and a reset operation is performed on the floating diffusion capacitor.

[0020] Optionally, the drain terminal of the reset transistor is connected to a power supply signal, the source terminal is connected to the floating diffusion capacitor and the k photosensitive units, and the gate terminal receives the reset signal;

[0021] One end of the floating diffusion capacitor is grounded, and the other end is connected to the source end of the reset transistor, the k photosensitive units, and the gate end of the source follower transistor.

[0022] Another aspect of the embodiments of the present disclosure provides a signal processing device, comprising: a pixel array consisting of n columns and m rows of sensor pixel units according to any one of the above embodiments, a row drive control module, and a column readout module;

[0023] The pixel array is used to output k×n×m first signals to the column readout module in a first readout phase according to the control of the row drive control module, and output n×m second signals to the column readout module in a second readout phase according to the control of the row drive control module; each of the sensor pixel units includes k photodiodes; k, n, and m are integers greater than 1 respectively;

[0024] The row drive control module is used to provide multiple signals to the sensor pixel units in the pixel array row by row to control the reset, exposure and signal output of the sensor pixel units;

[0025] The column readout module is used to receive the k×n×m first signals and the n×m second signals, and determine image information based on the k×n×m first signals and the n×m second signals.

[0026] Optionally, the row drive control module provides a first switch signal, a second switch signal, a reset signal and a readout control signal to the pixel array;

[0027] The first switch signal is used to control whether the first switch transistors in all the sensor pixel units included in the pixel array are turned on; the second switch signal is used to control whether the second switch transistors in the sensor pixel units are turned on row by row; the reset signal is used to control whether the reset transistors in the sensor pixel units are turned on row by row; and the readout control signal is used to control the sensor pixel units to output the first signal or the second signal row by row.

[0028] Optionally, the row drive control module controls the sensor pixel units in each row of the pixel array row by row in the first readout stage through the second switch signal to read out k×n first signals k times; wherein each row of the sensor pixel units outputs n first signals each time, and each first signal corresponds to a photosensitive unit in the sensor pixel unit;

[0029] The row drive control module controls the sensor pixel units in each row of the pixel array to read out n second signals row by row in the second readout phase through the second switch signal; wherein the second signal corresponds to k photosensitive units in the sensor pixel units.

[0030] Optionally, when the row drive control module reads out k×n first signals k times in the first readout stage, the floating diffusion capacitor in the sensor pixel unit is reset by the reset signal before reading out n first signals each time;

[0031] When the row driving control module reads out n second signals in the second readout phase, the floating diffusion capacitor in the sensor pixel unit is reset by the reset signal before reading out the second signals.

[0032] Optionally, the column readout module includes a cache unit and a signal fusion unit;

[0033] The cache unit is used to receive and store the k×n×m first signals in the first readout phase, and to receive and store the n×m second signals in the second readout phase;

[0034] The signal fusion unit is used to perform fusion processing on the k×n×m first signals and the n×m second signals stored in the cache unit to obtain the image information.

[0035] Another aspect of the embodiments of the present disclosure provides an electronic device, comprising: a processor, and a memory communicatively connected to the processor, and further comprising the sensor pixel unit described in any one of the above embodiments or the signal processing device described in any one of the above embodiments;

[0036] The memory stores computer-executable instructions;

[0037] The processor executes the computer-executable instructions stored in the memory to control the sensor pixel unit or the signal processing device.

[0038] Optionally, the electronic device is included in any one of the following: image data acquisition equipment, audio / video player, navigation equipment, entertainment equipment, communication equipment, roadside traffic facilities, equipment in motor vehicles, industrial inspection equipment, flight equipment, medical equipment, security equipment.

[0039] The sensor pixel unit, signal processing device and electronic device provided based on the above-mentioned embodiment of the present disclosure include: k parallel photosensitive units and an output control unit; each of the photosensitive units is connected to the output control unit respectively; wherein k is an integer greater than 1; in the first exposure stage, each of the k photosensitive units converts the received light signal into photogenerated charge and stores it; in the first readout stage, the output control unit reads out the photogenerated charge stored in each of the k photosensitive units one by one, outputs k first signals and performs a reset operation; in the second exposure stage, each of the k photosensitive units converts the received light signal into photogenerated charge and stores it; in the second readout stage, the output control unit reads out all the photogenerated charges stored in the k photosensitive units at one time and outputs a second signal. The embodiment of the present disclosure proposes integrating multiple parallel photosensitive units in a pixel unit, and the output control unit performs different charge readouts on the k parallel photosensitive units in different readout stages, so as to improve the dark light imaging performance while ensuring the resolution of the image.

[0040] The technical solution of the present disclosure is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] The accompanying drawings, which constitute a part of the specification, illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0042] The present disclosure may be more clearly understood from the following detailed description with reference to the accompanying drawings, in which:

[0043] Figure 1 is a schematic structural diagram of a sensor pixel unit provided by an exemplary embodiment of the present disclosure;

[0044] Figure 2 is a schematic structural diagram of a photosensitive unit in a sensor pixel unit provided by another exemplary embodiment of the present disclosure;

[0045] Figure 3 is a schematic structural diagram of an output control unit in a sensor pixel unit provided by another exemplary embodiment of the present disclosure;

[0046] Figure 4 is a structural schematic diagram of a sensor pixel unit provided by another exemplary embodiment of the present disclosure;

[0047] Figure 5 is a structural schematic diagram of a signal processing device provided by an exemplary embodiment of the present disclosure;

[0048] Figure 6 is a timing control schematic diagram of a signal processing device provided by another exemplary embodiment of the present disclosure;

[0049] Figure 7 is a schematic diagram of image processing of a signal processing device provided by an exemplary embodiment of the present disclosure;

[0050] Figure 8 The figure is a schematic diagram of the structure of an application embodiment of the electronic device disclosed in the present invention. DETAILED DESCRIPTION

[0051] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that the relative arrangement of components and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present disclosure unless otherwise specifically stated.

[0052] Those skilled in the art can understand that the terms "first" and "second" in the embodiments of the present disclosure are only used to distinguish different steps, devices or modules, etc., and neither represent any specific technical meaning nor indicate the necessary logical order between them.

[0053] It should also be understood that in the embodiments of the present disclosure, “plurality” may refer to two or more than two, and “at least one” may refer to one, two, or more than two.

[0054] It should also be understood that any component, data or structure mentioned in the embodiments of the present disclosure can generally be understood as one or more, unless explicitly limited or otherwise indicated in the context.

[0055] In addition, the term "and / or" in the present disclosure is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in the present disclosure generally indicates that the associated objects before and after are in an "or" relationship.

[0056] It should also be understood that the description of the various embodiments in the present disclosure focuses on the differences between the various embodiments, and the same or similar aspects thereof can be referenced to each other, and for the sake of brevity, they will not be described one by one.

[0057] At the same time, it should be understood that for the convenience of description, the sizes of the various parts shown in the drawings are not drawn according to the actual proportional relationship.

[0058] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the present disclosure, its application, or uses.

[0059] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered as part of the specification.

[0060] It should be noted that like reference numerals and letters refer to similar items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0061] The embodiments of the present disclosure can be applied to electronic devices such as terminal devices, computer systems, servers, etc., which can operate with many other general or special computing system environments or configurations. Examples of well-known terminal devices, computing systems, environments and / or configurations suitable for use with electronic devices such as terminal devices, computer systems, servers, etc. include, but are not limited to: personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, microprocessor-based systems, set-top boxes, programmable consumer electronics, network personal computers, small computer systems, large computer systems, and distributed cloud computing technology environments including any of the above systems, etc.

[0062] Electronic devices such as terminal devices, computer systems, servers, etc. can be described in the general context of computer system executable instructions (such as program modules) executed by computer systems. Generally, program modules can include routines, programs, object programs, components, logic, data structures, etc., which perform specific tasks or implement specific abstract data types. Computer systems / servers can be implemented in a distributed cloud computing environment, where tasks are performed by remote processing devices linked through a communication network. In a distributed cloud computing environment, program modules can be located on local or remote computing system storage media including storage devices.

[0063] In the process of realizing the present disclosure, the inventors found that conventional image sensors reflect the light intensity by recording the cumulative value of the photoelectric signal in a fixed time. In a dark scene, the sensor can collect very few light signals per unit time. Usually, the amount of light signals collected can be increased by extending the exposure time, thereby achieving clear imaging of darker scenes. On the other hand, when shooting high-speed moving objects, the longer the exposure time, the longer the displacement of the object during the exposure time, which will cause motion blur during imaging. Therefore, shortening the exposure time is an effective means to suppress the occurrence of motion blur. However, if you want to clearly image a high-speed moving object in a dark scene, it is difficult to take into account both aspects of performance by simply adjusting the exposure time. In response to the above problems, the present disclosure provides a sensor pixel unit to simultaneously solve the problems of dark light imaging and clear imaging.

[0064] Figure 1 is a schematic diagram of the structure of a sensor pixel unit provided by an exemplary embodiment of the present disclosure. Figure 1As shown, the sensor pixel unit (hereinafter referred to as pixel unit) of this embodiment includes: k parallel photosensitive units 11 and an output control unit 12; each photosensitive unit 11 is connected to the output control unit 12, wherein k is an integer greater than 1.

[0065] In the first exposure stage, each of the k photosensitive units 11 converts the received light signal into photogenerated charges and stores them.

[0066] The pixel unit provided in this embodiment mainly goes through two exposure stages during the imaging process, and the first exposure stage is recorded as the full-resolution exposure stage. In the first exposure stage, all photosensitive units receive light signals and convert them into photogenerated charges and store them in the photosensitive units. After reaching the preset exposure time, the first readout stage (signal transfer stage) is entered.

[0067] In the first readout stage, the output control unit 12 reads out the photogenerated charges stored in each of the k photosensitive units 11 one by one, outputs k first signals and performs a reset operation.

[0068] Optionally, in the readout stage after the first exposure stage, the photogenerated charges stored in each photosensitive unit are read out one by one through the output control unit. Optionally, the path between each of the k photosensitive units and the output control unit is controlled in turn by an external signal. When the path between a photosensitive unit and the output control unit is turned on, the photogenerated charges accumulated in the photosensitive unit are read out through the output control unit, and a first signal is determined based on the accumulated photogenerated charges in each photosensitive unit. K first signals are obtained by k readouts. After the accumulated photogenerated charges in all photosensitive units are read out in the first readout stage, a reset operation is performed on all photosensitive units to facilitate the subsequent second exposure.

[0069] In the second exposure stage, each of the k photosensitive units 11 converts the received light signal into photogenerated charges and stores them.

[0070] In this embodiment, the second exposure stage is the second exposure of the pixel unit in one exposure cycle, and the second exposure stage is recorded as the combined exposure stage. Since the reset operation is performed after the first readout stage, the operation performed by the k photosensitive units is the same as that in the first exposure stage, and all photosensitive units convert the received light signals into photogenerated charges and store them in the second exposure stage.

[0071] In the second readout stage, the output control unit 12 reads out all the photogenerated charges stored in the k photosensitive units 11 at one time and outputs a second signal.

[0072] Optionally, in the readout stage after the second exposure stage, in order to improve the performance of dark-light imaging, the photogenerated charges stored in all the photosensitive units are read out at one time through the output control unit. Optionally, the paths between the k photosensitive units and the output control unit are controlled to be turned on at the same time through an external signal, and all the photogenerated charges accumulated in the k photosensitive units are read out. Based on all the photogenerated charges, a second signal is determined and output, and the second signal accumulates the photogenerated charges accumulated in all the photosensitive units, that is, the signal strength of the second signal is greater than the signal strength of the first signal. Therefore, it is more conducive to dark-light imaging.

[0073] In this embodiment, in the first exposure stage, photoelectric conversion is performed simultaneously by k photosensitive units, and the accumulated photogenerated charge in each photosensitive unit is read out in turn in the first readout stage, which is equivalent to shortening the time for the pixel unit to collect k first signals to 1 / k of the original exposure time, that is, the resolution of the image is improved by shortening the exposure time, and the problem of motion blur during imaging is overcome; in this embodiment, in order to ensure the effect of suppressing motion blur, the exposure durations corresponding to the first exposure stage and the second exposure stage are controlled under the boundary condition of no motion blur, for example, the exposure duration is less than or equal to the preset boundary duration (the preset boundary duration means that when the exposure duration is the preset boundary duration, the image obtained by the exposure of the pixel unit has no motion blur). Optionally, the exposure durations corresponding to the first exposure stage and the second exposure stage are the same.

[0074] The sensor pixel unit provided by the above embodiment of the present disclosure includes: k parallel photosensitive units and an output control unit; each of the photosensitive units is connected to the output control unit respectively; wherein k is an integer greater than 1; in the first exposure stage, each of the k photosensitive units converts the received light signal into photogenerated charge and stores it; in the first readout stage, the output control unit reads out the photogenerated charge stored in each of the k photosensitive units one by one, outputs k first signals and performs a reset operation; in the second exposure stage, each of the k photosensitive units converts the received light signal into photogenerated charge and stores it; in the second readout stage, the output control unit reads out all the photogenerated charges stored in the k photosensitive units at once and outputs a second signal. The embodiment of the present disclosure proposes integrating multiple parallel photosensitive units in a pixel unit, and the output control unit performs different charge readouts on the k parallel photosensitive units in different readout stages, so as to improve the dark light imaging performance while ensuring the resolution of the image.

[0075] Figure 2 FIG. 1 is a schematic diagram of the structure of a photosensitive unit in a sensor pixel unit provided by another exemplary embodiment of the present disclosure. Figure 2As shown, the photosensitive unit 11 includes a photodiode 111 , a first switch transistor 112 , a buffer capacitor 113 and a second switch transistor 114 .

[0076] The photodiode 111 is used to receive light signals in the first exposure stage and the second exposure stage to generate photogenerated charges.

[0077] Optionally, the photodiode may be a pinned photodiode or other device that can realize photoelectric conversion; Figure 2 As shown, one end of the photodiode is grounded, and the other end is connected to the source terminal of the first switch transistor 112 .

[0078] The first switch transistor 112 connects the photodiode 111 and the cache capacitor 113 , and in response to the first switch transistor 112 being turned on, the photogenerated charges accumulated in the photodiode 111 are transferred to the cache capacitor 113 for storage.

[0079] Optionally, the source terminal of the first switch transistor 112 is connected to the photodiode, the drain terminal is connected to the cache capacitor 113, the gate terminal receives the first switch signal GS, and is turned on or off according to the control of the first switch signal GS. For example, in response to the first switch signal GS being at a high level, the first switch transistor is turned on. When the first switch transistor 112 is turned on, the photogenerated charge accumulated in the photodiode is transmitted to the cache capacitor 113 through the path formed by the first switch transistor being turned on, and the photogenerated charge accumulated in the photodiode is stored through the cache capacitor.

[0080] The second switch transistor 114 connects the cache capacitor 113 and the output control unit 12 , and transmits the photogenerated charges stored in the cache capacitor 113 to the output control unit 12 in response to the second switch transistor 114 being turned on.

[0081] Optionally, the source terminal of the second switch transistor is connected to the cache capacitor, the drain terminal is connected to the output control unit, and the gate terminal receives the second switch signal TX (different photosensitive units may correspond to different numbers, for example, TX1, TX2...TXk, etc., to achieve conduction control of different second switch transistors), and is turned on or off according to the control of the second switch signal. For example, in response to the second switch signal being at a high level, the second switch transistor is turned on. In this embodiment, when the second switch transistor is turned on, the photogenerated charge stored in the corresponding cache capacitor is transmitted to the output control unit through the path formed by the second switch transistor being turned on, so as to achieve the transfer of the photogenerated charge converted and accumulated in the photosensitive unit. Optionally, in different readout stages, the conduction control of the second switching transistor can be achieved by second switching signals with different timings to realize different charge transfer methods of different photosensitive units; for example, in the first readout stage, the second switching transistors in the k photosensitive units are given a high-level second switching signal in turn to realize the sequential reading of the accumulated photogenerated charges in the k photosensitive units; and in the second readout stage, the second switching transistors in the k photosensitive units are given a high-level second switching signal at the same time to realize the one-time reading of the accumulated photogenerated charges in all the photosensitive units.

[0082] Figure 3 FIG. 1 is a schematic diagram of the structure of an output control unit in a sensor pixel unit provided by another exemplary embodiment of the present disclosure. Figure 3 As shown, the output control unit 12 includes: a reset transistor 121 , a floating diffusion capacitor 122 , a source follower transistor 123 and a readout transistor 124 .

[0083] The reset transistor 121 is used to be turned on or off according to the control of the reset signal RST. When the reset transistor 121 is turned on, a reset operation is performed on k photodiodes or floating diffusion capacitors.

[0084] In this embodiment, only one reset transistor is provided in the output control unit, and the reset operation of k photodiodes and floating diffusion capacitors can be controlled by the reset transistor. For example, when the k second switch transistors and the k first switch transistors in the k photosensitive units are all turned on, the reset operation of the k photodiodes is performed by the reset transistor; and when the k second switch transistors in the k photosensitive units are not turned on, the reset operation of the floating diffusion capacitor is performed by the reset transistor. Figure 3 As shown, the drain terminal of the reset transistor 121 is connected to the power supply signal Vdd, the source terminal is connected to the floating diffusion capacitor and k photosensitive units, and the gate terminal receives the reset signal RST. For example, in response to the reset signal RST being a high level, the reset transistor performs a reset operation on k cache capacitors or floating diffusion capacitors.

[0085] Optionally, the reset transistor 121 is used to be turned on or off according to the control of the reset signal RST. In response to the reset transistor 121, k first switching transistors and k second switching transistors being turned on at the same time, a reset operation is performed on the k photodiodes; in response to the reset transistor being turned on, the k first switching transistors and k second switching transistors are not turned on, and a reset operation is performed on the floating diffusion capacitor.

[0086] The floating diffusion capacitor 122 is used to receive and store the photogenerated charges stored in at least one photosensitive unit when the k photosensitive units 11 are connected to the output control unit 12 .

[0087] In this embodiment, the floating diffusion capacitor is used to store the photogenerated charge transmitted from at least one photosensitive unit. Figure 3 As shown, one end of the floating diffusion capacitor is grounded, and the other end is connected to the drain end of the reset transistor, k photosensitive units and the gate end of the source follower transistor; when the second switching transistor (one or more) is turned on, the floating diffusion capacitor receives and stores the photogenerated charge stored in the cache capacitor corresponding to the turned-on second switching transistor; and when all second switching transistors are not turned on, the source follower transistor is controlled by the stored photogenerated charge to generate a corresponding signal.

[0088] The source follower transistor 123 is used to generate a corresponding first signal or a second signal according to the variation of the photogenerated charges stored in the floating diffusion capacitor 122 .

[0089] Optionally, in the first readout stage, the source follower transistor reads the accumulated photogenerated charge of a photosensitive unit each time due to the control of the second switch signal. After each floating diffusion capacitor stores the photogenerated charge of a photosensitive unit, the source follower transistor generates a corresponding first signal according to the change in the photogenerated charge in the floating diffusion capacitor (from the reset state to the state of accumulating the photogenerated charge of a photosensitive unit). After k readouts, the source follower transistor generates k first signals. In the second readout stage, the floating diffusion capacitor reads all the accumulated photogenerated charges in k photosensitive units at once, and the source follower transistor generates a corresponding second signal according to the change in the photogenerated charge in the floating diffusion capacitor. Figure 3 As shown, the drain terminal of the source follower transistor is connected to the power supply signal, the source terminal is connected to the drain terminal of the readout transistor, and the gate terminal is connected to the floating diffusion capacitor.

[0090] Optionally, the first signal and the second signal may be voltage signals, pulse signals, digital signals, etc.

[0091] The readout transistor 124 is configured to be turned on or off according to the control of the readout control signal RS, and output the first signal or the second signal in response to the readout transistor 124 being turned on.

[0092] like Figure 3 As shown, the drain terminal of the readout transistor is connected to the source terminal of the source follower transistor, the source terminal serves as the output terminal of the pixel unit, and the gate terminal receives the readout control signal RS; in response to the readout control signal RS being a high level, the readout transistor is turned on and outputs k first signals or second signals through the output terminal.

[0093] Figure 4 FIG. 1 is a schematic diagram of the structure of a sensor pixel unit provided by another exemplary embodiment of the present disclosure. Figure 4 As shown, this embodiment includes four photosensitive units 11 (the number of photosensitive units in this embodiment is only an exemplary description and is not used to limit the number of photosensitive units included in the pixel unit) and an output control unit 12.

[0094] Each photosensitive unit 11 has the same structure, including a photodiode 111 , a first switch transistor 112 , a buffer capacitor 113 and a second switch transistor 114 .

[0095] Among them, one end of the photodiode is grounded, and the other end is connected to the source end of the first switch transistor 112. The source end of the first switch transistor 112 is connected to the photodiode, the drain end is connected to the cache capacitor 113, and the gate end receives the first switch signal GS. One end of the cache capacitor is grounded, and the other end is connected to the drain end of the first switch transistor and the source end of the second switch transistor. The source end of the second switch transistor is connected to the cache capacitor, the drain end is connected to the output control unit, and the gate end receives the second switch signal TX. In this embodiment, the four second switch transistors correspond to the four second switch signals TX1, TX2, TX3 and TX4 respectively.

[0096] The output control unit 12 includes a reset transistor 121 , a floating diffusion capacitor 122 , a source follower transistor 123 , and a readout transistor 124 .

[0097] In this embodiment, the drain terminal of the reset transistor 121 is connected to the power signal Vdd, the source terminal is connected to the floating diffusion capacitor and k photosensitive units, and the gate terminal receives the reset signal RST. One end of the floating diffusion capacitor is grounded, and the other end is connected to the drain terminal of the reset transistor, k photosensitive units, and the gate terminal of the source follower transistor. The drain terminal of the source follower transistor is connected to the power signal, the source terminal is connected to the drain terminal of the readout transistor, and the gate terminal is connected to the floating diffusion capacitor. The drain terminal of the readout transistor is connected to the source terminal of the source follower transistor, the source terminal serves as the output terminal of the pixel unit, and the gate terminal receives the readout control signal RS.

[0098] When the pixel unit provided in this embodiment is prepared in a chip, the output control unit can be prepared in the middle position, and the four photosensitive units are arranged around the output control unit. This structural distribution can compress the space occupied by the pixel unit in the chip and facilitate the integration of the sensor circuit structure.

[0099] Figure 5 As shown in Figure 5, the signal processing device provided by this embodiment includes: a pixel array 51 composed of n columns and m rows of sensor pixel units provided by any of the above embodiments, a row drive control module 52 and a column readout module 53.

[0100] The pixel array 51 is used to output k×n×m first signals to the column readout module 53 in the first readout phase according to the control of the row drive control module 52, and output n×m second signals to the column readout module 53 in the second readout phase according to the control of the row drive control module 52; each sensor pixel unit includes k photodiodes, wherein k, n, and m are integers greater than 1 respectively.

[0101] The row drive control module 52 is used to provide a variety of signals to the sensor pixel units in the pixel array 51 row by row to control the reset, exposure and signal output of the sensor pixel units.

[0102] Optionally, the row drive control module 52 provides a first switch signal GS, a second switch signal TX, a reset signal RST and a readout control signal RS to the pixel array 51. The second switch signal TX, the reset signal RST and the readout control signal RS control the sensor pixel units in the pixel array row by row, and the first switch signal GS corresponds to the entire pixel array.

[0103] The first switch signal GS is used to control whether the first switch transistors in all the sensor pixel units included in the pixel array are turned on. The second switch signal TX is used to control whether the second switch transistors in the sensor pixel units are turned on row by row; the reset signal RST is used to control whether the reset transistors in the sensor pixel units are turned on row by row; and the readout control signal RS is used to control the sensor pixel units to output the first signal or the second signal row by row.

[0104] The column readout module 53 is used to receive k×n×m first signals and n×m second signals, and determine image information based on the k×n×m first signals and the n×m second signals.

[0105] In this embodiment, the exposure phase and the readout phase of the pixel array are controlled by the row drive control module, so that each row in the pixel array is executed in sequence according to the first exposure phase, the first readout phase, the second exposure phase and the second readout phase. Each row of pixel units outputs k×m first signals in the first readout phase and m second signals in the second readout phase. After n rows are read out, the entire pixel array outputs k×n×m first signals and n×m second signals. The column readout module determines the image information based on the k×n×m first signals and n×m second signals. The image information integrates the signals output in the first readout phase and the second readout phase, and ensures the dark light imaging performance while suppressing motion blur. Optionally, the main function of the column readout module is to convert the first signal and the second signal into digital signals and output them to the chip interface, for example, output them to the chip interface through a parallel-to-serial conversion circuit.

[0106] In some optional embodiments, in the signal processing device, a low dropout regulator (LDO) and a charge pump can also be deployed around the row drive control module. The main function of the low dropout regulator is to provide a stable and low-noise power supply signal for analog circuit modules such as the photosensitive unit array. The main function of the charge pump is to provide a voltage signal higher than the power supply voltage and a negative voltage signal lower than the ground. The high voltage signal is mainly used to improve the transfer efficiency of the photogenerated charge in the photosensitive unit, and the negative voltage signal is mainly used to suppress the leakage current in the photosensitive unit. A reference voltage and bias voltage generation module and a ramp voltage generation module are deployed around the column readout module. The reference voltage generation module mainly uses the principle of the bandgap reference to generate a number of voltage signals and current signals that are approximately independent of temperature, which are used by the bias voltage generation module and the ramp voltage generation module. The bias voltage generation module mainly uses the reference current signal to generate a column readout bias voltage for use by the column readout module to ensure that the column readout signal is obtained under a fixed current bias. The ramp voltage generation module is mainly used to generate a signal voltage that increases linearly with a fixed slope over time within a fixed period. The signal voltage is required to realize single-slope ADC analog-to-digital conversion.

[0107] In some optional embodiments, the row driving control module 52 controls each row of sensor pixel units in the pixel array 51 row by row in the first readout stage through the second switch signal TX to read out k×n first signals k times.

[0108] Each row of sensor pixel units outputs n first signals each time, and each first signal corresponds to a photosensitive unit in a sensor pixel unit.

[0109] In this embodiment, the second switch signal TX turns on the second switch transistor, so that the buffer capacitor corresponding to the second switch transistor is connected to the floating diffusion capacitor, thereby transferring the photogenerated charges in the corresponding at least one buffer capacitor to the floating diffusion capacitor.

[0110] Optionally, when the row drive control module 52 reads out k×n first signals k times in the first readout phase, the floating diffusion capacitor in the sensor pixel unit is reset by the reset signal RST before reading out n first signals each time.

[0111] By resetting the floating diffusion capacitor, the charges stored in the floating diffusion capacitor are cleared, so that the floating diffusion capacitor can generate a more accurate first signal when receiving the photogenerated charges transmitted by the next photosensitive unit.

[0112] The row driving control module 52 controls each row of sensor pixel units in the pixel array 51 row by row to read out n second signals in the second readout phase through the second switch signal TX.

[0113] The second signal corresponds to k photosensitive units in the sensor pixel unit.

[0114] Optionally, when the row drive control module 52 reads out n second signals in the second readout phase, the floating diffusion capacitor in the sensor pixel unit is reset by a reset signal before reading out the second signals.

[0115] By resetting the floating diffusion capacitor before reading out the second signal, the floating diffusion capacitor is cleared before receiving the photoelectric charges generated by the corresponding k photosensitive units, thereby improving the accuracy of the obtained second signal.

[0116] In this embodiment, the floating diffusion capacitor is reset by the row drive control module in the first readout stage and the second readout stage, so that the photogenerated charge accumulated and stored in the floating diffusion capacitor is only read once, thereby improving the accuracy of the obtained signal.

[0117] Figure 6 FIG. 1 is a timing control schematic diagram of a signal processing device provided by another exemplary embodiment of the present disclosure. Figure 6 As shown, a timing diagram of the main signals corresponding to each stage of an exposure cycle of the signal processing device in this embodiment is shown (in this embodiment, k is taken as 4 as an example, that is, the sensor pixel unit in this embodiment includes 4 photosensitive units, and the corresponding 4 photodiodes can be represented as: PD1, PD2, PD3 and PD4; the corresponding second switch signals are: TX1, TX2, TX3 and TX4 respectively). The signal processing device mainly includes six stages when working:

[0118] First, enter the first reset stage: in the first reset stage, all reset signals RST are high, the second switch signal TX is high, and the first switch signal GS is also high. At this time, all reset transistors, first switch transistors and second switch transistors are all turned on, and all photodiodes (PD) in all pixel units are connected to the power signal Vdd, thereby achieving simultaneous reset of all PDs.

[0119] First exposure stage: After the reset is completed, all reset signals RST, all second switch signals TX and first switch signals GS are set to low level at the same time. At this time, all PDs start to expose at the same time. The first exposure stage is recorded as the full resolution exposure stage. In the first exposure stage, the photodiode in each photosensitive unit receives the light signal and converts it into photogenerated charge and accumulates it. After reaching the preset exposure time, it enters the first signal transfer stage.

[0120] The first signal transfer stage: the first switch signal GS is set to a high level, the first switch transistors are all turned on, and the photogenerated charges collected by each photodiode in the full-resolution exposure stage are transferred to the corresponding cache capacitor for storage. After the signal transfer stage is completed, the first readout stage (row-by-row and PD-by-PD reading stage) is entered.

[0121] The first readout stage: first read the first signal of the first row, set the readout control signal RS[1] of the first row ([1] represents the first row in the corresponding pixel array, [2] represents the second row in the corresponding pixel array, and so on, other signals are the same) to a high level, and then set the reset signal RST[1] of the first row to a high level to reset the floating diffusion capacitor in the first row of pixel units. At this time, the reset voltage on the floating diffusion capacitor can be read at the output end, and then the reset signal RST[1] is set to a low level, and the second switch signal TX1[1] is set to a high level, and the photogenerated charge collected by PD1 in the first row of pixel units is transferred from its corresponding cache capacitor to the floating diffusion capacitor. At this time, the signal voltage of PD1 can be read at the output end, and the first signal obtained by the first photosensitive unit is obtained. In the column readout module, the voltage difference between the reset voltage and the signal voltage (first signal) of each column of pixel units is converted into a digital signal. In the figure, ADC[1] represents the digital signal result of the first column output, and r1c1pd1 represents the digital signal corresponding to the converted output of the first PD in the first row and the first column. After the signal output of the first row PD1 is completed, the above process is repeated to output the reset voltage on the floating diffusion capacitor and the signal voltage of the first row PD2, the reset voltage on the floating diffusion capacitor and the signal voltage of the first row PD3, and the reset voltage on the floating diffusion capacitor and the signal voltage of the first row PD4 in turn; r1c1pd1, r2c2pd2, r3c3pd3, and r4c4pd4 represent the digital signals converted and outputted corresponding to the first pixel unit of the first row and the first column. After the four PDs are read, the reading of the next row of pixel units is entered, and the signal voltages on the four PDs are also read in turn. In this way, the reading is performed row by row, and when all n rows of signals are read, a total of 4×n×m first signals are output, that is, a frame of full-resolution first image original signal with a resolution of 4×n×m. After the first frame is read, the second reset stage is entered.

[0122] Second reset stage: The logic of the control signal is the same as that of the first reset stage, and all PDs are reset at the same time. After the reset is completed, the second exposure stage (merged exposure stage) is entered.

[0123] Second exposure stage: The control signal logic is the same as the first exposure stage. In the exposure stage, all PDs collect photogenerated charges. After reaching the preset exposure time, the second signal transfer stage begins.

[0124] Second signal transfer stage: The first switch signal GS is set to a high level, all global exposure control transistors are turned on, and the photogenerated charges collected by each PD in the full-resolution exposure stage are transferred to the corresponding cache capacitor for storage. After the signal transfer stage is completed, the second reading stage begins.

[0125] The second reading stage: first read the second signal of the first row, set the readout control signal RS[1] of the first row pixel unit to a high level, then set the reset signal RST[1] of the first row to a high level to reset the floating diffusion capacitor in the first row pixel unit. At this time, the reset voltage on the floating diffusion capacitor can be read at the output end, then the reset signal RST[1] is set to a low level, and the four second switch signals TX1[1], TX2[1], TX3[1] and TX4[1] corresponding to the pixel unit are simultaneously set to a high level, and the photogenerated charges collected by the four PDs in each pixel unit of the first row are simultaneously transferred to the floating diffusion capacitor in each pixel unit. At this time, the signal voltage after the four PDs in each pixel unit are added is read at the output end. In the column readout module, the voltage difference between the reset voltage and the signal voltage (second signal) of each column is converted into a digital signal, and r1c1bin represents the digital signal corresponding to the converted output signal of the four PDs of the first row and first column pixel combined and accumulated. In this way, the sensor reads line by line, and when all n lines of signals are read, a total of n×m second signals are output, that is, a second image original signal with a frame resolution of n×m. Compared with the first image original signal with full resolution, the signal obtained by this exposure is stronger and more conducive to low-light imaging. After the two exposure signals are read out, the sensor completes a complete exposure cycle. By working in this exposure cycle, continuous imaging can be achieved.

[0126] In some optional embodiments, the column readout module 53 includes a cache unit and a signal fusion unit;

[0127] The cache unit is used to receive and store k×n×m first signals in a first readout phase, and to receive and store n×m second signals in a second readout phase.

[0128] The signal fusion unit is used to perform fusion processing on the k×n×m first signals and the n×m second signals stored in the cache unit to obtain image information.

[0129] In this embodiment, after obtaining two frames of image signals (including obtaining signals after executing two readout stages for the pixel array, for example, the above Figure 6 After the first image original signal and the second image original signal provided by the illustrated embodiment are generated, further image processing is required to fuse the two frames of images into a complete full-resolution image without motion blur and taking into account low-light performance. Figure 7 FIG. 1 is a schematic diagram of image processing of a signal processing device provided by an exemplary embodiment of the present disclosure. Figure 7As shown in the figure, there is a circular target moving from left to right in the shooting scene. During the shooting process, based on the first exposure stage and the first readout stage, a full-resolution image (determined based on k×n×m first signals) is obtained. The texture of most areas in the image is clearly visible. However, due to the weak light of the circular target, the texture details inside the target cannot be clearly imaged and can only be presented as a black area. In the subsequent second exposure stage and the second readout stage, if the exposure time of the two exposure stages (the first exposure stage and the second exposure stage) is the same, it is equivalent to increasing the pixel area by k times (reading the photogenerated charges converted by k photosensitive units at a time), and the signal strength will also be correspondingly increased by k times, and the acquisition performance of weak light signals is improved. At this time, the combined exposure image obtained is as follows: Figure 7 As shown, it can be seen that the internal details of the circular target are clearly visible, but the brightness of most of the rest of the background is too high and the background details are not obvious. The goal of the embodiment of the present disclosure is to achieve clear imaging of both the background and the target. Therefore, the circular target in the merged exposure image is merged into the full-resolution image. In the process of image processing, the object to be fused can be located by detecting the brightness of the contour and the signal. For example, clear contours rarely appear in the background, while the appearance of the target will bring a very clear contour. Then, it is detected whether the signal inside the target contour in the full-resolution image is clear. If the signal value detected inside the target contour is very low, that is, it is black in the image, then the internal signal of the target in the merged exposure image is subjected to a certain interpolation stretching process (interpolation refers to the use of a function to calculate the value between 2 or more values. For example, the arithmetic mean (x+y) / 2 is the linear interpolation of x and y. Interpolation is a common technical means for performing image magnification operations. Optionally, linear interpolation, etc., can be used) to expand the target size and replace the target information in the full-resolution image. Finally, the following can be obtained. Figure 7 The fused image in which the scene and target shown are clearly imaged.

[0130] The disclosed embodiment uses an image fusion algorithm to fuse the twice-exposed images into a full-resolution image, thereby suppressing motion blur while ensuring low-light imaging performance.

[0131] In addition, an embodiment of the present disclosure further provides an electronic device, including:

[0132] A processor, and a memory communicatively connected to the processor, further comprising the sensor pixel unit described in any one of the above embodiments or the signal processing device described in the above embodiments;

[0133] The memory stores computer-executable instructions;

[0134] The processor executes the computer-executable instructions stored in the memory to control the sensor pixel unit or the signal processing device.

[0135] The electronic device provided by the present disclosure can be included in any of the following: image data acquisition equipment, audio / video player, navigation equipment, entertainment equipment, communication equipment, roadside traffic facilities, equipment in motor vehicles, industrial inspection equipment, flight equipment, medical equipment, security equipment, etc.

[0136] The electronic device provided by the present disclosure can be applied to any of the following: image data acquisition equipment, audio / video players, navigation equipment, entertainment equipment, communication equipment, roadside traffic facilities, equipment in motor vehicles, industrial inspection equipment, flight equipment, medical equipment, security equipment, etc.

[0137] Figure 8 This is a schematic diagram of the structure of an application embodiment of the electronic device disclosed in the present invention. Figure 8 The electronic device according to the embodiment of the present disclosure is described. The electronic device may be any one or both of the first device and the second device, or a stand-alone device independent of them, and the stand-alone device may communicate with the first device and the second device to receive the collected input signals from them.

[0138] like Figure 8 As shown, the electronic device includes one or more processors and memory.

[0139] The processor may be a central processing unit (CPU) or other forms of processing units having data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device to perform desired functions.

[0140] The memory may store one or more computer program products, and the memory may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, a random access memory (RAM) and / or a cache memory (cache), etc. The non-volatile memory may include, for example, a read-only memory (ROM), a hard disk, a flash memory, etc. One or more computer program products may be stored on the computer-readable storage medium, and the processor may run the computer program product to implement the sensor pixel unit or signal processing device of each embodiment of the present disclosure described above and / or other desired functions.

[0141] In one example, the electronic device may further include: an input device and an output device, and these components are interconnected via a bus system and / or other forms of connection mechanisms (not shown).

[0142] In addition, the input device may also include, for example, a keyboard, a mouse, and the like.

[0143] The output device can output various information to the outside, including the determined distance information, direction information, etc. The output device can include, for example, a display, a speaker, a printer, a communication network and a remote output device connected thereto, and the like.

[0144] Of course, to simplify, Figure 8 Only some of the components related to the present disclosure in the electronic device are shown, and components such as a bus, an input / output interface, etc. are omitted. In addition, according to specific application situations, the electronic device may further include any other appropriate components.

[0145] In addition to the above-mentioned methods and devices, an embodiment of the present disclosure may also be a computer program product, which includes computer program instructions, which, when executed by a processor, enable the processor to execute the sensor pixel unit or signal processing device according to various embodiments of the present disclosure described in the above part of this specification.

[0146] The computer program product may be written in any combination of one or more programming languages ​​to write program code for performing the operations of the disclosed embodiments, including object-oriented programming languages ​​such as Java, C++, etc., and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as a separate software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0147] In addition, an embodiment of the present disclosure may also be a computer-readable storage medium having computer program instructions stored thereon, which, when executed by a processor, enables the processor to execute the sensor pixel unit or signal processing device according to various embodiments of the present disclosure described in the above part of this specification.

[0148] The computer readable storage medium can adopt any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. The readable storage medium can include, for example, but is not limited to, a system, device or device of electricity, magnetism, light, electromagnetic, infrared, or semiconductor, or any combination of the above. More specific examples (non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0149] The basic principles of the present disclosure are described above in conjunction with specific embodiments. However, it should be noted that the advantages, strengths, effects, etc. mentioned in the present disclosure are only examples and not limitations, and it cannot be considered that these advantages, strengths, effects, etc. are required by each embodiment of the present disclosure. In addition, the specific details disclosed above are only for the purpose of illustration and ease of understanding, and are not limitations. The above details do not limit the present disclosure to the necessity of adopting the above specific details to be implemented.

[0150] Each embodiment in this specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the system embodiment, since it basically corresponds to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0151] The block diagrams of the devices, apparatuses, equipment, and systems involved in this disclosure are only illustrative examples and are not intended to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagrams. As will be appreciated by those skilled in the art, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any manner. Words such as "including," "comprising," "having," and the like are open words, referring to "including but not limited to," and can be used interchangeably therewith. The words "or" and "and" used herein refer to the words "and / or," and can be used interchangeably therewith, unless the context clearly indicates otherwise. The word "such as" used herein refers to the phrase "such as but not limited to," and can be used interchangeably therewith.

[0152] The method and apparatus of the present disclosure may be implemented in many ways. For example, the method and apparatus of the present disclosure may be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above order of steps for the method is for illustration only, and the steps of the method of the present disclosure are not limited to the order specifically described above, unless otherwise specifically stated. In addition, in some embodiments, the present disclosure may also be implemented as a program recorded in a recording medium, which includes machine-readable instructions for implementing the method according to the present disclosure. Therefore, the present disclosure also covers a recording medium storing a program for executing the method according to the present disclosure.

[0153] It should also be noted that in the apparatus, device and method of the present disclosure, each component or each step can be decomposed and / or recombined. Such decomposition and / or recombination should be regarded as equivalent solutions of the present disclosure.

[0154] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present disclosure. Therefore, the present disclosure is not intended to be limited to the aspects shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

[0155] The above description has been given for the purpose of illustration and description. In addition, this description is not intended to limit the embodiments of the present disclosure to the forms disclosed herein. Although multiple example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions and sub-combinations thereof.

Claims

1. A sensor pixel unit, characterized in that: include: k parallel-connected photosensitive units and an output control unit; each of the photosensitive units is connected to the output control unit respectively; wherein k is an integer greater than 1; In the first exposure stage, each of the k photosensitive units converts the received light signal into photogenerated charge and stores it; In the first readout stage, the output control unit reads out the photogenerated charges stored in each of the k photosensitive units one by one, outputs k first signals and performs a reset operation; In the second exposure stage, each of the k photosensitive units converts the received light signal into photogenerated charge and stores it; In the second readout stage, the output control unit reads out all the photogenerated charges stored in the k photosensitive units at one time and outputs a second signal.

2. The circuit according to claim 1, characterized in that The light sensing unit includes a photodiode, a first switch transistor, a cache capacitor, and a second switch transistor; The photodiode is used to receive light signals in the first exposure stage and the second exposure stage to generate photogenerated charges; The first switch transistor connects the photodiode and the cache capacitor, and in response to the first switch transistor being turned on, transfers the photogenerated charge accumulated in the photodiode to the cache capacitor for storage; The second switch transistor connects the cache capacitor and the output control unit, and transmits the photogenerated charges stored in the cache capacitor to the output control unit in response to the second switch transistor being turned on.

3. The circuit according to claim 1 or 2, characterized in that The output control unit includes: a reset transistor, a floating diffusion capacitor, a source follower transistor and a readout transistor; The reset transistor is used to be turned on or off according to the control of the reset signal, and when the reset transistor is turned on, a reset operation is performed on the k photodiodes or the floating diffusion capacitors; The floating diffusion capacitor is used to receive and store the photogenerated charge stored in at least one of the photosensitive units when the k photosensitive units are connected to the output control unit; The source follower transistor is used to generate the corresponding first signal or the second signal according to the change amount of the photogenerated charge stored in the floating diffusion capacitor; The readout transistor is used to be turned on or off according to the control of a readout control signal, and output the first signal or the second signal in response to the readout transistor being turned on.

4. The circuit according to claim 3, characterized in that The reset transistor is used to be turned on or off according to the control of the reset signal, and in response to the reset transistor, the k first switch transistors and the k second switch transistors being turned on at the same time, a reset operation is performed on the k photodiodes; In response to the reset transistor being turned on, the k first switch transistors and the k second switch transistors are turned off, and a reset operation is performed on the floating diffusion capacitor.

5. The circuit according to claim 3 or 4, characterized in that: The drain terminal of the reset transistor is connected to the power supply signal, the source terminal is connected to the floating diffusion capacitor and the k photosensitive units, and the gate terminal receives the reset signal; One end of the floating diffusion capacitor is grounded, and the other end is connected to the source end of the reset transistor, the k photosensitive units, and the gate end of the source follower transistor.

6. A signal processing device, characterized in that: include: A pixel array consisting of n columns and m rows of sensor pixel units according to any one of claims 1 to 5, a row drive control module and a column readout module; The pixel array is used to output k×n×m first signals to the column readout module in a first readout phase according to the control of the row drive control module, and output n×m second signals to the column readout module in a second readout phase according to the control of the row drive control module; each of the sensor pixel units includes k photodiodes; k, n, and m are integers greater than 1 respectively; The row drive control module is used to provide multiple signals to the sensor pixel units in the pixel array row by row to control the reset, exposure and signal output of the sensor pixel units; The column readout module is used to receive the k×n×m first signals and the n×m second signals, and determine image information based on the k×n×m first signals and the n×m second signals.

7. The device according to claim 6, characterized in that The row drive control module provides a first switch signal, a second switch signal, a reset signal and a readout control signal to the pixel array; The first switch signal is used to control whether the first switch transistors in all the sensor pixel units included in the pixel array are turned on; the second switch signal is used to control whether the second switch transistors in the sensor pixel units are turned on row by row; the reset signal is used to control whether the reset transistors in the sensor pixel units are turned on row by row; and the readout control signal is used to control the sensor pixel units to output the first signal or the second signal row by row.

8. The device according to claim 7, characterized in that The row driving control module controls the sensor pixel units in each row of the pixel array row by row in the first readout stage through the second switch signal to read out k×n first signals k times; wherein each row of the sensor pixel units outputs n first signals each time, and each first signal corresponds to a photosensitive unit in the sensor pixel unit; The row drive control module controls the sensor pixel units in each row of the pixel array to read out n second signals row by row in the second readout phase through the second switch signal; wherein the second signal corresponds to k photosensitive units in the sensor pixel units.

9. The device according to claim 8, characterized in that When the row drive control module reads out k×n first signals k times in the first readout stage, the floating diffusion capacitor in the sensor pixel unit is reset by the reset signal before reading out n first signals each time; When the row driving control module reads out n second signals in the second readout phase, the floating diffusion capacitor in the sensor pixel unit is reset by the reset signal before reading out the second signals.

10. The device according to any one of claims 6 to 9, characterized in that: The column readout module includes a cache unit and a signal fusion unit; The cache unit is used to receive and store the k×n×m first signals in the first readout phase, and receive and store the n×m second signals in the second readout phase; The signal fusion unit is used to perform fusion processing on the k×n×m first signals and the n×m second signals stored in the cache unit to obtain the image information.

11. An electronic device, characterized in that: The method comprises: a processor, and a memory connected to the processor in communication, and further comprises the sensor pixel unit according to any one of claims 1 to 5 or the signal processing device according to claims 6 to 10; The memory stores computer-executable instructions; The processor executes the computer-executable instructions stored in the memory to control the sensor pixel unit or the signal processing device.

12. The device according to claim 11, characterized in that The electronic device is included in any of the following: image data acquisition equipment, audio / video player, navigation equipment, entertainment equipment, communication equipment, roadside traffic facilities, equipment in motor vehicles, industrial testing equipment, flight equipment, medical equipment, and security equipment.

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