Source region doping modulation IGBT (Insulated Gate Bipolar Translator) structure and preparation method

Abstract

The invention provides a source region doping modulation IGBT (Insulated Gate Bipolar Translator) structure and a preparation method thereof. A source region doping modulation IGBT structure comprises a collector electrode metal electrode, a collector electrode, a buffer layer, a first drift region, a modulation layer and a second drift region which are stacked in sequence. The charge storage layer is connected with the modulation layer through a plurality of modulation columns; the body region, the emitter, the first dielectric layer, the emitter metal electrode and the passivation layer are sequentially stacked on the charge storage layer; wherein a plurality of polysilicon gate electrodes are arranged at the bottom of the dielectric layer, the polysilicon gate electrodes penetrate through the emitter, the body region and the charge storage layer and then extend into the modulation column one by one, and a second dielectric layer wraps the outside of each polysilicon gate electrode; and the emitter metal electrode is embedded into the emitter and the second drift region and is in contact with the body region. According to the IGBT structure provided by the invention, the Miller capacitance and the capacitance inflection point of the IGBT can be reduced on the basis of keeping the conduction voltage drop unchanged, and the dynamic performance of a device is greatly improved.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuits, and in particular to a source region doping modulation IGBT structure and a preparation method thereof. Background Art

[0002] As the core device of power electronics technology, semiconductor power devices are an important bridge between weak current control and strong current operation, turning "rough electricity" into "fine electricity" and providing various forms of directly usable electric energy for economic development and social operation. In the process of green and intelligent development of power electronics technology, insulated gate bipolar transistors (IGBTs) are widely used due to their high power and low loss characteristics. IGBT is a composite fully controlled voltage-driven power semiconductor device developed based on metal oxide field effect transistors (MOSFETs) and bipolar junction transistors (BJTs), which has the advantages of high input impedance of MOSFETs and low conduction voltage drop of BJTs. Due to the existence of conductivity modulation effect, its saturation voltage drop is low in the on state, the carrier density is high, and it has high output power; at the same time, it has the advantages of voltage control devices, small driving power, and fast switching speed, which is particularly suitable for applications in AC motors, inverters, switching power supplies, lighting circuits, traction drives and other fields.

[0003] The charge storage layer in IGBT is an effective way to enhance the injection effect and reduce conduction loss. However, the introduction of the charge storage layer will lead to higher Miller capacitance and capacitance inflection point, thereby aggravating gate oscillation and EMI problems and affecting the reliability of IGBT device switching operation. Summary of the invention

[0004] Based on this, it is necessary to provide a source region doping modulation IGBT structure and a preparation method to address the above technical problems.

[0005] In a first aspect, the present application provides a source region doping modulation IGBT structure, comprising: A collector metal electrode, a collector, a buffer layer, a first drift region, a modulation layer and a second drift region stacked in sequence; a charge storage layer connected to the modulation layer through a plurality of modulation columns; A body region, an emitter, a first dielectric layer, an emitter metal electrode and a passivation layer are sequentially stacked on the charge storage layer; A plurality of polysilicon gate electrodes are provided at the bottom of the dielectric layer, and each of the polysilicon gate electrodes extends into the modulation column one by one after passing through the emitter, the body region and the charge storage layer, and each of the polysilicon gate electrodes is coated with a second dielectric layer; The emitter metal electrode is embedded in the emitter and the second drift region and is in contact with the body region.

[0006] In one embodiment, the modulation column is a boron difluoride column, and the boron difluoride column and the modulation layer form a capacitance modulation structure.

[0007] In one embodiment, the collector is a P-type doped region formed by high-energy boron implantation.

[0008] In one of the embodiments, the buffer layer is an N-type region formed by high-energy phosphorus implantation or high-energy hydrogen implantation and annealing, and the annealing junction depth is 2 to 30 microns.

[0009] In one of the embodiments, the first drift region is made of N-type doped Si material, and the resistivity of the first drift region is 20-130Ω·cm.

[0010] In one embodiment, the charge storage layer and the emitter are N-type regions formed by phosphorus implantation annealing.

[0011] In one embodiment, the body region is a P-type region formed by boron implantation annealing.

[0012] In one embodiment, at least one of the second drift region, the first dielectric layer, and the second dielectric layer is made of silicon oxide material doped with phosphorus and boron.

[0013] Second invention, the present application provides a method for preparing the source region doping modulation IGBT structure, comprising the following steps: Providing a first drift region, forming a modulation layer on the first drift region, forming a second drift region on the modulation layer, forming a charge storage layer on the second drift region, forming a body region on the charge storage layer, and forming an emitter on the body region; Forming a first trench penetrating the emitter, the body region, the charge storage layer and the second drift region, and forming a modulation column at the bottom of the first trench; forming a second dielectric layer on the inner sidewall of the first trench, and filling a polysilicon gate electrode in the second dielectric layer; forming a first dielectric layer on the body region, forming a second trench penetrating the first dielectric layer and the emitter and extending into the body region, forming an emitter metal electrode in the second trench and above the first dielectric layer, and forming a passivation layer on the emitter metal electrode; A buffer layer, a collector and a collector metal electrode are sequentially formed at the bottom of the first drift region.

[0014] In one embodiment, the modulation column is a boron difluoride column.

[0015] The above-mentioned source region doped modulation IGBT structure includes a collector metal electrode, a collector, a buffer layer, a first drift region, a modulation layer and a second drift region stacked in sequence, a charge storage layer connected to the modulation layer through a plurality of modulation columns; a body region, an emitter, a first dielectric layer, an emitter metal electrode and a passivation layer stacked in sequence on the charge storage layer; wherein, a plurality of polysilicon gate electrodes are provided at the bottom of the dielectric layer, and each polysilicon gate electrode extends into the modulation column one by one after passing through the emitter, the body region and the charge storage layer, and each polysilicon gate electrode is coated with a second dielectric layer on the outside. By introducing a modulation column and a modulation layer structure in the first drift region, the charge distribution in the source region is optimized horizontally and vertically, and the N-type carriers introduced by the charge storage layer are compensated, thereby reducing the Miller capacitance and the capacitance inflection point of the device, and obtaining better dynamic performance. Therefore, the present invention can reduce the Miller capacitance and the capacitance inflection point of the IGBT on the basis of keeping the on-state voltage drop unchanged, and greatly improve the dynamic performance of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0017] Figure 1 A flow chart of a method for preparing a source region doping modulation IGBT structure provided in one embodiment; Figure 2 is a schematic diagram of forming a modulation layer on the first drift region in one embodiment; Figure 3 is a schematic diagram of forming a second drift region on a modulation layer in one embodiment; Figure 4 is a schematic diagram of forming a charge storage layer on the second drift region in one embodiment; Figure 5 is a schematic diagram of forming a body region on a charge storage layer in one embodiment; Figure 6 is a schematic diagram of forming an emitter on a body region in one embodiment; Figure 7 A schematic diagram of forming a modulation column and a polysilicon gate electrode in one embodiment; Figure 8 is a schematic diagram of forming a first dielectric layer on a body region in one embodiment; Fig. 9 is a schematic diagram of forming an emitter metal electrode in one embodiment; Fig.10FIG. 1 is a schematic diagram of forming a buffer layer, a collector and a collector metal electrode at the bottom of the first drift region in one embodiment.

[0018] Description of reference numerals: 11. First drift region; 12. Modulation layer; 13. Second drift region; 14. Charge storage layer; 15. Body region; 16. Emitter; 17. Modulation column; 18. Polysilicon gate electrode; 19. Second dielectric layer; 20. First dielectric layer; 21. Emitter metal electrode; 22. Passivation layer; 23. Buffer layer; 24. Collector; 25. Collector metal electrode. DETAILED DESCRIPTION

[0019] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0021] See also Fig.10 , Fig.10 Schematic diagrams of source region doping modulation IGBT structures in some embodiments are shown. In some embodiments, a source region doping modulation IGBT structure includes: a collector metal electrode 25, a collector 24, a buffer layer 23, a first drift region 11, a modulation layer 12, and a second drift region 13 stacked in sequence; a charge storage layer 14 connected to the modulation layer 12 through a plurality of modulation columns 17; a body region 15, an emitter 16, a first dielectric layer 20, an emitter metal electrode 21, and a passivation layer 22 stacked in sequence on the charge storage layer 14; wherein a plurality of polysilicon gate electrodes 18 are provided at the bottom of the dielectric layer, each polysilicon gate electrode 18 passes through the emitter 16, the body region 15, and the charge storage layer 14, and then extends into the modulation column 17 one by one, and each polysilicon gate electrode 18 is coated with a second dielectric layer 19 on the outside; and an emitter metal electrode 21 is embedded in the emitter 16 and the second drift region 13, and contacts the body region 15.

[0022] From the bottom to the top of the IGBT (insulated gate bipolar transistor) structure, the collector metal electrode 25, the collector 24, the buffer layer 23, the first drift region 11, the modulation layer 12, and the second drift region 13 are stacked in sequence. The body region 15 is located on the charge storage layer 14, and the body region 15, the emitter 16, the first dielectric layer 20, the emitter metal electrode 21 and the passivation layer 22 are stacked in sequence from the bottom to the top.

[0023] The collector metal electrode 25 is located at the bottom. Its main function is to collect and conduct the current from the collector 24 and provide electrical connection for the device. It is made of highly conductive metal materials to ensure efficient transmission of current. The collector 24 layer is the area that carries the main current in the IGBT and is composed of highly doped semiconductor materials. It can be understood that the role of the collector 24 layer is to provide a low resistance path to support the flow of a large amount of current, such as an N-type semiconductor, as a carrier channel for electrons.

[0024] The buffer layer 23 is used to reduce the electric field strength between the collector 24 and the first drift region 11, reduce the parasitic capacitance effect under high voltage and improve the breakdown voltage of the device. The first drift region 11 plays a vital role in the entire IGBT structure and is the current conduction region of the IGBT, where carriers drift under the action of an external electric field to complete the conduction of current. Optionally, the first drift region 11 is composed of an N-type semiconductor material to provide a longer drift path, thereby reducing the recombination phenomenon of carriers and improving the current carrying capacity.

[0025] The function of the modulation layer 12 is to improve the switching performance of the IGBT by adjusting the distribution of the electric field. The modulation layer 12 is usually located above the first drift region 11, and can effectively control the gate signal and the behavior of the carriers in the first drift region 11, and adjust the carrier concentration and the electric field distribution. The second drift region 13 is located on the modulation layer 12, and can be silicon oxide or other dielectric materials to avoid direct electrical interference. The modulation column 17 is located below the charge storage layer 14, and is partially located in the charge storage layer 14. The modulation layer 12 is located below each modulation column 17 and connects each modulation column 17. Through the capacitive modulation layer 12 composed of the modulation column 17 and the modulation layer 12, the global N-type charge storage layer 14 is compensated, and the charge distribution of the source region is coordinated to be modulated laterally and longitudinally, thereby optimizing the dynamic characteristics. Optionally, the modulation column 17 can be a boron-doped modulation column 17.

[0026] A plurality of polysilicon gate electrodes 18 are wrapped and covered by a second dielectric layer 19 and are embedded in the charge storage layer 14 , the body region 15 and the emitter 16 at equal intervals.

[0027] The source region doping modulation IGBT structure includes, from bottom to top, a collector metal electrode 25, a collector 24, a buffer layer 23, a first drift region 11, a capacitance modulation layer 12, a charge storage layer 14, a body region 15, an emitter 16, an emitter metal electrode 21, and a passivation layer 22. Optionally, a PI (polyimide) layer is further included on the passivation layer 22. The capacitance modulation layer 12 on the first drift region 11 includes a layered modulation layer 12 and a columnar modulation column 17.

[0028] By introducing a structure including a modulation column 17 and a modulation layer 12 in the first drift region 11, the charge distribution in the source region is optimized in a lateral and longitudinal manner, and the N-type carriers introduced by the charge storage layer 14 are compensated, thereby reducing the Miller capacitance and the capacitance inflection point of the device, and obtaining better dynamic performance. Therefore, the present invention can reduce the Miller capacitance and the capacitance inflection point of the IGBT while maintaining the on-state voltage drop unchanged, thereby greatly improving the dynamic performance of the device.

[0029] In some embodiments, the modulation column 17 is boron difluoride (BF 2 ) column, the boron difluoride column and the modulation layer 12 form a capacitive modulation structure. Boron difluoride, as a highly efficient modulation material, has unique electrical properties, and can control and adjust the electric field in this structure. Specifically, the boron difluoride column forms a capacitive structure by combining with the modulation layer 12, which can adjust the electric field distribution under different working conditions, thereby optimizing the movement and concentration distribution of carriers in the first drift region 11. Due to the high dielectric constant and low conductivity of the boron difluoride column, it can effectively adjust the capacitive coupling between the gate signal and the first drift region 11, thereby improving the switching performance and response speed of the IGBT.

[0030] In addition, the use of boron difluoride columns can also improve the stability of the device in high-frequency operation and reduce energy losses during the switching process, thereby improving the efficiency and reliability of the entire IGBT device.

[0031] In some embodiments, the collector 24 is a P-type doped region formed by high-energy boron implantation. In some embodiments, the collector 24 is a P-type doped region formed by high-energy boron implantation technology. Specifically, high-energy boron implantation is a technology that uses high-energy particles to implant boron ions into a semiconductor substrate. In the structure of the IGBT device, the collector 24 region plays a major role in current carrying and has a lower resistivity to support the flow of large currents.

[0032] In some embodiments, the buffer layer 23 is an N-type region formed by annealing of high-energy phosphorus implantation or high-energy hydrogen implantation, and the annealing junction depth is 2 to 30 microns. Optionally, the annealing junction depth can be 2 microns, 5 microns, 10 microns, 15 microns, 20 microns, 25 microns or 30 microns. In this embodiment, the annealing junction depth of the buffer layer 23 ranges from 2 to 30 microns, which helps to optimize the performance of the device, especially when subjected to high voltage and high current, it can effectively improve the current conduction efficiency and the withstand voltage capability of the device.

[0033] In some embodiments, the first drift region 11 is an N-type doped Si material, and the resistivity of the first drift region 11 is 20-130Ω·cm. Optionally, the resistivity of the first drift region 11 may be 20Ω·cm, 30Ω·cm, 50Ω·cm, 80Ω·cm, 100Ω·cm, 120Ω·cm or 130Ω·cm. In this embodiment, the resistivity of the first drift region 11 has an important influence on the performance of the device, especially in high-power and high-frequency applications. The selection of the resistivity of the first drift region 11 is directly related to the switching speed, switching loss and thermal management of the device. The resistivity range of the first drift region 11 is 20-130Ω·cm. If the resistivity is too low, the voltage withstand capability of the device may be reduced under high voltage conditions; if the resistivity is too high, the power loss will increase.

[0034] In some embodiments, the charge storage layer 14 and the emitter 16 are N-type regions formed by phosphorus implantation annealing. In phosphorus implantation annealing, phosphorus atoms are implanted into a semiconductor material, usually a silicon (Si) substrate, and then annealed to uniformly diffuse the phosphorus atoms and form an N-type region with the silicon. In this embodiment, the charge storage layer 14 is formed into an N-type region by a phosphorus implantation annealing process to ensure that the region has sufficient electron concentration to support effective charge storage and release. The emitter 16 is formed into an N-type region by the same phosphorus implantation annealing process, which helps to establish a good electron transfer path between the emitter 16 and the base region.

[0035] In some embodiments, the body region 15 is a P-type region formed by boron implantation annealing. Boron implantation annealing is to implant boron atoms into the silicon substrate to form a P-type region. During the boron implantation annealing process, boron atoms are implanted into the silicon substrate at a high speed, and diffused and activated through the annealing process, so that the boron atoms are evenly distributed in the body region 15, and it is also ensured that the boron atoms are combined with the silicon atoms to form a P-type region.

[0036] In some embodiments, at least one of the second drift region 13, the first dielectric layer 20, and the second dielectric layer 19 is a silicon oxide material doped with phosphorus and boron. The silicon oxide material doped with phosphorus and boron refers to a silicon oxide (SiO 2 ) is doped with phosphorus (P) and boron (B) elements.

[0037] In some embodiments, see Figure 1 , Figure 1 A flow chart of a method for preparing a source region doping modulation IGBT structure in one embodiment is shown, comprising the following steps: S11, such as Figure 2-Figure 6 , providing a first drift region 11, forming a modulation layer 12 on the first drift region 11, forming a second drift region 13 on the modulation layer 12, forming a charge storage layer 14 on the second drift region 13, forming a body region 15 on the charge storage layer 14, and forming an emitter 16 on the body region 15.

[0038] S12, such as Figure 7 As shown, a first trench is formed penetrating the emitter 16, the body region 15, the charge storage layer 14 and the second drift region 13, and a modulation column 17 is formed at the bottom of the first trench.

[0039] Exemplarily, the modulation column 17 is located on the top of the modulation layer 12 , penetrates the second drift region 13 and extends into the charge storage layer.

[0040] S13, such as Figure 7 As shown, a second dielectric layer 19 is formed on the inner sidewall of the first trench, and a polysilicon gate electrode 18 is filled in the second dielectric layer 19 .

[0041] S14, such as Figure 8 and Fig. 9 As shown, a first dielectric layer 20 is formed on the body region 15, a second trench is formed that penetrates the first dielectric layer 20 and the emitter 16 and extends into the body region 15, an emitter metal electrode 21 is formed in the second trench and above the first dielectric layer 20, and a passivation layer 22 is formed on the emitter metal electrode 21.

[0042] S15, such as Fig.10 As shown, a buffer layer 23 , a collector 24 and a collector metal electrode 25 are sequentially formed at the bottom of the first drift region 11 .

[0043] In some embodiments, the modulation column 17 is a boron difluoride column.

[0044] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer, doping type or part discussed below can be represented as a second element, component, region, layer or part.

[0045] Spatial relationship terms such as "under", "below", "below", "under", "above", "above", etc., may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, spatial relationship terms also include different orientations of the device in use and operation. For example, if the device in the drawings is turned over, the element or feature described as "under other elements" or "under it" or "under it" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0046] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that when the terms "consisting of" and / or "comprising" are used in this specification, the presence of the features, integers, steps, operations, elements and / or parts can be determined, but the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups is not excluded. At the same time, when used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0047] The relevant structures of the embodiments of the present invention should not be limited to the specific shapes shown in the drawings of the specification, but include shape deviations due to, for example, manufacturing technology. The shapes shown in the drawings are schematic in nature and do not limit the scope of the present invention.

[0048] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0049] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A source region doping modulation IGBT structure, characterized in that: include: A collector metal electrode, a collector, a buffer layer, a first drift region, a modulation layer and a second drift region stacked in sequence; a charge storage layer connected to the modulation layer through a plurality of modulation columns; A body region, an emitter, a first dielectric layer, an emitter metal electrode and a passivation layer are sequentially stacked on the charge storage layer; A plurality of polysilicon gate electrodes are provided at the bottom of the dielectric layer, and each of the polysilicon gate electrodes extends into the modulation column one by one after passing through the emitter, the body region and the charge storage layer, and each of the polysilicon gate electrodes is coated with a second dielectric layer; The emitter metal electrode is embedded in the emitter and the second drift region and is in contact with the body region.

2. The source region doping modulation IGBT structure according to claim 1, characterized in that: The modulation column is a boron difluoride column, and the boron difluoride column and the modulation layer form a capacitance modulation structure.

3. The source region doping modulation IGBT structure according to claim 1, characterized in that: The collector is a P-type doped region formed by high-energy boron implantation.

4. The source region doping modulation IGBT structure according to claim 1, characterized in that: The buffer layer is an N-type region formed by high-energy phosphorus implantation or high-energy hydrogen implantation and annealing, and the annealing junction depth is 2-30 microns.

5. The source region doping modulation IGBT structure according to claim 1, characterized in that: The first drift region is made of N-type doped Si material, and the resistivity of the first drift region is 20-130Ω·cm.

6. The source region doping modulation IGBT structure according to claim 1, characterized in that: The charge storage layer and the emitter are N-type regions formed by phosphorus implantation annealing.

7. The source region doping modulation IGBT structure according to claim 1, characterized in that: The body region is a P-type region formed by boron implantation annealing.

8. The source region doping modulation IGBT structure according to claim 1, characterized in that: At least one of the second drift region, the first dielectric layer, and the second dielectric layer is made of silicon oxide material doped with phosphorus and boron.

9. A method for preparing a source region doping modulation IGBT structure according to any one of claims 1 to 8, characterized in that: The steps include: Providing a first drift region, forming a modulation layer on the first drift region, forming a second drift region on the modulation layer, forming a charge storage layer on the second drift region, forming a body region on the charge storage layer, and forming an emitter on the body region; Forming a first trench penetrating the emitter, the body region, the charge storage layer and the second drift region, and forming a modulation column at the bottom of the first trench; forming a second dielectric layer on the inner sidewall of the first trench, and filling a polysilicon gate electrode in the second dielectric layer; forming a first dielectric layer on the body region, forming a second trench penetrating the first dielectric layer and the emitter and extending into the body region, forming an emitter metal electrode in the second trench and above the first dielectric layer, and forming a passivation layer on the emitter metal electrode; A buffer layer, a collector and a collector metal electrode are sequentially formed at the bottom of the first drift region.

10. The preparation method according to claim 9, characterized in that: The modulation column is a boron difluoride column.

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