Electroluminescent display device

Abstract

An electroluminescent display device includes: a substrate provided with a sub-pixel including a light emitting region and a contact region; a light emitting diode in a light emitting region disposed above the substrate, and including a first electrode, a light emitting layer, and a second electrode; a first auxiliary electrode disposed in the contact region over the substrate and including a first portion in a first direction and a second portion in a second direction; a plurality of insulating patterns over the first auxiliary electrode and spaced apart from each other; and a second auxiliary electrode covering the plurality of insulating patterns and electrically connected to the first auxiliary electrode, in which the light emitting layer is separated by the plurality of insulating patterns so as to expose the second auxiliary electrode, and the second electrode is in contact with the exposed second auxiliary electrode.

Description

Technical Field

[0001] The present disclosure relates to a display device, and more particularly, for example but not limited to, to an electroluminescent display device including a light emitting diode. Background Art

[0002] As one of the flat panel display devices, the electroluminescent display device has a wide viewing angle compared with the liquid crystal display device due to its self-luminescence. Since a backlight unit is not required, the electroluminescent display device also has the advantages of thin thickness, light weight and low power consumption.

[0003] In addition, the electroluminescent display device is driven by a direct current (DC) low voltage and has a fast response time. In addition, since the components of the electroluminescent display device are solid, the electroluminescent display device has a strong ability to resist external impact and can be used in a wide temperature range. In addition, the electroluminescent display device can be manufactured at a low cost.

[0004] The electroluminescent display device may include a plurality of pixels, each pixel having a plurality of sub-pixels emitting light of different colors, and the electroluminescent display device may display various color images by allowing the plurality of sub-pixels to selectively emit light. Each sub-pixel includes a light emitting diode, and the light emitting diode includes a first electrode, a light emitting layer, and a second electrode.

[0005] Here, the first electrode is provided for each sub-pixel, and the second electrode is provided in common for all sub-pixels. That is, the second electrode is provided to correspond to the entire display area, so that the second electrode is formed in a relatively large area. However, the embodiment is not limited thereto.

[0006] The descriptions provided in the background section should not be considered as prior art merely because they are mentioned in or related to the background section.The background section may include information describing one or more aspects of the subject technology. Summary of the invention

[0007] The inventors of the present application have found that the resistance of the second electrode increases according to the position, resulting in resistance difference. Therefore, there is a problem that the brightness of the electroluminescent display device is not uniform due to the resistance difference.

[0008] Accordingly, the present disclosure is to provide an electroluminescent display device that substantially obviates one or more of the limitations and disadvantages described above and associated with the background art.

[0009] More specifically, an object of the present disclosure is to provide an electroluminescent display device having uniform brightness.

[0010] Additional features and aspects will be set forth in the following description, and in part will become apparent from the description, or may be learned by practicing the present disclosure provided herein. Other features and aspects of the inventive concept may be realized and obtained by structures specifically pointed out in the written description, its claims, and the accompanying drawings, or structures derived therefrom.

[0011] To achieve these and other aspects of the present disclosure, as specifically implemented and broadly described herein, an electroluminescent display device includes: a substrate, which is provided with sub-pixels including a light-emitting area and a contact area; a light-emitting diode, which is arranged in the light-emitting area above the substrate and includes a first electrode, a light-emitting layer, and a second electrode; a first auxiliary electrode, which is arranged in the contact area above the substrate and includes a first part in a first direction and a second part in a second direction; a plurality of insulating patterns, which are located above the first auxiliary electrode and spaced apart from each other; and a second auxiliary electrode, which covers the plurality of insulating patterns and is electrically connected to the first auxiliary electrode, wherein the light-emitting layer is separated by the plurality of insulating patterns to expose the second auxiliary electrode, and the second electrode is in contact with the exposed second auxiliary electrode.

[0012] On the other hand, an electroluminescent display device includes: a substrate, the substrate being provided with a plurality of sub-pixels each including a light-emitting area and sharing a contact area; a light-emitting diode, the light-emitting diode being arranged in the light-emitting area above the substrate and including a first electrode, a light-emitting layer and a second electrode; a first auxiliary electrode, the first auxiliary electrode being arranged in the contact area above the substrate; a plurality of insulating patterns, the plurality of insulating patterns being located above the first auxiliary electrode and spaced apart from each other; and a second auxiliary electrode, the second auxiliary electrode covering the plurality of insulating patterns and being electrically connected to the first auxiliary electrode, wherein the light-emitting layer and the second electrode extend to the contact area, in the contact area, the light-emitting layer is separated by the plurality of insulating patterns to expose the second auxiliary electrode, and the second electrode is in contact with the exposed second auxiliary electrode.

[0013] It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the inventive concepts as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this application. The accompanying drawings illustrate aspects of the present disclosure and together with the description serve to explain various principles of the present disclosure.

[0015] In the attached picture:

[0016] Figure 1is an example of an equivalent circuit diagram of one sub-pixel SP of an electroluminescent display device according to an exemplary embodiment of the present disclosure;

[0017] Figure 2 is a schematic plan view of an electroluminescent display device according to an exemplary embodiment of the present disclosure;

[0018] Figure 3 yes Figure 2 Sectional view along the midline I-I';

[0019] Figure 4 is a schematic plan view of another electroluminescent display device according to an exemplary embodiment of the present disclosure;

[0020] Figure 5 yes Figure 4 Sectional view along the midline II-II';

[0021] Figure 6 is a schematic plan view of a contact region of an electroluminescent display device according to a first exemplary embodiment of the present disclosure;

[0022] Figure 7 is corresponding to Figure 6 A cross-sectional view taken along line IIIA-IIIA' and line IIIB-IIIB';

[0023] Figures 8A to 8I is a schematic cross-sectional view of a contact region in a manufacturing step of an electroluminescent display device according to a first exemplary embodiment of the present disclosure;

[0024] Figure 9 is a schematic plan view of a contact area of ​​an electroluminescent display device repaired according to an exemplary embodiment of the present disclosure;

[0025] Figure 10 is corresponding to Figure 9 A cross-sectional view along line IV-IV';

[0026] Figure 11 is a schematic plan view of a contact area of ​​an electroluminescent display device repaired according to another exemplary embodiment of the present disclosure;

[0027] Figure 12 is corresponding to Figure 11 A cross-sectional view of the line V-V';

[0028] Figure 13 is a schematic plan view of a contact region of an electroluminescent display device according to a second exemplary embodiment of the present disclosure;

[0029] Figure 14 is corresponding to Figure 13 A cross-sectional view along line VI-VI';

[0030] Figure 15 is a schematic plan view of a contact region of an electroluminescent display device according to a third exemplary embodiment of the present disclosure;

[0031] Figure 16 is corresponding to Figure 15 A cross-sectional view taken along line VIIA-VIIA′ and line VIIB-VIIB′; and

[0032] Figure 17 is a schematic plan view of a contact region of an electroluminescent display device according to a fourth exemplary embodiment of the present disclosure.

[0033] Throughout the drawings and detailed description, unless otherwise described, the same drawing reference numerals should be understood to refer to the same elements, features, and structures. The relative size and description of these elements may be exaggerated for clarity, illustration, and convenience. DETAILED DESCRIPTION

[0034] Reference will now be made in detail to embodiments of the present disclosure, examples of which may be illustrated in the accompanying drawings. The described progression of processing steps and / or operations is an example; however, the order of steps and / or operations is not limited to the order set forth herein and may be varied as known in the art, except for steps and / or operations that must occur in a particular order. The names of various elements used in the following description may be selected only for ease of writing the specification and, therefore, may differ from the names used in an actual product.

[0035] The advantages and features of the present disclosure and the implementation methods will become clear through the embodiments described in detail below with reference to the accompanying drawings. However, the present disclosure can be implemented in many different forms and should not be interpreted as being limited to the embodiments set forth herein, and the embodiments are provided to make the present disclosure thorough and complete and to fully convey the scope of the present disclosure to those skilled in the art to which the present disclosure belongs.

[0036] The shapes (e.g., size, length, width, height, thickness, position, radius, diameter, and area), ratios, angles, quantities, etc. disclosed herein (including those shown in the drawings for describing embodiments of the present disclosure) are illustrative, and the present disclosure is therefore not limited to what is shown. Throughout the disclosure, the same reference numerals represent the same components. In addition, in the following description of the present disclosure, when it is determined that the detailed description of the known related art unnecessarily obscures the main points of the present disclosure, its detailed description will be omitted herein or may be briefly discussed.

[0037] The word "exemplary" is used to mean used as an example or illustration. Various aspects are exemplary aspects. "Implementation," "example," "aspect," etc. should not be interpreted as being preferred or advantageous over other implementations. Unless otherwise specified, implementations, examples, exemplary implementations, aspects, etc. may refer to one or more implementations, one or more examples, one or more exemplary implementations, one or more aspects, etc. In addition, the term "may" includes all meanings of the term "can."

[0038] When terms such as "comprising", "having", "including", etc. mentioned in the present disclosure are used, other components may be added unless the term "only" is used herein. In addition, unless otherwise specified, when a component is expressed in the singular, the plural may also be included.

[0039] When analyzing components, error ranges are interpreted as being included even if not explicitly described.Any implementation described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other implementations.

[0040] When describing a positional relationship, for example, when the positional relationship of two components / layers is described as "above", "over", "above", "below", "below", "beside", etc., unless used together with the term "immediately" or "directly", one or more other components / layers may be arranged between the two components / layers.

[0041] Terms such as "below," "lower," "above," "upper," etc. may be used herein to describe the relationship between elements as shown in the drawings. It should be understood that these terms are spatially relative and based on the orientations depicted in the drawings.

[0042] When describing a temporal relationship, for example, when the temporal sequence is described as "afterwards", "subsequently", "next", "before", etc., non-continuous or non-sequential situations may also be included unless "immediately" or "directly" is used.

[0043] Although the terms "first", "second", "A", "B", "(a)", and "(b)", etc. are used to describe various components, these components are not substantially limited by these terms. These terms are only used to distinguish one component from another component and may not limit any order or sequence. Therefore, within the technical spirit of the present disclosure, the first component described below may be substantially the second component.

[0044] The term "at least one" should be understood to include any and all combinations of one or more of the associated listed items. For example, the meaning of "at least one of a first element, a second element, and a third element" covers the combination of all three listed elements, the combination of any two of the three elements, and each individual element (i.e., the first element, the second element, or the third element).

[0045] Unless otherwise defined, all terms (including technical and scientific terms) used in this document have the same meaning as those generally understood by a person of ordinary skill in the art to which the exemplary embodiments belong. It should also be understood that terms (e.g., terms defined in commonly used dictionaries) should be interpreted as having, for example, a meaning consistent with their meaning in the context of the relevant art, and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein. For example, as will be understood by a person of ordinary skill in the art, the term "component" or "unit" may be applied to, for example, a separate circuit or structure, an integrated circuit, a computing block of a circuit device, or any structure configured to perform the described function.

[0046] The features of the various embodiments of the present disclosure may be partially or entirely combined or coupled with each other, may be technically interlocked and driven in various ways, and each embodiment may be implemented independently relative to each other or implemented together in a related relationship.

[0047] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0048] The electroluminescent display device according to an exemplary embodiment of the present disclosure includes a plurality of pixels arranged in a matrix form (or any other form) in a display area, and each pixel includes a plurality of sub-pixels. Each sub-pixel has the same or substantially the same configuration as other sub-pixels. Now, reference will be made to Figure 1 One example of a configuration of such sub-pixels of an electroluminescent display device is described, but other configurations are also possible.

[0049] Figure 1 is an example of an equivalent circuit diagram of a sub-pixel SP of an electroluminescent display device according to an exemplary embodiment of the present disclosure. The display device may include a plurality of pixels, each pixel having a plurality of sub-pixels SP, wherein each sub-pixel SP has Figure 1 Configuration.

[0050] exist Figure 1In the embodiment of the present invention, the sub-pixel SP of the electroluminescent display device according to the exemplary embodiment of the present disclosure may include a first transistor T1, a second transistor T2, and a third transistor T3, a storage capacitor Cst, and a light emitting diode De. The first transistor T1, the second transistor T2, and the third transistor T3 may be a switching transistor T1, a driving transistor T2, and a sensing transistor T3, respectively. The switching transistor T1, the driving transistor T2, and the sensing transistor T3 may be n-type transistors. However, the present disclosure is not limited thereto. Alternatively, the switching transistor T1, the driving transistor T2, and the sensing transistor T3 may be p-type transistors or other types of transistors. As an example, the switching transistor T1, the driving transistor T2, and the sensing transistor T3 may be transistors of the same type or transistors of different types.

[0051] A gate line providing a scan signal (or a strobe signal) SCAN and a data line providing a data signal Vdata may cross each other, and a switch transistor T1 may be disposed at a cross point of the gate line and the data line. A gate of the switch transistor T1 may be connected to the gate line to receive the strobe signal SCAN, and a drain of the switch transistor T1 may be connected to the data line to receive the data signal Vdata.

[0052] In addition, the gate of the driving transistor T2 can be connected to the source of the switching transistor T1 and the first capacitor electrode of the storage capacitor Cst. The drain of the driving transistor T2 can be connected to the high potential line providing the high potential voltage EVDD, and the source of the driving transistor T2 can be connected to the anode of the light emitting diode De, the second capacitor electrode of the storage capacitor Cst, and the source of the sensing transistor T3.

[0053] The gate of the sensing transistor T3 may be connected to the gate line, and the drain of the sensing transistor T3 may be connected to a reference line providing a reference voltage Vref. Alternatively, the gate of the sensing transistor T3 may be connected to another sensing line.

[0054] Here, the source position and the drain position of each of the transistors T1 , T2 , and T3 are not limited thereto, and the positions may be interchanged or changed.

[0055] At the same time, the cathode of the light emitting diode De can be connected to a low potential line providing a low potential voltage EVSS. Alternatively, the cathode of the light emitting diode De can be connected to a ground voltage. As a variation, another type of light emitting element can be used instead of the light emitting diode De.

[0056] During the light-emitting period of one frame, the switching transistor T1 can be switched according to the selection signal SCAN transmitted through the selection line, thereby providing the gate of the driving transistor T2 with the data signal Vdata transmitted through the data line. The driving transistor T2 can be switched according to the data signal Vdata, thereby controlling the current of the light-emitting diode De. In this case, the storage capacitor Cst can maintain the charge corresponding to the data signal Vdata for a certain period of time (for example, one frame). Therefore, even if the switching transistor T1 is turned off, the storage capacitor Cst can make the amount of current flowing through the light-emitting diode De constant, and make the grayscale displayed by the light-emitting diode De remain unchanged until the next frame.

[0057] In addition, a frame may also include a sensing period. During the sensing period, the sensing transistor T3 may be switched according to the selection signal SCAN transmitted through the selection line, thereby providing a reference voltage Vref to the source of the driving transistor T2. The sensing transistor T3 may detect a voltage change at the source of the driving transistor T2 through the reference line, and may calculate a threshold voltage Vth of the driving transistor T2 by comparing the amount of the voltage change with a determined range. Therefore, by calculating the threshold voltage Vth in real time and compensating the image data, the characteristic change of the driving transistor T2 may be compensated and image degradation may be reduced or prevented.

[0058] However, the configuration of the sub-pixel of the electroluminescent display device according to the exemplary embodiment of the present disclosure is not limited thereto. In some embodiments, the sensing transistor T3 may be omitted. In addition, the number and connection relationship of transistors, storage capacitors and / or light emitting diodes may vary.

[0059] Figure 2 is a schematic plan view of an electroluminescent display device according to an exemplary embodiment of the present disclosure, and shows one sub-pixel. The electroluminescent display device according to an exemplary embodiment of the present disclosure may be a top emission type display device. The embodiment is not limited thereto. As an example, the electroluminescent display device according to an exemplary embodiment of the present disclosure may be a bottom emission type display device or a dual emission type display device.

[0060] like Figure 2 As shown, in the electroluminescent display device according to the exemplary embodiment of the present disclosure, the gate line GL may extend in the first direction as the X direction. A plurality of data lines DL, a first power line PL1, a second power line PL2, and a reference line RL may extend in the second direction as the Y direction. The gate line GL may cross the data line DL, the first power line PL1, the second power line PL2, and the reference line RL, thereby defining a plurality of sub-pixels SP1, SP2, SP3, and SP4. Here, the first power line PL1 may be a gate line that provides a plurality of sub-pixels SP1, SP2, SP3, and SP4. Figure 1The second power line PL2 may be a low potential line providing a low potential voltage EVSS. Figure 1 A high potential line of a high potential voltage EVDD.

[0061] The gate line GL may pass through each of the sub-pixels SP1, SP2, SP3, and SP4. However, the embodiments of the present disclosure are not limited thereto. Alternatively, the gate line GL may be disposed at the top or bottom of each of the sub-pixels SP1, SP2, SP3, and SP4.

[0062] One reference line RL may be disposed between the first power line PL1 and the second power line PL2, and two data lines DL may be disposed between the first power line PL1 and the reference line RL and between the second power line PL2 and the reference line RL. The two data lines DL may be disposed adjacent to each other at approximately the center between the reference line RL and the first power line PL1 or the second power line PL2, but are not limited thereto.

[0063] Each sub-pixel SP1, SP2, SP3 and SP4 may have a substantially rectangular shape. However, the embodiments of the present disclosure are not limited thereto, and each sub-pixel SP1, SP2, SP3 and SP4 may have other shapes such as a circular shape, a square shape, an oval shape, an elliptical shape, a polygonal shape, etc.

[0064] As described above, one pixel may include a plurality of sub-pixels SP1, SP2, SP3, and SP4. For example, one pixel may include four sub-pixels (i.e., a first sub-pixel SP1, a second sub-pixel SP2, a third sub-pixel SP3, and a fourth sub-pixel SP4). The first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 may be arranged in sequence along the first direction. Embodiments are not limited thereto. As an example, the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 may be arranged along the second direction or the direction between the first direction and the second direction. As an example, the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 may be arranged in two rows and / or two columns. As an example, one pixel may include two, three, or more than four sub-pixels. As an example, two, three, or more than four sub-pixels may be arranged along the first direction, the second direction, or the direction between the first direction and the second direction. As an example, three or more than four sub-pixels may be arranged in multiple rows and / or multiple columns.

[0065] Here, the first sub-pixel SP1 may be a red sub-pixel, the second sub-pixel SP2 may be a green sub-pixel, the third sub-pixel SP3 may be a blue sub-pixel, and the fourth sub-pixel SP4 may be a white sub-pixel. However, embodiments of the present disclosure are not limited thereto. In other exemplary embodiments, the number of sub-pixels included in one pixel and / or the arrangement order of the red sub-pixel, the green sub-pixel, the blue sub-pixel, and the white sub-pixel may be changed. As an example, sub-pixels of other colors may be additionally or alternatively included.

[0066] The first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4 may have substantially the same area. However, embodiments of the present disclosure are not limited thereto. In other exemplary embodiments, the first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4 may have different areas from each other.

[0067] Here, a power line PL1 or PL2, two data lines DL or a reference line RL may be substantially disposed between adjacent sub-pixels SP1, SP2, SP3 and SP4. For example, two data lines DL may be disposed between the first sub-pixel SP1 and the second sub-pixel SP2 and between the third sub-pixel SP3 and the fourth sub-pixel SP4, a reference line RL may be disposed between the second sub-pixel SP2 and the third sub-pixel SP3, and a first power line PL1 may be disposed between the fourth sub-pixel SP4 and the first sub-pixel SP1 of the next pixel. In addition, as an example, two pixels adjacent to each other in the first direction may be symmetrical about the first power line PL1 or the second power line PL2. However, the embodiments of the present disclosure are not limited thereto. As an example, two pixels adjacent to each other in the first direction may not be symmetrical about the first power line PL1 or the second power line PL2. As an example, two pixels adjacent to each other in the first direction may have the same or substantially the same configuration, or may have different configurations.

[0068] In each sub-pixel SP1, SP2, SP3 and SP4, it is possible to set Figure 1 The light emitting diode De, the first transistor T1, the second transistor T2 and the third transistor T3 and the storage capacitor Cst.

[0069] The light emitting diode De may include a first electrode, a light emitting layer, and a second electrode. The first electrode may be disposed at each sub-pixel SP1, SP2, SP3, and SP4. The second electrode may be disposed in common on all sub-pixels SP1, SP2, SP3, and SP4. The embodiment is not limited thereto. As an example, the first electrode may be disposed in common on all sub-pixels SP1, SP2, SP3, and SP4, and the second electrode may be disposed at each sub-pixel SP1, SP2, SP3, and SP4. As an example, each of the first electrode and the second electrode may be disposed at each sub-pixel SP1, SP2, SP3, and SP4, but is not limited thereto.

[0070] Meanwhile, the auxiliary electrode AE ​​may be disposed to partially overlap the first power line PL1 . The auxiliary electrode AE ​​may be disposed for each pixel and may be disposed to correspond to the fourth sub-pixel SP4 , but is not limited thereto.

[0071] The auxiliary electrode AE ​​may be connected to the first power line PL1, and the second electrode of the light emitting diode De may be connected to the auxiliary electrode AE. Therefore, the second electrode of the light emitting diode De may be electrically connected to the first power line PL1 through the auxiliary electrode AE. Therefore, the resistance of the second electrode may be reduced, and the brightness of the electroluminescent display device may be uniform.

[0072] Will refer to Figure 3 A cross-sectional configuration of an electroluminescent display device according to an exemplary embodiment of the present disclosure is described.

[0073] Figure 3 yes Figure 2 1 is a cross-sectional view taken along line II' of , and shows a cross section of one sub-pixel.

[0074] exist Figure 3 , a sub-pixel of an electroluminescent display device according to an exemplary embodiment of the present disclosure may include a light emitting area EA and a contact area CA disposed on a substrate 100. A light emitting diode De may be disposed in the light emitting area EA, and auxiliary electrodes 172, 174, and 176 may be disposed in the contact area CA. The light emitting diode De may include a first electrode 142, a light emitting layer 144, and a second electrode 146. The second electrode 146 may also be disposed in the contact area CA, and is electrically connected to a power line 162 through the auxiliary electrodes 172, 174, and 176.

[0075] Specifically, the light shielding layer 152 and the power supply line 162 may be disposed on the substrate 100. The substrate 100 may be formed of a transparent insulating material, and may be, for example, a glass substrate or a plastic substrate. Polyimide may be used for the plastic substrate, but the embodiment is not limited thereto. The embodiment is not limited thereto. As an example, the substrate 100 may also be formed of an opaque material. As an example, the substrate 100 may be formed of a flexible material or a rigid material.

[0076] The light shielding layer 152 may be disposed in the emission area EA. As an example, a portion of the light shielding layer 152 may be used as a first capacitor electrode, but is not limited thereto. The power line 162 may be substantially disposed between the emission area EA and the contact area CA. Here, the power line 162 may correspond to Figure 2 The first power line PL1 may be a low potential power line that provides a low potential voltage.

[0077] The light shielding layer 152 may be disposed on the same layer as the power line 162 and may be formed of the same material as the power line 162. The light shielding layer 152 and the power line 162 may be formed of a conductive material such as a metal. The light shielding layer 152 and the power line 162 may be formed of one or more of aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W) and alloys thereof. For example, the light shielding layer 152 and the power line 162 may have a double-layer structure including a lower layer of molybdenum-titanium alloy (MoTi) and an upper layer of copper (Cu), and the upper layer may have a thicker thickness than the lower layer. However, embodiments of the present disclosure are not limited thereto. In other exemplary embodiments, the light shielding layer 152 and the power line 162 may have a single-layer structure, a three-layer structure or a multi-layer structure. Embodiments are not limited thereto. As an example, the light shielding layer 152 may be disposed on a different layer from the power line 162, and / or the light shielding layer 152 may be made of different materials from the power line 162. As an example, the light shielding layer 152 may be omitted according to design.

[0078] A buffer layer 111 of an insulating material may be disposed on the light shielding layer 152 and the power supply line 162. The buffer layer 111 may be disposed on substantially the entire surface of the substrate 100. The buffer layer 111 may be made of, for example, silicon oxide (SiO 2 ) or silicon nitride (SiN x ) and can be formed as a single layer or multiple layers.

[0079] The first semiconductor layer 122 and the second semiconductor layer 132 may be patterned and disposed on the buffer layer 111. As an example, the first semiconductor layer 122 and the second semiconductor layer 132 may be disposed to correspond to the light emitting area EA, but is not limited thereto. As an example, the first semiconductor layer 122 and / or the second semiconductor layer 132 may be disposed to at least partially correspond to the contact area CA.

[0080] The first semiconductor layer 122 may overlap with the light shielding layer 152, and the second semiconductor layer 132 may be spaced apart from the light shielding layer 152. As an example, the first semiconductor layer 122 may overlap with the light shielding layer 152 in the vertical direction, and the second semiconductor layer 132 may be spaced apart from the light shielding layer 152 in the lateral direction. As an example, the second semiconductor layer 132 does not overlap with the light shielding layer 152. The light shielding layer 152 may block light incident on the first semiconductor layer 122, and reduce or prevent the first semiconductor layer 122 from being degraded by light. However, embodiments of the present disclosure are not limited thereto. In other exemplary embodiments, both the first semiconductor layer 122 and the second semiconductor layer 132 may overlap with the light shielding layer 152 (e.g., in the vertical direction).

[0081] As an example, the first semiconductor layer 122 and the second semiconductor layer 132 may be formed of an oxide semiconductor material.

[0082] Alternatively, the first and second semiconductor layers 122 and 132 may be formed of polycrystalline silicon or other semiconductor materials such as amorphous silicon, compound semiconductor materials, organic semiconductor materials, etc. In this case, both ends of each of the first and second semiconductor layers 122 and 132 may be doped with impurities.

[0083] The gate insulating layer 113 of an insulating material may be disposed on the buffer layer 111 on which the first semiconductor layer 122 and the second semiconductor layer 132 are disposed, and the first gate electrode 124, the second gate electrode 134, the second capacitor electrode 156, and the first auxiliary electrode 172 may be disposed on the gate insulating layer 113, but are not limited thereto. As an example, at least one of the above components may be disposed on a different layer.

[0084] The gate insulating layer 113 may be patterned to correspond to (e.g., have substantially the same shape as) at least one or each of the first gate electrode 124, the second gate electrode 134, the second capacitor electrode 156, and the first auxiliary electrode 172. However, embodiments of the present disclosure are not limited thereto. In other exemplary embodiments, the gate insulating layer 113 may be disposed on substantially the entire surface of the substrate 100.

[0085] The gate insulating layer 113 may be made of, for example, silicon oxide (SiO 2) or silicon nitride (SiN x ) is formed of an inorganic insulating material. For example, when the first semiconductor layer 122 and the second semiconductor layer 132 are made of an oxide semiconductor material, the gate insulating layer 113 may be made of silicon oxide (SiO 2 ) is formed, but is not limited to this.

[0086] Alternatively, when the first semiconductor layer 122 and the second semiconductor layer 132 are made of polysilicon, the gate insulating layer 113 may be made of silicon oxide (SiO 2 ) or silicon nitride (SiN x ) is formed, but is not limited to this.

[0087] The first gate electrode 124 , the second gate electrode 134 , and the second capacitor electrode 156 may be substantially disposed in the emission area EA, and the first auxiliary electrode 172 may be disposed in the contact area CA.

[0088] In this case, the first gate electrode 124 may be disposed to correspond to the center of the first semiconductor layer 122, and the second gate electrode 134 may be disposed to correspond to the center of the second semiconductor layer 132, but is not limited thereto. As an example, the first gate electrode 124 may be disposed to correspond to a position other than the center of the first semiconductor layer 122, and / or the second gate electrode 134 may be disposed to correspond to a position other than the center of the second semiconductor layer 132. Therefore, the first gate electrode 124 may overlap with the light shielding layer 152 (e.g., in the vertical direction), and the second gate electrode 134 may be spaced apart from the light shielding layer 152 (e.g., in the lateral direction). Alternatively, when the second semiconductor layer 132 overlaps with the light shielding layer 152, the second gate electrode 134 may overlap with the light shielding layer 152.

[0089] In addition, the second capacitor electrode 156 may overlap the light shielding layer 152. The light shielding layer 152 and the second capacitor electrode 156 overlapping each other may constitute a storage capacitor Cst with the buffer layer 111 and the gate insulating layer 113 interposed therebetween as a dielectric.

[0090] At the same time, the first auxiliary electrode 172 may overlap with the power line 162 and contact the power line 162 through a contact hole provided in the gate insulating layer 113 and the buffer layer 111. The embodiment is not limited thereto. As an example, the first auxiliary electrode 172 may not overlap with the power line 162 and may contact the power line 162, for example, through another electrode.

[0091] The first gate electrode 124, the second gate electrode 134, the second capacitor electrode 156 and the first auxiliary electrode 172 may be formed of a conductive material such as a metal. The first gate electrode 124, the second gate electrode 134, the second capacitor electrode 156 and the first auxiliary electrode 172 may be formed of one or more of aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W) and alloys thereof, but are not limited thereto. For example, the first gate electrode 124, the second gate electrode 134, the second capacitor electrode 156 and the first auxiliary electrode 172 may have a double-layer structure. For example, the first gate electrode 124, the second gate electrode 134, the second capacitor electrode 156 and the first auxiliary electrode 172 may have a double-layer structure: it includes a lower layer of a molybdenum-titanium alloy (MoTi) and an upper layer of copper (Cu), and the upper layer may be thicker than the lower layer. However, embodiments of the present disclosure are not limited thereto. In other exemplary embodiments, the first gate electrode 124, the second gate electrode 134, the second capacitor electrode 156, and the first auxiliary electrode 172 may have a single-layer structure, a three-layer structure, or a multi-layer structure. As an example, the first gate electrode 124, the second gate electrode 134, the second capacitor electrode 156, and the first auxiliary electrode 172 may have the same structure or different structures.

[0092] The first passivation layer 115 of insulating material may be disposed on the first gate electrode 124, the second gate electrode 134, the second capacitor electrode 156, and the first auxiliary electrode 172. The first passivation layer 115 may be disposed on substantially the entire surface of the substrate 100. The first passivation layer 115 may be an interlayer insulating layer and may be made of, for example, silicon oxide (SiO 2 ) or silicon nitride (SiN x ) is formed by an inorganic insulating material, but is not limited thereto.

[0093] The first passivation layer 115 may have a contact hole exposing the first auxiliary electrode 172 in the contact area CA.

[0094] The first source electrode 126 and the first drain electrode 128 and the second source electrode 136 and the second drain electrode 138 may be disposed on the first passivation layer 115. The first source electrode 126 and the first drain electrode 128 and the second source electrode 136 and the second drain electrode 138 may be formed of a conductive material such as a metal. The first source electrode 126 and the first drain electrode 128 and the second source electrode 136 and the second drain electrode 138 may be formed of one or more of aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W) and alloys thereof, but are not limited thereto. For example, the first source electrode 126 and the first drain electrode 128 and the second source electrode 136 and the second drain electrode 138 may have a double-layer structure. For example, the first source electrode 126 and the first drain electrode 128 and the second source electrode 136 and the second drain electrode 138 may have a double-layer structure including a lower layer of a molybdenum-titanium alloy (MoTi) and an upper layer of copper (Cu), and the upper layer may be thicker than the lower layer. However, the embodiments of the present disclosure are not limited thereto. In other exemplary embodiments, the first source electrode 126 and the first drain electrode 128 and the second source electrode 136 and the second drain electrode 138 may have a single-layer structure, a three-layer structure, or a multi-layer structure.

[0095] The first source electrode 126 and the first drain electrode 128 may be spaced apart from each other with the first gate electrode 124 positioned therebetween, and may contact both ends of the first semiconductor layer 122 through a contact hole provided in the first passivation layer 115. In addition, the second source electrode 136 and the second drain electrode 138 may be spaced apart from each other with the second gate electrode 134 positioned therebetween, and may contact both ends of the second semiconductor layer 132 through a contact hole provided in the first passivation layer 115.

[0096] The first semiconductor layer 122, the first gate electrode 124, the first source electrode 126, and the first drain electrode 128 may form a first thin film transistor Tr1. The second semiconductor layer 132, the second gate electrode 134, the second source electrode 136, and the second drain electrode 138 may form a second thin film transistor Tr2.

[0097] The first and second thin film transistors Tr1 and Tr2 may have a coplanar structure in which gate electrodes 124 and 134 , source electrodes 126 and 136 , and drain electrodes 128 and 138 may be located on the same side with respect to semiconductor layers 122 and 132 (ie, disposed above semiconductor layers 122 and 132 ).

[0098] Alternatively, the first thin film transistor Tr1 and the second thin film transistor Tr2 may have an inverse staggered structure, in which the gate electrode, the source electrode, and the drain electrode may be located on different sides relative to the semiconductor layer. That is, the gate electrode may be disposed below the semiconductor layer, and the source electrode and the drain electrode may be disposed above the semiconductor layer. In this case, the semiconductor layer may be formed of an oxide semiconductor or amorphous silicon, but is not limited thereto.

[0099] The first thin film transistor Tr1 may be Figure 1 The driving transistor T2, and the second thin film transistor Tr2 may be Figure 1 In addition, at least one thin film transistor (eg, Figure 1 The switching transistor T1) may be further disposed on the substrate 100. The embodiment is not limited thereto. As an example, Figure 1 The switching transistor T1 may have a different structure from the first thin film transistor Tr1 and the second thin film transistor Tr2.

[0100] Meanwhile, the first and second source electrodes 126 and 136 may contact the light shielding layer 152 through contact holes provided in the first passivation layer 115 and the buffer layer 111. Therefore, the first and second thin film transistors Tr1 and Tr2 may be connected to the storage capacitor Cst.

[0101] Next, the second auxiliary electrode 174 may be disposed on the first passivation layer 115 in the contact area CA. The second auxiliary electrode 174 may contact the first auxiliary electrode 172 through a contact hole disposed in the first passivation layer 115. As an example, the thickness of the second auxiliary electrode 174 may be less than the thickness of the first auxiliary electrode 172, or may be equal to or greater than the thickness of the first auxiliary electrode 172.

[0102] The second auxiliary electrode 174 may be formed of a conductive material such as a metal. For example, the second auxiliary electrode 174 may be formed of one or more of molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W) and alloys thereof. Alternatively, the second auxiliary electrode 174 may be formed of a transparent conductive material. For example, the second auxiliary electrode 174 may be formed of indium tin oxide (ITO) or indium zinc oxide (IZO). The second auxiliary electrode 174 may have a single-layer structure or a multi-layer structure.

[0103] The second passivation layer 117 of insulating material may be disposed on the first source electrode 126 and the first drain electrode 128, the second source electrode 136 and the second drain electrode 138, and the second auxiliary electrode 174. The second passivation layer 117 may be disposed on substantially the entire surface of the substrate 100. The second passivation layer 117 may be a protective layer. The second passivation layer 117 may be made of, for example, silicon oxide (SiO 2 ) or silicon nitride (SiN x ) is formed of an inorganic insulating material. As an example, the thickness of the second passivation layer 117 may be thicker than the thickness of the first passivation layer 115, or may be equal to or thinner than the thickness of the first passivation layer 115.

[0104] The second passivation layer 117 may have a contact hole CH exposing the second auxiliary electrode 174 in the contact area CA.

[0105] An overcoat 119 of an insulating material may be disposed on the second passivation layer 117. The overcoat 119 may be disposed on substantially the entire surface of the substrate 100. The overcoat 119 and the second passivation layer 117 may have a contact hole exposing the first source electrode 126 in the emission area EA. In addition, the overcoat 119 may have an opening 119a corresponding to the first auxiliary electrode 172 and the second auxiliary electrode 174 in the contact area CA. The contact hole CH of the second passivation layer 117 may be disposed in the opening 119a, and the contact hole CH may be spaced apart from the overcoat 119, for example, in a lateral direction.

[0106] The overcoat 119 may be a planarization layer. The overcoat 119 may be formed of an organic insulating material such as a photosensitive acrylic polymer (photo-acrylic), but is not limited thereto. The overcoat 119 may eliminate a step difference due to a layer below it and may have a substantially flat top surface. However, embodiments of the present disclosure are not limited thereto.

[0107] At the same time, a plurality of insulating patterns 120 of an insulating material may be disposed on the second passivation layer 117 in the contact region CA and spaced apart from each other. The plurality of insulating patterns 120 may be disposed in the opening 119a of the overcoat layer 119 and, for example, spaced apart from the overcoat layer 119 in a lateral direction. The contact hole CH may be disposed between adjacent insulating patterns 120 and expose the second auxiliary electrode 174.

[0108] Each of the insulating patterns 120 may have a reversely-inclined side surface. Thus, a top side of each of the insulating patterns 120 may have a wider width than a bottom side.

[0109] As an example, the insulating pattern 120 may be formed of an organic insulating material or an inorganic insulating material. In this case, as an example, the insulating pattern 120 may be formed of the same material as the overcoat 119. However, the embodiments of the present disclosure are not limited thereto. Alternatively, the insulating pattern 120 may be formed of a different material than the overcoat 119.

[0110] The third auxiliary electrode 176 may be disposed on the insulating pattern 120 in the contact area CA. The third auxiliary electrode 176 may be disposed in the opening 119a of the overcoat layer 119 and spaced apart from the overcoat layer 119, for example, in a lateral direction.

[0111] The third auxiliary electrode 176 may cover the insulating patterns 120 and make contact with the top and side surfaces of each insulating pattern 120. The third auxiliary electrode 176 may make contact with the second auxiliary electrode 174 exposed through the contact hole CH between adjacent insulating patterns 120.

[0112] Here, the first auxiliary electrode 172, the second auxiliary electrode 174, and the third auxiliary electrode 176 may correspond to Figure 2 The auxiliary electrode AE ​​is provided, and the second auxiliary electrode 174 may be omitted.

[0113] The first electrode 142 may be disposed on the overcoat layer 119 in the emission area EA. As an example, the first electrode 142 may be formed of a conductive material having a relatively high work function. The first electrode 142 may contact the first source electrode 126 through a contact hole disposed in the overcoat layer 119 and the second passivation layer 117.

[0114] For example, the first electrode 142 may include a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), or include titanium (Ti). However, the embodiments of the present disclosure are not limited thereto.

[0115] Meanwhile, as described above, the electroluminescent display device according to the exemplary embodiment of the present disclosure may be a top-emitting display device, in which the light from the light-emitting layer 144 is output in the opposite direction to the substrate 100 (i.e., output to the outside through the second electrode 146). In this case, as an example, the first electrode 142 may have a multilayer structure including a material having a relatively high reflectivity. For example, the first electrode 142 may be formed into a structure having a relatively high reflectivity, such as a three-layer structure of titanium, aluminum and titanium (Ti / Al / Ti), a three-layer structure of indium tin oxide, aluminum and indium tin oxide (ITO / Al / ITO), a three-layer structure of indium tin oxide, silver and indium tin oxide (ITO / Ag / ITO), or a three-layer structure of indium tin oxide, a silver alloy and indium tin oxide (ITO / Ag alloy / ITO). Here, the silver alloy may be a silver-palladium-copper alloy (APC).

[0116] A bank 148 of an organic insulating material may be disposed on the first electrode 142. The bank 148 may overlap and cover an edge of the first electrode 142. The bank 148 may expose a portion (eg, a central portion) of the first electrode 142.

[0117] The bank 148 may not be provided in the contact area CA. In this case, the bank 148 may have a hole corresponding to the contact area CA.

[0118] Next, the light emitting layer 144 may be disposed on the first electrode 142 exposed by the bank 148. The light emitting layer 144 may be disposed on substantially the entire surface of the substrate 100. Therefore, in the emission area EA, the light emitting layer 144 may be in contact with the first electrode 142, and may also be in contact with the side surface and the top surface of the bank 148.

[0119] In addition, in the contact region CA, the light emitting layer 144 may contact the top and side surfaces of the overcoat layer 119 and may be separated by the insulating pattern 120 having the reversely inclined side surface. Therefore, the light emitting layer 144 may expose the third auxiliary electrode 176 formed on the side surface of the insulating pattern 120.

[0120] As an example, the light-emitting layer 144 may emit white light and may include at least one hole auxiliary layer, at least one light-emitting material layer, and at least one electron auxiliary layer constituting one light-emitting unit. The hole auxiliary layer may include at least one of a hole injection layer (HIL) and a hole transport layer (HTL). The electron auxiliary layer may include at least one of an electron injection layer (EIL) and an electron transport layer (ETL). As an example, at least one of the at least one hole auxiliary layer and the at least one electron auxiliary layer may be omitted.

[0121] As an example, the light emitting layer 144 may have a stacked structure in which two or more light emitting units emitting light of different colors are stacked, and a charge generation layer (CGL) may be disposed between the two or more light emitting units.

[0122] The second electrode 146 of a conductive material having a relatively low work function may be disposed on the light emitting layer 144. The second electrode 146 may be disposed on substantially the entire surface of the substrate 100.

[0123] As an example, the second electrode 146 may be formed of aluminum (Al), magnesium (Mg), silver (Ag) or an alloy thereof, but is not limited thereto. In this case, the second electrode 146 may have a relatively thin thickness so that light from the light emitting layer 144 can be transmitted therethrough. For example, the second electrode 146 may have a thickness of 5 nm to 10 nm, but embodiments of the present disclosure are not limited thereto.

[0124] Alternatively, the second electrode 146 may be formed of a transparent conductive material such as indium gallium oxide (IGO) or IZO, but is not limited thereto.

[0125] The second electrode 146 may be in contact with the top surface of the light emitting layer 144. In the contact area CA, the second electrode 146 may not be separated by the insulating pattern 120. The second electrode 146 may be disposed along the top surface and the side surface of the insulating pattern 120 and in contact with the third auxiliary electrode 176 exposed on the side surface of the insulating pattern 120. This will be described in detail later.

[0126] The first electrode 142, the light emitting layer 144, and the second electrode 146 of the light emitting area EA may constitute a light emitting diode De. Here, the first electrode 142 may be used as an anode, and the second electrode 146 may be used as a cathode. However, the embodiments of the present disclosure are not limited thereto. In other exemplary embodiments, the first electrode 142 may be used as a cathode, and the second electrode 146 may be used as an anode.

[0127] Although not shown in the figure, a cover layer may be formed on the second electrode 146 over substantially the entire surface of the substrate 100. The cover layer may be formed of an insulating material having a relatively high refractive index, but is not limited thereto. The wavelength of light propagating along the cover layer may be amplified by surface plasmon resonance. Therefore, the intensity of the peak may be increased, thereby improving the light efficiency of the top emission type electroluminescent display device. For example, the cover layer may be formed as a single layer of an organic layer or an inorganic layer, or may be formed as an organic / inorganic layer stack.

[0128] In addition, although not shown in the figure, an encapsulation layer may be provided on the cover layer. The encapsulation layer may protect the light emitting diode De from external moisture or oxygen. The encapsulation layer may include at least one inorganic layer and / or at least one organic layer.

[0129] As described above, the electroluminescent display device according to the exemplary embodiment of the present disclosure may be a top emission type display device, in which light from the light emitting layer 144 of the light emitting diode De is output in a direction opposite to the substrate 100 (i.e., output to the outside through the second electrode 146). Compared with a bottom emission type display device of the same size, the top emission type display device may have a wider light emitting area, thereby increasing brightness and reducing power consumption.

[0130] By the way, in order to transmit light, the second electrode 146 should be formed of a metal material to have a thin thickness, or be formed of a transparent conductive material. Accordingly, the resistance of the second electrode 146 may increase, and there is a resistance difference according to the position. Therefore, in an exemplary embodiment of the present disclosure, in order to reduce the resistance of the second electrode 146, the second electrode 146 can be electrically connected to the power line 162 through the auxiliary electrodes 172, 174 and 176.

[0131] In this case, the light emitting layer 144 may be disposed between the second electrode 146 and the auxiliary electrodes 172, 174, and 176. Since the light emitting layer 144 has insulating properties and acts as a resistor, contact properties between the second electrode 146 and the auxiliary electrodes 172, 174, and 176 may be deteriorated.

[0132] Therefore, in an exemplary embodiment of the present disclosure, by forming an insulating pattern 120 having a reversely inclined side surface in the contact area CA and a third auxiliary electrode 176 covering the insulating pattern 120 between the second electrode 146 and the first auxiliary electrode 172 and the second auxiliary electrode 174 (more specifically, between the light-emitting layer 144 and the first auxiliary electrode 172 and the second auxiliary electrode 174), the light-emitting layer 144 can be separated and the second electrode 146 can be in direct contact with the third auxiliary electrode 176 on the side surface of the insulating pattern 120.

[0133] Therefore, the contact characteristics between the second electrode 146 and the first auxiliary electrode 172, the second auxiliary electrode 174 and the third auxiliary electrode 176 can be improved, and the resistance difference of the second electrode 146 can be reduced or prevented, so that the brightness of the electroluminescent display device can be uniform.

[0134] Meanwhile, the electroluminescent display device according to the exemplary embodiment of the present disclosure may further include a transparent area.

[0135] Figure 4 is a schematic plan view of another electroluminescent display device according to an exemplary embodiment of the present disclosure, and shows one sub-pixel. Another electroluminescent display device according to an exemplary embodiment of the present disclosure may be a transparent display device including a light emitting region and a transparent region.

[0136] like Figure 4As shown, in another electroluminescent display device according to an exemplary embodiment of the present disclosure, the gate line GL may extend in a first direction as an X direction. A plurality of data lines DL, a first power line PL1, a second power line PL2, and a reference line RL may extend in a second direction as a Y direction. The gate line GL may cross the data line DL, the first power line PL1, the second power line PL2, and the reference line RL, thereby defining a plurality of sub-pixels SP1, SP2, SP3, and SP4. Here, the first power line PL1 may be a gate line that provides a plurality of sub-pixels SP1, SP2, SP3, and SP4. Figure 1 The second power line PL2 may be a low potential line providing a low potential voltage EVSS. Figure 1 A high potential line of a high potential voltage EVDD.

[0137] The gate line GL may be disposed between the sub-pixels SP1, SP2, SP3, and SP4 adjacent to each other in the second direction. However, the embodiments of the present disclosure are not limited thereto. As an example, the gate line GL may be disposed on at least one of the sub-pixels SP1, SP2, SP3, and SP4.

[0138] One reference line RL may be disposed between the first power line PL1 and the second power line PL2 , and two data lines DL may be disposed between the first power line PL1 and the reference line RL and between the second power line PL2 and the reference line RL.

[0139] Each of the sub-pixels SP1, SP2, SP3, and SP4 may have a substantially rectangular shape. However, embodiments of the present disclosure are not limited thereto, and each of the sub-pixels SP1, SP2, SP3, and SP4 may have other shapes.

[0140] As described above, one pixel may include a plurality of sub-pixels SP1, SP2, SP3, and SP4. For example, one pixel may include four sub-pixels (i.e., a first sub-pixel SP1, a second sub-pixel SP2, a third sub-pixel SP3, and a fourth sub-pixel SP4). The first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 may be arranged in a pentile shape. That is, the first sub-pixel SP1 and the second sub-pixel SP2 may be disposed adjacent to each other in the first direction, the third sub-pixel SP3 and the fourth sub-pixel SP4 may be disposed adjacent to each other in the first direction, the first sub-pixel SP1 and the third sub-pixel SP3 may be disposed adjacent to each other in the second direction, and the second sub-pixel SP2 and the fourth sub-pixel SP4 may be disposed adjacent to each other in the second direction.

[0141] Here, the first sub-pixel SP1 may be a green sub-pixel, the second sub-pixel SP2 may be a white sub-pixel, the third sub-pixel SP3 may be a blue sub-pixel, and the fourth sub-pixel SP4 may be a red sub-pixel. However, embodiments of the present disclosure are not limited thereto. In other exemplary embodiments, the arrangement order of the red sub-pixel, the green sub-pixel, the blue sub-pixel, and the white sub-pixel may be changed. As an example, sub-pixels of other colors may be additionally or alternatively included.

[0142] The first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 may have substantially the same area. However, embodiments of the present disclosure are not limited thereto. In other exemplary embodiments, at least one of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 may have a different area from the other sub-pixels. Alternatively, the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 may have different areas from each other.

[0143] Each of the first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4 may include a light emitting area EA and a transparent area TA. The light emitting areas EA of the first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4 may be disposed adjacent to each other. Therefore, the light emitting area EA of the first subpixel SP1 and the second subpixel SP2 may be disposed between the transparent areas TA of the first subpixel SP1 and the second subpixel SP2, and the light emitting areas EA of the third subpixel SP3 and the fourth subpixel SP4 may be disposed between the transparent areas TA of the third subpixel SP3 and the fourth subpixel SP4.

[0144] Here, the data line DL, the first power line PL1, and the second power line PL2 may be arranged to correspond to the emission area EA of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4. As an example, at least one or all of the data line DL, the first power line PL1, and the second power line PL2 may be arranged to overlap with the emission area EA of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4. The reference line RL may be arranged between the first sub-pixel SP1 and the second sub-pixel SP2 and between the third sub-pixel SP3 and the fourth sub-pixel SP4. The embodiment is not limited thereto. As an example, the reference line RL may be arranged to overlap with the first sub-pixel SP1 and the second sub-pixel SP2 or the third sub-pixel SP3 and the fourth sub-pixel SP4, but is not limited thereto. As an example, the first power line PL1 may be arranged to correspond to the emission area EA of the fourth sub-pixel SP4. As an example, the first power line PL1 may be arranged on the emission area EA of the fourth sub-pixel SP4 to be adjacent to the transparent area TA, but is not limited thereto. As an example, the first power line PL1 may be disposed on the emission area EA of any one of the first sub-pixel SP1 , the second sub-pixel SP2 , the third sub-pixel SP3 , and the fourth sub-pixel SP4 .

[0145] In each sub-pixel SP1, SP2, SP3 and SP4, it is possible to set Figure 1 The light emitting diode De, the first transistor T1, the second transistor T2 and the third transistor T3 and the storage capacitor Cst.

[0146] The light emitting diode De may include a first electrode, a light emitting layer, and a second electrode. The first electrode may be disposed at each sub-pixel SP1, SP2, SP3, and SP4. The second electrode may be commonly disposed on all sub-pixels SP1, SP2, SP3, and SP4. Here, as an example, the first electrode of each sub-pixel SP1, SP2, SP3, and SP4 may include two electrode patterns, or may include one electrode pattern or three or more electrode patterns, but is not limited thereto.

[0147] At the same time, the auxiliary electrode AE ​​may be disposed to partially overlap with the first power line PL1. The auxiliary electrode AE ​​may extend substantially in the first direction, and a portion (e.g., one end) of the auxiliary electrode AE ​​may overlap with the first power line PL1. The auxiliary electrode AE ​​may be provided for each pixel, and the auxiliary electrode AE ​​may be provided to correspond to the transparent area TA of the fourth sub-pixel SP4. As an example, the auxiliary electrode AE ​​may be provided to correspond to the transparent area TA of the fourth sub-pixel SP4 on which the first power line PL1 is provided, but is not limited thereto.

[0148] The auxiliary electrode AE ​​may be connected to the first power line PL1, and the second electrode of the light emitting diode De may be connected to the auxiliary electrode AE. Therefore, the second electrode of the light emitting diode De may be electrically connected to the first power line PL1 through the auxiliary electrode AE. Therefore, the resistance of the second electrode may be reduced, and the brightness of the electroluminescent display device may be uniform.

[0149] Will refer to Figure 5 A cross-sectional configuration of another electroluminescent display device according to an exemplary embodiment of the present disclosure is described.

[0150] Figure 5 yes Figure 4 , and shows a cross-sectional view of one sub-pixel. In addition to the transparent area, the first electrode and the connecting electrode, another electroluminescent display device according to an exemplary embodiment of the present disclosure has Figure 3 The configuration of the aforementioned exemplary embodiment is substantially the same as that of the aforementioned exemplary embodiment. The same components as those of the aforementioned exemplary embodiment are denoted by the same reference numerals, and the description of the same components may be shortened or omitted.

[0151] exist Figure 5 , a sub-pixel of another electroluminescent display device according to an exemplary embodiment of the present disclosure may include a light emitting area EA, a transparent area TA, and a contact area CA disposed on a substrate 100. A light emitting diode De may be disposed in the light emitting area EA, and auxiliary electrodes 172, 174, and 176 may be disposed in the contact area CA. The light emitting diode De may include a first electrode 142, a light emitting layer 144, and a second electrode 146, and the second electrode 146 may be electrically connected to a power line 162 through the auxiliary electrodes 172, 174, and 176.

[0152] Specifically, the light shielding layer 152 , the power line 162 , the data line 166 , and the first capacitor electrode 154 may be disposed on the substrate 100 .

[0153] The light shielding layer 152, the power line 162, the data line 166, and the first capacitor electrode 154 may be disposed in the emission area EA. Here, the first capacitor electrode 154 may be connected to the light shielding layer 152. In addition, the power line 162 may correspond to Figure 2 The first power line PL1 may be a low potential power line that provides a low potential voltage.

[0154] At the same time, according to Figure 4 Line II-II' in FIG. 1, a portion of the power line 162 and the data line 166 may also be disposed between the transparent area TA and the light shielding layer 152, but for the sake of convenience in illustration, Figure 5 Can be omitted.

[0155] A buffer layer 111 of an insulating material may be disposed on the light shielding layer 152, the power line 162, the data line 166, and the first capacitor electrode 154. The buffer layer 111 may be disposed on substantially the entire surface of the substrate 100.

[0156] The first semiconductor layer 122 and the second semiconductor layer 132 may be patterned and disposed on the buffer layer 111. The first semiconductor layer 122 and the second semiconductor layer 132 may be disposed to correspond to the light emitting area EA, but are not limited thereto.

[0157] The first semiconductor layer 122 and the second semiconductor layer 132 may overlap with the light shielding layer 152. However, the embodiments of the present disclosure are not limited thereto. In other exemplary embodiments, the first semiconductor layer 122 may overlap with the light shielding layer 152, and the second semiconductor layer 132 may be spaced apart from the light shielding layer 152, for example, in a lateral direction.

[0158] A gate insulating layer 113 of an insulating material may be disposed on the buffer layer 111 on which the first semiconductor layer 122 and the second semiconductor layer 132 are disposed. A first gate electrode 124, a first source electrode 126, a first drain electrode 128, a second source electrode / drain electrode 137, a second capacitor electrode 156, and a first auxiliary electrode 172 may be disposed on the gate insulating layer 113. In addition, although not shown in the drawings, a second gate electrode may be disposed on the gate insulating layer 113.

[0159] The gate insulating layer 113 may be patterned to have substantially the same shape as each of the first gate electrode 124, the first source electrode 126, the first drain electrode 128, the second source / drain electrode 137, the second capacitor electrode 156, and the first auxiliary electrode 172. However, embodiments of the present disclosure are not limited thereto. In other exemplary embodiments, the gate insulating layer 113 may be disposed on substantially the entire surface of the substrate 100.

[0160] The first gate electrode 124, the first source electrode 126, the first drain electrode 128, the second source / drain electrode 137, and the second capacitor electrode 156 may be disposed in the emission area EA, and the first auxiliary electrode 172 may be disposed in the contact area CA. As an example, the first auxiliary electrode 172 may also be partially disposed in the emission area EA, but is not limited thereto.

[0161] In this case, the first gate electrode 124 may correspond to the center of the first semiconductor layer 122 and may be disposed between the first source electrode 126 and the first drain electrode 128, but is not limited thereto. As an example, the first gate electrode 124 may correspond to a position other than the center of the first semiconductor layer 122. The first source electrode 126 and the first drain electrode 128 may be disposed to correspond to two ends of the first semiconductor layer 122 and may be in contact with the two ends of the first semiconductor layer 122 respectively through contact holes formed in the gate insulating layer 113.

[0162] Although not shown in the figure, the second gate electrode may be disposed to correspond to the center of the second semiconductor layer 132, and is not limited thereto. As an example, the second gate electrode may correspond to a position other than the center of the second semiconductor layer 132. The second source / drain electrode 137 may be disposed at an end of the second semiconductor layer 132 and may be in contact with the end of the semiconductor layer 132 through a contact hole in the gate insulating layer 113.

[0163] In addition, the second capacitor electrode 156 may overlap with the first capacitor electrode 154. The first capacitor electrode 154 and the second capacitor electrode 156 that overlap with each other may form a storage capacitor Cst, and the buffer layer 111 and the gate insulating layer 113 are interposed therebetween as dielectrics.

[0164] As an example, a semiconductor pattern may be disposed between the first capacitor electrode 154 and the second capacitor electrode 156. As an example, the semiconductor pattern may be formed of the same material as the first semiconductor layer 122 and the second semiconductor layer 132 and formed on the same layer, but is not limited thereto. That is, the semiconductor pattern may overlap with the first capacitor electrode 154 and the second capacitor electrode 156 and may be located between the buffer layer 111 and the gate insulating layer 113. The embodiments are not limited thereto. As an example, the semiconductor pattern may be omitted according to the design.

[0165] Meanwhile, the first auxiliary electrode 172 may overlap with the power supply line 162 and be in contact with the power supply line 162 through contact holes formed in the gate insulating layer 113 and the buffer layer 111.

[0166] The first semiconductor layer 122, the first gate electrode 124, the first source electrode 126, and the first drain electrode 128 may form a first thin film transistor Tr1. The second semiconductor layer 132, the second gate electrode, and the second source / drain electrode 137 may form a second thin film transistor Tr2.

[0167] The first thin film transistor Tr1 may be Figure 1 the driving transistor T2, and the second thin film transistor Tr2 may be Figure 1Meanwhile, at least one thin film transistor having substantially the same structure as the first thin film transistor Tr1 and the second thin film transistor Tr2 or having a different structure from the first thin film transistor Tr1 and the second thin film transistor Tr2 may be disposed on the substrate 100 .

[0168] Here, the first source electrode 126 may contact the light shielding layer 152 through a contact hole provided in the gate insulating layer 113 and the buffer layer 111 .

[0169] The first passivation layer 115 of an insulating material may be disposed on the first gate electrode 124, the first source electrode 126, the first drain electrode 128, the second source / drain electrode 137, the second capacitor electrode 156, and the first auxiliary electrode 172. The first passivation layer 115 may be disposed on substantially the entire surface of the substrate 100. The first passivation layer 115 may be an interlayer insulating layer and may be made of, for example, silicon oxide (SiO 2 ) or silicon nitride (SiN x ) is formed by an inorganic insulating material, but is not limited thereto.

[0170] The first passivation layer 115 may have a contact hole exposing the first source electrode 126 in the emission area EA, and may have a contact hole exposing the first auxiliary electrode 172 in the contact area CA.

[0171] The connection electrode 184 and the second auxiliary electrode 174 may be disposed on the first passivation layer 115. The connection electrode 184 may be disposed in the emission area EA, and the second auxiliary electrode 174 may be disposed in the contact area CA. In the emission area EA, the connection electrode 184 may contact the first source electrode 126 through a contact hole disposed in the first passivation layer 115. In the contact area CA, the second auxiliary electrode 174 may contact the first auxiliary electrode 172 through a contact hole disposed in the first passivation layer 115. The thickness of the second auxiliary electrode 174 may be less than the thickness of the first auxiliary electrode 172.

[0172] The connection electrode 184 and the second auxiliary electrode 174 may be formed of a conductive material such as metal. Alternatively, the connection electrode 184 and the second auxiliary electrode 174 may be formed of a transparent conductive material. As an example, the connection electrode 184 and the second auxiliary electrode 174 may be formed of the same material or different materials.

[0173] The second passivation layer 117 of an insulating material may be disposed on the connection electrode 184 and the second auxiliary electrode 174. The second passivation layer 117 may be disposed on substantially the entire surface of the substrate 100. The second passivation layer 117 may be a protective layer. The second passivation layer 117 may be made of, for example, silicon oxide (SiO 2) or silicon nitride (SiN x The thickness of the second passivation layer 117 may be greater than, equal to, or less than the thickness of the first passivation layer 115.

[0174] The second passivation layer 117 may have a contact hole CH in the contact area CA exposing the second auxiliary electrode 174. As an example, the second passivation layer 117 may cover both ends of the second auxiliary electrode 174, but is not limited thereto. As an example, the second passivation layer 117 may expose at least one end or both ends of the second auxiliary electrode 174, but is not limited thereto.

[0175] An overcoat 119 of an insulating material may be disposed on the second passivation layer 117. The overcoat 119 may be substantially disposed on the emission area EA, and may be partially or entirely removed in the transparent area TA, thereby exposing the second passivation layer 117 in the transparent area TA. The overcoat 119 and the second passivation layer 117 may have a contact hole in the emission area EA that exposes the connection electrode 184. The contact hole that exposes the connection electrode 184 may be spaced apart from the contact hole that exposes the first source electrode 126.

[0176] In addition, the overcoat 119 may have an opening 119a in the contact area CA corresponding to the first and second auxiliary electrodes 172 and 174. The contact hole CH of the second passivation layer 117 may be disposed in the opening 119a and may be spaced apart from the overcoat 119, for example, in a lateral direction.

[0177] The overcoat 119 may be a planarization layer. The overcoat 119 may be formed of an organic insulating material such as a photosensitive acrylic polymer (photo-acrylic), but is not limited thereto. The overcoat 119 may eliminate a step difference due to a layer below it and may have a substantially flat top surface. However, embodiments of the present disclosure are not limited thereto.

[0178] At the same time, a plurality of insulating patterns 120 of an insulating material may be disposed on the second passivation layer 117 in the contact region CA and spaced apart from each other. The plurality of insulating patterns 120 may be disposed in the opening 119a of the overcoat layer 119 and, for example, spaced apart from the overcoat layer 119 in a lateral direction. A contact hole CH may be disposed between adjacent insulating patterns 120 and expose the second auxiliary electrode 174.

[0179] Each of the insulating patterns 120 may have a reversely inclined side surface. Therefore, a top side of each of the insulating patterns 120 may have a wider width than a bottom side.

[0180] The insulating pattern 120 may be formed of an organic insulating material. In this case, the insulating pattern 120 may be formed of the same material as the overcoat 119. However, the embodiments of the present disclosure are not limited thereto. Alternatively, the insulating pattern 120 may be formed of a different material than the overcoat 119.

[0181] The third auxiliary electrode 176 may be disposed on the insulating pattern 120 in the contact area CA. The third auxiliary electrode 176 may be disposed in the opening 119 a of the overcoat 119 and spaced apart from the overcoat 119 .

[0182] The third auxiliary electrode 176 may cover the insulating patterns 120 and contact the top surface and the side surface of each insulating pattern 120. The third auxiliary electrode 176 may contact the second auxiliary electrode 174 exposed through the contact hole CH between adjacent insulating patterns 120. As an example, the third auxiliary electrode 176 may continuously extend from a first one of the adjacent insulating patterns 120 to another one of the adjacent insulating patterns 120. As an example, the third auxiliary electrode 176 may cover the entire side surface of each insulating pattern 120. As an example, the third auxiliary electrode 176 may further extend onto a portion of the second passivation layer 117 adjacent to the insulating pattern 120.

[0183] Here, the first auxiliary electrode 172, the second auxiliary electrode 174, and the third auxiliary electrode 176 may correspond to Figure 4 The auxiliary electrode AE ​​is provided, and the second auxiliary electrode 174 may be omitted.

[0184] The first electrode 142 may be disposed on the overcoat layer 119 in the emission area EA, and may be formed of a conductive material having a relatively high work function.

[0185] For example, the first electrode 142 may include a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), or include titanium (Ti). However, the embodiments of the present disclosure are not limited thereto.

[0186] Meanwhile, as described above, the electroluminescent display device according to the exemplary embodiment of the present disclosure may be a top emission type display device in which light from the light emitting layer 144 is output in a direction opposite to the substrate 100 (i.e., output to the outside through the second electrode 146). In this case, the first electrode 142 may have a multilayer structure including a material having a relatively high reflectivity, but is not limited thereto.

[0187] The first electrode 142 may be divided into two patterns. That is, the first electrode 142 may include a first electrode pattern 142a and a second electrode pattern 142b. The first electrode pattern 142a may be in contact with the first end of the connection electrode 184 through contact holes provided in the overcoat layer 119 and the second passivation layer 117. In addition, although not shown in the figure, the second electrode pattern 142b may be in contact with the second end of the connection electrode 184 through another contact hole provided in the overcoat layer 119 and the second passivation layer 117. Therefore, the first electrode pattern 142a and the second electrode pattern 142b may be electrically connected to the first source electrode 126 through the connection electrode 184.

[0188] When a defect occurs, the first connection pattern 142a and the second connection pattern 142b may reduce or minimize the degradation of image quality by allowing partial light emission through repair. Specifically, when a defect occurs in a portion corresponding to the first electrode pattern 142a during the manufacturing process or during operation, the first end of the connection electrode 184 connected to the first electrode pattern 142a may be cut using a laser. Therefore, while the portion corresponding to the first electrode pattern 142a does not emit light, the portion corresponding to the second electrode pattern 142b may emit light, thereby preventing the defect that the entire sub-pixel does not emit light. The embodiments are not limited thereto. As an example, the first electrode 142 may not be divided, or may be divided into three or more patterns.

[0189] A bank 148 of an organic insulating material may be provided on the first electrode 142. The bank 148 may overlap with the edges of each of the first electrode pattern 142a and the second electrode pattern 142b, and cover the edges of each of the first electrode pattern 142a and the second electrode pattern 142b. The bank 148 may expose the central portions of each of the first electrode pattern 142a and the second electrode pattern 142b.

[0190] The bank 148 may not be provided in the transparent region TA and the contact region CA. In this case, the bank 148 may have a hole corresponding to the contact region CA.

[0191] Next, the light-emitting layer 144 may be provided on the first electrode 142 exposed by the bank 148 (i.e., on the first electrode pattern 142a and the second electrode pattern 142b). The light-emitting layer 144 may be provided on substantially the entire surface of the substrate 100. Therefore, in the light-emitting region EA, the light-emitting layer 144 may be in contact with the first electrode pattern 142a and the second electrode pattern 142b, and may also be in contact with the side surfaces and the top surface of the bank 148.

[0192] In addition, in the contact region CA, the light emitting layer 144 may contact the top and side surfaces of the overcoat layer 119 and may be separated by the insulating pattern 120 having the reversely inclined side surface. Therefore, the light emitting layer 144 may expose the third auxiliary electrode 176 formed on the side surface of the insulating pattern 120.

[0193] Meanwhile, the light emitting layer 144 may be further disposed in the transparent area TA. In the transparent area TA, the light emitting layer 144 may be in contact with the top surface of the second passivation layer 117 .

[0194] The light-emitting layer 144 may emit white light and may include at least one hole auxiliary layer, at least one light-emitting material layer, and at least one electron auxiliary layer constituting one light-emitting unit. The hole auxiliary layer may include at least one of a hole injection layer (HIL) and a hole transport layer (HTL). The electron auxiliary layer may include at least one of an electron injection layer (EIL) and an electron transport layer (ETL). As an example, at least one hole auxiliary layer and / or at least one electron auxiliary layer may be omitted according to the design.

[0195] As an example, the light emitting layer 144 may have a stacked structure in which two or more light emitting units emitting light of different colors are stacked, and a charge generation layer (CGL) may be disposed between the two or more light emitting units, but is not limited thereto.

[0196] A second electrode 146 of a conductive material (eg, a conductive material having a relatively low work function) may be disposed on the light emitting layer 144. The second electrode 146 may be disposed on substantially the entire surface of the substrate 100.

[0197] The second electrode 146 may be formed of aluminum (Al), magnesium (Mg), silver (Ag), or an alloy thereof. In this case, the second electrode 146 may have a relatively thin thickness so that light from the light emitting layer 144 can be transmitted therethrough. For example, the second electrode 146 may have a thickness of 5 nm to 10 nm, but the embodiments of the present disclosure are not limited thereto.

[0198] Alternatively, the second electrode 146 may be formed of a transparent conductive material such as IGO or IZO.

[0199] The second electrode 146 may be in contact with the top surface of the light emitting layer 144. In the contact area CA, the second electrode 146 may not be separated by the insulating pattern 120. The second electrode 146 may be disposed along the top surface and the side surface of the insulating pattern 120 and in contact with the third auxiliary electrode 176 exposed on the side surface of the insulating pattern 120. This will be described in detail later.

[0200] The first electrode 142, the light emitting layer 144, and the second electrode 146 of the light emitting area EA may constitute a light emitting diode De. Here, the first electrode 142 may serve as an anode, and the second electrode 146 may serve as a cathode. However, the embodiments of the present disclosure are not limited thereto.

[0201] Meanwhile, although not shown in the drawings, a capping layer and an encapsulation layer may be sequentially formed on the second electrode 146 and disposed on substantially the entire surface of the substrate 100 .

[0202] Thus, in another electroluminescent display device according to an exemplary embodiment of the present disclosure, each subpixel may include a light-emitting area EA and a transparent area TA, so that a color image may be displayed through the light-emitting area EA while surrounding environment information such as a background may be displayed through the transparent area TA.

[0203] In addition, by forming the insulating pattern 120 having the reversely inclined side surface in the contact area CA, the light emitting layer 144 can be separated, and the second electrode 146 can directly contact the third auxiliary electrode 176 on the side surface of the insulating pattern 120, thereby improving the contact characteristics between the second electrode 146 and the first auxiliary electrode 172, the second auxiliary electrode 174, and the third auxiliary electrode 176. Therefore, the resistance difference of the second electrode 146 can be reduced or prevented, so that the brightness of the electroluminescent display device can be uniform.

[0204] The configuration of the contact region according to an exemplary embodiment of the present disclosure will be described in more detail with reference to the accompanying drawings.

[0205] Figure 6 is a schematic plan view of a contact region of an electroluminescent display device according to a first exemplary embodiment of the present disclosure, and Figure 7 is corresponding to Figure 6 Cross-sectional view along line IIIA-IIIA' and line IIIB-IIIB'.

[0206] like Figure 6 and Figure 7 As shown, in the electroluminescent display device according to the first exemplary embodiment of the present disclosure, the first auxiliary electrode 172 and the second auxiliary electrode 174 may be provided to have a shape including a plurality of L-shaped sides in a plane, and a plurality of insulating patterns 120 having reversely inclined side surfaces and the third auxiliary electrode 176 covering the insulating patterns 120 may be provided on the first auxiliary electrode 172 and the second auxiliary electrode 174. Therefore, the light emitting layer 144 may be separated by the reversely inclined side surface of each insulating pattern 120, so that the second electrode 146 may be in direct contact with the third auxiliary electrode 176 on all side surfaces of each insulating pattern 120.

[0207] Specifically, the buffer layer 111 may be disposed on the substrate 100. The gate insulating layer 113 and the first auxiliary electrode 172 may be sequentially disposed on the buffer layer 111.

[0208] The first auxiliary electrode 172 may include a first portion 1721 extending in a first direction as an X direction and a second portion 1722 extending in a second direction as a Y direction. The first portion 1721 and the second portion 1722 may be connected to each other and arranged as a whole. The first portion 1721 and the second portion 1722 may substantially cross each other, thereby forming a plurality of L-shaped sides in a plane. For example, the first auxiliary electrode 172 may have four L-shaped sides. The first auxiliary electrode 172 may have a cross shape in a plane.

[0209] In addition, the gate insulating layer 113 may have the same or substantially the same shape as the first auxiliary electrode 172. That is, the gate insulating layer 113 may have a cross shape in a plane.

[0210] The first passivation layer 115 may be disposed on the first auxiliary electrode 172. The first passivation layer 115 may have a first contact hole 115a exposing the top surface of the first auxiliary electrode 172. The first contact hole 115a may have substantially the same shape as the first auxiliary electrode 172, and the first contact hole 115a may have a cross shape in a plane. In this case, the area of ​​the first contact hole 115a may be smaller than the area of ​​the first auxiliary electrode 172. Therefore, the width and length of the first contact hole 115a may be smaller than the width and length of the first auxiliary electrode 172.

[0211] The second auxiliary electrode 174 may be disposed on the first passivation layer 115. The second auxiliary electrode 174 may contact the first auxiliary electrode 172 exposed through the first contact hole 115a. The second auxiliary electrode 174 may have substantially the same shape as the first auxiliary electrode 172. Therefore, the second auxiliary electrode 174 may have a cross shape in a plane, and the width and length of the second auxiliary electrode 174 may be greater than the width and length of the first contact hole 115a. As an example, the width and length of the second auxiliary electrode 174 may be greater than, equal to, or less than the width and length of the first auxiliary electrode 172. As an example, the second auxiliary electrode 174 may overlap the entire first contact hole 115a. As an example, the second auxiliary electrode 174 may have a shape different from that of the first auxiliary electrode 172 (e.g., a rectangular shape, a square shape, a circular shape, etc.), while overlapping the entire first contact hole 115a. As an example, the first auxiliary electrode 172 may overlap the entire first contact hole 115a. As an example, the first auxiliary electrode 172 may have a shape different from that of the first contact hole 115 a (eg, a rectangular shape, a square shape, a circular shape, etc.) while overlapping the entire first contact hole 115 a .

[0212] The second auxiliary electrode 174 may be omitted.

[0213] The second passivation layer 117 may be disposed on the second auxiliary electrode 174. The second passivation layer 117 may have a second contact hole 117a exposing the second auxiliary electrode 174. The second contact hole 117a may have substantially the same shape as the first auxiliary electrode 172 and the second auxiliary electrode 174, and the second contact hole 117a may have a cross shape in a plane. In this case, the area of ​​the second contact hole 117a may be smaller than the area of ​​the second auxiliary electrode 174. Therefore, the width and length of the second contact hole 117a may be smaller than the width and length of the first auxiliary electrode 172 and / or the second auxiliary electrode 174.

[0214] In addition, the second contact hole 117a may have a larger area than the first contact hole 115a, and the first contact hole 115a may be disposed in the second contact hole 117a. Alternatively, the second contact hole 117a may have substantially the same area as the first contact hole 115a. Embodiments are not limited thereto. As an example, the second contact hole 117a may have substantially the same shape as the first contact hole 115a, while having a shape different from the shapes of the first auxiliary electrode 172 and the second auxiliary electrode 174. As an example, the width and length of the second contact hole 117a may be greater than, equal to, or less than the width and length of the first contact hole 115a. As an example, the entire second contact hole 117a may overlap with the second auxiliary electrode 174. As an example, the second contact hole 117a may overlap with the entire first contact hole 115a.

[0215] A plurality of insulating patterns 120 may be disposed on the second passivation layer 117. The plurality of insulating patterns 120 may be spaced apart from each other and disposed to correspond to and overlap the L-shaped sides of the first auxiliary electrode 172, respectively. For example, four insulating patterns 120 may correspond to and overlap the four L-shaped sides of the first auxiliary electrode 172, respectively.

[0216] In addition, each of the insulating patterns 120 may correspond to and overlap each L-shaped side of the second auxiliary electrode 174 , and the second auxiliary electrode 174 may be exposed between adjacent insulating patterns 120 .

[0217] Each insulating pattern 120 may have a reversely inclined side surface. That is, the side surface of the insulating pattern 120 may have an angle greater than 90 degrees relative to the top surface of the substrate 100. From the bottom edge of the insulating pattern 120 in contact with the second passivation layer 117 to the top edge of the insulating pattern 120 away from the second passivation layer 117, the width of the insulating pattern 120 may increase, and the width of the top edge of the insulating pattern 120 may be wider than the width of the bottom edge of the insulating pattern 120. Therefore, the first distance d1 between the top edges of adjacent insulating patterns 120 may be smaller than the second distance d2 between the bottom edges of adjacent insulating patterns 120.

[0218] In this case, the first distance d1 may be smaller than the width of the second contact hole 117a, and the second distance d2 may be larger than the width of the second contact hole 117a. That is, the width of the second contact hole 117a may be larger than the first distance d1 and smaller than the second distance d2. In addition, the first distance d1 may be larger than the width of the first contact hole 115a.

[0219] The third auxiliary electrode 176 may be disposed on the plurality of insulating patterns 120. The third auxiliary electrode 176 may cover the plurality of insulating patterns 120. The third auxiliary electrode 176 may be formed not only on the top surface of each insulating pattern 120 but also on the side surface of the insulating pattern 120 and in contact with the side surface and the top surface of the insulating pattern 120. As an example, the third auxiliary electrode 176 may be formed by a sputtering method having a relatively high step coverage characteristic, but is not limited thereto.

[0220] Furthermore, the third auxiliary electrode 176 may cover the first and second auxiliary electrodes 172 and 174 and contact the second auxiliary electrode 174 exposed through the second contact hole 117a between adjacent insulating patterns 120. The third auxiliary electrode 176 may also contact side and top surfaces of the second passivation layer 117.

[0221] Meanwhile, an overcoat layer 119 may be disposed on the second passivation layer 117. The overcoat layer 119 may have openings 119a corresponding to the first auxiliary electrode 172, the second auxiliary electrode 174, and the third auxiliary electrode 176.

[0222] The first auxiliary electrode 172, the second auxiliary electrode 174, and the third auxiliary electrode 176 may be substantially disposed in the opening 119a, and the second auxiliary electrode 174 and the third auxiliary electrode 176 may be spaced apart from the overcoat 119, for example, in a lateral direction. Thus, a top surface of the second passivation layer 117 may be exposed between the third auxiliary electrode 176 and the overcoat 119.

[0223] However, the embodiments of the present disclosure are not limited thereto. In other exemplary embodiments, the third auxiliary electrode 176 may overlap and contact the overcoat 119. In this case, the third auxiliary electrode 176 may be disposed on the overcoat 119. Alternatively, the third auxiliary electrode 176 may be disposed between the second passivation layer 117 and the overcoat 119.

[0224] In addition, the first and second contact holes 115 a and 117 a and the plurality of insulation patterns 120 may also be disposed in the opening 119 a and spaced apart from the overcoat layer 119 , for example, in a lateral direction.

[0225] The side surface of the overcoat 119 may have a substantially vertical inclination. That is, the side surface of the overcoat 119 may have an angle less than 90 degrees with respect to the top surface of the substrate 100.

[0226] The light emitting layer 144 and the second electrode 146 may be sequentially disposed on the overcoat layer 119 and the third auxiliary electrode 176. The light emitting layer 144 and the second electrode 146 may be formed on substantially the entire surface of the substrate 100. The light emitting layer 144 and the second electrode 146 may cover the top surface and the side surface of the overcoat layer 119, and the light emitting layer 144 may be in contact with the top surface and the side surface of the overcoat layer 119.

[0227] The light emitting layer 144 may not be formed on the reversely inclined side surface of the insulating pattern 120, and the light emitting layer 144 may be separated from the insulating pattern 120. As an example, the light emitting layer 144 may be formed by a thermal evaporation method having a relatively low step coverage characteristic, but is not limited thereto. That is, a portion of the light emitting layer 144 on the insulating pattern 120 may be separated from a portion of the light emitting layer 144 between adjacent insulating patterns 120 and a portion of the light emitting layer 144 between the insulating pattern 120 and the overcoat layer 119, thereby exposing the third auxiliary electrode 176 formed on the side surface of the insulating pattern 120.

[0228] In this case, as an example, the thickness of the light emitting layer 144 may be thinner toward the side surface of the insulating pattern 120 between the insulating pattern 120 and the overcoat 119. In addition, the light emitting layer 114 may contact the top surface of the second passivation layer 117 between the insulating pattern 120 and the overcoat 119.

[0229] On the other hand, the second electrode 146 may not be separated by the insulating pattern 120 and may be formed along the top and side surfaces of the insulating pattern 120. As an example, the second electrode 146 may be formed by a sputtering method having a relatively high step coverage characteristic, but is not limited thereto.

[0230] Therefore, the second electrode 146 may contact the third auxiliary electrode 176 on the side surface of the insulating pattern 120, and may be electrically connected to the first auxiliary electrode 172 and the second auxiliary electrode 174 through the third auxiliary electrode 176. In this case, the second electrode 146 may contact the third auxiliary electrode 176 on all side surfaces of the insulating pattern 120. Specifically, the second electrode 146 may contact the third auxiliary electrode 176 on both the inner side surface of the insulating pattern 120 (i.e., the side surface facing another insulating pattern 120) and the outer side surface of the insulating pattern 120 (i.e., the side surface facing the overcoat 119), and the contact area between the second electrode 146 and the third auxiliary electrode 176 may be increased. Therefore, the contact characteristics between the second electrode 146 and the third auxiliary electrode 176 may be improved.

[0231] In this way, in the electroluminescent display device according to the first exemplary embodiment of the present disclosure, the light-emitting layer 144 can be separated by the insulating pattern 120 having the reversely inclined side surface above the first auxiliary electrode 172 and the second auxiliary electrode 174, and the second electrode 146 can contact the third auxiliary electrode 176 on all side surfaces of the insulating pattern 120, so that the contact area between the second electrode 146 and the third auxiliary electrode 176 can be increased, thereby improving the contact characteristics between the second electrode 146 and the third auxiliary electrode 176.

[0232] In addition, the first auxiliary electrode 172 and the second auxiliary electrode 174 can be configured to have a cross shape including multiple L-shaped sides, and multiple insulating patterns 120 can be arranged to correspond to the multiple L-shaped sides, respectively, thereby further increasing the contact area between the second electrode 146 and the third auxiliary electrode 176.

[0233] Here, the opening 119a and the third auxiliary electrode 176 are shown to have a square shape in a plane, and each of the first auxiliary electrode 172 and the second auxiliary electrode 174 and the first contact hole 115a and the second contact hole 117a has substantially the same length in the first direction and the second direction. However, the embodiments of the present disclosure are not limited thereto. In other exemplary embodiments, the opening 119a and the third auxiliary electrode 176 may have a rectangular shape in a plane, and each of the first auxiliary electrode 172 and the second auxiliary electrode 174 and the first contact hole 115a and the second contact hole 117a may have different lengths in the first direction and the second direction. As an example, the opening 119a and the third auxiliary electrode 176 may have the same shape or different shapes. Although it is shown that each of the first auxiliary electrode 172 and the second auxiliary electrode 174 and the first contact hole 115a and the second contact hole 117a has four L-shaped sides, and there are four insulating patterns 120, the embodiments are not limited thereto. As an example, each or at least one of the first auxiliary electrode 172 and the second auxiliary electrode 174 and the first contact hole 115a and the second contact hole 117a may have three L-shaped sides or five or more L-shaped sides, and there may be three insulating patterns or five or more insulating patterns, and each insulating pattern may have a reverse inclined side surface.

[0234] Will refer to Figures 8A to 8I A method of manufacturing an electroluminescent display device according to a first exemplary embodiment of the present disclosure is described in detail.

[0235] Figures 8A to 8I is a schematic cross-sectional view of a contact region in a step of manufacturing an electroluminescent display device according to a first exemplary embodiment of the present disclosure, and will be referred to together with Figure 5 Give a description.

[0236] First, in Figure 5 and Figure 8A In the present invention, a light shielding layer 152, a power supply line 162, a data line 166, and a first capacitor electrode 154 may be formed on a substrate 100 by depositing a conductive material and patterning it through a photolithography process. Then, a buffer layer 111 may be formed on the light shielding layer 152, the power supply line 162, the data line 166, and the first capacitor electrode 154 by depositing an inorganic insulating material on substantially the entire surface of the substrate 100.

[0237] Here, the photolithography process may include the steps of applying a photoresist on the film to be patterned, exposing and developing the photoresist, etching the film, and stripping the photoresist. The etching step may be performed by a wet etching process using an etchant or a dry etching process using a gas. When the film to be patterned is formed of a material having photosensitivity, only the exposure and development steps may be performed without the steps of applying the photoresist and etching the film.

[0238] Next, a first semiconductor layer 122 and a second semiconductor layer 132 can be formed on the buffer layer 111 by depositing a semiconductor material and patterning it through a photolithography process, and a gate insulating layer 113 can be formed on the buffer layer 111 on which the first semiconductor layer 122 and the second semiconductor layer 132 are disposed by depositing an inorganic insulating material on substantially the entire surface of the substrate 100.

[0239] Then, the gate insulating layer 113 may be patterned through a photolithography process to form an exposed Figure 5 The contact holes of the first semiconductor layer 122 and the second semiconductor layer 132 can be formed by patterning the gate insulating layer 113 and the buffer layer 111 through a photolithography process to expose the gate insulating layer 113 and the buffer layer 111. Figure 5 The contact hole of the power line 162 and the light shielding layer 152 is formed.

[0240] Then, in Figure 5 and Figure 8B In the embodiment, the first auxiliary electrode 172 may be formed on the gate insulating layer 113 by depositing a conductive material and patterning it via a photolithography process. At this time, the gate insulating layer 113 may also be patterned to have the same shape as the first auxiliary electrode 172, but is not limited thereto. As an example, the gate insulating layer 113 may not be patterned to have the same shape as the first auxiliary electrode 172. As an example, the gate insulating layer 113 may be patterned to have a different shape from the first auxiliary electrode 172.

[0241] Here, the first auxiliary electrode 172 and the gate insulating layer 113 may be patterned by a dry etching process. Alternatively, the first auxiliary electrode 172 may be patterned by a wet etching process, and the gate insulating layer 113 may be patterned by a dry etching process. However, embodiments of the present disclosure are not limited thereto.

[0242] at the same time, Figure 5 The first gate electrode 124 , the first source electrode 126 , the first drain electrode 128 , the second source / drain electrodes 137 , and the second capacitor electrode 156 may also be formed together with the first auxiliary electrode 172 , for example, during the same process, but is not limited thereto.

[0243] Then, inFigure 5 and Figure 8C In the embodiment, the first passivation layer 115 may be formed on the first auxiliary electrode 172 by depositing an inorganic insulating material, and the first contact hole 115a exposing the first auxiliary electrode 172 may be formed by patterning the first passivation layer 115 through a photolithography process. Figure 5 The contact hole of the first source electrode 126 may also be formed together with the first contact hole 115 a , for example, during the same process, but is not limited thereto.

[0244] Then, in Figure 5 and Figure 8D In the embodiment, the second auxiliary electrode 174 may be formed on the first passivation layer 115 by depositing a conductive material and patterning it through a photolithography process. Figure 5 The connection electrode 184 may also be formed together with the second auxiliary electrode 174 , for example, during the same process, but is not limited thereto.

[0245] The second auxiliary electrode 174 may overlap the first auxiliary electrode 172 and make contact with the first auxiliary electrode 172 through the first contact hole 115 a .

[0246] Then, in Figure 5 and Figure 8E In the embodiment, the second passivation layer 117 may be formed on the second auxiliary electrode 174 by depositing an inorganic insulating material, and the second contact hole 117 a exposing the second auxiliary electrode 174 may be formed by patterning the second passivation layer 117 through a photolithography process.

[0247] Then, in Figure 5 and Figure 8F In the embodiment, an overcoat layer 119 may be formed on the second passivation layer 117 by applying an organic insulating material, and openings 119 a may be formed by patterning the overcoat layer 119 through a photolithography process to correspond to the first and second auxiliary electrodes 172 and 174 .

[0248] The opening 119a may have a significantly larger area than the first and second auxiliary electrodes 172 and 174. The first and second auxiliary electrodes 172 and 174 may be substantially disposed in the opening 119a and substantially spaced apart from the overcoat 119, for example, in a lateral direction.

[0249] In addition, the opening 119a may have a larger area than the first contact hole 115a and the second contact hole 117a. The first contact hole 115a and the second contact hole 117a may be disposed in the opening 119a and may be spaced apart from the overcoat 119, for example, in a lateral direction.

[0250] Here, the overcoat layer 119 may be formed of a material having negative photosensitivity in which a portion exposed to light remains after development. However, embodiments of the present disclosure are not limited thereto. In other exemplary embodiments, the overcoat layer 119 may be formed of a material having positive photosensitivity in which a portion exposed to light is removed after development, or may be formed of a material having no photosensitivity.

[0251] At the same time, when forming the opening 119a, the corresponding Figure 5 The outer covering layer 119 of the transparent area TA is removed together.

[0252] In addition, a contact hole exposing the connection electrode 186 may also be formed together with the opening 119a. At this time, the second passivation layer 117 corresponding to the contact hole exposing the connection electrode 186 may be removed in the step of forming the opening 119a or in the step of forming the second contact hole 117a.

[0253] Then, in Figure 5 and Figure 8G In the embodiment, by applying an organic insulating material on the overcoat layer 119 having the openings 119 a and patterning it through a photolithography process, a plurality of insulating patterns 120 may be formed in the openings 119 a.

[0254] The plurality of insulating patterns 120 may be spaced apart from each other and may also be spaced apart from the overcoat 119. Each insulating pattern 120 may have a reversely inclined side surface. Therefore, the top side of each insulating pattern 120 may have a wider width than the bottom side, and a first distance d1 between the top sides of adjacent insulating patterns 120 may be smaller than a second distance d2 between the bottom sides of adjacent insulating patterns 120.

[0255] The insulating pattern 120 may be formed of a different material from the overcoat 119. Alternatively, the insulating pattern 120 may be formed of the same material as the overcoat 119. In this case, the reversely inclined side surface of the insulating pattern 120 may be formed by changing process conditions such as exposure and / or curing conditions when forming the overcoat 119, but is not limited thereto.

[0256] In addition, the height of the insulating pattern 120 may be the same as the height of the overcoat 119. Alternatively, the height of the insulating pattern 120 may be different from the height of the overcoat 119. For example, the height of the insulating pattern 120 may be greater than, equal to, or less than the height of the overcoat 119. For example, the height of the insulating pattern 120 may be 0.5 to 1.5 times the height of the overcoat 119.

[0257] Meanwhile, it is described that the insulating pattern 120 is formed after the overcoat layer 119 is formed, but the embodiments of the present disclosure are not limited thereto. In other exemplary embodiments, the overcoat layer 119 may be formed after the insulating pattern 120 is formed, or even formed together with the insulating pattern 120 in the same process.

[0258] Then, in Figure 5 and Figure 8H In the embodiment, the third auxiliary electrode 176 may be formed on the plurality of insulating patterns 120 by depositing a conductive material and patterning it through a photolithography process. The third auxiliary electrode 176 may cover the plurality of insulating patterns 120 and may contact the second auxiliary electrode 174 exposed through the second contact hole 117a between adjacent insulating patterns 120.

[0259] In addition, the third auxiliary electrode 176 may contact side and top surfaces of each insulating pattern 120 and side and top surfaces of the second passivation layer 117. The third auxiliary electrode 176 may be spaced apart from the overcoat layer 119, for example, in a lateral direction.

[0260] Then, Figure 5 The first electrode 142 and the bank 148 may be formed on the overcoat layer 119 .

[0261] Meanwhile, as an example, the third auxiliary electrode 176 may be Figure 5 The first electrode 142 is made of the same material and formed by the same process. In this case, as an example, the first electrode 142 may have a multilayer structure, and the third auxiliary electrode 176 may have a single-layer structure, but is not limited thereto. As an example, the first electrode 142 and the third auxiliary electrode 176 may have the same structure. As an example, the first electrode 142 and the third auxiliary electrode 176 may have a multilayer structure or a single-layer structure.

[0262] Then, in Figure 5 and Figure 8I In the embodiment, the light emitting layer 144 and the second electrode 146 may be sequentially formed on the first electrode 142, the bank 148, the overcoat layer 119 and the third auxiliary electrode 176. In this case, the light emitting layer 144 and the second electrode 146 may be formed on substantially the entire surface of the substrate 100 by vacuum evaporation and sputtering, respectively.

[0263] The light emitting layer 144 may be separated by the insulating pattern 120 having the reversely inclined side surface, thereby exposing the third auxiliary electrode 176 formed on the side surface of the insulating pattern 120. On the other hand, the second electrode 146 may be formed and connected along the top surface and the side surface of the insulating pattern 120 without being separated, and may contact the third auxiliary electrode 176 exposed on the side surface of the insulating pattern 120.

[0264] Therefore, the second electrode 146 may be electrically connected to the first auxiliary electrode 172 and the second auxiliary electrode 174 through the third auxiliary electrode 176, and electrically connected to the first auxiliary electrode 172 and the second auxiliary electrode 174 through the first auxiliary electrode 172 and the second auxiliary electrode 174. Figure 5 Power cord 162.

[0265] The electroluminescent display device manufactured by the above method may be subjected to various tests including an illumination test to determine whether there are any defects. At this time, if the contact between the second electrode 146 and the third auxiliary electrode 176 is unstable during the illumination test, a portion with low brightness may appear locally. Therefore, by repairing the portion with low brightness using laser, the second electrode 146 may be directly connected to the first auxiliary electrode 172.

[0266] In this case, the location and area for repair can vary depending on the size of the laser beam, which will refer to Figures 9 to 12 Provide explanation.

[0267] Figure 9 is a schematic plan view of a contact area of ​​an electroluminescent display device repaired according to an exemplary embodiment of the present disclosure, Figure 10 is corresponding to Figure 9 A cross-sectional view of line IV-IV', Figure 11 is a schematic plan view of a contact area of ​​an electroluminescent display device repaired according to another exemplary embodiment of the present disclosure, and Figure 12 is corresponding to Figure 11 Here, Figure 11 and Figure 12 The size of the laser beam used in the repair can be larger than Figure 9 and Figure 10 The size of the laser beam used in the repair.

[0268] exist Figures 9 to 12 In the embodiment, for a portion having low brightness detected during the illumination test process, a laser beam under the substrate 100 may be irradiated to the first auxiliary electrode 172, and a portion of the first auxiliary electrode 172 exposed to the laser beam may protrude upward and may contact the second electrode 146. As an example, the portion of the first auxiliary electrode 172 exposed to the laser beam may protrude upward and may contact the second electrode 146 by passing through the second auxiliary electrode 174, the third auxiliary electrode 176, and the light emitting layer 144. As an example, the portion of the first auxiliary electrode 172 exposed to the laser beam and protruding upward may have a flat bottom, but is not limited thereto.

[0269] In this case, if Figure 9 and Figure 10As shown, as an example, when the size of the laser beam is relatively small, the repair point RP may substantially correspond to each end of the first auxiliary electrode 172 and may have a point shape, but is not limited thereto. As an example, the repair point RP may correspond to a portion of the first auxiliary electrode 172 other than each end.

[0270] On the other hand, Figure 11 and Figure 12 As shown, as an example, when the size of the laser beam is relatively large, the repair point RP may extend substantially along the first auxiliary electrode 172 and may have a linear shape. At this time, depending on the size and / or intensity of the laser beam, the repair point RP may have a length corresponding to a solid line or a length corresponding to a dotted line.

[0271] At the same time, Figure 11 , the repair point RP is shown to extend along the second portion 1722 of the first auxiliary electrode 172. However, the repair point RP may extend along the first portion 1721 of the first auxiliary electrode 172.

[0272] In this way, even if the contact between the second electrode 146 and the third auxiliary electrode 176 is unstable, the electrical connection between the second electrode 146 and the first auxiliary electrode 172 may be improved by repairing using laser.

[0273] Figure 13 is a schematic plan view of a contact region of an electroluminescent display device according to a second exemplary embodiment of the present disclosure, and Figure 14 is corresponding to Figure 13 1 . The electroluminescent display device according to the second exemplary embodiment of the present disclosure has substantially the same configuration as that of the first exemplary embodiment except for the auxiliary contact hole. The same components as those of the first exemplary embodiment are denoted by the same reference numerals, and the description of the same components may be shortened or omitted.

[0274] like Figure 13 and Figure 14 As shown, in the electroluminescent display device according to the second exemplary embodiment of the present disclosure, the first passivation layer 115 may have a first contact hole 115a and an auxiliary contact hole 215b exposing the first auxiliary electrode 172, and the second auxiliary electrode 174 may contact the first auxiliary electrode 172 through the first contact hole 115a and the auxiliary contact hole 215b.

[0275] Specifically, the buffer layer 111 may be disposed on the substrate 100 . The gate insulating layer 113 and the first auxiliary electrode 172 may be sequentially disposed on the buffer layer 111 , and the first passivation layer 115 may be disposed on the first auxiliary electrode 172 .

[0276] The first auxiliary electrode 172 may include a first portion 1721 extending in a first direction which is the X direction and a second portion 1722 extending in a second direction which is the Y direction. The first auxiliary electrode 172 may have a cross shape in a plane.

[0277] The first passivation layer 115 may have a first contact hole 115a and an auxiliary contact hole 215b exposing the top surface of the first auxiliary electrode 172. The auxiliary contact hole 215b may be spaced apart from the first contact hole 115a in the first direction, and the auxiliary contact hole 215b may be substantially disposed on the first portion 1721 of the first auxiliary electrode 172.

[0278] The first contact hole 115a may have a cross shape in a plane, and the auxiliary contact hole 215b may have a rectangular shape. Alternatively, the auxiliary contact hole 215b may have a polygonal shape, a circular shape, or an oval shape other than the rectangular shape, but is not limited thereto.

[0279] The second auxiliary electrode 174 may be disposed on the first passivation layer 115. The second auxiliary electrode 174 may contact the top surface of the first auxiliary electrode 172 exposed through the first contact hole 115a and the auxiliary contact hole 215b.

[0280] The second passivation layer 117 may be disposed on the second auxiliary electrode 174. The second passivation layer 117 may have a second contact hole 117a exposing the second auxiliary electrode 174. The second contact hole 117a may be spaced apart from the auxiliary contact hole 215b.

[0281] The overcoat layer 119 may be disposed on the second passivation layer 117. The overcoat layer 119 may have a substantially flat top surface, and may have openings 119a corresponding to the first contact hole 115a and the second contact hole 117a. The overcoat layer 119 may be spaced apart from the first contact hole 115a and the second contact hole 117a, and may overlap with the auxiliary contact hole 215b.

[0282] A plurality of insulating patterns 120 having reverse-inclined side surfaces and a third auxiliary electrode 176 may be disposed in the opening 119a on the second passivation layer 117. The third auxiliary electrode 176 may cover the plurality of insulating patterns 120 and contact the second auxiliary electrode 174 through the second contact hole 117a. The plurality of insulating patterns 120 and the third auxiliary electrode 176 may be spaced apart from the overcoat layer 119, and may also be spaced apart from the auxiliary contact hole 215b.

[0283] The light-emitting layer 144 and the second electrode 146 may be sequentially disposed on the overcoat layer 119.

[0284] Thus, in the electroluminescent display device according to the second exemplary embodiment of the present disclosure, the second auxiliary electrode 174 can contact the first auxiliary electrode 172 through the first contact hole 115a and the auxiliary contact hole 215b. Therefore, the contact characteristics between the first auxiliary electrode 172 and the second auxiliary electrode 174 can be improved compared with the first exemplary embodiment.

[0285] The electroluminescent display device according to the second exemplary embodiment of the present disclosure can be Figures 8A to 8I The electroluminescent display device according to the first exemplary embodiment shown in FIG. 1 is manufactured in substantially the same manner and Figure 8C In the step of forming the first contact hole 115a, the auxiliary contact hole 215b may be formed together with the first contact hole 115a.

[0286] Figure 15 is a schematic plan view of a contact region of an electroluminescent display device according to a third exemplary embodiment of the present disclosure, and Figure 16 is corresponding to Figure 15 VIIA-VIIA' and VIIB-VIIB' of the cross-sectional view. Except for the auxiliary electrode, the electroluminescent display device according to the third exemplary embodiment of the present disclosure has a configuration substantially the same as that of the first exemplary embodiment. The same components as those of the first exemplary embodiment are represented by the same or similar reference numerals, and the description of the same components may be shortened or omitted.

[0287] like Figure 15 and Figure 16 As shown, in the electroluminescent display device according to the third exemplary embodiment of the present disclosure, the buffer layer 311 may be disposed on the substrate 300, and the gate insulating layer 313 and the first auxiliary electrode 372 may be sequentially disposed on the buffer layer 311. The first auxiliary electrode 372 may include a first portion 3721 extending in a first direction as the X direction and a second portion 3722 extending in a second direction as the Y direction. The first portion 3721 and the second portion 3722 may be connected to each other and disposed as a whole. The first auxiliary electrode 372 may have a cross shape including a plurality of L-shaped sides in a plane.

[0288] The passivation layer 317 may be disposed on the first auxiliary electrode 372. The passivation layer 317 may be a protective layer. The passivation layer 317 may have a contact hole 317a exposing a top surface of the first auxiliary electrode 372.

[0289] The contact hole 317a may have substantially the same shape as the first auxiliary electrode 372, and may have a cross shape in a plane. In this case, the area of ​​the contact hole 317a may be smaller than the area of ​​the first auxiliary electrode 372. Therefore, the width and length of the contact hole 317a may be smaller than the width and length of the first auxiliary electrode 372.

[0290] A plurality of insulating patterns 320 may be disposed on the passivation layer 317. The plurality of insulating patterns 320 may be spaced apart from each other and disposed to correspond to and overlap L-shaped sides of the first auxiliary electrode 372, respectively.

[0291] Each insulating pattern 320 may have a reversely inclined side surface, and a width of a top side of the insulating pattern 320 may be wider than a width of a bottom side of the insulating pattern 320. Therefore, a distance between top sides of adjacent insulating patterns 320 may be smaller than a distance between bottom sides of adjacent insulating patterns 320. In addition, as an example, a distance between top sides of adjacent insulating patterns 320 may be smaller than a width of the contact hole 317a, and a distance between bottom sides of adjacent insulating patterns 320 may be greater than the width of the contact hole 317a.

[0292] The second auxiliary electrode 376 may be disposed on the plurality of insulating patterns 320. The second auxiliary electrode 376 may cover the plurality of insulating patterns 320. The second auxiliary electrode 376 may be formed not only on the top surface of each insulating pattern 320 but also on the side surface of each insulating pattern 320 and may contact the top surface and the side surface of each insulating pattern 320.

[0293] In addition, the second auxiliary electrode 376 may cover the first auxiliary electrode 372 and may contact the first auxiliary electrode 372 exposed through the contact hole 317a between adjacent insulating patterns 320. The second auxiliary electrode 376 may also contact the top and side surfaces of the passivation layer 317.

[0294] Meanwhile, an overcoat layer 319 may be disposed on the second passivation layer 317. The overcoat layer 319 may have a substantially flat top surface, and may have openings 319a corresponding to the first and second auxiliary electrodes 372 and 376.

[0295] The first auxiliary electrode 372 and the second auxiliary electrode 376 may be substantially disposed in the opening 319a, and the second auxiliary electrode 376 may be spaced apart from the overcoat 319 in a lateral direction. Thus, a top surface of the passivation layer 317 may be exposed between the second auxiliary electrode 376 and the overcoat 319.

[0296] Alternatively, the second auxiliary electrode 376 may overlap and contact the overcoat 319 .

[0297] In addition, the contact holes 317 a and the plurality of insulation patterns 320 may also be disposed in the openings 319 a and may be spaced apart from the overcoat layer 319 .

[0298] The light emitting layer 344 and the second electrode 346 may be sequentially disposed on the overcoat layer 319. The light emitting layer 344 and the second electrode 346 may be formed on substantially the entire surface of the substrate 300.

[0299] The light emitting layer 344 may be separated by the insulating pattern 320 having the reversely inclined side surface, thereby exposing the second auxiliary electrode 376 formed on the side surface of the insulating pattern 320 .

[0300] On the other hand, the second electrode 346 may not be separated by the insulating pattern 320, and may be formed along the top surface and the side surface of the insulating pattern 320. The second electrode 346 may contact the second auxiliary electrode 376 on the side surface of the insulating pattern 320. The second electrode 346 may be electrically connected to the first auxiliary electrode 372 through the second auxiliary electrode 376.

[0301] In this case, the second electrode 346 may contact the second auxiliary electrode 376 on all side surfaces of the insulating pattern 320, thereby increasing the contact area between the second electrode 346 and the second auxiliary electrode 376. Therefore, the contact characteristics between the second electrode 346 and the second auxiliary electrode 376 may be improved.

[0302] Thus, in the electroluminescent display device according to the third exemplary embodiment of the present disclosure, two auxiliary electrodes 372 and 376 may be provided, and the second auxiliary electrode 376 on the insulating pattern 320 may directly contact the first auxiliary electrode 372 under the insulating pattern 320. Therefore, compared with the first exemplary embodiment in which the three auxiliary electrodes 172, 174, and 176 are provided, the process margin may be increased and the defect rate may be reduced.

[0303] The method of manufacturing the electroluminescent display device according to the third exemplary embodiment of the present disclosure is different from the method of manufacturing the electroluminescent display device according to the first exemplary embodiment in that the steps of forming the first passivation layer 115 and the second auxiliary electrode 174 are omitted. Figure 8C and Figure 8D In addition to the step of Figure 8A and Figure 8B as well as Figures 8E to 8I The electroluminescent display device according to the first exemplary embodiment shown in FIG. 1 is manufactured in substantially the same manner.

[0304] In the above exemplary embodiments, the insulating patterns 120 and 320 are described as having a rectangular shape in a plane. However, the embodiments of the present disclosure are not limited thereto. Figure 17 A fourth exemplary embodiment of the present disclosure is described.

[0305] Figure 17 is a schematic plan view of a contact region of an electroluminescent display device according to a fourth exemplary embodiment of the present disclosure. The electroluminescent display device according to the fourth exemplary embodiment of the present disclosure has a configuration substantially the same as that of the third exemplary embodiment except for the planar shape of the insulating pattern. The same components as those of the third exemplary embodiment are denoted by the same or similar reference numerals, and the description of the same components may be shortened or omitted. The electroluminescent display device according to the fourth exemplary embodiment of the present disclosure has a configuration substantially the same as that of the third exemplary embodiment. Figure 16 The cross-sectional structure is basically the same as the cross-sectional structure, and the connection is combined with the reference Figure 16 Give a description.

[0306] like Figure 17 As shown, in the electroluminescent display device according to the fourth exemplary embodiment of the present disclosure, the first auxiliary electrode 372 may include a first portion 3721 and a second portion 3722 that are integrally arranged, and the first auxiliary electrode 372 may have a cross shape including a plurality of L-shaped sides in a plane.

[0307] The passivation layer 317 may be disposed on the first auxiliary electrode 372. The passivation layer 317 may have a contact hole 317a exposing a top surface of the first auxiliary electrode 372, and the contact hole 317a may have a cross shape in a plane.

[0308] A plurality of insulating patterns 420 may be disposed on the passivation layer 317. The plurality of insulating patterns 420 may correspond to and overlap L-shaped sides of the first auxiliary electrode 372, respectively.

[0309] Each of the insulating patterns 420 may have reversely inclined side surfaces, and may have a circular shape in a plane.

[0310] The second auxiliary electrode 376 may be disposed on the plurality of insulating patterns 420. The second auxiliary electrode 376 may cover the plurality of insulating patterns 420. The second auxiliary electrode 376 may contact the first auxiliary electrode 372 exposed through the contact hole 317a between adjacent insulating patterns 420.

[0311] Meanwhile, an overcoat layer 319 may be disposed on the second passivation layer 317. The overcoat layer 319 may have an opening 319a.

[0312] The first and second auxiliary electrodes 372 and 376 and the plurality of insulating patterns 420 may be substantially disposed in the opening 319 a . The second auxiliary electrode 376 and the plurality of insulating patterns 420 may be spaced apart from the overcoat 319 .

[0313] Thus, in the electroluminescent display device according to the fourth exemplary embodiment of the present disclosure, the insulating pattern 420 may have a circular shape in a plane. However, the embodiments of the present disclosure are not limited thereto. The shape of the insulating pattern 420 may be configured in various ways as long as it corresponds to and overlaps the L-shaped side of the first auxiliary electrode 372.

[0314] In the electroluminescent display device of the present disclosure, by connecting the second electrode of the light emitting diode to the power line via the auxiliary electrode, the resistance of the second electrode can be reduced, and the brightness of the electroluminescent display device can be uniform.

[0315] In addition, the light emitting layer can be separated by an insulating pattern, and the second electrode can contact the auxiliary electrode on the side surface of the insulating pattern, so that the contact area between the second electrode and the auxiliary electrode can be increased compared with the undercut structure, thereby improving the contact characteristics between the second electrode and the auxiliary electrode.

[0316] Therefore, the brightness of the electroluminescent display device can be improved, and the improved brightness can reduce power consumption, thereby achieving low power consumption.

[0317] It is obvious to those skilled in the art that various modifications and variations can be made to the display device of the present disclosure without departing from the technical concept or scope of the present invention. Therefore, the present disclosure is intended to cover modifications and variations of the present disclosure as long as they fall within the scope of the attached claims and their equivalents.

[0318] CROSS-REFERENCE TO RELATED APPLICATIONS

[0319] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0162226 filed in Korea on November 21, 2023, the entire contents of which are hereby expressly incorporated by reference into this application for all purposes as if fully set forth herein.

Claims

1. An electroluminescent display device, comprising: A substrate, wherein the substrate is provided with sub-pixels including a light emitting area and a contact area; a light emitting diode, the light emitting diode being disposed in the light emitting region over the substrate and comprising a first electrode, a light emitting layer, and a second electrode; a first auxiliary electrode, the first auxiliary electrode being disposed in the contact region above the substrate; a plurality of insulating patterns, the plurality of insulating patterns being located above the first auxiliary electrode and spaced apart from each other; as well as a second auxiliary electrode covering the plurality of insulating patterns and electrically connected to the first auxiliary electrode, The light emitting layers are separated by the plurality of insulating patterns so that the second auxiliary electrode is exposed, and the second electrode is in contact with the exposed second auxiliary electrode.

2. The electroluminescent display device according to claim 1, wherein: The first auxiliary electrode includes a first portion extending in a first direction and a second portion extending in a second direction different from the first direction.

3. The electroluminescent display device according to claim 2, wherein: The first auxiliary electrode has a plurality of L-shaped sides in a plane.

4. The electroluminescent display device according to claim 3, wherein: The first auxiliary electrode has a cross shape in a plane.

5. The electroluminescent display device according to claim 3, wherein: The plurality of insulation patterns respectively correspond to and overlap the plurality of L-shaped sides.

6. The electroluminescent display device according to claim 5, wherein: The plurality of insulation patterns overlap a side portion of each of the plurality of L-shaped sides.

7. The electroluminescent display device according to claim 5, wherein: The second auxiliary electrode covers each of the plurality of insulating patterns and each of the plurality of L-shaped sides.

8. The electroluminescent display device according to claim 1, wherein: Each of the plurality of insulating patterns has a reversely inclined side surface.

9. The electroluminescent display device according to claim 8, wherein: A top side of each insulating pattern has a wider width than a bottom side of each insulating pattern.

10. The electroluminescent display device according to claim 8, wherein: Each side surface of each of the plurality of insulation patterns has an angle greater than 90 degrees with respect to a top surface of the substrate.

11. The electroluminescent display device according to claim 1, wherein: The second electrode contacts the second auxiliary electrode on a side surface of each of the plurality of insulating patterns.

12. The electroluminescent display device according to claim 1, further comprising a passivation layer between the first auxiliary electrode and the plurality of insulating patterns, the passivation layer having a contact hole exposing the first auxiliary electrode, in, The second auxiliary electrode contacts the first auxiliary electrode through the contact hole between adjacent insulating patterns.

13. The electroluminescent display device according to claim 12, wherein: The width of the contact hole is greater than a distance between top sides of the adjacent insulating patterns and smaller than a distance between bottom sides of the adjacent insulating patterns. 14 . The electroluminescent display device of claim 1 , further comprising a third auxiliary electrode located between the first auxiliary electrode and the plurality of insulating patterns and contacting the first auxiliary electrode and the second auxiliary electrode.

15. The electroluminescent display device according to claim 14, further comprising: a first passivation layer, the first passivation layer being located between the first auxiliary electrode and the third auxiliary electrode and having a first contact hole exposing the first auxiliary electrode; as well as a second passivation layer, the second passivation layer being located between the third auxiliary electrode and the plurality of insulating patterns and having a second contact hole exposing the third auxiliary electrode, The second auxiliary electrode contacts the third auxiliary electrode through the second contact hole between adjacent insulating patterns, and the third auxiliary electrode contacts the first auxiliary electrode through the first contact hole between adjacent insulating patterns.

16. The electroluminescent display device according to claim 15, wherein: Each of the first contact hole and the second contact hole has a cross shape in a plane.

17. The electroluminescent display device according to claim 16, wherein: The third auxiliary electrode has a cross shape in plane.

18. The electroluminescent display device according to claim 15, wherein: A distance between top sides of adjacent insulating patterns is greater than a width of the first contact hole and less than a width of the second contact hole.

19. The electroluminescent display device according to claim 1, further comprising an overcoat layer located between the first auxiliary electrode and the light emitting diode and having an opening corresponding to the contact area, in, The plurality of insulating patterns and the second auxiliary electrode are disposed in the opening.

20. The electroluminescent display device according to claim 19, wherein: The plurality of insulation patterns are spaced apart from the overcoat.

21. The electroluminescent display device according to claim 19, wherein: The plurality of insulating patterns are formed of the same material as the overcoat.

22. The electroluminescent display device according to claim 19, wherein: The opening and the second auxiliary electrode have a square shape or a rectangular shape in a plane to overlap all of the plurality of insulating patterns.

23. The electroluminescent display device according to claim 1, wherein: A plurality of sub-pixels are disposed above the substrate, and Wherein, in the contact region of at least one sub-pixel among the plurality of sub-pixels, the first auxiliary electrode contacts the second electrode.

24. The electroluminescent display device according to claim 23, wherein: In the contact region of the at least one sub-pixel, a portion of the first auxiliary electrode protrudes upward to pass through the second auxiliary electrode and the light emitting layer, thereby making contact with the second electrode.

25. The electroluminescent display device according to claim 19, wherein: The sub-pixel also includes a transparent area, and Therein, the outer covering layer is removed in the transparent area.

26. The electroluminescent display device according to claim 1, wherein: The first auxiliary electrode is electrically connected to a power line configured to provide a low potential voltage.

27. The electroluminescent display device according to claim 1, wherein: The second auxiliary electrode continuously extends between the plurality of insulation patterns to cover all side surfaces of the plurality of insulation patterns.

28. The electroluminescent display device according to claim 1, wherein: The second auxiliary electrode includes the same material as the first electrode.

29. The electroluminescent display device according to claim 1, wherein: The light emitting layers are separated by the plurality of insulating patterns such that the second auxiliary electrodes are exposed on side surfaces of the plurality of insulating patterns.

30. The electroluminescent display device according to claim 1, wherein: The second auxiliary electrode and the second electrode are formed by a sputtering method, and the light emitting layer is formed by a thermal evaporation method.

31. An electroluminescent display device, comprising: A substrate provided with a plurality of sub-pixels each including a light emitting region and sharing a contact region; a light emitting diode, the light emitting diode being disposed in the light emitting region over the substrate and comprising a first electrode, a light emitting layer, and a second electrode; a first auxiliary electrode, the first auxiliary electrode being disposed in the contact region above the substrate; a plurality of insulating patterns, the plurality of insulating patterns being located above the first auxiliary electrode and spaced apart from each other; as well as a second auxiliary electrode covering the plurality of insulating patterns and electrically connected to the first auxiliary electrode, The light emitting layer and the second electrode extend to the contact region, in which the light emitting layer is separated by the plurality of insulating patterns to expose the second auxiliary electrode, and the second electrode contacts the exposed second auxiliary electrode.

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