Electroluminescent display device and method of manufacturing electroluminescent display device

Abstract

An electroluminescent display device and a method of manufacturing the electroluminescent display device are provided. An electroluminescent display device includes: a substrate provided with a sub-pixel including a light emitting region and a contact region; a light emitting diode in the light emitting area and including a first electrode, a light emitting layer, and a second electrode; a first auxiliary electrode in the contact region and connected to the second electrode; and an insulating layer between the first auxiliary electrode and the light emitting diode and having a contact hole exposing the first auxiliary electrode, in which the contact hole includes a portion extending in the first direction and a portion extending in the second direction, and an undercut structure exposing a bottom surface of the insulating layer is provided at at least one side of the contact hole, and wherein the light emitting layer is cut off by the undercut structure, and the second electrode is connected to the first auxiliary electrode below the undercut structure.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Korean Patent Application No. 10-2023-0162227 filed in Korea on November 21, 2023, the entire contents of which are hereby expressly incorporated by reference into this application. Technical Field

[0003] The present disclosure relates to a display device, and more particularly to an electroluminescent display device including a light emitting diode and a method of manufacturing the electroluminescent display device. Background Art

[0004] As one of the flat panel display devices, the electroluminescent display device has a wide viewing angle compared with the liquid crystal display device due to its self-luminescence. Since a backlight unit is not required, the electroluminescent display device also has the advantages of thin thickness, light weight and low power consumption.

[0005] In addition, the electroluminescent display device is driven by a low direct current (DC) voltage and has a fast response time. In addition, the electroluminescent display device is strongly resistant to external impacts due to its solid-state components and is used in a wide temperature range. In addition, the electroluminescent display device can be manufactured at low cost.

[0006] The electroluminescent display device may include a plurality of pixels, each of which has a plurality of sub-pixels emitting light of different colors, and may display various color images by allowing the plurality of sub-pixels to selectively emit light. Each sub-pixel includes a light emitting diode, and the light emitting diode includes a first electrode, a light emitting layer, and a second electrode.

[0007] Here, the first electrode is provided for each sub-pixel, and the second electrode is provided in common for all sub-pixels. That is, the second electrode is provided to correspond to the entire display area, so that the second electrode is formed in a relatively large area.

[0008] The resistance of the second electrode increases according to the position, thereby causing a difference in resistance. Therefore, there is a problem that the brightness of the electroluminescent display device is not uniform due to the difference in resistance. Summary of the invention

[0009] Accordingly, the present disclosure provides an electroluminescent display device and a method of manufacturing the same that substantially obviates one or more of the limitations and disadvantages described above and associated with the background art.

[0010] More specifically, an object of the present disclosure is to provide an electroluminescent display device having uniform brightness.

[0011] Additional features and aspects will be set forth in the following description, and in part will become apparent from the description, or may be learned by practicing the present disclosure provided herein. Other features and aspects of the inventive concept may be realized and obtained by structures specifically pointed out in the written description, or structures that can be derived from the written description and its claims and drawings.

[0012] To achieve these and other aspects of the present disclosure, as embodied and broadly described herein, an electroluminescent display device includes: a substrate provided with sub-pixels including a light-emitting area and a contact area; a light-emitting diode provided in the light-emitting area above the substrate and including a first electrode, a light-emitting layer, and a second electrode; a first auxiliary electrode provided in the contact area above the substrate and connected to the second electrode; and an insulating layer between the first auxiliary electrode and the light-emitting diode and having a contact hole exposing the first auxiliary electrode, wherein the contact hole includes a portion extending in a first direction and a portion extending in a second direction, and an undercut structure exposing a bottom surface of the insulating layer is provided at least on one side of the contact hole, and wherein the light-emitting layer is cut off by the undercut structure, and the second electrode is connected to the first auxiliary electrode below the undercut structure.

[0013] On the other hand, a method for manufacturing an electroluminescent display device includes: forming a first auxiliary electrode over a substrate; forming a first insulating layer having a first contact hole and a second insulating layer having a second contact hole over the first auxiliary electrode; and forming a light-emitting diode over the second insulating layer, the light-emitting diode including a first electrode, a light-emitting layer, and a second electrode, wherein forming the first insulating layer having the first contact hole and the second insulating layer having the second contact hole includes forming an undercut structure exposing a bottom surface of the second insulating layer at least on one side of the second contact hole, wherein each of the first contact hole and the second contact hole includes a portion extending in a first direction and a portion extending in a second direction, and wherein the light-emitting layer is cut off by the undercut structure, and the second electrode is connected to the first auxiliary electrode below the undercut structure.

[0014] It is to be understood that both the foregoing general description and the following detailed description are examples, and are intended to provide further explanation of the inventive concepts as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this application, illustrate various aspects of the disclosure and together with the description serve to explain various principles of the disclosure.

[0016] In the attached picture:

[0017] Figure 1is an example of an equivalent circuit diagram of one sub-pixel SP of an electroluminescent display device according to an embodiment of the present disclosure;

[0018] Figure 2 is a schematic plan view of an electroluminescent display device according to an embodiment of the present disclosure;

[0019] Figure 3 yes Figure 2 A cross-sectional view of the line II' in FIG.

[0020] Figure 4 is a schematic plan view of another electroluminescent display device according to an embodiment of the present disclosure;

[0021] Figure 5 yes Figure 4 A cross-sectional view along line II-II';

[0022] Figure 6 is a schematic plan view of a contact region of an electroluminescent display device according to a first embodiment of the present disclosure;

[0023] Figure 7 is with Figure 6 The cross-sectional view corresponding to the line IIIA-IIIA' and the line IIIB-IIIB';

[0024] FIG. 8A to FIG. 8H is a schematic cross-sectional view of a contact region in a step of manufacturing an electroluminescent display device according to a first embodiment of the present disclosure;

[0025] Fig. 9A and Fig. 9B is a schematic plan view of a contact area of ​​an electroluminescent display device according to a first embodiment of the present disclosure, in which misalignment occurs;

[0026] Fig.10 is a schematic plan view of a contact region of an electroluminescent display device according to a second embodiment of the present disclosure;

[0027] Fig.11 is with Fig.10 The cross-sectional view corresponding to the line IVA-IVA' and the line IVB-IVB';

[0028] FIG. 12A to FIG. 12G is a schematic cross-sectional view of a contact region in a step of manufacturing an electroluminescent display device according to a second embodiment of the present disclosure;

[0029] Fig.13 is a schematic plan view of a contact region of an electroluminescent display device according to a third embodiment of the present disclosure;

[0030] Fig.14 is with Fig.13 The cross-sectional view corresponding to the line VA-VA' and the line VB-VB';

[0031] FIG. 15A to FIG. 15H is a schematic cross-sectional view of a contact region in a step of manufacturing an electroluminescent display device according to a third embodiment of the present disclosure;

[0032] Fig.16 is a schematic plan view of a contact region of an electroluminescent display device according to a fourth embodiment of the present disclosure; and

[0033] Fig.17 is with Fig.16 Cross-sectional views corresponding to line VIA-VIA' and line VIB-VIB' in FIG. DETAILED DESCRIPTION

[0034] The advantages and features of the present disclosure and methods for achieving them will become clear through the embodiments described in detail below with reference to the accompanying drawings. However, the present disclosure can be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein, and the embodiments are provided so that the present disclosure will be comprehensive and complete and will fully convey the scope of the present disclosure to those skilled in the art to which the present disclosure belongs.

[0035] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the accompanying drawings for describing the embodiments of the present disclosure are illustrative, and therefore the present disclosure is not limited to what is shown. Throughout the present disclosure, the same reference numerals refer to the same parts. In addition, in the following description of the present disclosure, when it is determined that the detailed description of the known related art unnecessarily obscures the main points of the present disclosure, its detailed description will be omitted herein or its detailed description may be briefly discussed.

[0036] When terms such as "including", "having", "consisting of", etc. mentioned in the present disclosure are used, other parts may be added unless the term "only" is used herein. In addition, when a component is expressed in the singular, the plural is included unless otherwise specified.

[0037] When analyzing components, error margins are interpreted as being included even in the absence of an explicit description.

[0038] When describing a positional relationship, for example, when the positional relationship of two parts / layers is described as "above", "on", "over", "below", "under", "beside", etc., one or more other parts / layers may be arranged between the two parts / layers, unless the term "immediately" or "directly" is used therewith.

[0039] When describing a time relationship, for example, when describing the time relationship as "after", "subsequently", "next", "before", etc., unless "immediately" or "directly" is used, discontinuous or non-sequential situations may also be included.

[0040] Although the terms first, second, etc. are used to describe various components, these components are not substantially limited by these terms. These terms are only used to distinguish one component from another component and may not limit any order or sequence. Therefore, within the technical spirit of the present disclosure, the first component described below may be substantially the second component.

[0041] The features of the various embodiments of the present disclosure may be partially or completely engaged or combined with each other, various interlocks and drives are technically possible, and each of the embodiments may be implemented independently relative to each other or together in a related relationship.

[0042] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0043] The electroluminescent display device according to an embodiment of the present disclosure includes a plurality of pixels arranged in a matrix form (or any other form) in a display area, and each pixel includes a plurality of sub-pixels. Each sub-pixel has the same or substantially the same configuration as other sub-pixels. Now, reference will be made to Figure 1 One example of a configuration of such sub-pixels of an electroluminescent display device is described, but other configurations are possible.

[0044] Figure 1 is an example of an equivalent circuit diagram of one sub-pixel SP of the electroluminescent display device according to an embodiment of the present disclosure.

[0045] exist Figure 1In the embodiment of the present disclosure, the sub-pixel SP of the electroluminescent display device may include a first transistor T1, a second transistor T2, and a third transistor T3, a storage capacitor Cst, and a light emitting diode De. The first transistor T1, the second transistor T2, and the third transistor T3 may be a switching transistor T1, a driving transistor T2, and a sensing transistor T3, respectively. The switching transistor T1, the driving transistor T2, and the sensing transistor T3 may be n-type transistors. However, the present disclosure is not limited thereto. Alternatively, the switching transistor T1, the driving transistor T2, and the sensing transistor T3 may be p-type transistors or other types of transistors.

[0046] A gate line supplying a scan signal (or gate signal) SCAN and a data line supplying a data signal Vdata may cross each other, and a switch transistor T1 may be disposed at a crossing point of the gate line and the data line. A gate of the switch transistor T1 may be connected to the gate line to receive the gate signal SCAN, and a drain of the switch transistor T1 may be connected to the data line to receive the data signal Vdata.

[0047] In addition, the gate of the driving transistor T2 can be connected to the source of the switching transistor T1 and the first capacitor electrode of the storage capacitor Cst. The drain of the driving transistor T2 can be connected to the high potential line supplying the high potential voltage EVDD, and the source of the driving transistor T2 can be connected to the anode of the light emitting diode De, the second capacitor electrode of the storage capacitor Cst, and the source of the sensing transistor T3.

[0048] The gate of the sensing transistor T3 may be connected to a gate line, and the drain of the sensing transistor T3 may be connected to a reference line supplying a reference voltage Vref. Alternatively, the gate of the sensing transistor T3 may be connected to a separate sensing line.

[0049] Here, the source and drain positions of each of the transistors T1 , T2 , and T3 are not limited thereto, and the positions may be interchanged or changed.

[0050] Meanwhile, the cathode of the light emitting diode De may be connected to a low potential line supplying a low potential voltage EVSS. Alternatively, the cathode of the light emitting diode De may be connected to a ground voltage. As a variation, another type of light emitting element may be used instead of the light emitting diode De.

[0051] During the emission period of one frame, the switching transistor T1 can be switched according to the gate signal SCAN transmitted through the gate line, thereby providing the gate of the driving transistor T2 with the data signal Vdata transmitted through the data line. The driving transistor T2 can be switched according to the data signal Vdata, thereby controlling the current of the light emitting diode De. In this case, the storage capacitor Cst can maintain the charge corresponding to the data signal Vdata for one frame. Therefore, even if the switching transistor T1 is turned off, the storage capacitor Cst can make the amount of current flowing through the light emitting diode De constant, and the grayscale level shown by the light emitting diode De is maintained until the next frame.

[0052] In addition, a frame may also include a sensing period. During the sensing period, the sensing transistor T3 may be switched according to the gate signal SCAN transmitted through the gate line, thereby providing a reference voltage Vref to the source of the driving transistor T2. The sensing transistor T3 may detect a voltage change at the source of the driving transistor T2 through the reference line, and may calculate a threshold voltage Vth of the driving transistor T2 by comparing the voltage change amount with a determined range. Therefore, by calculating the threshold voltage Vth in real time and compensating the image data, changes in the characteristics of the driving transistor T2 may be compensated and image degradation may be prevented.

[0053] However, the configuration of the sub-pixel of the electroluminescent display device according to the embodiment of the present disclosure is not limited thereto. In some embodiments, the sensing transistor T3 may be omitted. In addition, the number and connection relationship of transistors, storage capacitors and / or light emitting diodes may be changed.

[0054] Figure 2 is a schematic plan view of an electroluminescent display device according to an embodiment of the present disclosure, and shows one sub-pixel. The electroluminescent display device according to an embodiment of the present disclosure may be a top emission type display device.

[0055] like Figure 2 As shown, in the electroluminescent display device according to the embodiment of the present disclosure, the gate line GL may extend in a first direction, which is the X direction. A plurality of data lines DL, a first power line PL1, a second power line PL2, and a reference line RL may extend in a second direction, which is the Y direction. The gate line GL may cross the data line DL, the first power line PL1, the second power line PL2, and the reference line RL, thereby defining a plurality of sub-pixels SP1, SP2, SP3, and SP4. Here, the first power line PL1 may be a power supply line. Figure 1 The low potential line of the low potential voltage EVSS in the second power line PL2 can be a supply line. Figure 1 A high potential line of a high potential voltage EVDD.

[0056] The gate line GL may pass through each of the sub-pixels SP1, SP2, SP3, and SP4. However, embodiments of the present disclosure are not limited thereto. Alternatively, the gate line GL may be disposed at the top or bottom of each of the sub-pixels SP1, SP2, SP3, and SP4.

[0057] One reference line RL may be disposed between the first power line PL1 and the second power line PL2, and two data lines DL may be disposed between the first power line PL1 and the reference line RL and between the second power line PL2 and the reference line RL. The two data lines DL may be disposed adjacent to each other at a substantial center between the reference line RL and the first power line PL1 or the second power line PL2.

[0058] Each of the sub-pixels SP1, SP2, SP3, and SP4 may have a substantially rectangular shape. However, embodiments of the present disclosure are not limited thereto, and each of the sub-pixels SP1, SP2, SP3, and SP4 may have other shapes.

[0059] As described above, one pixel may include a plurality of sub-pixels SP1, SP2, SP3, and SP4. For example, one pixel may include four sub-pixels, namely, a first sub-pixel SP1, a second sub-pixel SP2, a third sub-pixel SP3, and a fourth sub-pixel SP4. The first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 may be sequentially arranged along the first direction.

[0060] Here, the first sub-pixel SP1 may be a red sub-pixel, the second sub-pixel SP2 may be a green sub-pixel, the third sub-pixel SP3 may be a blue sub-pixel, and the fourth sub-pixel SP4 may be a white sub-pixel. However, the embodiments of the present disclosure are not limited thereto. In other embodiments, the number of sub-pixels included in one pixel and / or the arrangement order of the red sub-pixel, the green sub-pixel, the blue sub-pixel, and the white sub-pixel may be changed.

[0061] The first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4 may have substantially the same area. However, the embodiments of the present disclosure are not limited thereto. In other embodiments, the first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4 may have different areas from each other.

[0062] Here, one power line PL1 or PL2, two data lines DL, or one reference line RL may be substantially disposed between adjacent sub-pixels SP1, SP2, SP3, and SP4. For example, two data lines DL may be disposed between the first sub-pixel SP1 and the second sub-pixel SP2 and between the third sub-pixel SP3 and the fourth sub-pixel SP4, one reference line RL may be disposed between the second sub-pixel SP2 and the third sub-pixel SP3, and one first power line PL1 may be disposed between the fourth sub-pixel SP4 and the first sub-pixel SP1 of the next pixel. In addition, two pixels adjacent to each other in the first direction may be symmetrical with respect to the first power line PL1 or the second power line PL2. However, embodiments of the present disclosure are not limited thereto.

[0063] In each sub-pixel SP1, SP2, SP3 and SP4, it is possible to set Figure 1 The light emitting diode De, the first transistor T1, the second transistor T2 and the third transistor T3 and the storage capacitor Cst.

[0064] The light emitting diode De may include a first electrode, a light emitting layer, and a second electrode. The first electrode may be disposed at each sub-pixel SP1, SP2, SP3, and SP4. The second electrode may be commonly disposed over all sub-pixels SP1, SP2, SP3, and SP4.

[0065] Meanwhile, the auxiliary electrode AE ​​may be disposed to partially overlap the first power line PL1. The auxiliary electrode AE ​​may be disposed for each pixel, and the auxiliary electrode AE ​​may be disposed to correspond to the fourth sub-pixel SP4.

[0066] The auxiliary electrode AE ​​may be connected to the first power line PL1, and the second electrode of the light emitting diode De may be connected to the auxiliary electrode AE. Therefore, the second electrode of the light emitting diode De may be electrically connected to the first power line PL1 through the auxiliary electrode AE. Therefore, the resistance of the second electrode may be reduced, and the brightness of the electroluminescent display device may be uniform.

[0067] Will refer to Figure 3 A cross-sectional configuration of an electroluminescent display device according to an embodiment of the present disclosure is described.

[0068] Figure 3 yes Figure 2 1 is a cross-sectional view taken along line II' of , and shows a cross section of one sub-pixel.

[0069] exist Figure 3In the embodiment of the present disclosure, the sub-pixel of the electroluminescent display device may include a light emitting area EA and a contact area CA provided on the substrate 100. The light emitting diode De may be provided in the light emitting area EA, and the auxiliary electrodes 172 and 174 may be provided in the contact area CA. The light emitting diode De may include a first electrode 142, a light emitting layer 144, and a second electrode 146. The second electrode 146 may also be provided in the contact area CA, and is electrically connected to the power line 162 through the auxiliary electrodes 172 and 174.

[0070] Specifically, the light blocking layer 152 and the power line 162 may be disposed on the substrate 100. The substrate 100 may be formed of a transparent insulating material, and may be, for example, a glass substrate or a plastic substrate. Polyimide may be used for the plastic substrate, but the embodiment is not limited thereto.

[0071] The light blocking layer 152 may be disposed in the emission area EA, and a portion of the light blocking layer 152 may function as a first capacitor electrode. The power line 162 may be substantially disposed between the emission area EA and the contact area CA. Here, the power line 162 may correspond to Figure 2 The first power line PL1 in the embodiment may be a low potential power line that provides a low potential voltage.

[0072] The light blocking layer 152 may be disposed on the same layer as the power line 162 and have the same material as the power line 162. The light blocking layer 152 and the power line 162 may be formed of a conductive material such as a metal. The light blocking layer 152 and the power line 162 may be formed of one or more of the following: aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W) and their alloys. For example, the light blocking layer 152 and the power line 162 may have a double-layer structure including a lower layer of a molybdenum-titanium alloy (MoTi) and an upper layer of copper (Cu), and the upper layer may have a thickness thicker than the lower layer. However, embodiments of the present disclosure are not limited thereto. In other embodiments, the light blocking layer 152 and the power line 162 may have a single-layer structure or a three-layer structure.

[0073] A buffer layer 111 of an insulating material may be disposed on the light blocking layer 152 and the power line 162. The buffer layer 111 may be disposed over substantially the entire surface of the substrate 100. The buffer layer 111 may have a hole exposing the substrate 100 in the contact area CA. The buffer layer 111 may have a relatively thick thickness.

[0074] The buffer layer 111 may be made of, for example, silicon oxide (SiO 2 ) or silicon nitride (SiN x) and may be formed as a single layer or multiple layers. Alternatively, the buffer layer 111 may be formed of an organic insulating material.

[0075] The first semiconductor layer 122 and the second semiconductor layer 132 may be patterned and disposed on the buffer layer 111. The first semiconductor layer 122 and the second semiconductor layer 132 may be disposed to correspond to the light emitting area EA.

[0076] The first semiconductor layer 122 may overlap with the light blocking layer 152, and the second semiconductor layer 132 may be spaced apart from the light blocking layer 152. The light blocking layer 152 may block light incident on the first semiconductor layer 122 and reduce or prevent the first semiconductor layer 122 from being degraded by light. However, the embodiments of the present disclosure are not limited thereto. In other embodiments, both the first semiconductor layer 122 and the second semiconductor layer 132 may overlap with the light blocking layer 152.

[0077] The first semiconductor layer 122 and the second semiconductor layer 132 may be formed of an oxide semiconductor material.

[0078] Alternatively, the first semiconductor layer 122 and the second semiconductor layer 132 may be formed of polysilicon. In this case, both ends of each of the first semiconductor layer 122 and the second semiconductor layer 132 may be doped with impurities.

[0079] A gate insulating layer 113 of an insulating material may be disposed on the buffer layer 111 having the first and second semiconductor layers 122 and 132 disposed thereon, and a first gate electrode 124 , a second gate electrode 134 , a second capacitor electrode 156 , and a first auxiliary electrode 172 may be disposed on the gate insulating layer 113 .

[0080] The gate insulating layer 113 may be patterned to have substantially the same shape as each of the first gate electrode 124, the second gate electrode 134, the second capacitor electrode 156, and the first auxiliary electrode 172. However, embodiments of the present disclosure are not limited thereto. In other embodiments, the gate insulating layer 113 may be disposed over substantially the entire surface of the substrate 100.

[0081] The gate insulating layer 113 may be made of, for example, silicon oxide (SiO 2 ) or silicon nitride (SiN x ) is formed of an inorganic insulating material. When the first semiconductor layer 122 and the second semiconductor layer 132 are made of an oxide semiconductor material, the gate insulating layer 113 may be made of silicon oxide (SiO 2 )form.

[0082] Alternatively, when the first semiconductor layer 122 and the second semiconductor layer 132 are made of polysilicon, the gate insulating layer 113 may be made of silicon oxide (SiO 2 ) or silicon nitride (SiN x )form.

[0083] The first gate electrode 124 , the second gate electrode 134 , and the second capacitor electrode 156 may be substantially disposed in the emission area EA, and the first auxiliary electrode 172 may be disposed in the contact area CA.

[0084] In this case, the first gate electrode 124 may be disposed to correspond to the center of the first semiconductor layer 122, and the second gate electrode 134 may be disposed to correspond to the center of the second semiconductor layer 132. Therefore, the first gate electrode 124 may overlap the light blocking layer 152, and the second gate electrode 134 may be spaced apart from the light blocking layer 152. Alternatively, when the second semiconductor layer 132 overlaps the light blocking layer 152, the second gate electrode 134 may overlap the light blocking layer 152.

[0085] In addition, the second capacitor electrode 156 may overlap the light blocking layer 152. The light blocking layer 152 and the second capacitor electrode 156 overlapping each other may constitute a storage capacitor Cst with the buffer layer 111 and the gate insulating layer 113 interposed therebetween as dielectrics.

[0086] Meanwhile, the first auxiliary electrode 172 may overlap the power line 162 and contact the power line 162 through a contact hole provided in the gate insulating layer 113 and the buffer layer 111 .

[0087] In addition, the gate insulating layer 113 under the first auxiliary electrode 172 may contact the substrate 100 through the hole in the buffer layer 111 .

[0088] The first gate electrode 124, the second gate electrode 134, the second capacitor electrode 156 and the first auxiliary electrode 172 may be formed of a conductive material such as a metal. The first gate electrode 124, the second gate electrode 134, the second capacitor electrode 156 and the first auxiliary electrode 172 may be formed of one or more of the following: aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W) and their alloys. For example, the first gate electrode 124, the second gate electrode 134, the second capacitor electrode 156 and the first auxiliary electrode 172 may have a double-layer structure including a lower layer of a molybdenum-titanium alloy (MoTi) and an upper layer of copper (Cu), and the upper layer may be thicker than the lower layer. However, the embodiments of the present disclosure are not limited thereto. In other embodiments, the first gate electrode 124, the second gate electrode 134, the second capacitor electrode 156 and the first auxiliary electrode 172 may have a single-layer structure or a three-layer structure.

[0089] A first passivation layer 115 of an insulating material may be disposed on the first gate electrode 124, the second gate electrode 134, the second capacitor electrode 156, and the first auxiliary electrode 172. The first passivation layer 115 may be disposed over substantially the entire surface of the substrate 100. The first passivation layer 115 may be an interlayer insulating layer and may be made of a material such as silicon oxide (SiO 2 ) or silicon nitride (SiN x ) is formed by an inorganic insulating material.

[0090] The first passivation layer 115 may have a contact hole exposing the first auxiliary electrode 172 in the contact area CA.

[0091] The first source electrode 126 and the first drain electrode 128 and the second source electrode 136 and the second drain electrode 138 may be disposed on the first passivation layer 115. The first source electrode 126 and the first drain electrode 128 and the second source electrode 136 and the second drain electrode 138 may be formed of a conductive material such as a metal. The first source electrode 126 and the first drain electrode 128 and the second source electrode 136 and the second drain electrode 138 may be formed of one or more of the following: aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W) and their alloys. For example, the first source electrode 126 and the first drain electrode 128 and the second source electrode 136 and the second drain electrode 138 may have a double-layer structure including a lower layer of a molybdenum-titanium alloy (MoTi) and an upper layer of copper (Cu), and the upper layer may be thicker than the lower layer. However, the embodiments of the present disclosure are not limited thereto. In other embodiments, the first source electrode 126 and the first drain electrode 128 and the second source electrode 136 and the second drain electrode 138 may have a single-layer structure or a three-layer structure.

[0092] The first source electrode 126 and the first drain electrode 128 may be spaced apart from each other, wherein the first gate electrode 124 is located between the first source electrode 126 and the first drain electrode 128, and the first source electrode 126 and the first drain electrode 128 may contact both ends of the first semiconductor layer 122 through a contact hole provided in the first passivation layer 115. In addition, the second source electrode 136 and the second drain electrode 138 may be spaced apart from each other, wherein the second gate electrode 134 is located between the second source electrode 136 and the second drain electrode 138, and the second source electrode 136 and the second drain electrode 138 may contact both ends of the second semiconductor layer 132 through a contact hole provided in the first passivation layer 115.

[0093] The first semiconductor layer 122, the first gate electrode 124, the first source electrode 126, and the first drain electrode 128 may form a first thin film transistor Tr1. The second semiconductor layer 132, the second gate electrode 134, the second source electrode 136, and the second drain electrode 138 may form a second thin film transistor Tr2.

[0094] The first and second thin film transistors Tr1 and Tr2 may have a coplanar structure, wherein the gate electrodes 124 and 134 and the source and drain electrodes 126 , 136 and 128 , 138 may be located on the same side relative to the semiconductor layers 122 and 132 , ie, disposed above the semiconductor layers 122 and 132 .

[0095] Alternatively, the first thin film transistor Tr1 and the second thin film transistor Tr2 may have an inverse staggered structure, in which the gate electrode and the source electrode and the drain electrode may be located on different sides relative to the semiconductor layer. That is, the gate electrode may be disposed below the semiconductor layer, and the source electrode and the drain electrode may be disposed above the semiconductor layer. In this case, the semiconductor layer may be formed of an oxide semiconductor or amorphous silicon.

[0096] The first thin film transistor Tr1 may be Figure 1 The driving transistor T2 in the embodiment, and the second thin film transistor Tr2 may be Figure 1 In addition, at least one thin film transistor (eg, Figure 1 The switching transistor T1 in the embodiment may be further arranged on the substrate 100 .

[0097] Meanwhile, the first and second source electrodes 126 and 136 may contact the light blocking layer 152 through contact holes provided in the first passivation layer 115 and the buffer layer 111. Thus, the first and second thin film transistors Tr1 and Tr2 may be connected to the storage capacitor Cst.

[0098] Next, a second auxiliary electrode 174 may be disposed on the first passivation layer 115 in the contact area CA. The second auxiliary electrode 174 may contact the first auxiliary electrode 172 through a contact hole disposed in the first passivation layer 115. The second auxiliary electrode 174 may have a thickness less than that of the first auxiliary electrode 172.

[0099] The second auxiliary electrode 174 may be formed of a conductive material such as a metal. For example, the second auxiliary electrode 174 may be formed of one or more of the following: molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W) and their alloys. Alternatively, the second auxiliary electrode 174 may be formed of a transparent conductive material. For example, the second auxiliary electrode 174 may be formed of indium tin oxide (ITO) or indium zinc oxide (IZO). The second auxiliary electrode 174 may have a single-layer structure.

[0100] Here, the first auxiliary electrode 172 and the second auxiliary electrode 174 may correspond to Figure 2 The auxiliary electrode AE ​​in the embodiment of the present invention may be omitted, and the second auxiliary electrode 174 may be omitted.

[0101] A second passivation layer 117 of an insulating material may be disposed on the first source electrode 126 and the first drain electrode 128, the second source electrode 136 and the second drain electrode 138, and the second auxiliary electrode 174. The second passivation layer 117 may be disposed over substantially the entire surface of the substrate 100. The second passivation layer 117 may be a protective layer. The second passivation layer 117 may be made of, for example, silicon oxide (SiO 2 ) or silicon nitride (SiN x The second passivation layer 117 may be thicker than the first passivation layer 115 .

[0102] The second passivation layer 117 may have a contact hole exposing the second auxiliary electrode 174 in the contact area CA.

[0103] An overcoat layer 119 of an insulating material may be disposed on the second passivation layer 117. The overcoat layer 119 may be disposed over substantially the entire surface of the substrate 100. The overcoat layer 119 and the second passivation layer 117 may have a contact hole exposing the first source electrode 126 in the emission area EA.

[0104] In addition, the overcoat layer 119 may have contact holes CH corresponding to the first and second auxiliary electrodes 172 and 174 in the contact area CA, and an undercut structure exposing a bottom surface of the overcoat layer 119 may be provided to correspond to the contact holes CH.

[0105] The outer coating 119 may be a planarization layer. The outer coating 119 may be formed of an organic insulating material such as a photosensitive acrylic polymer (photo acrylic). The outer coating 119 may eliminate step differences caused by the layers below it and may have a substantially flat top surface. However, embodiments of the present disclosure are not limited thereto.

[0106] The first electrode 142 may be disposed on the overcoat layer 119 in the emission area EA and may be formed of a conductive material having a relatively high work function. The first electrode 142 may contact the first source electrode 126 through a contact hole disposed in the overcoat layer 119 and the second passivation layer 117 .

[0107] For example, the first electrode 142 may include a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), or include titanium (Ti). However, embodiments of the present disclosure are not limited thereto.

[0108] At the same time, as described above, the electroluminescent display device according to the embodiment of the present disclosure may be a top-emitting display device, in which the light from the light-emitting layer 144 is output in the direction opposite to the substrate 100, that is, output to the outside through the second electrode 146. In this case, the first electrode 142 may have a multilayer structure including a material with a relatively high reflectivity. For example, the first electrode 142 may be formed into a structure with a relatively high reflectivity, such as a three-layer structure of titanium, aluminum and titanium (Ti / Al / Ti), a three-layer structure of indium tin oxide, aluminum and indium tin oxide (ITO / Al / ITO), a three-layer structure of indium tin oxide, silver and indium tin oxide (ITO / Ag / ITO), or a three-layer structure of indium tin oxide, a silver alloy and indium tin oxide (ITO / Ag alloy / ITO). Here, the silver alloy may be a silver-palladium-copper alloy (APC).

[0109] A bank 148 of an organic insulating material may be disposed on the first electrode 142. The bank 148 may overlap with and cover an edge of the first electrode 142. The bank 148 may expose a central portion of the first electrode 142.

[0110] In addition, the bank 148 may have a hole corresponding to the contact area CA.

[0111] Next, the light emitting layer 144 may be disposed on the first electrode 142 exposed by the bank 148. The light emitting layer 144 may be disposed over substantially the entire surface of the substrate 100. Therefore, in the emission area EA, the light emitting layer 144 may be in contact with the first electrode 142, and may also be in contact with the side surface and the top surface of the bank 148.

[0112] Additionally, in the contact area CA, the light emitting layer 144 may contact the top and side surfaces of the overcoat layer 119 and may be separated by the undercut structure. Therefore, the light emitting layer 144 may expose the second auxiliary electrode 174 corresponding to the undercut structure.

[0113] The light emitting layer 144 may emit white light and may include at least one hole auxiliary layer, at least one light emitting material layer, and at least one electron auxiliary layer constituting one light emitting unit. The hole auxiliary layer may include at least one of a hole injection layer (HIL) and a hole transport layer (HTL). The electron auxiliary layer may include at least one of an electron injection layer (EIL) and an electron transport layer (ETL).

[0114] The light emitting layer 144 may have a stack structure in which two or more light emitting units emitting light of different colors are stacked, and a charge generation layer (CGL) may be disposed between the two light emitting units.

[0115] The second electrode 146 of a conductive material having a relatively low work function may be disposed on the light emitting layer 144. The second electrode 146 may be disposed over substantially the entire surface of the substrate 100.

[0116] The second electrode 146 may be formed of aluminum (Al), magnesium (Mg), silver (Ag), or an alloy thereof. In this case, the second electrode 146 may have a relatively thin thickness so that light from the light emitting layer 144 may be transmitted through the second electrode 146. For example, the second electrode 146 may have a thickness of 5 nm to 10 nm, but embodiments of the present disclosure are not limited thereto.

[0117] Alternatively, the second electrode 146 may be formed of a transparent conductive material such as indium gallium oxide (IGO) or IZO.

[0118] The second electrode 146 may contact the top surface of the light emitting layer 144. In the contact area CA, the second electrode 146 may not be separated by the undercut structure and may contact the second auxiliary electrode 174 exposed corresponding to the undercut structure. This will be described in detail later.

[0119] The first electrode 142, the light-emitting layer 144, and the second electrode 146 in the light-emitting region EA may constitute a light-emitting diode De. Here, the first electrode 142 may be used as an anode, and the second electrode 146 may be used as a cathode. However, the embodiments of the present disclosure are not limited thereto. In other embodiments, the first electrode 142 may be used as a cathode, and the second electrode 146 may be used as an anode.

[0120] Although not shown in the figure, a cap layer may be formed on the second electrode 146 over substantially the entire surface of the substrate 100. The cap layer may be formed of an insulating material having a relatively high refractive index. The wavelength of light traveling along the cap layer may be amplified by surface plasmon resonance. Therefore, the intensity of the peak may be increased, thereby improving the light efficiency in the top emission type electroluminescent display device. For example, the cap layer may be formed as a single layer of an organic layer or an inorganic layer, or may be formed as an organic / inorganic stacked layer.

[0121] In addition, although not shown in the figure, an encapsulation layer may be provided on the cap layer. The encapsulation layer may protect the light emitting diode De from external moisture or oxygen. The encapsulation layer may include at least one inorganic layer and at least one organic layer.

[0122] As described above, the electroluminescent display device according to the embodiment of the present disclosure may be a top emission type display device, in which light from the light emitting layer 144 of the light emitting diode De is output toward a direction opposite to the substrate 100, that is, output to the outside through the second electrode 146. Compared with a bottom emission type display device of the same size, the top emission type display device may have a wider light emitting area, which may improve brightness and reduce power consumption.

[0123] Incidentally, in order to transmit light, the second electrode 146 should be formed of a metal material to have a thin thickness or be formed of a transparent conductive material. According to this, the resistance of the second electrode 146 may increase, and there is a difference in resistance depending on the position. Therefore, in an embodiment of the present disclosure, in order to reduce the resistance of the second electrode 146, the second electrode 146 can be electrically connected to the power line 162 through the auxiliary electrodes 172 and 174.

[0124] In this case, the light emitting layer 144 may be disposed between the second electrode 146 and the auxiliary electrodes 172 and 174. Since the light emitting layer 144 has an insulating property and acts as a resistor, contact characteristics between the second electrode 146 and the auxiliary electrodes 172 and 174 may be deteriorated.

[0125] Therefore, in an embodiment of the present disclosure, by forming an undercut structure between the second electrode 146 and the first auxiliary electrode 172 and the second auxiliary electrode 174 in the contact area CA, more specifically, between the light-emitting layer 144 and the first auxiliary electrode 172 and the second auxiliary electrode 174, the light-emitting layer 144 can be separated to expose the second auxiliary electrode 174, and the second electrode 146 can be in direct contact with the exposed second auxiliary electrode 174.

[0126] Therefore, the contact characteristics between the second electrode 146 and the first and second auxiliary electrodes 172 and 174 may be increased, and a difference in resistance of the second electrode 146 may be prevented, so that the brightness of the electroluminescent display device may be uniform.

[0127] Meanwhile, the electroluminescent display device according to an embodiment of the present disclosure may further include a transparent area.

[0128] Figure 4 is a schematic plan view of another electroluminescent display device according to an embodiment of the present disclosure, and shows one sub-pixel. Another electroluminescent display device according to an embodiment of the present disclosure may be a transparent display device including a light emitting region and a transparent region.

[0129] like Figure 4 As shown, in another electroluminescent display device according to an embodiment of the present disclosure, the gate line GL may extend in a first direction, which is the X direction. A plurality of data lines DL, a first power line PL1, a second power line PL2, and a reference line RL may extend in a second direction, which is the Y direction. The gate line GL may cross the data line DL, the first power line PL1, the second power line PL2, and the reference line RL, thereby defining a plurality of sub-pixels SP1, SP2, SP3, and SP4. Here, the first power line PL1 may be a power supply line. Figure 1 The low potential line of the low potential voltage EVSS in the second power line PL2 can be a supply line. Figure 1 A high potential line of a high potential voltage EVDD.

[0130] The gate line GL may be disposed between adjacent sub-pixels SP1, SP2, SP3, and SP4 along the second direction. However, embodiments of the present disclosure are not limited thereto.

[0131] One reference line RL may be disposed between the first power line PL1 and the second power line PL2 , and two data lines DL may be disposed between the first power line PL1 and the reference line RL and between the second power line PL2 and the reference line RL.

[0132] Each of the sub-pixels SP1, SP2, SP3, and SP4 may have a substantially rectangular shape. However, embodiments of the present disclosure are not limited thereto, and each of the sub-pixels SP1, SP2, SP3, and SP4 may have other shapes.

[0133] As described above, one pixel may include a plurality of sub-pixels SP1, SP2, SP3, and SP4. For example, one pixel may include four sub-pixels, namely, a first sub-pixel SP1, a second sub-pixel SP2, a third sub-pixel SP3, and a fourth sub-pixel SP4. The first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 may be arranged in a Pentile shape. That is, the first sub-pixel SP1 and the second sub-pixel SP2 may be disposed adjacent to each other in the first direction, the third sub-pixel SP3 and the fourth sub-pixel SP4 may be disposed adjacent to each other in the first direction, the first sub-pixel SP1 and the third sub-pixel SP3 may be disposed adjacent to each other in the second direction, and the second sub-pixel SP2 and the fourth sub-pixel SP4 may be disposed adjacent to each other in the second direction.

[0134] Here, the first sub-pixel SP1 may be a green sub-pixel, the second sub-pixel SP2 may be a white sub-pixel, the third sub-pixel SP3 may be a blue sub-pixel, and the fourth sub-pixel SP4 may be a red sub-pixel. However, the embodiments of the present disclosure are not limited thereto. In other embodiments, the arrangement order of the red sub-pixel, the green sub-pixel, the blue sub-pixel, and the white sub-pixel may be changed.

[0135] The first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 may have substantially the same area. However, embodiments of the present disclosure are not limited thereto. In other embodiments, at least one of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 may have an area different from that of the other sub-pixels. Alternatively, the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 may have areas different from each other.

[0136] Each of the first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4 may include a light emitting area EA and a transparent area TA. The light emitting areas EA of the first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4 may be disposed adjacent to each other. Therefore, the light emitting area EA of the first subpixel SP1 and the second subpixel SP2 may be disposed between the transparent areas TA of the first subpixel SP1 and the second subpixel SP2, and the light emitting areas EA of the third subpixel SP3 and the fourth subpixel SP4 may be disposed between the transparent areas TA of the third subpixel SP3 and the fourth subpixel SP4.

[0137] Here, the data line DL, the first power line PL1, and the second power line PL2 may be disposed to correspond to the emission areas EA of the first subpixel SP1, the second subpixel SP2, the third subpixel SP3, and the fourth subpixel SP4. The reference line RL may be disposed between the first subpixel SP1 and the second subpixel SP2 and between the third subpixel SP3 and the fourth subpixel SP4.

[0138] In each sub-pixel SP1, SP2, SP3 and SP4, it is possible to set Figure 1 The light emitting diode De, the first transistor T1, the second transistor T2 and the third transistor T3 and the storage capacitor Cst.

[0139] The light emitting diode De may include a first electrode, a light emitting layer, and a second electrode. The first electrode may be disposed at each sub-pixel SP1, SP2, SP3, and SP4. The second electrode may be disposed collectively over all sub-pixels SP1, SP2, SP3, and SP4. Here, the first electrode of each sub-pixel SP1, SP2, SP3, and SP4 may include two electrode patterns.

[0140] Meanwhile, the auxiliary electrode AE ​​may be disposed to partially overlap the first power line PL1. The auxiliary electrode AE ​​may extend substantially in the first direction, and one end of the auxiliary electrode AE ​​may overlap the first power line PL1. The auxiliary electrode AE ​​may be disposed for each pixel, and the auxiliary electrode AE ​​may be disposed to correspond to the transparent area TA of the fourth subpixel SP4.

[0141] The auxiliary electrode AE ​​may be connected to the first power line PL1, and the second electrode of the light emitting diode De may be connected to the auxiliary electrode AE. Therefore, the second electrode of the light emitting diode De may be electrically connected to the first power line PL1 through the auxiliary electrode AE. Therefore, the resistance of the second electrode may be reduced, and the brightness of the electroluminescent display device may be uniform.

[0142] Will refer to Figure 5 A cross-sectional configuration of another electroluminescent display device according to an embodiment of the present disclosure is described.

[0143] Figure 5 yes Figure 4 , and shows a cross-sectional view of a sub-pixel. In addition to the transparent area, the first electrode and the connecting electrode, another electroluminescent display device according to an embodiment of the present disclosure has Figure 3 The configuration of the previous embodiment is substantially the same as that of the previous embodiment. The same components as those of the previous embodiment are denoted by the same reference numerals, and the description of the same components may be shortened or omitted.

[0144] exist Figure 5 , a sub-pixel of another electroluminescent display device according to an embodiment of the present disclosure may include a light emitting area EA, a transparent area TA, and a contact area CA disposed on a substrate 100. A light emitting diode De may be disposed in the light emitting area EA, and auxiliary electrodes 172 and 174 may be disposed in the contact area CA. The light emitting diode De may include a first electrode 142, a light emitting layer 144, and a second electrode 146, and the second electrode 146 may be electrically connected to a power line 162 through the auxiliary electrodes 172 and 174.

[0145] Specifically, the light blocking layer 152 , the power line 162 , the data line 166 , and the first capacitor electrode 154 may be disposed on the substrate 100 .

[0146] The light blocking layer 152, the power line 162, the data line 166, and the first capacitor electrode 154 may be disposed in the emission area EA. Here, the first capacitor electrode 154 may be connected to the light blocking layer 152. In addition, the power line 162 may correspond to Figure 2 The first power line PL1 in the embodiment may be a low potential power line that provides a low potential voltage.

[0147] At the same time, according to Figure 4 Line II-II' in FIG. 1, a portion of the power line 162 and the data line 166 may also be disposed between the transparent area TA and the light blocking layer 152, but for ease of explanation, it may be Figure 5 Omitted in .

[0148] A buffer layer 111 of an insulating material may be disposed on the light blocking layer 152, the power line 162, the data line 166, and the first capacitor electrode 154. The buffer layer 111 may be disposed over substantially the entire surface of the substrate 100.

[0149] The first semiconductor layer 122 and the second semiconductor layer 132 may be patterned and disposed on the buffer layer 111. The first semiconductor layer 122 and the second semiconductor layer 132 may be disposed to correspond to the light emitting area EA.

[0150] The first semiconductor layer 122 and the second semiconductor layer 132 may overlap the light blocking layer 152. However, the embodiments of the present disclosure are not limited thereto. In other embodiments, the first semiconductor layer 122 may overlap the light blocking layer 152, and the second semiconductor layer 132 may be spaced apart from the light blocking layer 152.

[0151] A gate insulating layer 113 of an insulating material may be disposed on the buffer layer 111 on which the first semiconductor layer 122 and the second semiconductor layer 132 are disposed. A first gate electrode 124, a first source electrode 126, a first drain electrode 128, a second source / drain electrode 137, a second capacitor electrode 156, and a first auxiliary electrode 172 may be disposed on the gate insulating layer 113. In addition, although not shown in the drawings, a second gate electrode may be disposed on the gate insulating layer 113.

[0152] The gate insulating layer 113 may be patterned to have substantially the same shape as each of the first gate electrode 124, the first source electrode 126, the first drain electrode 128, the second source / drain electrode 137, the second capacitor electrode 156, and the first auxiliary electrode 172. However, embodiments of the present disclosure are not limited thereto. In other embodiments, the gate insulating layer 113 may be disposed over substantially the entire surface of the substrate 100.

[0153] The first gate electrode 124 , the first source electrode 126 , the first drain electrode 128 , the second source / drain electrode 137 , and the second capacitor electrode 156 may be disposed in the emission area EA, and the first auxiliary electrode 172 may be disposed in the contact area CA.

[0154] In this case, the first gate electrode 124 may correspond to the center of the first semiconductor layer 122 and may be disposed between the first source electrode 126 and the first drain electrode 128. The first source electrode 126 and the first drain electrode 128 may be disposed to correspond to both ends of the first semiconductor layer 122 and may contact both ends of the first semiconductor layer 122 through contact holes disposed in the gate insulating layer 113, respectively.

[0155] Although not shown in the figure, the second gate electrode may be disposed to correspond to the center of the second semiconductor layer 132. The second source / drain electrode 137 may be disposed to the end of the second semiconductor layer 132 and may contact the end of the semiconductor layer 132 through the contact hole of the gate insulating layer 113.

[0156] In addition, the second capacitor electrode 156 may overlap the first capacitor electrode 154. The first and second capacitor electrodes 154 and 156 overlapping each other may constitute a storage capacitor Cst with the buffer layer 111 and the gate insulating layer 113 interposed therebetween as a dielectric.

[0157] A semiconductor pattern may be disposed between the first capacitor electrode 154 and the second capacitor electrode 156. The semiconductor pattern may be formed of the same material as the first semiconductor layer 122 and the second semiconductor layer 132 and may be formed on the same layer as the first semiconductor layer 122 and the second semiconductor layer 132. That is, the semiconductor pattern may overlap the first capacitor electrode 154 and the second capacitor electrode 156 and may be located between the buffer layer 111 and the gate insulating layer 113.

[0158] Meanwhile, the first auxiliary electrode 172 may overlap the power line 162 and contact the power line 162 through a contact hole provided in the gate insulating layer 113 and the buffer layer 111 .

[0159] In addition, the gate insulating layer 113 under the first auxiliary electrode 172 may contact the substrate 100 through the hole in the buffer layer 111 .

[0160] The first semiconductor layer 122, the first gate electrode 124, the first source electrode 126, and the first drain electrode 128 may form a first thin film transistor Tr1. The second semiconductor layer 132, the second gate electrode, and the second source / second drain electrodes 137 may form a second thin film transistor Tr2.

[0161] The first thin film transistor Tr1 may be Figure 1 The driving transistor T2 in the embodiment, and the second thin film transistor Tr2 may be Figure 1 Meanwhile, at least one thin film transistor having substantially the same structure as the first thin film transistor Tr1 and the second thin film transistor Tr2 may be further disposed on the substrate 100 .

[0162] Here, the first source electrode 126 may contact the light blocking layer 152 through a contact hole provided in the gate insulating layer 113 and the buffer layer 111 .

[0163] A first passivation layer 115 of an insulating material may be disposed on the first gate electrode 124, the first source electrode 126, the first drain electrode 128, the second source / drain electrode 137, the second capacitor electrode 156, and the first auxiliary electrode 172. The first passivation layer 115 may be disposed over substantially the entire surface of the substrate 100. The first passivation layer 115 may be an interlayer insulating layer and may be made of a material such as silicon oxide (SiO 2 ) or silicon nitride (SiN x ) is formed by an inorganic insulating material.

[0164] The first passivation layer 115 may have a contact hole exposing the first source electrode 126 in the emission area EA, and may have a contact hole exposing the first auxiliary electrode 172 in the contact area CA.

[0165] A connection electrode 184 and a second auxiliary electrode 174 may be disposed on the first passivation layer 115. The connection electrode 184 may be disposed in the emission area EA, and the second auxiliary electrode 174 may be disposed in the contact area CA. In the emission area EA, the connection electrode 184 may contact the first source electrode 126 through a contact hole disposed in the first passivation layer 115. In the contact area CA, the second auxiliary electrode 174 may contact the first auxiliary electrode 172 through a contact hole disposed in the first passivation layer 115. The thickness of the second auxiliary electrode 174 may be less than that of the first auxiliary electrode 172.

[0166] Here, the first auxiliary electrode 172 and the second auxiliary electrode 174 may correspond to Figure 4 The auxiliary electrode AE ​​in the embodiment of the present invention may be omitted, and the second auxiliary electrode 174 may be omitted.

[0167] The connection electrode 184 and the second auxiliary electrode 174 may be formed of a conductive material such as metal. Alternatively, the connection electrode 184 and the second auxiliary electrode 174 may be formed of a transparent conductive material.

[0168] A second passivation layer 117 of an insulating material may be disposed on the connection electrode 184 and the second auxiliary electrode 174. The second passivation layer 117 may be disposed over substantially the entire surface of the substrate 100. The second passivation layer 117 may be a protective layer. The second passivation layer 117 may be made of, for example, silicon oxide (SiO 2 ) or silicon nitride (SiN x The second passivation layer 117 may be thicker than the first passivation layer 115 .

[0169] The second passivation layer 117 may have a contact hole exposing the second auxiliary electrode 174 in the contact area CA.

[0170] An overcoat layer 119 of an insulating material may be disposed on the second passivation layer 117. The overcoat layer 119 may be substantially disposed in the emission area EA, and may be removed in the transparent area TA, thereby exposing the second passivation layer 117 in the transparent area TA. The overcoat layer 119 and the second passivation layer 117 may have a contact hole exposing the connection electrode 184 in the emission area EA. The contact hole exposing the connection electrode 184 may be spaced apart from the contact hole exposing the first source electrode 126.

[0171] In addition, the overcoat layer 119 may have contact holes CH corresponding to the first and second auxiliary electrodes 172 and 174 in the contact area CA, and an undercut structure in which a bottom surface of the overcoat layer 119 is exposed may be provided to correspond to the contact holes CH.

[0172] The first electrode 142 may be disposed on the overcoat layer 119 in the emission area EA, and may be formed of a conductive material having a relatively high work function.

[0173] For example, the first electrode 142 may include a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), or include titanium (Ti). However, embodiments of the present disclosure are not limited thereto.

[0174] Meanwhile, as described above, the electroluminescent display device according to the embodiment of the present disclosure may be a top emission type display device in which light from the light emitting layer 144 is output in a direction opposite to the substrate 100, that is, output to the outside through the second electrode 146. In this case, the first electrode 142 may have a multilayer structure including a material having a relatively high reflectivity.

[0175] The first electrode 142 may be divided into two patterns. That is, the first electrode 142 may include a first electrode pattern 142a and a second electrode pattern 142b. The first electrode pattern 142a may contact a first end of the connection electrode 184 through a contact hole provided in the outer coating 119 and the second passivation layer 117. In addition, although not shown in the figure, the second electrode pattern 142b may contact a second end of the connection electrode 184 through another contact hole provided in the outer coating 119 and the second passivation layer 117. Therefore, the first electrode pattern 142a and the second electrode pattern 142b may be electrically connected to the first source electrode 126 through the connection electrode 184.

[0176] The first electrode pattern 142a and the second electrode pattern 142b can minimize the degradation of image quality by allowing partial light emission through repair when a defect occurs. Specifically, when a defect occurs in a portion corresponding to the first electrode pattern 142a during a manufacturing process or during operation, a laser can be used to cut off the first end of the connection electrode 184 connected to the first electrode pattern 142a. Therefore, although light is not emitted in the portion corresponding to the first electrode pattern 142a, light can be emitted in the portion corresponding to the second electrode pattern 142b, thereby preventing a defect in which the entire sub-pixel does not emit light.

[0177] A bank 148 of an organic insulating material may be provided on the first electrode 142. The bank 148 may overlap with and cover an edge of each of the first and second electrode patterns 142a and 142b. The bank 148 may expose a central portion of each of the first and second electrode patterns 142a and 142b.

[0178] The bank 148 may not be provided in the transparent area TA and the contact area CA. In this case, the bank 148 may have a hole corresponding to the contact area CA.

[0179] Next, the light emitting layer 144 may be disposed on the first electrode 142 exposed by the bank 148, that is, on the first electrode pattern 142a and the second electrode pattern 142b. The light emitting layer 144 may be disposed over substantially the entire surface of the substrate 100. Therefore, in the light emitting area EA, the light emitting layer 144 may be in contact with the first electrode pattern 142a and the second electrode pattern 142b, and may also be in contact with the side surface and the top surface of the bank 148.

[0180] Additionally, in the contact area CA, the light emitting layer 144 may contact the top and side surfaces of the overcoat layer 119 and may be separated by the undercut structure. Therefore, the light emitting layer 144 may expose the second auxiliary electrode 174 corresponding to the undercut structure.

[0181] Meanwhile, the light emitting layer 144 may also be disposed in the transparent area TA. In the transparent area TA, the light emitting layer 144 may be in contact with the top surface of the second passivation layer 117 .

[0182] The light emitting layer 144 may emit white light and may include at least one hole auxiliary layer, at least one light emitting material layer, and at least one electron auxiliary layer constituting one light emitting unit. The hole auxiliary layer may include at least one of a hole injection layer (HIL) and a hole transport layer (HTL). The electron auxiliary layer may include at least one of an electron injection layer (EIL) and an electron transport layer (ETL).

[0183] The light emitting layer 144 may have a stack structure in which two or more light emitting units emitting light of different colors are stacked, and a charge generation layer (CGL) may be disposed between the two light emitting units.

[0184] The second electrode 146 of a conductive material having a relatively low work function may be disposed on the light emitting layer 144. The second electrode 146 may be disposed over substantially the entire surface of the substrate 100.

[0185] The second electrode 146 may be formed of aluminum (Al), magnesium (Mg), silver (Ag), or an alloy thereof. In this case, the second electrode 146 may have a relatively thin thickness so that light from the light emitting layer 144 may be transmitted through the second electrode 146. For example, the second electrode 146 may have a thickness of 5 nm to 10 nm, but embodiments of the present disclosure are not limited thereto.

[0186] Alternatively, the second electrode 146 may be formed of a transparent conductive material such as IGO or IZO.

[0187] The second electrode 146 may contact the top surface of the light emitting layer 144. In the contact area CA, the second electrode 146 may not be separated by the undercut structure and may contact the second auxiliary electrode 174 exposed corresponding to the undercut structure. This will be described in detail later.

[0188] The first electrode 142, the light emitting layer 144, and the second electrode 146 of the light emitting area EA may constitute a light emitting diode De. Here, the first electrode 142 may serve as an anode, and the second electrode 146 may serve as a cathode. However, embodiments of the present disclosure are not limited thereto.

[0189] Meanwhile, although not shown in the drawings, a capping layer and an encapsulation layer may be sequentially formed on the second electrode 146 and disposed over substantially the entire surface of the substrate 100 .

[0190] Therefore, in another electroluminescent display device according to an embodiment of the present disclosure, each subpixel may include a light-emitting area EA and a transparent area TA, so that while a color image is displayed through the light-emitting area EA, surrounding environment information such as the background can be shown together through the transparent area TA.

[0191] In addition, by forming an undercut structure in the contact area CA, the light emitting layer 144 can be separated, the second auxiliary electrode 174 can be exposed, and the second electrode 146 can be in direct contact with the exposed second auxiliary electrode 174, so that the contact characteristics between the second electrode 146 and the first auxiliary electrode 172 and the second auxiliary electrode 174 can be increased. Therefore, the difference in the resistance of the second electrode 146 can be prevented, so that the brightness of the electroluminescent display device can be made uniform.

[0192] The configuration of the contact region according to the embodiment of the present disclosure will be described in more detail with reference to the accompanying drawings.

[0193] Figure 6 is a schematic plan view of a contact region of an electroluminescent display device according to a first embodiment of the present disclosure, and Figure 7 is with Figure 6 Cross-sectional views corresponding to line IIIA-IIIA' and line IIIB-IIIB' in FIG.

[0194] like Figure 6 and Figure 7As shown, in the electroluminescent display device according to the first embodiment of the present disclosure, the buffer layer 111 may have a relatively deep buffer hole 111a, the outer coating layer 119 may have a cross-shaped contact hole 119a in a plane (i.e., in a plan view), and the second passivation layer 117 as an insulating layer above the first auxiliary electrode 172 and the second auxiliary electrode 174 may have a plurality of roughly L-shaped undercut structures in a plane.

[0195] Specifically, the buffer layer 111 may be disposed on the substrate 100. The buffer layer 111 may have a relatively thick thickness. For example, the thickness of the buffer layer 111 may be greater than and is less than

[0196] The buffer layer 111 may have a buffer hole 111a exposing the substrate 100. The depth of the buffer hole 111a may be equal to the thickness of the buffer layer 111. The width of the buffer hole 111a may be smaller than the depth.

[0197] The gate insulating layer 113 and the first auxiliary electrode 172 may be sequentially disposed on the buffer layer 111. The gate insulating layer 113 may have the same shape as the first auxiliary electrode 172.

[0198] The gate insulating layer 113 and the first auxiliary electrode 172 may overlap the buffer hole 111a of the buffer layer 111. The gate insulating layer 113 and the first auxiliary electrode 172 may be formed along the top surface and the side surface of the buffer layer 111 corresponding to the buffer hole 111a. The gate insulating layer 113 may contact the top surface and the side surface of the buffer layer 111, and may also contact the substrate 100 in the buffer hole 111a. Therefore, due to the buffer hole 111a, a relatively deep and narrow hole may be provided along the surface of the first auxiliary electrode 172.

[0199] The first passivation layer 115 may be disposed on the first auxiliary electrode 172. The first passivation layer 115 may have a first contact hole 115a exposing a top surface of the first auxiliary electrode 172. The first contact hole 115a may have a larger area than the buffer hole 111a, and the buffer hole 111a may be disposed in the first contact hole 115a. The buffer hole 111a may not overlap with the first passivation layer 115, and may be spaced apart from the first passivation layer 115 on a plane.

[0200] The second auxiliary electrode 174 may be disposed on the first passivation layer 115. The second auxiliary electrode 174 may contact the first auxiliary electrode 172 exposed through the first contact hole 115a. The second auxiliary electrode 174 may have substantially the same shape and the same area as the first auxiliary electrode 172. The second auxiliary electrode 174 may overlap the buffer hole 111a and may be formed along the top surface and the side surface of the buffer layer 111 corresponding to the buffer hole 111a. Therefore, due to the buffer hole 111a, a relatively deep and narrow hole may be provided along the surface of the second auxiliary electrode 174.

[0201] The second auxiliary electrode 174 may be omitted.

[0202] The second passivation layer 117 may be disposed on the second auxiliary electrode 174. The second passivation layer 117 may have a second contact hole 117a exposing the second auxiliary electrode 174.

[0203] The second contact hole 117a may include a portion extending in the first direction as the X direction and a portion extending in the second direction as the Y direction, thereby having a cross shape in plane, and may be disposed in the first contact hole 115a. In addition, the second contact hole 117a may have a smaller area than the buffer hole 111a, and may be disposed in the buffer hole 111a. The second contact hole 117a may not overlap the buffer layer 111 and the first passivation layer 115, and may be spaced apart from the buffer layer 111 and the first passivation layer 115 in plane.

[0204] An overcoat layer 119 may be disposed on the second passivation layer 117. The overcoat layer 119 may have a substantially flat top surface and have a third contact hole 119a exposing the second passivation layer 117 and the second auxiliary electrode 174.

[0205] The third contact hole 119a may include a portion extending in the first direction and a portion extending in the second direction, thereby having a cross shape in plane. The third contact hole 119a may be substantially disposed in the buffer hole 111a, and each end of the third contact hole 119a may overlap the buffer layer 111.

[0206] In addition, the third contact hole 119a may have a smaller area than the first contact hole 115a and may be disposed in the first contact hole 115a. The third contact hole 119a may not overlap the first passivation layer 115 and may be spaced apart from the first passivation layer 115 in plane.

[0207] Meanwhile, the length of the cross-shaped third contact hole 119a may be greater than the length of the cross-shaped second contact hole 117a, and the width of the cross-shaped third contact hole 119a may be less than the width of the cross-shaped second contact hole 117a. Specifically, the length of the portion of the third contact hole 119a extending in the first direction may be greater than the length of the portion of the second contact hole 117a extending in the first direction, and the width of the portion of the third contact hole 119a extending in the first direction may be less than the width of the portion of the second contact hole 117a extending in the first direction. In addition, the length of the portion of the third contact hole 119a extending in the second direction may be greater than the length of the portion of the second contact hole 117a extending in the second direction, and the width of the portion of the third contact hole 119a extending in the second direction may be less than the width of the portion of the second contact hole 117a extending in the second direction.

[0208] Each end portion of the cross-shaped third contact hole 119 a may overlap the second passivation layer 117 , and other portions of the cross-shaped third contact hole 119 a except for the end portions may be spaced apart from the second passivation layer 117 .

[0209] Therefore, an undercut structure exposing the bottom surface of the outer coating layer 119 may be provided between the third contact hole 119a and the second passivation layer 117 spaced apart from each other. The undercut structure may be provided to each corner of the cross-shaped third contact hole 119a. The cross-shaped third contact hole 119a may have an L-shaped side surface corresponding to each corner. For example, the cross-shaped third contact hole 119a may have four L-shaped sides. The undercut structure may be provided to correspond to each L-shaped side surface, thereby having an L-shaped shape on a plane. Four undercut structures may be provided to correspond to the third contact hole 119a.

[0210] The bank 148 may be disposed on the overcoat layer 119. The bank 148 may have a bank hole 148a corresponding to the second contact hole 117a and the third contact hole 119a. The bank hole 148a may have a larger area than the second contact hole 117a and the third contact hole 119a, and the second contact hole 117a and the third contact hole 119a may be disposed in the bank hole 148a. The top surfaces of the second passivation layer 117 and the overcoat layer 119 may be exposed through the bank hole 148a.

[0211] In addition, the bank hole 148a may have an area larger than the buffer hole 111a and smaller than the first contact hole 115a. That is, the width and length of the bank hole 148a may be larger than the width and length of the buffer hole 111a, and smaller than the width and length of the first contact hole 115a. The bank hole 148a may be disposed in the first contact hole 115a, and the buffer hole 111a may be disposed in the bank hole 148a. The bank hole 148a may be spaced apart from the first passivation layer 115.

[0212] The light emitting layer 144 and the second electrode 146 may be sequentially disposed on the bank 148. The light emitting layer 144 and the second electrode 146 may be formed over substantially the entire surface of the substrate 100. The light emitting layer 144 and the second electrode 146 may cover the top and side surfaces of the bank 148, and also cover the top and side surfaces of the overcoat layer 119 exposed through the bank hole 148a. In addition, the light emitting layer 144 and the second electrode 146 may cover the top and side surfaces of the second passivation layer 117 exposed through the second contact hole 119a. The light emitting layer 144 may be in contact with the top and side surfaces of the bank 148, in contact with the top and side surfaces of the overcoat layer 119, and in contact with the top and side surfaces of the second passivation layer 117.

[0213] The light emitting layer 144 may be formed by a thermal evaporation method having a relatively low step coverage characteristic. Therefore, at the side surface of the overcoat layer 119 corresponding to the undercut structure, the light emitting layer 144 may have a thickness that decreases as it approaches or becomes closer to the substrate 100, and then is cut off by the undercut structure. Therefore, the top surface of the second auxiliary electrode 174 corresponding to the undercut structure may be exposed.

[0214] In addition, the light emitting layer 144 may be separated by the buffer hole 111a. That is, corresponding to the buffer hole 111a, the light emitting layer 144 may be formed on the second auxiliary electrode 174 corresponding to the bottom of the relatively deep and narrow buffer hole 111a, and may not be formed on the second auxiliary electrode 174 corresponding to the sidewall of the buffer hole 111a. Therefore, the second auxiliary electrode 174 corresponding to the sidewall of the buffer hole 111a may be exposed.

[0215] On the other hand, the second electrode 146 may be formed by a sputtering method having a relatively high step coverage characteristic. The second electrode 146 may not be cut off by the undercut structure. In addition, the second electrode 146 may not be separated by the buffer hole 111a and may be formed along the sidewall and bottom of the buffer hole 111a.

[0216] Therefore, the second electrode 146 may contact the top surface of the second auxiliary electrode 174 exposed corresponding to the undercut structure and contact the second auxiliary electrode 174 exposed at the sidewall of the buffer hole 111 a to be electrically connected to the first auxiliary electrode 172 through the second auxiliary electrode 174 .

[0217] Accordingly, in the electroluminescent display device according to the first embodiment of the present disclosure, the third contact hole 119a of the outer coating 119 may be configured to have a cross shape in a plane, the undercut structure may be provided corresponding to the third contact hole 119a, and the light-emitting layer 144 may be separated by the undercut structure such that the second electrode 146 may be in direct contact with the second auxiliary electrode 174. Accordingly, the contact area between the second electrode 146 and the second auxiliary electrode 174 may be increased, thereby improving the contact characteristics between the second electrode 146 and the second auxiliary electrode 174.

[0218] In this case, even if misalignment occurs between the upper layer and the lower layer during the manufacturing process, the undercut structure may be provided corresponding to the third contact hole 119a having a cross shape in a plane such that the second electrode 146 may be in contact with the second auxiliary electrode 174.

[0219] In addition, the buffer layer 111 may be configured to have a relatively thick thickness, thereby providing relatively deep and narrow buffer holes 111a. The light-emitting layer 144 may be separated by the buffer holes 111a such that the second electrode 146 may be in direct contact with the second auxiliary electrode 174. Accordingly, the contact area between the second electrode 146 and the second auxiliary electrode 174 may be further increased. In this case, the thickness of the buffer layer 111 may be greater than the total thickness of the first passivation layer 115 and the second passivation layer 117, and may be equal to or less than the thickness of the outer coating 119.

[0220] Meanwhile, it is shown that the buffer holes 111a, the bank holes 148a, and the first contact holes 115a have a square shape in a plane, and the second contact holes 117a and the third contact holes 119a have substantially the same length in a first direction and a second direction. However, the embodiments of the present disclosure are not limited thereto. In other embodiments, the buffer holes 111a, the bank holes 148a, and the first contact holes 115a may have a rectangular shape in a plane, and the second contact holes 117a and the third contact holes 119a may have different lengths in the first direction and the second direction.

[0221] Reference will be made to FIG. 8A to FIG. 8H A method of manufacturing an electroluminescent display device according to the first embodiment of the present disclosure will be described in detail.

[0222] FIG. 8A to FIG. 8H FIG. is a schematic cross-sectional view of a contact area in the steps of manufacturing an electroluminescent display device according to the first embodiment of the present disclosure, and will be described together with Figure 5 FIG.

[0223] First, on Figure 5 and Fig. 8AIn the embodiment, a light blocking layer 152, a power line 162, a data line 166, and a first capacitor electrode 154 may be formed on a substrate 100 by depositing a conductive material and patterning it by a photolithography process. Then, a buffer layer 111 may be formed on the light blocking layer 152, the power line 162, the data line 166, and the first capacitor electrode 154 by depositing an inorganic insulating material over substantially the entire surface of the substrate 100, and the buffer layer 111 may be patterned by a photolithography process to form a buffer hole 111a.

[0224] Here, the photolithography process may include the steps of applying a photoresist on a thin film to be patterned, exposing and developing the photoresist, etching the thin film, and stripping the photoresist. The etching step may be performed by a wet etching process using an etchant or a dry etching process using a gas. When the thin film to be patterned is formed of a material having photosensitivity, only the exposure and development steps may be performed without the steps of applying a photoresist and etching the thin film.

[0225] Next, in Figure 5 and Figure 8B In the present invention, a first semiconductor layer 122 and a second semiconductor layer 132 can be formed on the buffer layer 111 by depositing a semiconductor material and patterning it by a photolithography process, and a gate insulating layer 113 can be formed on the buffer layer 111 on which the first semiconductor layer 122 and the second semiconductor layer 132 are disposed by depositing an inorganic insulating material over substantially the entire surface of the substrate 100.

[0226] Then, expose Figure 5 The contact holes of the first semiconductor layer 122 and the second semiconductor layer 132 can be formed by patterning the gate insulating layer 113 through a photolithography process, and respectively exposing Figure 5 The contact holes of the electric force line 162 and the light blocking layer 152 may be formed by patterning the gate insulating layer 113 and the buffer layer 111 through a photolithography process. The gate insulating layer 113 may contact the substrate 100 through the buffer hole 111a.

[0227] Next, a first auxiliary electrode 172 may be formed on the gate insulating layer 113 by depositing a conductive material and patterning it by a photolithography process. At this time, the gate insulating layer 113 may also be patterned to have the same shape as the first auxiliary electrode 172. The first auxiliary electrode 172 and the gate insulating layer 113 may overlap the buffer hole 111a and may be formed along a step difference caused by the buffer hole 111a. As shown in the figure, the first auxiliary electrode 172 may have an inclined surface due to at least one structure such as the buffer hole 111a.

[0228] Here, the first auxiliary electrode 172 and the gate insulating layer 113 may be patterned by a dry etching process. Alternatively, the first auxiliary electrode 172 may be patterned by a wet etching process, and the gate insulating layer 113 may be patterned by a dry etching process. However, embodiments of the present disclosure are not limited thereto.

[0229] at the same time, Figure 5 The first gate electrode 124 , the first source electrode 126 , the first drain electrode 128 , the second source / drain electrode 137 , and the second capacitor electrode 156 in the embodiment may also be formed together with the first auxiliary electrode 172 .

[0230] Next, in Figure 5 and Figure 8C In the embodiment, the first passivation layer 115 may be formed on the first auxiliary electrode 172 by depositing an inorganic insulating material, and the first passivation layer 115 may be patterned by a photolithography process to form a first contact hole 115a exposing the first auxiliary electrode 172. Figure 5 A contact hole for the first source electrode 126 in FIG. 1 may also be formed together with the first contact hole 115 a.

[0231] Then, the second auxiliary electrode 174 may be formed on the first passivation layer 115 by depositing a conductive material and patterning it through a photolithography process. Figure 5 The connecting electrode 184 in FIG. 1 may also be formed together with the second auxiliary electrode 174 .

[0232] The second auxiliary electrode 174 may overlap the first auxiliary electrode 172 and contact the first auxiliary electrode 172 through the first contact hole 115a. In addition, the second auxiliary electrode 174 may overlap the buffer hole 111a and may be formed along a step difference caused by the buffer hole 111a.

[0233] Next, in Figure 5 and Fig.8D In the process, a second passivation layer 117 can be formed on the second auxiliary electrode 174 by depositing an inorganic insulating material, an outer coating layer 119 can be formed on the second passivation layer 117 by applying an organic insulating material, and the outer coating layer 119 can be patterned by a photolithography process to form a third contact hole 119a exposing the second passivation layer 117.

[0234] The third contact hole 119a may have a smaller area than the first contact hole 115a and may be disposed in the first contact hole 115a. In addition, the width of the third contact hole 119a in one direction may be greater than the width of the buffer hole 111a in the one direction, and the width of the third contact hole 119a in another direction may be less than the width of the buffer hole 111a in the other direction. That is, Figure 6 As shown, the third contact hole 119a may have a cross shape in a plane. Therefore, the one direction may correspond to the first direction or the second direction, and the other direction may correspond to a third direction or a fourth direction crossing the first direction and the second direction.

[0235] Here, the outer coating layer 119 may be formed of a material having negative photosensitivity, wherein the portion exposed to light remains after development. However, embodiments of the present disclosure are not limited thereto. In other embodiments, the outer coating layer 119 may be formed of a material having positive photosensitivity, wherein the portion exposed to light is removed after development.

[0236] At the same time, when the third contact hole 119a is formed, Figure 5 The overcoat layer 119 corresponding to the transparent area TA in the substrate may also be removed together. In addition, a contact hole exposing the connection electrode 186 may also be formed together with the third contact hole 119a.

[0237] Next, in Figure 5 and Fig. 8E In the embodiment of the present invention, a photoresist pattern 190 may be formed on the outer coating layer 119 having the third contact hole 119a by applying a photoresist and exposing and developing the photoresist. The photoresist pattern 190 may expose the second passivation layer 117. In the one direction, i.e., the first direction and the second direction, an edge of the photoresist pattern 190 may be disposed on the second passivation layer 117, and the photoresist pattern 190 may cover the top surface and the side surface of the outer coating layer 119. In the other direction, i.e., the third direction and the fourth direction, an edge of the photoresist pattern 190 may be disposed on the outer coating layer 119, and the photoresist pattern 190 may expose the side surface or the top surface and the side surface of the outer coating layer 119.

[0238] Next, in Figure 5 and Figure 8F In the embodiment, the second contact hole 117a exposing the second auxiliary electrode 174 may be formed by selectively removing the exposed second passivation layer 117 using the photoresist pattern 190 as an etching mask. Here, the second passivation layer 117 may be removed by a wet etching process.

[0239] The second passivation layer 117 may be overetched. In this case, even if the second passivation layer 117 under the photoresist pattern 190 is overetched in the one direction, i.e., the first direction and the second direction, the width of the second contact hole 117a may be smaller than the width of the third contact hole 119a, so that an undercut structure may not be formed. On the other hand, in the other direction, i.e., the third direction and the fourth direction, the second passivation layer 117 under the outer coating layer 119 may be overetched, and the width of the second contact hole 117a may be larger than the width of the third contact hole 119a, thereby forming an undercut structure that exposes the bottom surface of the outer coating layer 119.

[0240] Meanwhile, the second contact hole 117 a may have a smaller area than the buffer hole 111 a and the first contact hole 115 a , and may be disposed in the buffer hole 111 a and the first contact hole 115 a .

[0241] When the second contact hole 117a is formed, Figure 5 The second passivation layer 117 corresponding to the connecting electrode 186 in the embodiment may also be removed.

[0242] Next, in Figure 5 and Figure 8G In, can be peeled off and removed Figure 8F Then, a conductive material may be deposited and patterned on the outer coating 119 by a photolithography process. Figure 5 The first electrode 142 in the embodiment of the present invention is provided, and a bank 148 having a bank hole 148a may be formed on the first electrode 142 and the overcoat layer 119 by applying an organic insulating material and patterning it by a photolithography process. The bank hole 148a may have a larger area than the buffer hole 111a and the second and third contact holes 117a and 119a, and the buffer hole 111a and the second and third contact holes 117a and 119a may be disposed in the bank hole 148a.

[0243] Next, in Figure 5 and Figure 8H In the embodiment, the light emitting layer 144 and the second electrode 146 may be sequentially formed on the first electrode 142, the bank 148, the overcoat layer 119 and the second passivation layer 117. In this case, the light emitting layer 144 and the second electrode 146 may be formed over substantially the entire surface of the substrate 100 by vacuum evaporation and sputtering, respectively.

[0244] The light emitting layer 144 may be separated by the buffer hole 111 a and the undercut structure, thereby exposing the second auxiliary electrode 174 corresponding to the buffer hole 111 a and the undercut structure.

[0245] On the other hand, the second electrode 146 may not be separated and may be formed to be connected along the buffer hole 111 a and the undercut structure, and the second electrode 146 may contact the second auxiliary electrode 174 exposed corresponding to the buffer hole 111 a and the undercut structure.

[0246] Therefore, the second electrode 146 may be electrically connected to the first auxiliary electrode 172 through the second auxiliary electrode 174, and may be electrically connected to the first auxiliary electrode 172 through the first auxiliary electrode 172. Figure 5 The power lines 162 in.

[0247] Meanwhile, as described above, in the present disclosure, the third contact hole 119a of the overcoat layer 119 may be configured to have a cross shape, and even if misalignment occurs between the upper and lower layers during the manufacturing process, the second electrode 146 may contact the second auxiliary electrode 174 due to the undercut structure. This will be referred to Fig. 9A and Fig. 9B Give a description.

[0248] Fig. 9A and Fig. 9B is a schematic plan view of a contact region of the electroluminescent display device according to the first embodiment of the present disclosure, in which misalignment occurs. Here, the dotted line MP corresponding to the second contact hole 117a may correspond to a mask pattern for substantially forming the second contact hole 117a.

[0249] exist Fig. 9A In the embodiment, misalignment may occur when forming the buffer hole 111a and the third contact hole 119a. That is, the buffer hole 111a and the third contact hole 119a may be formed to be offset in the -X direction. However, the undercut structure may be formed to correspond to each corner of the cross-shaped third contact hole 119a.

[0250] In this case, the undercut structure at the right side of the third contact hole 119a may be wider than the undercut structure at the left side of the third contact hole 119a, and Fig. 9A The total area of ​​the undercut structures in may be substantially the same as the total area of ​​the undercut structures in which no misalignment occurs.

[0251] At the same time, Fig. 9B In the embodiment, misalignment may occur when forming the second contact hole 117a and the third contact hole 119a. That is, the second contact hole 117a may be formed to be offset in the -X direction and the Y direction, and the third contact hole 119a may be formed to be offset in the X direction and the -Y direction. However, the undercut structure may be formed to correspond to each corner of the cross-shaped third contact hole 119a.

[0252] In this case, the undercut structure at the left and upper sides of the third contact hole 119a may be wider than the undercut structure at the right and lower sides of the third contact hole 119a, and Fig. 9B The total area of ​​the undercut structures in may be substantially the same as the total area of ​​the undercut structures in which no misalignment occurs.

[0253] Therefore, even if misalignment occurs, an undercut structure may be formed and the second electrode 146 may contact the second auxiliary electrode 174. Since the total area of ​​the undercut structure does not change, reduction in the contact area between the second electrode 146 and the second auxiliary electrode 174 may be minimized.

[0254] Fig.10 is a schematic plan view of a contact region of an electroluminescent display device according to a second embodiment of the present disclosure, and Fig.11 is with Fig.10 1 and 2. The electroluminescent display device according to the second embodiment of the present disclosure has substantially the same configuration as that of the first embodiment except for the buffer layer and the auxiliary electrode. The same components as those of the first embodiment are denoted by the same reference numerals, and the description of the same components may be shortened or omitted.

[0255] like Fig.10 and Fig.11 As shown, in the electroluminescent display device according to the second embodiment of the present disclosure, the buffer layer 211 may not have a buffer hole, the first auxiliary electrode 272 may have an auxiliary hole 272a, and the third auxiliary electrode 276 may be arranged between the outer coating 219 and the embankment 248 and connected to the second electrode 246.

[0256] Specifically, the buffer layer 211 may be disposed on the substrate 200. The gate insulating layer 213 and the first auxiliary electrode 272 may be sequentially disposed on the buffer layer 211.

[0257] The first auxiliary electrode 272 may have an auxiliary hole 272a, and the gate insulating layer 213 may be exposed through the auxiliary hole 272a. The auxiliary hole 272a may have a cross shape in a plane.

[0258] The first passivation layer 215 may be disposed on the first auxiliary electrode 272. The first passivation layer 215 may have a first contact hole 215a exposing a top surface of the first auxiliary electrode 272. The first contact hole 215a may have a larger area than the auxiliary hole 272a, and the auxiliary hole 272a may be disposed in the first contact hole 215a. The auxiliary hole 272a may not overlap with the first passivation layer 215, and may be spaced apart from the first passivation layer 215 on a plane.

[0259] The second auxiliary electrode 274 may be disposed on the first passivation layer 215. The second auxiliary electrode 274 may contact the first auxiliary electrode 272 exposed through the first contact hole 215a. In addition, the second auxiliary electrode 274 may contact the side surface of the first auxiliary electrode 272 corresponding to the auxiliary hole 272a, and may also contact the gate insulating layer 213 exposed through the auxiliary hole 272a.

[0260] The second auxiliary electrode 274 may have the same shape and the same area in plane as the first auxiliary electrode 272. The second auxiliary electrode 274 may be omitted.

[0261] The second passivation layer 217 may be disposed on the second auxiliary electrode 274. The second passivation layer 217 may have a second contact hole 217a exposing the second auxiliary electrode 274.

[0262] The second contact hole 217a may have a cross shape in plane and may be disposed in the first contact hole 215a. The second contact hole 217a may not overlap the first passivation layer 215 and may be spaced apart from the first passivation layer 215 in plane.

[0263] In addition, the second contact hole 217a may have a larger area than the auxiliary hole 272a, and the auxiliary hole 272a may be disposed in the second contact hole 217a. The auxiliary hole 272a may not overlap the first passivation layer 215 and may be spaced apart from the second passivation layer 217 in a plane.

[0264] The overcoat layer 219 may be disposed on the second passivation layer 217. The overcoat layer 219 may have a substantially flat top surface and have a third contact hole 219a exposing the second passivation layer 217 and the second auxiliary electrode 274.

[0265] The third contact hole 219a may include a portion extending in the first direction as the X direction and a portion extending in the second direction as the Y direction, thereby having a cross shape in a plane. The third contact hole 219a may have a smaller area than the first contact hole 215a and may be disposed in the first contact hole 215a. The third contact hole 219a may not overlap with the first passivation layer 215 and may be spaced apart from the first passivation layer 215 in a plane.

[0266] Meanwhile, the length of the cross-shaped third contact hole 219a may be greater than the length of the cross-shaped second contact hole 217a, and the width of the cross-shaped third contact hole 219a may be less than the width of the cross-shaped second contact hole 217a. Specifically, the length of the portion of the third contact hole 219a extending in the first direction may be greater than the length of the portion of the second contact hole 217a extending in the first direction, and the width of the portion of the third contact hole 219a extending in the first direction may be less than the width of the portion of the second contact hole 217a extending in the first direction. In addition, the length of the portion of the third contact hole 219a extending in the second direction may be greater than the length of the portion of the second contact hole 217a extending in the second direction, and the width of the portion of the third contact hole 219a extending in the second direction may be less than the width of the portion of the second contact hole 217a extending in the second direction.

[0267] Each end portion of the cross-shaped third contact hole 219 a may overlap the second passivation layer 217 , and other portions of the cross-shaped third contact hole 219 a except for the end portions may be spaced apart from the second passivation layer 217 .

[0268] Therefore, an undercut structure exposing the bottom surface of the outer coating layer 219 may be provided between the third contact hole 219a and the second passivation layer 217 spaced apart from each other. The undercut structure may be provided to each corner of the cross-shaped third contact hole 219a. The cross-shaped third contact hole 219a may have an L-shaped side surface corresponding to each corner. For example, the cross-shaped third contact hole 219a may have four L-shaped sides. The undercut structure may be provided to correspond to each L-shaped side surface, thereby having an L-shaped shape on a plane. Four undercut structures may be provided to correspond to the third contact hole 219a.

[0269] In addition, the length of the cross-shaped third contact hole 219a may be greater than the length of the cross-shaped auxiliary hole 272a, and the width of the cross-shaped third contact hole 219a may be less than the width of the cross-shaped auxiliary hole 272a.

[0270] The third auxiliary electrode 276 may be disposed on the overcoat layer 219. The third auxiliary electrode 276 may have a larger area than the auxiliary hole 272a, the second contact hole 217a, and the third contact hole 219a.

[0271] The third auxiliary electrode 276 may contact the top and side surfaces of the overcoat layer 219 and the top and side surfaces of the second passivation layer 217 exposed through the third contact hole 219a. In addition, the third auxiliary electrode 276 may contact the top surface of the second auxiliary electrode 274 exposed through the second contact hole 217a, and may also be disposed in the auxiliary hole 272a.

[0272] The third auxiliary electrode 276 may not be cut off by the undercut structure and may be connected. Therefore, the third auxiliary electrode 276 may also contact the bottom surface of the overcoat layer 219 exposed by the undercut structure.

[0273] The third auxiliary electrode 276 may be formed of indium tin oxide (ITO) or molybdenum titanium alloy (MoTi), but embodiments of the present disclosure are not limited thereto.

[0274] The bank 248 may be disposed on the third auxiliary electrode 276 and the overcoat layer 219. The bank 248 may have a bank hole 248a exposing the third auxiliary electrode 276. The bank hole 248a may have a smaller area than the third auxiliary electrode 276. Alternatively, the bank hole 248a may have a larger area than the third auxiliary electrode 276.

[0275] In addition, the bank hole 248a may have a larger area than the auxiliary hole 272a, the second contact hole 217a, and the third contact hole 219a. The auxiliary hole 272a, the second contact hole 217a, and the third contact hole 219a may be disposed in the bank hole 248a.

[0276] The light emitting layer 244 and the second electrode 246 may be sequentially disposed on the bank 248. The light emitting layer 244 and the second electrode 246 may be formed over substantially the entire surface of the substrate 200. The light emitting layer 244 and the second electrode 246 may cover the top and side surfaces of the bank 248, and also cover the third auxiliary electrode 276 exposed through the bank hole 248a. In addition, the light emitting layer 244 may be in contact with the top and side surfaces of the bank 248, and in contact with the third auxiliary electrode 276 exposed through the bank hole 248a.

[0277] The light emitting layer 244 may be formed by a thermal evaporation method having a relatively low step coverage characteristic. Therefore, at the side surface of the overcoat layer 219 corresponding to the undercut structure, the light emitting layer 244 may have a thickness that decreases as it approaches or becomes closer to the substrate 200, and then is cut off by the undercut structure. Therefore, the third auxiliary electrode 276 corresponding to the undercut structure may be exposed.

[0278] On the other hand, the second electrode 246 can be formed by a sputtering method with a relatively high step coverage characteristic. The second electrode 246 may not be cut off by the undercut structure. Therefore, the second electrode 246 may contact the top surface of the third auxiliary electrode 276 exposed corresponding to the undercut structure, thereby being electrically connected to the first auxiliary electrode 272 and the second auxiliary electrode 274 through the third auxiliary electrode 276.

[0279] Therefore, in the electroluminescent display device according to the second embodiment of the present disclosure, the third contact hole 219a of the overcoat layer 219 may be configured to have a cross shape in a plane, an undercut structure may be provided to correspond to the third contact hole 219a, and the light emitting layer 244 may be separated by the undercut structure, so that the second electrode 246 may directly contact the third auxiliary electrode 276. Therefore, the contact area between the second electrode 246 and the third auxiliary electrode 276 may be increased, thereby improving the contact characteristics between the second electrode 246 and the third auxiliary electrode 276.

[0280] In this case, even if misalignment occurs between upper and lower layers during a manufacturing process, an undercut structure may be disposed to correspond to the third contact hole 219 a having a cross shape in plane so that the second electrode 246 may contact the third auxiliary electrode 276 .

[0281] In addition, by providing the auxiliary hole 272 a corresponding to the undercut structure in the first auxiliary electrode 272 , the light emitting layer 244 can be easily separated by the undercut structure.

[0282] Will refer to FIG. 12A to FIG. 12G A method of manufacturing the electroluminescent display device according to the second embodiment of the present disclosure is described in detail.

[0283] FIG. 12A to FIG. 12G 1 is a schematic cross-sectional view of a contact region in the steps of manufacturing an electroluminescent display device according to a second embodiment of the present disclosure. The method of manufacturing an electroluminescent display device according to the second embodiment of the present disclosure includes substantially the same steps as those of the first embodiment, except for the steps of forming a buffer layer, a first auxiliary electrode, and a third auxiliary electrode. The same components as those of the first embodiment are represented by the same reference numerals, and the description of the same components may be shortened or omitted.

[0284] First, in Fig. 12A In the embodiment, a buffer layer 211 may be formed on a substrate 200, and a gate insulating layer 213 may be formed on the buffer layer 211. Then, a first auxiliary electrode 272 having an auxiliary hole 272a may be formed on the gate insulating layer 213 by depositing a conductive material and patterning it through a photolithography process.

[0285] Next, in Fig. 12B In the embodiment, the first passivation layer 215 may be formed on the first auxiliary electrode 272 by depositing an inorganic insulating material, and then the first passivation layer 215 may be patterned by a photolithography process to form a first contact hole 215 a exposing the first auxiliary electrode 272 .

[0286] Then, a second auxiliary electrode 274 may be formed on the first passivation layer 215 by depositing a conductive material and patterning it by a photolithography process. The second auxiliary electrode 274 may contact the first auxiliary electrode 272 through the first contact hole 215a and contact the gate insulating layer 213 through the auxiliary hole 272a.

[0287] Next, in Fig. 12C In the embodiment, the second passivation layer 217 may be formed on the second auxiliary electrode 274 by depositing an inorganic insulating material, and the overcoat layer 219 may be formed by applying an organic insulating material on the second passivation layer 217. Then, the overcoat layer 219 may be patterned by a photolithography process to form a third contact hole 219a exposing the second passivation layer 217.

[0288] Next, in Fig.12D In the embodiment, a photoresist may be applied to the outer coating layer 219 having the third contact hole 219a, exposed to light and developed, thereby forming a photoresist pattern 290 exposing the second passivation layer 217. Fig.10 In the first direction and the second direction, the edge of the photoresist pattern 290 may be disposed on the second passivation layer 217, and the photoresist pattern 290 may cover the top surface and the side surface of the outer coating layer 219. Fig.10 In the third and fourth directions intersecting the first and second directions in the embodiment, the edge of the photoresist pattern 290 may be disposed on the overcoat layer 219 , and the photoresist pattern 290 may expose the side surface or the top and side surfaces of the overcoat layer 219 .

[0289] Next, in Fig.12E In the embodiment of the present invention, a second contact hole 217a exposing the second auxiliary electrode 274 may be formed by selectively removing the exposed second passivation layer 217 using the photoresist pattern 290 as an etching mask.

[0290] The second passivation layer 217 may be overetched. In this case, even if the second passivation layer 217 under the photoresist pattern 290 is overetched in the one direction, i.e., the first direction and the second direction, the width of the second contact hole 217a may be smaller than the width of the third contact hole 219a, so that an undercut structure may not be formed. On the other hand, in the other direction, i.e., the third direction and the fourth direction, the second passivation layer 217 under the outer coating layer 219 may be overetched, and the width of the second contact hole 217a may be larger than the width of the third contact hole 219a, thereby forming an undercut structure that exposes the bottom surface of the outer coating layer 219.

[0291] Next, in Fig.12F In, can be peeled off and removed Figure 12G Then, a third auxiliary electrode 276 may be formed on the overcoat layer 219 by depositing a conductive material and patterning it through a photolithography process. The third auxiliary electrode 276 may contact the second auxiliary electrode 274 exposed through the second contact hole 217a and the third contact hole 219a, and may also be disposed in the auxiliary hole 272a.

[0292] Then, the bank 248 having the bank hole 248a may be formed on the third auxiliary electrode 276 by applying an organic insulating material and patterning it through a photolithography process. The third auxiliary electrode 276 may be exposed through the bank hole 248a.

[0293] Next, in Figure 12G In the embodiment, the light emitting layer 244 and the second electrode 246 may be sequentially formed on the bank 248 and the third auxiliary electrode 276. In this case, the light emitting layer 244 and the second electrode 246 may be formed over substantially the entire surface of the substrate 200 by vacuum evaporation and sputtering, respectively.

[0294] The light emitting layer 244 may be separated by the undercut structure, thereby exposing the third auxiliary electrode 276 corresponding to the undercut structure.

[0295] On the other hand, the second electrode 246 may not be separated and may be formed to be connected along the undercut structure, and the second electrode 246 may contact the third auxiliary electrode 276 exposed corresponding to the undercut structure.

[0296] Therefore, the second electrode 246 may be electrically connected to the first auxiliary electrode 272 and the second auxiliary electrode 274 through the third auxiliary electrode 276 .

[0297] Fig.13 is a schematic plan view of a contact region of an electroluminescent display device according to a third embodiment of the present disclosure, and Fig.14 is with Fig.13 4. The electroluminescent display device according to the third embodiment of the present disclosure has substantially the same configuration as that of the first and second embodiments except for the auxiliary hole. The same components as those of the first and second embodiments are denoted by the same reference numerals, and the description of the same components may be shortened or omitted.

[0298] like Fig.13 and Fig.14 As shown, in the electroluminescent display device according to the third embodiment of the present disclosure, the auxiliary hole 372 a of the first auxiliary electrode 372 may have a larger area than the second contact hole 317 a of the second passivation layer 317 .

[0299] Specifically, the buffer layer 311 may be disposed on the substrate 300. The gate insulating layer 313 and the first auxiliary electrode 372 may be sequentially disposed on the buffer layer 311.

[0300] The first auxiliary electrode 372 may have an auxiliary hole 372a, and the gate insulating layer 313 may be exposed through the auxiliary hole 372a. The auxiliary hole 372a may have a cross shape in a plane.

[0301] The first passivation layer 315 may be disposed on the first auxiliary electrode 372. The first passivation layer 315 may have a first contact hole 315a exposing the top surface of the first auxiliary electrode 372. The first contact hole 315a may have an area larger than that of the auxiliary hole 372a, and the auxiliary hole 372a may be disposed in the first contact hole 315a. The auxiliary hole 372a may not overlap with the first passivation layer 315 and may be spaced apart from the first passivation layer 315 in a plane.

[0302] The second auxiliary electrode 374 may be disposed on the first passivation layer 315. The second auxiliary electrode 374 may be in contact with the first auxiliary electrode 372 exposed through the first contact hole 315a. Additionally, the second auxiliary electrode 374 may have a hole corresponding to the auxiliary hole 372a.

[0303] The second auxiliary electrode 374 may have the same shape and the same area as the first auxiliary electrode 372 in a plane. The second auxiliary electrode 374 may be omitted.

[0304] The second passivation layer 317 may be disposed on the second auxiliary electrode 374. The second passivation layer 317 may have a second contact hole 317a exposing the auxiliary hole 372a.

[0305] The second contact hole 317a may have a cross shape in a plane and may be disposed in the first contact hole 315a. The second contact hole 317a may not overlap with the first passivation layer 315 and may be spaced apart from the first passivation layer 315 in a plane.

[0306] Additionally, the second contact hole 317a may have an area smaller than that of the auxiliary hole 372a and may be disposed in the auxiliary hole 372a. The second contact hole 317a may not overlap with the first auxiliary electrode 372 and may be spaced apart from the first auxiliary electrode 372 in a plane.

[0307] Therefore, a first undercut structure exposing the bottom surface of the second passivation layer 317 may be disposed between the second contact holes 317a and the first auxiliary electrode 372 spaced apart from each other. The first undercut structure may be disposed along the edge of the second contact hole 317a having a cross shape.

[0308] An overcoat layer 319 may be disposed on the second passivation layer 317. The overcoat layer 319 may have a substantially flat top surface and have a third contact hole 319a exposing the second passivation layer 317.

[0309] The third contact hole 319a may include a portion extending in a first direction as an X direction and a portion extending in a second direction as a Y direction, thereby having a cross shape in a plane. The third contact hole 319a may have a smaller area than the first contact hole 315a and may be disposed in the first contact hole 315a. The third contact hole 319a may not overlap with the first passivation layer 315 and may be spaced apart from the first passivation layer 315 in a plane.

[0310] Meanwhile, the length of the cross-shaped third contact hole 319a may be greater than the length of the cross-shaped second contact hole 317a, and the width of the cross-shaped third contact hole 319a may be less than the width of the cross-shaped second contact hole 317a. Specifically, the length of the portion of the third contact hole 319a extending in the first direction may be greater than the length of the portion of the second contact hole 317a extending in the first direction, and the width of the portion of the third contact hole 319a extending in the first direction may be less than the width of the portion of the second contact hole 317a extending in the first direction. In addition, the length of the portion of the third contact hole 319a extending in the second direction may be greater than the length of the portion of the second contact hole 317a extending in the second direction, and the width of the portion of the third contact hole 319a extending in the second direction may be less than the width of the portion of the second contact hole 317a extending in the second direction.

[0311] Each end portion of the cross-shaped third contact hole 319 a may overlap the second passivation layer 317 , and other portions of the cross-shaped third contact hole 319 a except for the end portions may be spaced apart from the second passivation layer 317 .

[0312] Therefore, a second undercut structure exposing the bottom surface of the outer coating 319 may be provided between the third contact hole 319a and the second passivation layer 317 spaced apart from each other. The second undercut structure may be provided to each corner of the cross-shaped third contact hole 319a. The cross-shaped third contact hole 319a may have an L-shaped side surface corresponding to each corner. For example, the cross-shaped third contact hole 319a may have four L-shaped sides. The second undercut structure may be provided to correspond to each L-shaped side surface, thereby having an L-shaped shape on a plane. Four second undercut structures may be provided to correspond to the third contact hole 319a.

[0313] In addition, the length of the cross-shaped third contact hole 319a may be greater than the length of the cross-shaped auxiliary hole 372a, and the width of the cross-shaped third contact hole 319a may be less than the width of the cross-shaped auxiliary hole 372a.

[0314] The third auxiliary electrode 376 may be disposed on the overcoat layer 319. The third auxiliary electrode 376 may have a larger area than the auxiliary hole 372a, the second contact hole 317a, and the third contact hole 319a.

[0315] The third auxiliary electrode 376 may contact the top and side surfaces of the overcoat layer 319 and the top and side surfaces of the second passivation layer 317 exposed through the third contact hole 319a. In addition, the third auxiliary electrode 376 may contact the side surfaces of the first and second auxiliary electrodes 372 and 374 exposed through the second contact hole 317a and the auxiliary hole 372a, and may contact the top surface of the gate insulating layer 313.

[0316] The third auxiliary electrode 376 may not be cut off by the first undercut structure and the second undercut structure, and may be connected. Therefore, the third auxiliary electrode 376 may also contact the bottom surface of the second passivation layer 317 exposed by the first undercut structure and the bottom surface of the outer coating 319 exposed by the second undercut structure.

[0317] The bank 348 may be disposed on the third auxiliary electrode 376 and the overcoat layer 319. The bank 348 may have a bank hole 348a exposing the third auxiliary electrode 376. The bank hole 348a may have a smaller area than the third auxiliary electrode 376. Alternatively, the bank hole 348a may have a larger area than the third auxiliary electrode 376.

[0318] In addition, the bank hole 348a may have a larger area than the auxiliary hole 372a, the second contact hole 317a, and the third contact hole 319a. The auxiliary hole 372a, the second contact hole 317a, and the third contact hole 319a may be disposed in the bank hole 348a.

[0319] The light emitting layer 344 and the second electrode 346 may be sequentially disposed on the bank 348. The light emitting layer 344 and the second electrode 346 may be formed over substantially the entire surface of the substrate 300. The light emitting layer 344 and the second electrode 346 may cover the top and side surfaces of the bank 348, and also cover the third auxiliary electrode 376 exposed through the bank hole 348a. In addition, the light emitting layer 344 may be in contact with the top and side surfaces of the bank 348, and in contact with the third auxiliary electrode 376 exposed through the bank hole 348a.

[0320] The light emitting layer 344 may be formed by a thermal evaporation method having a relatively low step coverage characteristic. Therefore, at the side surface of the overcoat layer 319 corresponding to the second undercut structure, the light emitting layer 344 may have a thickness that decreases as it approaches or becomes closer to the substrate 300, and then is cut off by the second undercut structure. Therefore, the third auxiliary electrode 376 corresponding to the second undercut structure may be exposed.

[0321] In addition, in the region where the second undercut structure is not provided, at the side surface of the second passivation layer 317 corresponding to the first undercut structure, the light emitting layer 344 may have a thickness that decreases as it approaches or becomes closer to the substrate 300, and then is cut off by the first undercut structure. Therefore, the third auxiliary electrode 376 corresponding to the first undercut structure may be exposed.

[0322] On the other hand, the second electrode 346 can be formed by a sputtering method having a relatively high step coverage characteristic. The second electrode 346 may not be cut off by the first undercut structure and the second undercut structure. Therefore, the second electrode 346 may contact the top surface of the third auxiliary electrode 376 exposed corresponding to the first undercut structure and the second undercut structure, thereby being electrically connected to the first auxiliary electrode 372 and the second auxiliary electrode 374 through the third auxiliary electrode 376.

[0323] Therefore, in the electroluminescent display device according to the third embodiment of the present disclosure, the first undercut structure and the second undercut structure may be provided to correspond to the second contact hole 317a and the third contact hole 319a having a cross shape, respectively, and the light emitting layer 344 may be separated by the first undercut structure and the second undercut structure, so that the second electrode 346 may directly contact the third auxiliary electrode 376. Therefore, the contact area between the second electrode 346 and the third auxiliary electrode 376 may be increased, thereby improving the contact characteristics between the second electrode 346 and the third auxiliary electrode 376.

[0324] In this case, even if misalignment occurs between the upper layer and the lower layer during the manufacturing process, the first undercut structure and the second undercut structure can be set to correspond to the second contact hole 317a and the third contact hole 319a having a cross shape in the plane, so that the second electrode 346 can contact the third auxiliary electrode 376.

[0325] Will refer to FIG. 15A to FIG. 15H A method of manufacturing the electroluminescent display device according to the third embodiment of the present disclosure is described in detail.

[0326] FIG. 15A to FIG. 15H is a schematic cross-sectional view of a contact region in a step of manufacturing an electroluminescent display device according to a third embodiment of the present disclosure. The method of manufacturing an electroluminescent display device according to the third embodiment of the present disclosure includes substantially the same steps as those of the first and second embodiments, except for the step of forming a buffer hole. The same components as those of the first and second embodiments are denoted by the same reference numerals, and the description of the same components may be shortened or omitted.

[0327] First, in Fig.15AIn the embodiment, a buffer layer 311 may be formed on a substrate 300, and a gate insulating layer 313 may be formed on the buffer layer 311. Then, a first auxiliary electrode 372 may be formed on the gate insulating layer 313 by depositing a conductive material and patterning it through a photolithography process.

[0328] Next, in Fig. 15B In the embodiment, the first passivation layer 315 may be formed on the first auxiliary electrode 372 by depositing an inorganic insulating material, and then the first passivation layer 315 may be patterned by a photolithography process to form a first contact hole 315 a exposing the first auxiliary electrode 372 .

[0329] Then, the second auxiliary electrode 374 may be formed on the first passivation layer 315 by depositing a conductive material and patterning it through a photolithography process. The second auxiliary electrode 374 may contact the first auxiliary electrode 372 through the first contact hole 315a.

[0330] Next, in Fig. 15C In the embodiment, the second passivation layer 317 may be formed on the second auxiliary electrode 374 by depositing an inorganic insulating material, and an overcoat layer 319 may be formed on the second passivation layer 317 by applying an organic insulating material. Then, the overcoat layer 319 may be patterned by a photolithography process to form a third contact hole 319a exposing the second passivation layer 317.

[0331] Next, in Fig.15D In the embodiment, a photoresist may be applied to the outer coating layer 319 having the third contact hole 319a, exposed to light and developed, thereby forming a photoresist pattern 390 exposing the second passivation layer 317. Fig.13 In the first direction and the second direction, the edge of the photoresist pattern 390 may be disposed on the second passivation layer 317, and the photoresist pattern 390 may cover the top surface and the side surface of the outer coating layer 319. Fig.13 In a third direction and a fourth direction intersecting the first direction and the second direction, an edge of the photoresist pattern 390 may be disposed on the outer coating layer 319 , and the photoresist pattern 390 may expose a side surface or a top surface and a side surface of the outer coating layer 319 .

[0332] Next, in Fig.15E In the embodiment of the present invention, a second contact hole 317 a exposing the second auxiliary electrode 374 may be formed by selectively removing the exposed second passivation layer 317 using the photoresist pattern 390 as an etching mask.

[0333] The second passivation layer 317 may be overetched. In this case, even if the second passivation layer 317 under the photoresist pattern 390 is overetched in the one direction, i.e., the first direction and the second direction, the width of the second contact hole 317a may be smaller than the width of the third contact hole 319a, so that an undercut structure may not be formed. On the other hand, in the other direction, i.e., the third direction and the fourth direction, the second passivation layer 317 under the outer coating layer 319 may be overetched, and the width of the second contact hole 317a may be larger than the width of the third contact hole 319a, thereby forming a second undercut structure that exposes the bottom surface of the outer coating layer 319.

[0334] Next, in Fig.15F In the embodiment, the auxiliary hole 372a exposing the gate insulating layer 313 may be formed by selectively removing the second auxiliary electrode 374 exposed through the second contact hole 317a and the first auxiliary electrode 372 thereunder using the second passivation layer 317 having the second contact hole 317a as an etching mask.

[0335] In this case, the first auxiliary electrode 372 and the second auxiliary electrode 374 disposed under the second passivation layer 317 may be overetched. Therefore, the width of the auxiliary hole 372a may be greater than the width of the second contact hole 317a, thereby forming a first undercut structure exposing the bottom surface of the second passivation layer 317.

[0336] Then, you can peel and remove Fig.15E The photoresist pattern 390 is formed on the surface of the substrate.

[0337] Next, in Figure 15G In the embodiment, a third auxiliary electrode 376 may be formed on the overcoat layer 319 by depositing a conductive material and patterning it by a photolithography process. The third auxiliary electrode 376 may contact side surfaces of the first and second auxiliary electrodes 372 and 374 and a top surface of the gate insulating layer 313 exposed through the second contact hole 317a and the auxiliary hole 372a.

[0338] Then, a bank 348 having a bank hole 348a may be formed on the third auxiliary electrode 376 by applying an organic insulating material and patterning it through a photolithography process. The third auxiliary electrode 376 may be exposed through the bank hole 348a.

[0339] Next, in Fig.15H In the embodiment, the light emitting layer 344 and the second electrode 346 may be sequentially formed on the bank 348 and the third auxiliary electrode 376. In this case, the light emitting layer 344 and the second electrode 346 may be formed over substantially the entire surface of the substrate 300 by vacuum evaporation and sputtering, respectively.

[0340] The light emitting layer 344 may be separated by the first undercut structure and the second undercut structure, thereby exposing the third auxiliary electrode 376 corresponding to the first undercut structure and the second undercut structure.

[0341] On the other hand, the second electrode 346 may not be separated and may be formed to be connected along the first and second undercut structures, and the second electrode 346 may contact the third auxiliary electrode 376 exposed corresponding to the first and second undercut structures.

[0342] Therefore, the second electrode 346 may be electrically connected to the first auxiliary electrode 372 and the second auxiliary electrode 374 through the third auxiliary electrode 376 .

[0343] Fig.16 is a schematic plan view of a contact region of an electroluminescent display device according to a fourth embodiment of the present disclosure, and Fig.17 is with Fig.16 4. The electroluminescent display device according to the fourth embodiment of the present disclosure has substantially the same configuration as that of the first embodiment, the second embodiment, and the third embodiment, except for the auxiliary electrode. The same components as those of the first embodiment, the second embodiment, and the third embodiment are represented by the same reference numerals, and the description of the same components may be shortened or omitted.

[0344] like Fig.16 and Fig.17 As shown, in the electroluminescent display device according to the fourth embodiment of the present disclosure, the buffer layer 411 may not have a buffer hole, the first auxiliary electrode 472 may not have an auxiliary hole, and the third auxiliary electrode 476 may be arranged between the outer coating 419 and the embankment 448 and connected to the second electrode 446.

[0345] Specifically, the buffer layer 411 may be disposed on the substrate 400. The gate insulating layer 413 and the first auxiliary electrode 472 may be sequentially disposed on the buffer layer 411.

[0346] The first passivation layer 415 may be disposed on the first auxiliary electrode 472. The first passivation layer 415 may have a first contact hole 415a exposing a top surface of the first auxiliary electrode 472.

[0347] The second auxiliary electrode 474 may be disposed on the first passivation layer 415. The second auxiliary electrode 474 may make contact with the first auxiliary electrode 472 exposed through the first contact hole 415a.

[0348] The second auxiliary electrode 474 may have the same shape and the same area in plane as the first auxiliary electrode 472. The second auxiliary electrode 474 may be omitted.

[0349] The second passivation layer 417 may be disposed on the second auxiliary electrode 474. The second passivation layer 417 may have a second contact hole 417a exposing the second auxiliary electrode 474.

[0350] The second contact hole 417a may have a cross shape in plane and may be disposed in the first contact hole 415a. The second contact hole 417a may not overlap the first passivation layer 415 and may be spaced apart from the first passivation layer 415 in plane.

[0351] An overcoat layer 419 may be disposed on the second passivation layer 417. The overcoat layer 419 may have a substantially flat top surface and have a third contact hole 419a exposing the second passivation layer 417 and the second auxiliary electrode 474.

[0352] The third contact hole 419a may include a portion extending in a first direction as an X direction and a portion extending in a second direction as a Y direction, thereby having a cross shape in a plane. The third contact hole 419a may have a smaller area than the first contact hole 415a and may be disposed in the first contact hole 415a. The third contact hole 419a may not overlap with the first passivation layer 415 and may be spaced apart from the first passivation layer 415 in a plane.

[0353] Meanwhile, the length of the cross-shaped third contact hole 419a may be greater than the length of the cross-shaped second contact hole 417a, and the width of the cross-shaped third contact hole 419a may be less than the width of the cross-shaped second contact hole 417a. Specifically, the length of the portion of the third contact hole 419a extending in the first direction may be greater than the length of the portion of the second contact hole 417a extending in the first direction, and the width of the portion of the third contact hole 419a extending in the first direction may be less than the width of the portion of the second contact hole 417a extending in the first direction. In addition, the length of the portion of the third contact hole 419a extending in the second direction may be greater than the length of the portion of the second contact hole 417a extending in the second direction, and the width of the portion of the third contact hole 419a extending in the second direction may be less than the width of the portion of the second contact hole 417a extending in the second direction.

[0354] Each end portion of the cross-shaped third contact hole 419 a may overlap the second passivation layer 417 , and other portions of the cross-shaped third contact hole 419 a except for the end portions may be spaced apart from the second passivation layer 417 .

[0355] Therefore, an undercut structure exposing the bottom surface of the outer coating 419 may be provided between the third contact hole 419a and the second passivation layer 417 spaced apart from each other. The undercut structure may be provided to each corner of the cross-shaped third contact hole 419a. The cross-shaped third contact hole 419a may have an L-shaped side surface corresponding to each corner. For example, the cross-shaped third contact hole 419a may have four L-shaped sides. The undercut structure may be provided to correspond to each L-shaped side surface, thereby having an L-shaped shape on a plane. Four undercut structures may be provided to correspond to the third contact hole 419a.

[0356] The third auxiliary electrode 476 may be disposed on the overcoat layer 419. The third auxiliary electrode 476 may have a larger area than the auxiliary hole 472a, the second contact hole 417a, and the third contact hole 419a.

[0357] The third auxiliary electrode 476 may contact the top and side surfaces of the overcoat layer 419 and the second passivation layer 417 exposed through the third contact hole 419a. In addition, the third auxiliary electrode 476 may contact the top surface of the second auxiliary electrode 474 exposed through the second contact hole 417a.

[0358] The third auxiliary electrode 476 may not be cut off by the undercut structure and may be connected. Therefore, the third auxiliary electrode 476 may also contact the bottom surface of the overcoat layer 419 exposed by the undercut structure.

[0359] The third auxiliary electrode 476 may be formed of indium tin oxide (ITO) or molybdenum titanium alloy (MoTi), but embodiments of the present disclosure are not limited thereto.

[0360] The bank 448 may be disposed on the third auxiliary electrode 476 and the overcoat layer 419. The bank 448 may have a bank hole 448a exposing the third auxiliary electrode 476. The bank hole 448a may have a smaller area than the third auxiliary electrode 476. Alternatively, the bank hole 448a may have a larger area than the third auxiliary electrode 476.

[0361] In addition, the bank hole 448a may have a larger area than the second contact hole 417a and the third contact hole 419a. The second contact hole 417a and the third contact hole 419a may be disposed in the bank hole 448a.

[0362] The light emitting layer 444 and the second electrode 446 may be sequentially disposed on the bank 448. The light emitting layer 444 and the second electrode 446 may be formed over substantially the entire surface of the substrate 400. The light emitting layer 444 and the second electrode 446 may cover the top and side surfaces of the bank 448, and also cover the third auxiliary electrode 476 exposed through the bank hole 448a. In addition, the light emitting layer 444 may be in contact with the top and side surfaces of the bank 448, and in contact with the third auxiliary electrode 476 exposed through the bank hole 448a.

[0363] The light emitting layer 444 may be formed by a thermal evaporation method having a relatively low step coverage characteristic. Therefore, at the side surface of the overcoat layer 419 corresponding to the undercut structure, the light emitting layer 444 may have a thickness that decreases as it approaches or becomes closer to the substrate 400, and then is cut off by the undercut structure. Therefore, the third auxiliary electrode 476 corresponding to the undercut structure may be exposed.

[0364] On the other hand, the second electrode 446 can be formed by a sputtering method having a relatively high step coverage characteristic. The second electrode 446 may not be cut off by the undercut structure. Therefore, the second electrode 446 may contact the top surface of the third auxiliary electrode 476 exposed corresponding to the undercut structure, thereby being electrically connected to the first auxiliary electrode 572 and the second auxiliary electrode 574 through the third auxiliary electrode 476.

[0365] Therefore, in the electroluminescent display device according to the fourth embodiment of the present disclosure, the third contact hole 419a of the overcoat layer 419 may be configured to have a cross shape in a plane, an undercut structure may be provided to correspond to the third contact hole 419a, and the light emitting layer 444 may be separated by the undercut structure, so that the second electrode 446 may directly contact the third auxiliary electrode 476. Therefore, the contact area between the second electrode 446 and the third auxiliary electrode 476 may be increased, thereby improving the contact characteristics between the second electrode 446 and the third auxiliary electrode 476.

[0366] In this case, even if misalignment occurs between upper and lower layers during a manufacturing process, the undercut structure may be disposed to correspond to the third contact hole 419 a having a cross shape in plane so that the second electrode 446 may contact the third auxiliary electrode 476 .

[0367] The method of manufacturing the electroluminescent display device according to the fourth embodiment of the present disclosure may be different from the method of manufacturing the electroluminescent display device according to the second embodiment in that the step of forming the auxiliary hole 272a of the first auxiliary electrode 272 is omitted. Fig. 12A In addition to the step of forming the auxiliary hole 272a in the hole 272a, the electroluminescent display device according to the fourth embodiment of the present disclosure can be formed by FIG. 12A to FIG. 12G The electroluminescent display device of the second embodiment shown is manufactured by basically the same method.

[0368] In the electroluminescent display device of the present disclosure, by connecting the second electrode of the light emitting diode to the power line via the auxiliary electrode, the resistance of the second electrode can be reduced, and the brightness of the electroluminescent display device can be made uniform.

[0369] In addition, by providing an undercut structure corresponding to a cross-shaped contact hole on a plane, the light-emitting layer can be separated by the undercut structure to expose the auxiliary electrode, and the second electrode can contact the exposed auxiliary electrode, so that the contact area between the second electrode and the auxiliary electrode can be increased, thereby improving the contact characteristics between the second electrode and the auxiliary electrode.

[0370] Furthermore, even if misalignment occurs during a manufacturing process, the total area of ​​the undercut structure does not significantly change, and thus a reduction in the contact area between the second electrode and the auxiliary electrode can be minimized.

[0371] In addition, by providing a hole in the auxiliary electrode or the buffer layer or further forming another auxiliary electrode covering the undercut structure, the contact area between the second electrode and the auxiliary electrode can be increased.

[0372] Therefore, the brightness of the electroluminescent display device can be improved, and the improved brightness can reduce power consumption, thereby achieving low power consumption.

[0373] It will be apparent to those skilled in the art that various modifications and variations may be made to the display device of the present disclosure without departing from the technical concept or scope of the present disclosure. Therefore, the present disclosure is intended to cover modifications and variations of the present disclosure as long as they fall within the scope of the appended claims and their equivalents.

Claims

1. An electroluminescent display device, comprising: A substrate, wherein the substrate is provided with sub-pixels including a light emitting area and a contact area; a light emitting diode, the light emitting diode being disposed in the light emitting region above the substrate and comprising a first electrode, a light emitting layer, and a second electrode; a first auxiliary electrode disposed in the contact region above the substrate and connected to the second electrode; as well as an insulating layer between the first auxiliary electrode and the light emitting diode and having a contact hole exposing the first auxiliary electrode, The contact hole includes a portion extending in a first direction and a portion extending in a second direction, and an undercut structure exposing a bottom surface of the insulating layer is provided at least on one side of the contact hole, and The light emitting layer is cut off by the undercut structure, and the second electrode is connected to the first auxiliary electrode under the undercut structure.

2. The electroluminescent display device according to claim 1, wherein: The insulating layer includes a passivation layer and an outer coating layer above the passivation layer, The contact hole comprises a first contact hole disposed in the passivation layer and a second contact hole disposed in the outer coating layer, and The length of the second contact hole is greater than that of the first contact hole, and the width of the second contact hole is smaller than that of the first contact hole.

3. The electroluminescent display device according to claim 2, wherein: The first contact hole and the second contact hole have a cross shape in a plane.

4. The electroluminescent display device according to claim 2, wherein: The first auxiliary electrode includes auxiliary holes corresponding to the first contact hole and the second contact hole, and The auxiliary hole has a smaller area than the first contact hole and is disposed in the first contact hole.

5. The electroluminescent display device according to claim 2, wherein: The first auxiliary electrode includes auxiliary holes corresponding to the first contact hole and the second contact hole, and The first contact hole has a smaller area than the auxiliary hole and is disposed in the auxiliary hole.

6. The electroluminescent display device according to claim 5, wherein: The first contact hole has a cross shape in a plane.

7. The electroluminescent display device according to claim 2, further comprising a buffer layer between the substrate and the first auxiliary electrode, in, The buffer layer has a buffer hole corresponding to the first contact hole and the second contact hole, and The thickness of the buffer layer is greater than the thickness of the passivation layer and is equal to or less than the thickness of the outer coating layer.

8. The electroluminescent display device according to claim 7, wherein: The first contact hole is spaced apart from the buffer layer, and the second contact hole overlaps the buffer layer.

9. The electroluminescent display device according to claim 1, further comprising a second auxiliary electrode, the second auxiliary electrode being disposed between the insulating layer and the light emitting layer and connected to the first auxiliary electrode through the contact hole, in, The light emitting layer is cut off by the undercut structure so that the second auxiliary electrode is exposed, and the second electrode is in contact with the exposed second auxiliary electrode.

10. The electroluminescent display device according to claim 2, wherein: The sub-pixel also includes a transparent area, and Therein, the outer coating is removed in the transparent area.

11. The electroluminescent display device according to claim 1, wherein: The first auxiliary electrode is connected to a power line.

12. A method for manufacturing an electroluminescent display device, comprising: forming a first auxiliary electrode on the substrate; forming a first insulating layer having a first contact hole and a second insulating layer having a second contact hole over the first auxiliary electrode; as well as forming a light emitting diode on the second insulating layer, wherein the light emitting diode comprises a first electrode, a light emitting layer and a second electrode, wherein forming the first insulating layer having the first contact hole and the second insulating layer having the second contact hole comprises forming an undercut structure exposing a bottom surface of the second insulating layer at at least one side of the second contact hole, wherein each of the first contact hole and the second contact hole includes a portion extending in the first direction and a portion extending in the second direction, and The light emitting layer is cut off by the undercut structure, and the second electrode is connected to the first auxiliary electrode under the undercut structure.

13. The method according to claim 12, wherein: The first contact hole is formed after the second contact hole is formed.

14. The method according to claim 13, further comprising: After forming the first contact hole, an auxiliary hole corresponding to the first contact hole and the second contact hole is formed in the first auxiliary electrode.

15. The method according to claim 12, wherein: Forming the first auxiliary electrode includes forming an auxiliary hole corresponding to the first contact hole and the second contact hole.

16. The method according to claim 12, further comprising: A buffer layer is formed between the substrate and the first auxiliary electrode and has buffer holes corresponding to the first contact hole and the second contact hole.

17. The method according to claim 12, further comprising: forming a second auxiliary electrode between the second insulating layer and the light emitting layer and connected to the first auxiliary electrode, The light emitting layer is cut off by the undercut structure, thereby exposing the second auxiliary electrode, and the second electrode is in contact with the exposed second auxiliary electrode.

18. The method according to claim 12, wherein: The first auxiliary electrode is connected to a power line.

19. The method according to claim 18, wherein: The power line is a low-potential power line that provides a low-potential voltage.

20. The method according to claim 12, wherein: The length of the second contact hole is greater than that of the first contact hole, and the width of the second contact hole is smaller than that of the first contact hole.

21. The method according to claim 20, wherein: The first contact hole and the second contact hole have a cross shape in a plane.

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