RRAM device using ruthenium metal as top electrode

Abstract

The invention provides an RRAM (resistive random access memory) device adopting ruthenium metal as a top electrode, and belongs to the technical field of semiconductor storage, the RRAM device sequentially comprises a substrate, a bottom electrode, a resistive layer and the top electrode from bottom to top, the resistive layer comprises an upper layer and a lower layer, the lower layer is formed by using an ALD (atomic layer deposition) technology, the upper layer is prepared by using a PE-ALD (plasma enhanced atomic layer deposition) technology, and the upper layer is prepared by using a PE-ALD (plasma enhanced atomic layer deposition) technology. The top electrode is of a composite structure and comprises a ruthenium layer on the bottom layer and a TiN layer on the top layer. According to the invention, the oxygen vacancy concentration gradient is formed on the resistive layer through the ALD technology and the PE-ALD technology, and the low-resistance-state-to-high-resistance-state conversion power is reduced; the interface near the resistive layer and the top electrode is rich in oxygen vacancies, so that the work function is reduced, and the power consumption of the device in operation is reduced; the top electrode is designed into a composite structure of the ruthenium layer and the TiN layer, and the characteristic that the reaction activity of the ruthenium layer and oxygen is low is utilized, so that the potential barrier is further reduced, and the conversion power of the device is reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor storage technology, and in particular to a RRAM device using ruthenium metal as a top electrode. Background Art

[0002] Digital memristors are non-volatile memory devices that can mimic the behavior of synapses between neurons in the human brain. In this field, resistive random access memory (RRAM) technology occupies an important position. Its working principle is that under the influence of an electric field, oxygen ions migrate from their original lattice positions, leaving behind a series of oxygen vacancies. The continuous oxygen vacancies form a filament, creating a low-resistance conductive path (after the filament is formed, no voltage is applied, and the filament remains). When a reverse voltage is applied, the filament dissolves and the device is reset to a high-resistance state. The reliable operation of RRAM devices depends on the precise control of the formation and dissolution of the filament, that is, by applying a specific voltage to the top and bottom electrodes, the resistance state of the resistive layer is changed to achieve data storage. Traditional RRAM technology widely uses metal oxides such as HfO2 as resistive layer materials, and relies on the formation and breaking of conductive filaments inside these materials to convert the resistance state.

[0003] RRAM technology provides a fast, high-density, and low-power data storage solution that is non-volatile and scalable for a variety of high-performance storage applications. Compared to traditional flash memory and other types of non-volatile memory, RRAM has faster write speeds, longer erase and write life, and higher integration, making them ideal candidates for next-generation memory technology. In addition, RRAM is also expected to be used in analog computing and neuromorphic computing platforms, providing new possibilities for artificial intelligence hardware accelerators.

[0004] However, despite the many advantages of RRAM, existing technologies still face some problems. The conversion efficiency of the resistive switching layer between the low resistance state and the high resistance state of traditional RRAM devices is low, which not only requires a large power consumption to achieve state conversion, but also there may be a high potential barrier at the interface between the top electrode and the resistive switching layer, and there is a lack of effective means to optimize these interface characteristics, which further increases the operating power consumption. These problems have led to RRAM generally showing a low storage window and high energy consumption, limiting its potential in high-performance storage applications. Summary of the invention

[0005] The object of the present invention is to provide a RRAM device using ruthenium metal as a top electrode to solve the problems raised in the above background technology.

[0006] To achieve the above object, the present invention provides the following technical solutions:

[0007] A RRAM device using ruthenium metal as a top electrode comprises, from bottom to top, a substrate, a bottom electrode, a resistive layer and a top electrode. The resistive layer is structured into two layers, the lower layer is formed using atomic layer deposition (ALD) technology, and the upper layer is prepared using a plasma enhanced atomic layer deposition (PE-ALD) process. The top electrode is a composite structure, including a bottom ruthenium layer and a top TiN layer.

[0008] Preferably, the resistive switching layer is structured into two layers, the upper and lower layers having the same thickness.

[0009] Preferably, the thickness of the bottom electrode is 30-100 nm.

[0010] Preferably, the thickness of the resistive switching layer is 5-30 nm.

[0011] Preferably, the thickness of the ruthenium layer is 5-20 nm, and the thickness of the TiN layer is 10-50 nm.

[0012] Preferably, H is used in the plasma enhanced atomic layer deposition process. 2 as a plasma source.

[0013] Preferably, the bottom electrode material is titanium nitride.

[0014] Preferably, the resistive switching layer is an oxide insulating layer.

[0015] Preferably, the material of the resistive switching layer is hafnium oxide, zinc oxide, zirconium oxide or tungsten oxide.

[0016] The beneficial effects of the above technical solution of the present invention are as follows:

[0017] 1. The present invention introduces plasma enhancement (i.e., PE-ALD) during the atomic layer deposition process on the resistive layer, so that the resistive layer is divided into two oxygen vacancy concentration gradients as a whole. The asymmetric oxygen vacancy concentration in the upper and lower directions can help the device reduce the conversion power from the low resistance state to the high resistance state.

[0018] 2. The conversion power of RRAM devices is also affected by the barrier height at the interface. An oxygen-deficient interface (the interface between the resistive switching layer and the top electrode layer) will reduce the work function, while excess oxygen will increase the work function. The barrier height between the metal and the oxide will also change with the concentration of oxygen vacancies at the interface. The increase in oxygen vacancy concentration helps to reduce the power of the device. The resistive switching layer formed by the PE-ALD process of the present invention has relatively more oxygen vacancies, so that the interface near the resistive switching layer and the top electrode is rich in oxygen vacancies, thereby reducing the work function and reducing the power consumption of the device of the present invention.

[0019] 3. The present invention designs the top electrode as a composite structure of a ruthenium layer and a TiN layer, wherein the ruthenium layer is located between the bottom electrode TiN layer and the top electrode TiN layer, and its reaction activity with oxygen is relatively lower. When the oxygen vacancy concentration at the interface is high, the ruthenium layer helps to further reduce the potential barrier, thereby reducing the conversion power of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] By reading the following detailed description with reference to the accompanying drawings, the above and other objects, features and advantages of the exemplary embodiments of the present invention will become readily understood. In the accompanying drawings, several embodiments of the present invention are shown in an exemplary and non-limiting manner, and the same or corresponding reference numerals represent the same or corresponding parts, wherein:

[0021] Figure 1 A schematic diagram of the structure of a RRAM device using a non-ruthenium metal as a top electrode provided by the present invention. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Those skilled in the art should know that the embodiments described below are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0023] Example 1

[0024] A RRAM device using ruthenium metal as the top electrode, such as Figure 1 As shown, from bottom to top, it includes: substrate, bottom electrode, resistive switching layer and top electrode. Among them, the substrate is used to support the entire device structure, and silicon, glass, ceramic and other materials can be selected; the bottom electrode material is preferably TiN, with a thickness of 30-100nm. TiN has good conductivity and thermal stability, can withstand high temperature treatment without instability, and provides a stable contact interface; the resistive switching layer is an oxide insulating layer. In this embodiment, the material used for the resistive switching layer is hafnium oxide (HfO 2 ), hafnium oxide, as a high dielectric constant material, not only has excellent insulation properties, but also its resistance switching behavior can be optimized by adjusting the oxygen vacancy concentration.

[0025] The resistive switching layer of this scheme is constructed of two layers, the lower layer is formed using atomic layer deposition (ALD) technology to ensure the uniformity and density of the film; the upper layer is prepared using plasma enhanced atomic layer deposition (PE-ALD) process. By introducing a plasma source to regulate the oxygen vacancy concentration, an oxygen vacancy concentration gradient is formed inside the resistive switching layer. The asymmetric oxygen vacancy distribution in the upper and lower directions helps to reduce the conversion power from the low resistance state to the high resistance state, optimize the resistance switching characteristics, thereby improving the conversion efficiency and reducing the power consumption during operation.

[0026] The resistive switching layer is constructed of two layers, the upper and lower layers, and the thickness of the two layers is the same to ensure a uniform distribution of oxygen vacancies in the entire device and improve the stability and consistency of the resistance switching characteristics. The total thickness of the resistive switching layer is 5-30nm. In addition, in the PE-ALD process, the plasma source used is H 2 , H 2 Plasma can effectively activate precursor molecules, promote reactions and reduce by-products while avoiding the introduction of unnecessary impurities.

[0027] In addition, the conversion power of RRAM devices is also affected by the barrier height at the interface. An oxygen-deficient interface (the interface between the resistive switching layer and the top electrode layer) will reduce the work function, while excess oxygen will increase the work function. The barrier height between the metal and the oxide will also change with the concentration of oxygen vacancies at the interface. The increase in oxygen vacancy concentration helps to reduce the power of the device. This solution inserts a plasma-assisted enhanced treatment process (i.e., PE-ALD) during the deposition of the resistive switching layer. The resistive switching layer formed by the PE-ALD treatment has more oxygen vacancies than the resistive switching layer formed by the ALD treatment, so that the interface between the resistive switching layer and the top electrode is rich in oxygen vacancies, reducing the barrier height, thereby further reducing the operating power consumption of the RRAM device.

[0028] The top electrode is a composite structure, including a bottom ruthenium layer and a top TiN layer. The top electrode and the bottom electrode together form a TiN-Ru-TiN hierarchical structure, in which the introduction of the ruthenium layer is key. Compared with the TiN layers at both ends, the ruthenium layer has a relatively low reactivity with oxygen, which means that in an interface environment with a high oxygen vacancy concentration, the ruthenium layer can play a stabilizing role, preventing unnecessary oxidation reactions from occurring, and also helping to further reduce the barrier height at the interface. This not only optimizes the interface characteristics between the top electrode and the resistive switching layer, but also enhances the performance and reliability of the entire device.

[0029] In this embodiment, the thickness of the ruthenium layer of the top electrode is controlled within the range of 5-20nm, which can ensure the advantages brought by the low work function without excessively increasing the cost or affecting other performances; the thickness of the TiN layer of the top electrode is 10-50nm to provide sufficient protection and adhesion without affecting the electron transfer efficiency.

[0030] The preparation of the RRAM device of the present invention can adopt conventional preparation methods in the industry. The following provides a specific preparation method as an example to illustrate the specific implementation manners of the present invention, but should not be regarded as a limitation on the scope of the present invention. This preparation method includes but is not limited to the following steps:

[0031] Step 1: Prepare a substrate. Select a silicon substrate and perform cleaning and drying treatments on it. During the cleaning process, use an acid solution or an organic solvent to clean stubborn contaminants, then rinse with deionized water for 5 minutes and dry in a nitrogen atmosphere for 10 minutes to ensure that the surface is free of impurities, so as to ensure the quality of subsequent deposition processes.

[0032] Step 2: Deposit a bottom electrode. Deposit TiN on the substrate as the bottom electrode through a sputtering process. Set the sputtering power to 200W and the sputtering time to 30 minutes to obtain a bottom electrode with a thickness of about 50nm.

[0033] Step 3: Deposit a resistive switching layer. In order to ensure the same deposition thickness for atomic layer deposition (ALD) and plasma-enhanced atomic layer deposition (PE-ALD), a segmented deposition method is adopted. First, deposit a hafnium oxide layer using ALD technology. The deposition temperature is 200°C, the deposition rate is 0.1nm / cycle, and the deposition time is 100 cycles to form a deposition layer with a thickness of 10nm. Then switch to PE-ALD to continue depositing the second half of the hafnium oxide layer. The deposition temperature is increased to 250°C, the deposition rate is 0.10nm / cycle, and the deposition time is 100 cycles. During the plasma treatment, the flow rate of H 2 is 50sccm and the treatment time is 30 minutes to obtain a resistive switching layer with a total thickness of about 20nm. During this period, ensure a smooth transition from ALD to PE-ALD to avoid interface defects.

[0034] Step 4: Deposit a top electrode. First, deposit a 5nm-thick ruthenium layer by electron beam evaporation with an evaporation rate of 0.2nm / s, and then deposit a 20nm-thick TiN layer by sputtering process with a sputtering power of 200W and a sputtering time of 20 minutes to form the top electrode.

[0035] Step 5: Performance testing. Measure the resistance states of the RRAM device at different voltages. The applied voltage range is from -5V to 5V with a step size of 0.5V, and record the resistance values in the low-resistance state and the high-resistance state; measure the endurance of the RRAM device, continuously perform 1000 resistance switching operations, and record the stability of the resistance state; measure the memory window of the RRAM device and observe the amplitude of resistance change at different voltages. In addition, multiple quality inspection steps are also carried out during the entire manufacturing process, such as measuring the film thickness with an ellipsometer, testing the resistivity with a four-probe method, and analyzing the crystal structure with XRD, etc., to ensure that each layer meets the design requirements.

[0036] Example 2

[0037] A RRAM device using ruthenium metal as the top electrode, such as Figure 1 As shown, from bottom to top, it includes: substrate, bottom electrode, resistive switching layer and top electrode. Among them, the substrate is used to support the entire device structure, and materials such as silicon, glass, and ceramics can be selected; the bottom electrode material is preferably TiN, with a thickness of 30-100nm. TiN has good conductivity and thermal stability, can withstand high temperature treatment without instability, and provides a stable contact interface; the resistive switching layer is an oxide insulating layer. In this embodiment, the material used for the resistive switching layer is zinc oxide (ZnO). Zinc oxide can achieve a high switching ratio between high and low resistance states, which is very important for data storage applications. In addition, zinc oxide is a transparent oxide, which is suitable for application scenarios that require transparent electronic components, such as transparent displays or storage units in smart windows.

[0038] The resistive switching layer of this scheme is constructed of two layers, the lower layer is formed using atomic layer deposition (ALD) technology to ensure the uniformity and density of the film; the upper layer is prepared using plasma enhanced atomic layer deposition (PE-ALD) process. By introducing a plasma source to regulate the oxygen vacancy concentration, an oxygen vacancy concentration gradient is formed inside the resistive switching layer. The asymmetric oxygen vacancy distribution in the upper and lower directions helps to reduce the conversion power from the low resistance state to the high resistance state, optimize the resistance switching characteristics, thereby improving the conversion efficiency and reducing the power consumption during operation.

[0039] The resistive switching layer is constructed of two layers, the upper and lower layers, and the thickness of the two layers is the same to ensure a uniform distribution of oxygen vacancies in the entire device and improve the stability and consistency of the resistance switching characteristics. The total thickness of the resistive switching layer is 5-30nm. In addition, in the PE-ALD process, the plasma source used is H 2 , H 2 Plasma can effectively activate precursor molecules, promote reactions and reduce by-products while avoiding the introduction of unnecessary impurities.

[0040] In addition, the conversion power of RRAM devices is also affected by the barrier height at the interface. An oxygen-deficient interface (the interface between the resistive switching layer and the top electrode layer) will reduce the work function, while excess oxygen will increase the work function. The barrier height between the metal and the oxide will also change with the concentration of oxygen vacancies at the interface. The increase in oxygen vacancy concentration helps to reduce the power of the device. This solution inserts a plasma-assisted enhanced treatment process (i.e., PE-ALD) during the deposition of the resistive switching layer. The resistive switching layer formed by the PE-ALD treatment has more oxygen vacancies than the resistive switching layer formed by the ALD treatment, so that the interface between the resistive switching layer and the top electrode is rich in oxygen vacancies, reducing the barrier height, thereby further reducing the operating power consumption of the RRAM device.

[0041] The top electrode is a composite structure, including a bottom ruthenium layer and a top TiN layer. The top electrode and the bottom electrode together form a TiN-Ru-TiN hierarchical structure, in which the introduction of the ruthenium layer is key. Compared with the TiN layers at both ends, the ruthenium layer has a relatively low reactivity with oxygen, which means that in an interface environment with a high oxygen vacancy concentration, the ruthenium layer can play a stabilizing role, preventing unnecessary oxidation reactions from occurring, and also helping to further reduce the barrier height at the interface. This not only optimizes the interface characteristics between the top electrode and the resistive switching layer, but also enhances the performance and reliability of the entire device.

[0042] In this embodiment, the thickness of the ruthenium layer of the top electrode is controlled within the range of 5-20nm, which can ensure the advantages brought by the low work function without excessively increasing the cost or affecting other performances; the thickness of the TiN layer of the top electrode is 10-50nm to provide sufficient protection and adhesion without affecting the electron transfer efficiency.

[0043] The RRAM device of the present invention can be prepared by conventional preparation methods in the industry. The following provides a specific preparation method as an example, which is intended to illustrate the specific implementation of the present invention, but should not be regarded as limiting the scope of the present invention. The preparation method includes but is not limited to the following steps:

[0044] Step 1: Prepare the substrate. Select a silicon substrate and clean and dry it. During the cleaning process, use an acid solution or organic solvent to clean stubborn contaminants, then rinse with deionized water for 5 minutes and dry in a nitrogen atmosphere for 10 minutes to ensure that there are no impurities on the surface to ensure the quality of the subsequent deposition process.

[0045] Step 2: Deposit the bottom electrode. TiN is deposited on the substrate as the bottom electrode by a sputtering process, with the sputtering power set to 200 W and the sputtering time set to 30 minutes, to obtain a bottom electrode with a thickness of about 50 nm.

[0046] Step 3: Deposit the resistive layer. In order to ensure that the deposition thickness of atomic layer deposition (ALD) and plasma enhanced atomic layer deposition (PE-ALD) is the same, a segmented deposition method is used. First, the ZnO layer is deposited using ALD technology at a deposition temperature of 250°C, a deposition rate of 0.1nm / cycle, and a deposition time of 100 cycles to form a deposition layer with a thickness of 10nm. Then switch to PE-ALD to continue depositing the second half of the ZnO layer. The deposition temperature is increased to 320°C, the deposition rate is 0.10nm / cycle, and the deposition time is 100 cycles. During the plasma treatment, H 2 The flow rate is 50sccm, the processing time is 30 minutes, and the total thickness of the resistive switching layer is about 20nm. During this period, the transition from ALD to PE-ALD is ensured to be smooth to avoid interface defects.

[0047] Step 4: Deposit the top electrode. First, a 10 nm thick ruthenium layer is deposited by electron beam evaporation at an evaporation rate of 0.2 nm / s, and then a 20 nm thick TiN layer is deposited by sputtering at a sputtering power of 200 W for 20 minutes to form the top electrode.

[0048] Step 5: Performance test. Measure the resistance state of the RRAM device at different voltages, apply a voltage range of -5V to 5V, and a step size of 0.5V, and record the resistance values ​​of the low resistance state and the high resistance state; measure the durability of the RRAM device, perform 1000 resistance switching operations continuously, and record the stability of the resistance state; measure the storage window of the RRAM device and observe the amplitude of the resistance change at different voltages. In addition, multiple quality inspection steps are performed throughout the manufacturing process, such as ellipsometry to measure film thickness, four-probe test resistivity, and XRD analysis of crystal structure, to ensure that each layer meets the design requirements.

[0049] The above-mentioned ideal embodiments of the present invention are used as inspiration, but it is obvious to those skilled in the art that such embodiments are provided by way of example only. Those skilled in the art will think of many changes, modifications and alternatives without departing from the thought and spirit of the present invention. It should be understood that in the process of practicing the present invention, various alternatives to the embodiments of the present invention described herein may be adopted. The attached claims are intended to define the scope of protection of the present invention, and therefore cover the modular composition, equivalent or alternatives within the scope of protection of these claims.

Claims

1. A RRAM device using ruthenium metal as a top electrode, comprising, from bottom to top: A substrate, a bottom electrode, a resistive layer and a top electrode, wherein the resistive layer is constructed of two layers, the lower layer is formed using atomic layer deposition technology, and the upper layer is prepared using a plasma enhanced atomic layer deposition process; the top electrode is a composite structure, including a bottom ruthenium layer and a top TiN layer.

2. The RRAM device using ruthenium metal as the top electrode according to claim 1, characterized in that: The resistive switching layer is structured into two layers, an upper layer and an lower layer, and the two layers have the same thickness.

3. The RRAM device using ruthenium metal as the top electrode according to claim 1, characterized in that: The thickness of the bottom electrode is 30-100 nm.

4. The RRAM device using ruthenium metal as the top electrode according to claim 1, characterized in that: The thickness of the resistive switching layer is 5-30 nm.

5. The RRAM device using ruthenium metal as the top electrode according to claim 1, characterized in that: The thickness of the ruthenium layer is 5-20 nm, and the thickness of the TiN layer is 10-50 nm.

6. The RRAM device using ruthenium metal as the top electrode according to claim 1, characterized in that: H2 is used as a plasma source in the plasma enhanced atomic layer deposition process.

7. The RRAM device using ruthenium metal as the top electrode according to claim 1, characterized in that: The bottom electrode material is titanium nitride.

8. The RRAM device using ruthenium metal as the top electrode according to claim 1, characterized in that: The resistive switching layer is an oxide insulating layer.

9. The RRAM device using ruthenium metal as the top electrode according to claim 8, characterized in that: The material of the resistance switching layer is hafnium oxide, zinc oxide, zirconium oxide or tungsten oxide.

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