Display panel and display device

Abstract

The invention discloses a display panel and a display device. The display panel is provided with a display area and a non-display area, the display panel comprises an array substrate, an isolation structure, a plurality of sub-pixels, a plurality of virtual pixels and a touch control assembly, the array substrate and a driving circuit layer, and the isolation structure comprises a first isolation structure located in the display area and a second isolation structure located in the non-display area. The first isolation structure and the second isolation structure are arranged on the array substrate and are provided with a plurality of isolation openings; each sub-pixel is located in the display area and comprises a light-emitting structure and a first electrode which are stacked, and the light-emitting structure is located in the isolation opening of the first isolation structure; each virtual pixel is located in the non-display area and comprises a virtual light-emitting part and a first virtual electrode which are stacked, and the virtual light-emitting part is located in the isolation opening of the second isolation structure; at least part of the touch assembly is located on the sides, away from the array substrate, of the first electrodes and the first virtual electrodes. The performance of the display panel can be improved.

Description

Technical Field

[0001] This application belongs to the technical field of displays, and particularly relates to a display panel and a display device. Background Art

[0002] Flat panel display devices based on technologies such as Organic Light Emitting Display (OLED) and Light Emitting Diode (LED) are widely used in various consumer electronic products such as mobile phones, TVs, laptop computers, and desktop computers due to their advantages of high picture quality, power saving, thin body, and wide application range, and have become the mainstream in display devices.

[0003] However, the performance of current OLED display products needs to be improved. Summary of the Invention

[0004] The purpose of this application is to provide a display panel and a display device that can improve the performance of the display panel.

[0005] In a first aspect of this application, a display panel is provided. The display panel has a display area and a non-display area. The display panel includes an array substrate, an isolation structure, a plurality of sub-pixels and a plurality of virtual pixels, and a touch control component. The isolation structure includes a first isolation structure located in the display area and a second isolation structure located in the non-display area. Both the first isolation structure and the second isolation structure are disposed on the array substrate and are provided with a plurality of isolation openings; each sub-pixel is located in the display area and includes a stacked light-emitting structure and a first electrode, and the light-emitting structure is located within the isolation opening of the first isolation structure; each virtual pixel is located in the non-display area and includes a stacked virtual light-emitting portion and a first virtual electrode, and the virtual light-emitting portion is located within the isolation opening of the second isolation structure; at least a part of the touch control component is located on the side of the first electrode and the first virtual electrode away from the array substrate.

[0006] In some embodiments, the second isolation structure includes a conductive material, the first virtual electrode is electrically connected to the conductive material of the second isolation structure, and the second isolation structure is electrically connected to the first voltage power signal line of the display panel;

[0007] Preferably, the first isolation structure includes a conductive material, the first isolation structure is electrically connected to the second isolation structure, and the second isolation structure is electrically connected to the first voltage power signal line through the first isolation structure;

[0008] Alternatively, the first isolation structure and the second isolation structure are insulated from each other, and the second isolation structure is connected to the first voltage power signal line.

[0009] In some embodiments, the sub-pixel further includes a second electrode, and the second electrode, the light-emitting structure, and the first electrode are stacked in sequence in a direction away from the array substrate;

[0010] Preferably, the virtual pixel further includes a second virtual electrode, and the second virtual electrode, the virtual light-emitting part, and the first virtual electrode are stacked in sequence in a direction away from the array substrate; among the second electrode and the second virtual electrode, the second voltage power signal line of the display panel is only electrically connected to the second electrode;

[0011] Preferably, the first electrode and the first virtual electrode are arranged on the same layer.

[0012] In some embodiments, the non-display area includes a light-transmitting hole and a hole border area circumferentially surrounding the light-transmitting hole, the display area circumferentially surrounds at least a part of the hole border area, and the virtual pixel is located in the hole border area; or,

[0013] The non-display area includes a display border area of the display panel, the display border area circumferentially surrounds the display area, and the virtual pixel is located in the display border area of the display panel;

[0014] Optionally, the second isolation structure is circumferentially arranged around the light-transmitting hole;

[0015] Optionally, the second isolation structure has a first gap with the edge of the light-transmitting hole.

[0016] In some embodiments, the display panel further includes a shielding structure located in the non-display area. In a direction parallel to the array substrate, the shielding structure is arranged on a side of the second isolation structure away from the first isolation structure;

[0017] Optionally, the isolation opening is only provided on the first isolation structure and the second isolation structure;

[0018] Optionally, a third virtual electrode is arranged on a side of the shielding structure facing away from the array substrate, and the third virtual electrode and the first virtual electrode are arranged on the same layer;

[0019] Optionally, the orthographic projection of the outer contour of the touch component on the array substrate is within the range of the orthographic projection of the outer contour of the shielding structure on the array substrate;

[0020] Optionally, the non-display area includes a light-transmitting hole and a hole border area circumferentially surrounding the light-transmitting hole, and the shielding structure is located in the hole border area and circumferentially surrounds the light-transmitting hole;

[0021] Optionally, the second isolation structure is circumferentially arranged around the shielding structure;

[0022] Optionally, the shielding structure has a second gap with the edge of the light-transmitting hole;

[0023] Optionally, the display panel further includes a first dam, which is located in the hole border area and is arranged around the light-transmitting hole along the circumferential direction. The orthographic projection of the shielding structure on the array substrate is located outside the area surrounded by the first dam; or, a part of the orthographic projection of the shielding structure on the array substrate is located inside the area surrounded by the first dam.

[0024] Optionally, the non-display area includes the display border area of the display panel. The display border area is arranged around the display area along the circumferential direction. The shielding structure is located in the display border area and is arranged around the second isolation structure along the circumferential direction.

[0025] Optionally, the display panel further includes a second dam, which is located in the display border area and is arranged around the display area along the circumferential direction. The orthographic projection of the shielding structure on the array substrate is located inside the area surrounded by the second dam; or, a part of the orthographic projection of the shielding structure on the array substrate is located outside the area surrounded by the second dam.

[0026] Optionally, the first isolation structure, the second isolation structure and the shielding structure are arranged in the same layer.

[0027] In some embodiments, the array substrate is provided with a first groove located in the non-display area. The orthographic projection of the first groove on the array substrate is located within the orthographic projection range of the shielding structure on the array substrate.

[0028] Optionally, the array substrate is provided with a second groove located in the non-display area. The second groove is relatively farther away from the display area than the first groove.

[0029] Optionally, the orthographic projection of the second groove on the array substrate is located outside the orthographic projection range of the shielding structure on the array substrate.

[0030] In some embodiments, the array substrate further includes a substrate. The driving circuit layer is disposed on one side of the substrate. The driving circuit layer includes driving circuit lines. The orthographic projection of the driving circuit lines on the substrate at least partially overlaps with the orthographic projection of the virtual pixels on the substrate.

[0031] Optionally, the orthographic projection of the driving circuit lines on the substrate is located within the orthographic projection ranges of the virtual pixels and the second isolation structure on the substrate.

[0032] Optionally, the display panel further includes a shielding structure located in the non-display area. In the direction parallel to the array substrate, the shielding structure is disposed on the side of the second isolation structure away from the first isolation structure; driving circuit lines are provided at positions of the array substrate corresponding to the second isolation structure.

[0033] Optionally, the isolation openings are only provided on the first isolation structure and the second isolation structure.

[0034] Optionally, the orthographic projection of the shielding structure on the array substrate is located outside the orthographic projection of the driving circuit lines on the array substrate.

[0035] In some embodiments, the first isolation structure and the second isolation structure are disposed on the same layer;

[0036] Optionally, both the first isolation structure and the second isolation structure include a support layer and a shielding layer sequentially disposed in a direction away from the substrate;

[0037] Optionally, the orthographic projection of the support layer on the array substrate is within the orthographic projection of the shielding layer on the array substrate, and the projected area of the support layer on the array substrate is smaller than the projected area of the shielding layer on the array substrate;

[0038] Optionally, in a direction perpendicular to and pointing to the substrate, the cross-sectional area of the support layer gradually increases;

[0039] Optionally, in a direction perpendicular to and pointing to the substrate, the cross-sectional area of the shielding layer gradually increases.

[0040] In some embodiments, the display panel further includes a first encapsulation layer, and the first encapsulation layer is disposed on a side of the isolation structure away from the array substrate;

[0041] Optionally, the first encapsulation layer covers at least a part of the side wall surface of the isolation structure;

[0042] Optionally, the first encapsulation layer includes an inorganic material.

[0043] Optionally, the display panel further includes a second encapsulation layer, and the second encapsulation layer is disposed on a side of the first encapsulation layer away from the array substrate;

[0044] Optionally, the second encapsulation layer includes an organic material;

[0045] Optionally, the display panel further includes a dam, and the dam is disposed on the array substrate and located in the non-display area, and the dam is disposed around the circumference of the second encapsulation layer;

[0046] Optionally, the non-display area includes a light-transmitting hole and a hole border area disposed around the circumference of the light-transmitting hole, and the dam includes a first dam, and the first dam is located in the hole border area and disposed around the circumference of the light-transmitting hole;

[0047] And / or,

[0048] The non-display area includes a display border area of the display panel, the display border area is disposed around the circumference of the display area, and the dam includes a second dam, and the second dam is located in the display border area and disposed around the circumference of the display area;

[0049] Optionally, the orthographic projection of the second isolation structure on the array substrate is within the orthographic projection of the second dam on the array substrate.

[0050] The second aspect of the present application provides a display device, including the display panel of any of the above embodiments.

[0051] Embodiments of the present application provide a display panel and a display device. The isolation structure of the display panel in the embodiments of the present application includes a first isolation structure located in the display area and a second isolation structure located in the non-display area. By adding virtual pixels in the non-display area, the virtual pixels include a virtual light-emitting part and a first virtual electrode arranged in a stacked manner, and the virtual light-emitting part is located in the isolation opening of the second isolation structure. The second isolation structure and the virtual pixels can shield the signal between the touch control component in the non-display area and the array substrate, and the isolation opening of the second isolation structure can fully release the water vapor that has not been released completely in the lower film layer before evaporation, avoiding the problem that the film layer structure expands and deforms due to water vapor and the film layer structures are separated from each other. Secondly, when preparing the light-emitting structure, the light-emitting material deposited in the isolation opening of the second isolation structure forms a virtual light-emitting part, and there is no need to separately remove the virtual light-emitting part through processes such as etching, which simplifies the process steps and improves the production efficiency. Description of the Drawings

[0052] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings required to be used in the embodiments of the present application. Obviously, the following described drawings are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0053] Figure 1 It is a top view of the display panel provided by some embodiments of the present application;

[0054] Figure 2 It is a schematic cross-sectional view of the display panel provided by some embodiments of the present application;

[0055] Figure 3 It is a schematic cross-sectional view of the display panel provided by some embodiments of the present application from another angle;

[0056] Figure 4 It is a partial top view of the display panel provided by some embodiments of the present application;

[0057] Figure 5 It is a schematic cross-sectional view of the display panel provided by some other embodiments of the present application;

[0058] Figure 6 It is a schematic cross-sectional view of the display panel provided by some other embodiments of the present application;

[0059] Figure 7 It is a schematic cross-sectional view of the display panel provided by some other embodiments of the present application;

[0060] Figure 8Another partial top view of the display panel provided by some embodiments of the present application;

[0061] Figure 9 Schematic cross-sectional view of the display panel provided by some other embodiments of the present application;

[0062] Figure 10 Schematic cross-sectional view of the display panel provided by some other embodiments of the present application;

[0063] Figure 11 Another partial top view of the display panel provided by some embodiments of the present application;

[0064] Figure 12 Schematic cross-sectional view of the display panel provided by some other embodiments of the present application;

[0065] Figure 13 Top view of the display panel provided by some other embodiments of the present application;

[0066] Figure 14 Partial top view of the display panel provided by some other embodiments of the present application.

[0067] The reference numerals in the accompanying drawings are as follows:

[0068] Display panel 100; Display area AA; Non-display area NA; Light-transmitting hole NA1; Hole border area NA2; Display border area NA5; Array substrate 10; Substrate 11; Driving circuit layer 12; Driving circuit line 13; First groove 14; Second groove 15; Isolation structure 20; First isolation structure 21; Second isolation structure 22; Shielding structure 23; Isolation opening 20a; Support layer 24; Occlusion layer 25; Sub-pixel 30; Second electrode E2; Light-emitting structure 31; First electrode E1; Virtual pixel 40; Second virtual electrode C2; Third virtual electrode C3; Virtual light-emitting part 41; First virtual electrode C1; Pixel definition layer 50; Pixel limiting part 51; Pixel opening 52; Touch control component 60; First encapsulation layer 71; Second encapsulation layer 72; Dam 80; First dam 81; Second dam 82; First sub-area NA3; Third sub-area NA4; Thin film transistor TFT; Planarization layer 16. Detailed implementation manners

[0069] The following further describes in detail the implementation manners of the present application in conjunction with the accompanying drawings and embodiments. The detailed description and the accompanying drawings of the following embodiments are used to exemplarily illustrate the principle of the present application, but cannot be used to limit the scope of the present application, that is, the present application is not limited to the described embodiments.

[0070] In the description of the present application, it should be noted that unless otherwise specified, the meaning of "a plurality of" is two or more; the orientation or positional relationship indicated by the terms "upper", "lower", "left", "right", "inner", "outer", etc. is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present application. In addition, the terms "first", "second", "third", etc. are only used for descriptive purposes and cannot be construed as indicating or implying relative importance. "Vertical" is not strictly vertical, but within the allowable error range. "Parallel" is not strictly parallel, but within the allowable error range.

[0071] Referring to "embodiments" in the present application means that the specific features, structures or characteristics described in connection with the embodiments may be included in at least one embodiment of the present application. The phrase appearing at various positions in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described in the present application may be combined with other embodiments.

[0072] The orientation words appearing in the following description are all the directions shown in the figures and do not limit the specific structure of the present application. In the description of the present application, it should also be noted that unless otherwise clearly specified and limited, the terms "mounted", "connected", and "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be directly connected or indirectly connected through an intermediate medium. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0073] In some display panels, due to the presence of the isolation structure, the precision mask plate can be eliminated when depositing the light-emitting structure. However, when preparing sub-pixels of different colors, it is necessary to first deposit sub-pixels of a specific color over the entire surface of the display panel, and then perform an etching process on the pixel openings in the display panel for setting sub-pixels of other colors to remove the cathodes and light-emitting structures of the sub-pixels of the other colors. After that, the above operations are repeated for sub-pixels of different colors to form sub-pixels of different colors. Since the isolation structure is not provided in the non-display area of the display panel, when removing the cathodes of the sub-pixels of other colors, the cathodes in the non-display area will also be etched away, resulting in signal interference from the array substrate to the touch control component and reducing the performance of the display panel.

[0074] An embodiment of the present application provides a display panel, which may be an Organic Light Emitting Diode (OLED) display panel, or may also be other types of display panels, such as a Micro Light Emitting Diode (abbreviated as Micro-LED) or a Quantum Light Emitting Diode (abbreviated as QLED) display panel.

[0075] Please refer to Figures 1-4 , a first aspect of the present application provides a display panel 100. The display panel 100 has a display area AA and a non-display area NA. The display panel 100 includes an array substrate 10, an isolation structure 20, a plurality of sub-pixels 30 and a plurality of virtual pixels 40, and a touch control component 60. The array substrate 10 includes a driving circuit layer 12. The isolation structure 20 includes a first isolation structure 21 located in the display area AA and a second isolation structure 22 located in the non-display area NA. Both the first isolation structure 21 and the second isolation structure 22 are disposed on the array substrate 10 and are provided with a plurality of isolation openings 20a; each sub-pixel 30 is located in the display area AA and includes a stacked light-emitting structure 31 and a first electrode E1, and the light-emitting structure 31 is located in the isolation opening 20a of the first isolation structure 21; each virtual pixel 40 is located in the non-display area NA and includes a stacked virtual light-emitting portion 41 and a first virtual electrode C1, and the virtual light-emitting portion 41 is located in the isolation opening 20a of the second isolation structure 22; at least a part of the touch control component 60 is located on a side of the first electrode E1 and the first virtual electrode C1 facing away from the array substrate 10.

[0076] The array substrate 10 includes a substrate 11 and a driving circuit layer 12 disposed on the substrate 11. The substrate 11 may be a rigid substrate 11 made of materials such as glass or plastic, or may be a flexible substrate 11 made of materials such as polyether sulfone (PES), polyacrylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate, polyimide (PI), polycarbonate (PC), or cellulose acetate propionate (CAP). A driving circuit for controlling the light emission of the light-emitting structure 31 is disposed in the driving circuit layer 12. The driving circuit layer 12 is generally composed of inorganic film layers such as a metal layer, a semiconductor layer (active layer), and an insulating layer. By patterning these inorganic film layers, a driving circuit for controlling the light emission of the light-emitting structure 31 can be formed, and its specific circuit structure has various implementation manners, which will not be elaborated here.

[0077] Each sub-pixel 30 further includes a second electrode E2. The second electrode E2, the light-emitting structure 31, and the first electrode E1 are sequentially arranged in a direction away from the array substrate 10. The plurality of first electrodes E1 can be formed continuously as a whole layer, or the plurality of first electrodes E1 can be arranged at intervals. The driving circuit layer 12 of the array substrate 10 is provided with thin film transistors TFTs, and the second electrode E2 is electrically connected to the thin film transistors TFTs. After the second electrode E2 and the first electrode E1 are energized, the second electrode E2 can serve as an anode, the first electrode E1 serves as a cathode, and the thin film transistors TFTs drive the light-emitting structure 31 to emit light.

[0078] The light-emitting structure 31 can be formed by laminating multiple film layer structures. Exemplarily, the light-emitting structure 31 can include a hole injection layer (Hole Inject Layer, HIL), a hole transport layer (Hole Transport Layer, HTL), a light-emitting layer, an electron injection layer (Electron Inject Layer, EIL), and an electron transport layer (Electron Transport Layer, ETL) arranged in layers.

[0079] In some embodiments, the display panel 100 further includes a pixel definition layer 50 disposed on one side of the array substrate 10. The pixel definition layer 50 includes a pixel defining portion 51 and a pixel opening 52 surrounded by the pixel defining portion 51. The light-emitting structure 31 and the virtual light-emitting portion 41 are respectively disposed in the pixel opening 52. Among them, the isolation structure 20 is located on the side of the pixel defining portion 51 away from the substrate. The display area AA refers to the area where a picture can be displayed and is provided with sub-pixels 30. The non-display area NA refers to the area where a picture cannot be displayed and is generally used for routing, or for placing a camera, bonding terminals, test terminals, etc. For example, the non-display area NA can surround the display area AA circumferentially and is the outer border of the display panel 100. The non-display area NA can also be surrounded by the display area AA and is the area of the display panel 100 corresponding to the camera.

[0080] The isolation structure 20 can be a structure with a wider upper part and a narrower lower part, or a structure with an inwardly concave side wall surface, as long as it satisfies that the vapor deposition material cannot be continuously deposited on the side wall surface of the isolation structure 20. Exemplarily, the longitudinal section of the isolation structure 20 can be an inverted trapezoid, an X shape, or a T shape or an I-shaped structure.

[0081] The isolation structure 20 may extend to the non-display area NA, thereby including a first isolation structure 21 and a second isolation structure 22. The non-display area NA includes a first sub-area NA3, the isolation structure 20 located in the display area AA is the first isolation structure 21, and the isolation structure 20 located in the first sub-area NA3 is the second isolation structure 22. The isolation structure 20 is formed with an isolation opening 20a, and the light-emitting structure 31 is located in the isolation opening 20a of the first isolation structure 21. The multiple isolation openings 20a enclosed by the first isolation structure 21 and the multiple light-emitting structures 31 may be in a one-to-one correspondence, or the isolation opening 20a enclosed by the first isolation structure 21 may correspond to the multiple light-emitting structures 31, that is, the multiple light-emitting structures 31 are arranged in the isolation opening 20a enclosed by the first isolation structure 21. Similarly, the virtual light-emitting portion 41 is located in the isolation opening 20a of the second isolation structure 22. The multiple isolation openings 20a enclosed by the second isolation structure 22 and the multiple virtual light-emitting parts 41 can be in a one-to-one correspondence, or the isolation openings 20a enclosed by the second isolation structure 22 can correspond to the multiple virtual light-emitting parts 41, that is, the multiple virtual light-emitting parts 41 are arranged in the isolation openings 20a enclosed by the second isolation structure 22.

[0082] Specifically, during the preparation of the display panel 100, the isolation structure 20 is usually formed first, and then the light emitting structure 31 can be directly evaporated without the aid of a mask. In this process, due to the existence of the isolation structure 20, part of the light emitting material will be evaporated in the isolation opening 20a, and part of the light emitting material will be evaporated on the side of the isolation structure 20 away from the array substrate 10, so that the light emitting materials on different sides of the isolation structure 20 in the direction parallel to the plane of the array substrate 10 are discontinuous, and the light emitting structures 31 are separated from each other without the need for a mask. Since the evaporation of the light emitting structure 31 does not require a precision mask, the cost is reduced, the requirements for the process accuracy of the mask are reduced, and the shadow effect of the light emitting layer evaporated by the precision mask is avoided, and the spacing between the sub-pixels 30 can be reduced, thereby improving the brightness of the display panel 100. In addition, since the electron transport layer, electron injection layer, hole transport layer, hole injection layer, etc. of the light emitting structure 31 are all separated by the isolation structure 20, crosstalk between the sub-pixels 30 can be prevented, and the display effect of the display panel 100 can be improved. The virtual pixel 40 and the sub-pixel 30 can be prepared simultaneously in the same preparation process, so there is no need to add a mask plate, which can simplify the preparation process of the display panel 100 and improve the preparation efficiency of the display panel 100. When preparing the light-emitting structure 31, the light-emitting material deposited in the isolation opening 20a of the second isolation structure 22 forms the virtual light-emitting portion 41, and there is no need to remove the virtual light-emitting portion 41 separately through a process such as etching, which simplifies the process steps and improves production efficiency.

[0083] Not only can the second isolation structure 22 and the virtual pixel 40 shield the signals between the touch component 60 and the array substrate 10 in the non-display area NA, reducing interference with the touch signals, but also the isolation openings 20a of the second isolation structure 22 can fully release the water vapor that has not been completely released in the underlying film layer before evaporation, avoiding problems such as the film layer structure swelling and deforming due to water vapor and the film layer structures separating from each other, thereby improving the performance of the display panel 100.

[0084] In some embodiments, the first isolation structure 21 includes a conductive material, and the first isolation structure 21 is connected to the first voltage power signal line of the display panel 100.

[0085] Each first electrode E1 is electrically connected through the first isolation structure 21, thereby achieving electrical connection with the first voltage signal line through the first isolation structure 21. Exemplarily, if the first electrode E1 is a cathode, then the first voltage power signal line is the Vss signal line connected to the Vss pad, and the Vss pad can be connected to the Vss pin on the driving chip through a flexible circuit board, thereby receiving the negative voltage power signal provided by the driving chip. Since the first electrode E1 of the sub-pixel 30 is connected to the first voltage power signal line of the display panel 100, the first electrode E1 can better shield the signals between the touch component 60 and the array substrate 10, and through the combination of the first isolation structure 21, the interference with the touch signals can be better reduced, improving the performance of the display panel 100.

[0086] Preferably, the second isolation structures 22 all include a conductive material, and the first virtual electrode C1 is conducted with the conductive material of the second isolation structure 22. Each first virtual electrode C1 can be electrically connected through the second isolation structure 22 to form a whole-layer electrode layer, further improving the shielding effect on the touch component 60.

[0087] In some embodiments, the second isolation structure 22 is electrically connected to the first voltage power signal line. Specifically, the first isolation structure 21 is electrically connected to the second isolation structure 22, and the second isolation structure 22 is electrically connected to the first voltage power signal line through the first isolation structure 21.

[0088] Each of the first virtual electrodes C1 is electrically connected through the second isolation structure 22, so as to achieve electrical connection with the first voltage signal line through the second isolation structure 22 and the first isolation structure 21. Since the first virtual electrode C1 of the virtual pixel 40 is connected to the first voltage power signal line of the display panel 100, the first virtual electrode C1 can better shield the signals between the touch control component 60 and the array substrate 10. Moreover, through the combination of the second isolation structure 22, it is possible to better reduce the interference to the touch control signal and improve the performance of the display panel 100. The first electrode E1 and the first virtual electrode C1 are connected to the same voltage power signal line. Through the isolation structure 20, a whole-surface potential is formed to shield the touch control signal and the driving signal, and the shielding effect is better. In addition, in the embodiment of the present application, there is no need to electrically connect the second isolation structure 22 to the first voltage power signal line alone, thereby reducing the cost.

[0089] Alternatively, in some other embodiments, the first isolation structure 21 and the second isolation structure 22 are insulated from each other, and the second isolation structure 22 is connected to the first voltage power signal line. The first isolation structure 21 and the second isolation structure 22 are independently connected to the first voltage signal line, which can reduce signal crosstalk.

[0090] As Figure 6 shown, in some embodiments, the sub-pixel 30 further includes a second electrode E2. The second electrode E2, the light-emitting structure 31, and the first electrode E1 are sequentially stacked in a direction away from the array substrate 10. The driving circuit layer 12 of the array substrate 10 is provided with a thin-film transistor TFT. The second electrode E2 is electrically connected to the thin-film transistor TFT and is connected to the second voltage power signal line through the thin-film transistor TFT. For example, the second voltage power signal line is a positive voltage power signal line (VDD). After the second electrode E2 and the first electrode E1 are energized, the second electrode E2 can serve as an anode, and the first electrode E1 serves as a cathode, and the sub-pixel 30 can emit light. In the virtual pixel 40, the second virtual electrode C2 may not be provided. The virtual pixel 40 is only formed by the virtual light-emitting portion 41 and the first virtual electrode C1, so the virtual pixel 40 does not emit light.

[0091] As Figure 7 shown, in some other embodiments, each virtual pixel 40 may further include a second virtual electrode C2. The second virtual electrode C2, the virtual light-emitting portion 41, and the first virtual electrode C1 are sequentially arranged in a direction away from the array substrate 10. Among the second electrode E2 and the second virtual electrode C2, the second voltage signal line of the display panel 100 is only electrically connected to the second electrode E2.

[0092] The second electrode E2 is connected to the second voltage power supply signal line of the display panel 100, and the second virtual electrode C2 is not connected to the second voltage power supply signal line. Since the second electrode E2 is connected to the electrical signal while the second virtual electrode C2 is not connected to the electrical signal, the sub-pixel 30 can emit light while the virtual pixel 40 does not emit light.

[0093] Specifically, the second electrode E2 and the second virtual electrode C2 can be arranged in the same layer, made of the same material, and prepared through the same process step; the light-emitting structure 31 and the virtual light-emitting part 41 can be arranged in the same layer, made of the same material, and prepared through the same process step; the first electrode E1 and the first virtual electrode C1 can be arranged in the same layer, made of the same material, and prepared through the same process step. The second virtual electrode C2 is not connected to the thin-film transistor TFT of the array substrate 10, so the virtual pixel 40 does not emit light. That is to say, the virtual pixel 40 and the sub-pixel 30 have the same structure and are prepared through the same manufacturing process, only that the virtual pixel 40 is not connected to the driving circuit.

[0094] Please refer to Figure 1 and Figure 8 , in some embodiments, the display area AA is arranged to surround at least a part of the circumferential direction of the non-display area NA. The non-display area NA includes a light-transmitting hole NA1 and a hole border area NA2 arranged to surround the circumferential direction of the light-transmitting hole NA1. The virtual pixel 40 is located in the hole border area NA2.

[0095] In the direction perpendicular to the array substrate 10, the non-display area NA is correspondingly arranged with the camera. The light-transmitting hole NA1 allows external light to enter to reach the camera. Since the virtual pixel 40 is arranged in the hole border area NA2, the virtual pixel 40 and the second isolation structure 22 can reduce the interference of the driving signal in the array substrate 10 on the touch signal of the upper touch component 60.

[0096] As Figure 8 shown, optionally, the second isolation structure 22 is arranged to surround the circumferential direction of the light-transmitting hole NA1. The second isolation structure 22 is a ring structure, and the virtual pixels 40 can be distributed at intervals along the circumferential direction of the light-transmitting hole NA1, which can better shield the signal between the array substrate 10 in the hole border area NA2 and the touch component 60.

[0097] Optionally, the second isolation structure 22 has a first gap with the edge of the light-transmitting hole NA1. That is to say, the second isolation structure 22 has a certain distance from the cutting edge of the light-transmitting hole NA1, which can prevent water vapor from entering the virtual pixel 40 and further entering the sub-pixel 30, affecting the light-emitting efficiency of the light-emitting structure 31.

[0098] Alternatively, in some other embodiments, the non-display area NA includes a display border area NA5 of the display panel 100. The display border area NA5 is disposed around the circumference of the display area AA. For example, display border areas NA5 are provided on the upper side, lower side, left side, and right side of the display area AA. Since the non-display area NA is provided with virtual pixels 40, the virtual pixels 40 and the second isolation structure 22 can reduce the interference of the driving signal in the array substrate 10 on the touch signal of the upper touch component 60.

[0099] Please refer to Figure 2 、 Figure 8 and Figure 9 In some embodiments, the display panel further includes a shielding structure 23 located in the hole border area NA2. In a direction parallel to the array substrate 10, the shielding structure 23 is disposed on a side of the second isolation structure 22 away from the first isolation structure 21. The shielding structure 23 has a signal shielding effect on the touch component 60 located above it, further reducing the signal interference to the touch component 60.

[0100] Optionally, the isolation opening 20a is only provided on the first isolation structure 21 and the second isolation structure 22, and the shielding structure 23 is not provided with the isolation opening 20a. The shielding structure 23 is relatively closer to the light-transmitting hole NA1 than the second isolation structure 22. By not providing the isolation opening 20a in the shielding structure 23, water vapor can be further prevented from invading the display area AA.

[0101] Optionally, a third virtual electrode C3 is provided on a side of the shielding structure 23 facing away from the array substrate 10. The third virtual electrode C3 and the first virtual electrode C1 are provided on the same layer. The shielding structure 23 and the third virtual electrode C3 provided on the shielding structure 23 can further reduce the interference of the driving signal on the touch signal of the upper touch component 60. The third virtual electrode C3 and the first virtual electrode C1 are prepared by the same process step, improving the preparation efficiency.

[0102] Optionally, the orthographic projection of the outer contour of the touch component 60 on the array substrate 10 is within the range of the orthographic projection of the outer contour of the shielding structure 23 on the array substrate 10.

[0103] The touch component 60 may include touch electrodes and partial signal lines connected to the touch electrodes. For example, touch ground signal lines, touch driving signal lines, touch receiving signal lines, etc. The outermost side of the touch component 60 along the direction parallel to the array substrate 10 is the outer contour of the touch component 60, and the outermost side of the shielding structure 23 along the direction parallel to the array substrate 10 is the outer contour of the shielding structure 23. The orthographic projection of the outer contour of the touch component 60 on the array substrate 10 is set within the orthographic projection of the outer contour of the shielding structure 23 on the array substrate 10, and the outer part of the touch component 60 can be completely covered by the shielding structure 23. The shielding structure 23 can also reduce touch radio frequency interference, thereby further improving the performance of the display panel 100.

[0104] Optionally, the non-display area NA includes a light-transmitting hole NA1 and a hole border area NA2 circumferentially surrounding the light-transmitting hole NA1. The shielding structure 23 is located in the hole border area NA2 and is circumferentially arranged around the light-transmitting hole NA1; the shielding structure 23 is annularly arranged on the outer periphery of the light-transmitting hole NA1, and can prevent water vapor from invading the display area AA from all directions.

[0105] Optionally, the second isolation structure 22 is circumferentially arranged around the shielding structure 23. The second isolation structure 22 is annularly arranged in the hole border area NA2, and can better shield the signals between the array substrate 10 and the touch component 60 in the hole border area NA2.

[0106] Optionally, there is a second gap between the shielding structure 23 and the edge of the light-transmitting hole NA1. There is a certain gap between the shielding structure 23 and the cutting edge of the light-transmitting hole NA1, to avoid cutting into the shielding structure 23 when forming the light-transmitting hole NA1, and after cracks are generated, water vapor enters the display area AA through the cracks of the isolation structure 20.

[0107] Please refer to Figure 10 and Figure 11 , optionally, the display panel 100 further includes a first dam 81. The first dam 81 is located in the hole border area NA2 and is circumferentially arranged around the light-transmitting hole NA1. The orthographic projection of the shielding structure 23 on the array substrate 10 is located outside the area surrounded by the first dam 81. The first dam 81 is circumferentially arranged around the second encapsulation layer 72. By providing the first dam 81, the second encapsulation layer 72 can be limited within the first dam 81 to prevent the encapsulation material of the second encapsulation layer 72 from flowing outwards. "The orthographic projection of the shielding structure 23 on the array substrate 10 is located outside the area surrounded by the first dam 81" means that the shielding structure 23 is limited within the first dam 81, so that the upper part of the shielding structure 23 can be protected by multiple encapsulation film layers such as the first encapsulation layer 71 and the second encapsulation layer 72, thereby improving the reliability of the display panel.

[0108] Or, as Figure 12As shown, a part of the orthographic projection of the shielding structure 23 on the array substrate 10 is located within the region surrounded by the first dam 81. That is to say, a part of the shielding structure 23 is located below the first dam 81, and another part of the shielding structure 23 is limited within the first dam 81, which can also protect the shielding structure 23 to a certain extent and improve the reliability of the display panel.

[0109] Please refer to Figure 10 and Figure 13 , optionally, the non-display area NA includes the display border area NA5 of the display panel 100. The display border area NA5 is arranged to surround the display area AA in the circumferential direction. The shielding structure 23 is located in the display border area NA5 and is arranged to surround the second isolation structure 22 in the circumferential direction.

[0110] Optionally, the display panel 100 further includes a second dam 82. The second dam 82 is located in the display border area NA5 and is arranged to surround the display area AA in the circumferential direction. The orthographic projection of the shielding structure 23 on the array substrate 10 is located within the region surrounded by the second dam 82. By providing the second dam 82, the second encapsulation layer 72 can be limited within the second dam 82 to prevent the encapsulation material of the second encapsulation layer 72 from flowing outwards. "The orthographic projection of the shielding structure 23 on the array substrate 10 is located outside the region surrounded by the second dam 82" means that the shielding structure 23 is limited within the second dam 82, so that the upper part of the shielding structure 23 can be protected by multiple encapsulation film layers such as the first encapsulation layer 71 and the second encapsulation layer 72, thereby improving the reliability of the display panel.

[0111] Or, as Figure 12 shown, a part of the orthographic projection of the shielding structure 23 on the array substrate 10 is located outside the region surrounded by the second dam 82. That is to say, a part of the shielding structure 23 is located below the second dam 82, and another part of the shielding structure 23 is limited outside the second dam 82, which can also protect the shielding structure 23 to a certain extent and improve the reliability of the display panel.

[0112] Optionally, the first isolation structure 21, the second isolation structure 22 and the shielding structure 23 are arranged on the same layer. The second isolation structure 22 and the shielding structure 23 can be prepared through the same manufacturing process step, but the shapes of the second isolation structure 22 and the shielding structure 23 are different. When the isolation opening 20a is formed in the second isolation structure 22 through the exposure and development steps, the isolation opening 20a is not provided in the shielding structure 23. Exemplarily, the first isolation structure 21, the second isolation structure 22 and the shielding structure 23 are arranged on the same layer and prepared through the same manufacturing process step. The hole border area NA2 is formed by the first sub-area NA3 and the second sub-area NA4. The isolation structure located in the display area AA is the first isolation structure 21, the isolation structure located in the first sub-area NA3 is the second isolation structure 22, and the isolation structure located in the second sub-area NA4 is the third isolation structure 23. The embodiments of the present application can improve the manufacturing efficiency of the display panel 100.

[0113] Please refer to Figure 10 and Figure 14 , in some embodiments, the array substrate 10 is provided with a first groove 14 located in the non-display area NA. The orthographic projection of the first groove 14 on the array substrate 10 is within the range of the orthographic projection of the shielding structure 23 on the array substrate 10. Exemplarily, the first groove 14 is arc-shaped, and the part of the shielding structure 23 corresponding to the first groove 14 is also arc-shaped. By providing the first groove 14, the length of the shielding structure 23 can be extended, and the path for water vapor to enter the display area AA can be extended.

[0114] Optionally, the array substrate 10 is provided with a second groove 15 located in the non-display area NA. The second groove 15 is relatively farther away from the display area AA than the first groove 14. By adding the second groove 15, the path for water vapor to enter the display area AA can be further extended.

[0115] Optionally, the orthographic projection of the second groove 15 on the array substrate 10 is outside the range of the orthographic projection of the shielding structure 23 on the array substrate 10. That is to say, the second groove 15 is provided at a position closer to the cutting edge of the light-transmitting hole NA1, and the shielding structure 23 is not provided at the position of the second groove 15, which can prevent water vapor from entering the shielding structure 23 to a certain extent, thereby reducing the probability of water vapor entering the display area AA from the shielding structure 23.

[0116] In the top view direction of the display panel 100, the first groove 14 and the second groove 15 can be arranged in a ring shape to further reduce the probability of water vapor entering the display area AA.

[0117] In some embodiments, the array substrate 10 includes a substrate 11 and a driving circuit layer 12 provided on one side of the substrate 11. The driving circuit layer 12 includes driving circuit lines 13, and the orthographic projection of the driving circuit lines 13 on the substrate 11 at least partially overlaps with the orthographic projection of the virtual pixels 40 on the substrate 11.

[0118] The driving circuit line 13 can be a data line, a GIP (Gate in panel) winding, etc. The orthographic projection of the driving circuit line 13 on the substrate 11 and the orthographic projection of the virtual pixel 40 on the substrate 11 overlap at least partially, and the orthographic projection of the touch control component 60 on the substrate 11 and the orthographic projection of the virtual pixel 40 on the substrate 11 also overlap at least partially. A virtual pixel 40 is disposed between the touch control component 60 and the driving circuit line 13, so as to be able to shield the signal interference of the driving circuit line 13 on the touch control component 60.

[0119] Optionally, the orthographic projection of the driving circuit line 13 on the substrate 11 is located within the orthographic projection ranges of the virtual pixel 40 and the second isolation structure 22 on the substrate 11. The virtual pixel 40 and the second isolation structure 22 cover the driving circuit line 13, minimizing the interference of the driving circuit line 13 on the touch control signal.

[0120] In some embodiments, the display panel 100 further includes a shielding structure 23 located in the non-display area NA. In the direction parallel to the array substrate 10, the shielding structure 23 is disposed on a side of the second isolation structure 22 away from the first isolation structure 21, and a driving circuit line 13 is disposed at a position of the array substrate 10 corresponding to the second isolation structure 22.

[0121] The shielding structure 23 has a signal shielding effect on the touch control component 60 located above it, further reducing the signal interference on the touch control component 60. A second isolation structure 22 is disposed between the touch control component 60 and the driving circuit line 13, so as to be able to ensure shielding of the signal interference of the driving circuit line 13 on the touch control component 60.

[0122] Optionally, the isolation opening 20a is only provided on the first isolation structure 21 and the second isolation structure 22, and the shielding structure 23 is not provided with the isolation opening 20a.

[0123] That is to say, the shielding structure 23 is provided in an area where there is no driving circuit line 13 below and there is a touch control component 60 above. This area is relatively close to the light-transmitting hole NA1. Therefore, by providing the shielding structure 23 without the isolation opening 20a in this area, water vapor can be prevented from invading the display area AA.

[0124] Optionally, the orthographic projection of the shielding structure 23 on the array substrate 10 is located outside the orthographic projection of the driving circuit line 13 on the array substrate 10, and no driving circuit line 13 is provided at a position of the array substrate 10 corresponding to the shielding structure 23. There is no driving circuit line 13 in this area, and no planarization layer 16 is provided either. Therefore, there is no risk of the driving circuit line 13 and the planarization layer 16 detaching from each other, and the isolation opening 20a can be not provided to release the water vapor of the planarization layer 16, reducing the cost.

[0125] Optionally, a third virtual electrode C3 is provided on the side of the shielding structure 23 facing away from the array substrate 10. The third virtual electrode C3 and the first virtual electrode C1 are provided on the same layer, which can reduce the signal interference of the driving circuit line 13 on the touch component 60 obliquely above.

[0126] In some embodiments, the first isolation structure 21 and the second isolation structure 22 are provided on the same layer. The first isolation structure 21 and the second isolation structure 22 can be prepared by the same manufacturing process step, and the shape of the second isolation structure 22 can also be the same as that of the shielding structure 23.

[0127] Optionally, the first isolation structure 21, the second isolation structure 22, and the shielding structure 23 are all provided on the same layer and prepared by the same manufacturing process step. The first isolation structure 21 and the second isolation structure 22 have the same shape and are both provided with isolation openings 20a. The shape of the shielding structure 23 is different from the shapes of the first isolation structure 21 and the second isolation structure 22 respectively, and no isolation openings 20a are provided.

[0128] As Figure 3 shown, in some embodiments, the first isolation structure 21 and the second isolation structure 22 both include a support layer 24 and a shielding layer 25 arranged in sequence along the direction away from the substrate. The adjacent light-emitting structures 31 can be better isolated by the support layer 24 and the shielding layer 25. Moreover, the support layer 24 and the shielding layer 25 can be prepared from different materials to meet different requirements.

[0129] Optionally, the orthographic projection of the support layer 24 on the array substrate 10 is within the range of the orthographic projection of the shielding layer 25 on the array substrate 10, and the projected area of the support layer 24 on the array substrate 10 is smaller than the projected area of the shielding layer 25 on the array substrate 10. The edge of the shielding layer 25 protrudes and extends along the circumferential direction of the support layer 24, and the first electrode E1 can be blocked by the support layer 24. The height of the support layer 24 can be set to be relatively high, and the width of the shielding layer 25 is relatively wide. With the combination of the support layer 24 and the shielding layer 25, the longitudinal section of the isolation structure 20 is in a T-shaped structure. Compared with the embodiment in which the entire isolation structure 20 is set as an inverted trapezoid structure, the isolation structure 20 of the embodiment of the present application can more deeply isolate the first electrode E1, and the upper shielding layer 25 can play a better role in reflection and refraction, making the display effect more distinct and bright.

[0130] Optionally, in the direction perpendicular to and pointing to the substrate, the cross-sectional area of the support layer 24 gradually increases. The support layer 24 can be made of a metal material, and the longitudinal section of the support layer 24 is set as a regular trapezoid. This not only facilitates the manufacturing process, but also can improve the overlapping effect of the first electrode E1 when the isolation structure 20 includes a conductive material, facilitating the first electrode E1 to be electrically connected through the isolation structure 20 and connected to the same voltage power signal terminal, simplifying the structure and reducing the cost.

[0131] Optionally, in a direction perpendicular to and pointing towards the substrate, the cross-sectional area of the shielding layer 25 gradually increases, that is, the longitudinal section of the shielding layer 25 is a positive trapezoid, which is not only convenient for process preparation, but also can reduce the shielding of the evaporation deposition of the first electrode E1.

[0132] Such as Figure 10 As shown, in some embodiments, the display panel 100 further includes a first encapsulation layer 71, and the first encapsulation layer 71 is disposed on a side of the isolation structure 20 away from the array substrate 10. The first encapsulation layer 71 can protect the sub-pixels 30 from the external environment (such as air and water), prevent air and moisture from penetrating into the display panel 100, and extend the service life and stability of the light-emitting structure 31. The encapsulation layer can also prevent impurities and harmful substances from entering the display panel 100, thereby ensuring the performance and quality of the display panel 100.

[0133] Optionally, the first encapsulation layer 71 covers at least a part of the side wall surface of the isolation structure 20, which can better protect the isolation structure 20 and further effectively isolate harmful substances such as moisture and oxygen from the outside from entering the inside of the sub-pixels 30.

[0134] Optionally, the first encapsulation layer 71 includes an inorganic material. Exemplarily, the first encapsulation layer 71 can be made of materials such as silicon oxide, silicon nitride, or silicon oxynitride, which can provide good mechanical support and encapsulation protection to prevent the display panel 100 from being affected by the environment. At the same time, the first encapsulation layer 71 can also effectively isolate harmful substances such as moisture and oxygen from the outside from entering the inside of the display panel 100, thereby improving the service life and stability of the display panel 100.

[0135] In some embodiments, the display panel 100 further includes a second encapsulation layer 72, and the second encapsulation layer 72 is disposed on a side of the first encapsulation layer 71 away from the array substrate 10. The second encapsulation layer 72 can further isolate moisture, oxygen, etc. from the outside from entering the inside of the display panel 100.

[0136] Optionally, the second encapsulation layer 72 includes an organic material. The second encapsulation layer 72 can be made of an organic material such as a polymer. The thickness of the second encapsulation layer 72 is greater than that of the first encapsulation layer 71 and has stronger flexibility, so it can better adapt to the bending and curvature of the display panel 100. Moreover, the organic material can also play a role in buffering external forces.

[0137] In some embodiments, the display panel 100 further includes a dam 80, and the dam 80 is disposed on the array substrate 10 and located in the non-display area NA. The dam 80 is disposed around the circumference of the second encapsulation layer 72. By providing the dam 80, the second encapsulation layer 72 can be limited within the dam 80 to prevent the encapsulation material of the second encapsulation layer 72 from flowing outwards.

[0138] Optionally, the non-display area NA includes a light-transmitting hole NA1 and a hole border area NA2 disposed around the circumference of the light-transmitting hole NA1. The dam 80 includes a first dam 81, and the first dam 81 is located in the hole border area NA2 and disposed around the circumference of the light-transmitting hole NA1; and / or, the non-display area NA includes a display border area NA5 of the display panel 100, the display border area NA5 is disposed around the circumference of the display area AA, and the dam 80 includes a second dam 82, and the second dam 82 is located in the display border area NA5 and disposed around the circumference of the display area AA.

[0139] Optionally, the orthographic projection of the second isolation structure 22 on the array substrate 10 is within the range of the orthographic projection of the dam 80 on the array substrate 10. By disposing the dam 80 outside the second isolation structure 22, it is possible to make the orthographic projection of the second encapsulation layer 72 on the array substrate 10 cover the orthographic projection of the second isolation structure 22 on the array substrate 10, better protecting the virtual pixel 40 and further preventing moisture from entering the display area AA from the virtual pixel 40 through the isolation structure 20.

[0140] A second aspect of the present application provides a display device, including the display panel 100 of any of the above embodiments.

[0141] A second aspect of the present application provides a display device, including the display panel 100 of any of the above embodiments or the display panel 100 prepared by the above preparation method. Since this display device adopts all the technical solutions of all the above embodiments, it at least has all the beneficial effects brought by the technical solutions of the above embodiments, which will not be elaborated one by one here.

[0142] The display device can be any device with a display function. For example, it can be a mobile device such as a mobile phone, a tablet computer, a notebook computer, a handheld computer, a vehicle-mounted electronic device, a wearable device, an ultra-mobile personal computer (UMPC for short), a netbook or a personal digital assistant (PDA for short), etc., or it can also be a non-mobile device such as a personal computer (PC for short), a television (TV for short), a teller machine or a self-service machine, etc.

[0143] Although the disclosed embodiments of the present application are as above, the described content is only an embodiment adopted for the convenience of understanding the present application and is not used to limit the present invention. Any person skilled in the art within the technical field to which the present application belongs can make any modifications and changes in the form of implementation and details without departing from the spirit and scope disclosed by the present application. However, the protection scope of the present application shall still be subject to the scope defined by the appended claims.

[0144] As described above, it is only the specific implementation manner of the present application. Those skilled in the art can clearly understand that for the convenience and brevity of description, the replacement of other connection manners described above, etc., can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein. It should be understood that the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of various equivalent modifications or replacements, and these modifications or replacements should all be covered within the protection scope of the present application.

Claims

1. A display panel, characterized in that, the display panel has a display area and a non-display area, and the display panel includes: an array substrate including a driving circuit layer; an isolation structure including a first isolation structure in the display area and a second isolation structure in the non-display area. Both the first isolation structure and the second isolation structure are disposed on one side of the array substrate and are provided with a plurality of isolation openings; a plurality of sub-pixels and a plurality of virtual pixels. Each sub-pixel is located in the display area and includes a stacked light-emitting structure and a first electrode, and the light-emitting structure is located in the isolation opening of the first isolation structure; each virtual pixel is located in the non-display area and includes a stacked virtual light-emitting portion and a first virtual electrode, and the virtual light-emitting portion is located in the isolation opening of the second isolation structure; a touch control component, at least partially located on a side of the first electrode and the first virtual electrode away from the array substrate.

2. The display panel according to claim 1, characterized in that, the second isolation structure includes a conductive material, the first virtual electrode is electrically connected to the conductive material of the second isolation structure, and the second isolation structure is electrically connected to the first voltage power signal line of the display panel; Preferably, the first isolation structure includes a conductive material, the first isolation structure is electrically connected to the second isolation structure, and the second isolation structure is electrically connected to the first voltage power signal line through the first isolation structure; Alternatively, the first isolation structure and the second isolation structure are insulated from each other, and the second isolation structure is connected to the first voltage power signal line.

3. The display panel according to claim 1, characterized in that, the sub-pixel further includes a second electrode, and the second electrode, the light-emitting structure and the first electrode are stacked in sequence in a direction away from the array substrate; Preferably, the virtual pixel further includes a second virtual electrode, and the second virtual electrode, the virtual light-emitting portion and the first virtual electrode are stacked in sequence in a direction away from the array substrate; Optionally, among the second electrode and the second virtual electrode, the second voltage power signal line of the display panel is only electrically connected to the second electrode; Optionally, the first electrode and the first virtual electrode are disposed in the same layer.

4. The display panel according to claim 1, characterized in that, the non-display area includes a light-transmitting hole and a hole border area circumferentially surrounding the light-transmitting hole, the display area circumferentially surrounds at least a part of the hole border area, and the virtual pixel is located in the hole border area; or, the non-display area includes a display border area of the display panel, the display border area circumferentially surrounds the display area, and the virtual pixel is located in the display border area of the display panel; Optionally, the second isolation structure circumferentially surrounds the light-transmitting hole; Optionally, the second isolation structure has a first gap from the edge of the light-transmitting hole.

5. The display panel according to claim 1, characterized in that, The display panel further includes a shielding structure located in the non-display area. In a direction parallel to the array substrate, the shielding structure is disposed on a side of the second isolation structure away from the first isolation structure; Optionally, the isolation opening is only provided on the first isolation structure and the second isolation structure; Optionally, a third virtual electrode is disposed on a side of the shielding structure facing away from the array substrate, and the third virtual electrode and the first virtual electrode are provided on the same layer; Optionally, a positive projection of an outer contour of the touch control component on the array substrate is located within a range of a positive projection of an outer contour of the shielding structure on the array substrate; Optionally, the non-display area includes a light-transmitting hole and a hole border area circumferentially surrounding the light-transmitting hole, and the shielding structure is located in the hole border area and circumferentially surrounds the light-transmitting hole; Optionally, the second isolation structure circumferentially surrounds the shielding structure; Optionally, a second gap exists between an edge of the shielding structure and an edge of the light-transmitting hole; Optionally, the display panel further includes a first dam, the first dam is located in the hole border area and circumferentially surrounds the light-transmitting hole, and a positive projection of the shielding structure on the array substrate is located outside a region surrounded by the first dam; Alternatively, a part of a positive projection of the shielding structure on the array substrate is located within a region surrounded by the first dam; Optionally, the non-display area includes a display border area of the display panel, the display border area circumferentially surrounds the display area, and the shielding structure is located in the display border area and circumferentially surrounds the second isolation structure; Optionally, the display panel further includes a second dam, the second dam is located in the display border area and circumferentially surrounds the display area, and a positive projection of the shielding structure on the array substrate is located within a region surrounded by the second dam; Alternatively, a part of a positive projection of the shielding structure on the array substrate is located outside a region surrounded by the second dam; Optionally, the first isolation structure, the second isolation structure, and the shielding structure are provided on the same layer.

6. The display panel according to claim 5, wherein, the array substrate is provided with a first groove located in the non-display area, and a positive projection of the first groove on the array substrate is located within a range of a positive projection of the shielding structure on the array substrate; Optionally, the array substrate is provided with a second groove located in the non-display area, and the second groove is farther away from the display area than the first groove; Optionally, a positive projection of the second groove on the array substrate is located outside a range of a positive projection of the shielding structure on the array substrate.

7. The display panel according to claim 1, wherein, the array substrate further includes a substrate, the driving circuit layer is disposed on one side of the substrate, the driving circuit layer includes driving circuit lines, and a positive projection of the driving circuit lines on the substrate at least partially overlaps with a positive projection of the virtual pixels on the substrate; Optionally, the positive projection of the driving circuit line on the substrate is within the range of the positive projection of the virtual pixel and the second isolation structure on the substrate; Optionally, the display panel further includes a shielding structure located in the non-display area. In a direction parallel to the array substrate, the shielding structure is disposed on a side of the second isolation structure away from the first isolation structure; a driving circuit line is provided at a position of the array substrate corresponding to the second isolation structure; Optionally, the isolation openings are only provided on the first isolation structure and the second isolation structure; Optionally, the positive projection of the shielding structure on the array substrate is outside the positive projection of the driving circuit line on the array substrate.

8. The display panel according to claim 1, characterized in that, the first isolation structure and the second isolation structure are provided on the same layer; Optionally, both the first isolation structure and the second isolation structure include a support layer and a shielding layer sequentially provided in a direction away from the substrate; Optionally, the positive projection of the support layer on the array substrate is within the range of the positive projection of the shielding layer on the array substrate, and the projected area of the support layer on the array substrate is smaller than the projected area of the shielding layer on the array substrate; Optionally, in a direction perpendicular to and pointing to the substrate, the cross-sectional area of the support layer gradually increases; Optionally, in a direction perpendicular to and pointing to the substrate, the cross-sectional area of the shielding layer gradually increases.

9. The display panel according to claim 1, characterized in that, the display panel further includes a first encapsulation layer, and the first encapsulation layer is provided on a side of the isolation structure away from the array substrate; Optionally, the first encapsulation layer covers at least a partial side wall surface of the isolation structure; Optionally, the first encapsulation layer includes an inorganic material; Optionally, the display panel further includes a second encapsulation layer, and the second encapsulation layer is provided on a side of the first encapsulation layer away from the array substrate; Optionally, the second encapsulation layer includes an organic material; Optionally, the display panel further includes a dam, and the dam is provided on the array substrate and located in the non-display area, and the dam is provided to surround the second encapsulation layer in a circumferential direction; Optionally, the non-display area includes a light-transmitting hole and a hole border area provided to surround the light-transmitting hole in a circumferential direction, and the dam includes a first dam, and the first dam is located in the hole border area and provided to surround the light-transmitting hole in a circumferential direction; and / or, the non-display area includes a display border area of the display panel, the display border area is provided to surround the display area in a circumferential direction, and the dam includes a second dam, and the second dam is located in the display border area and provided to surround the display area in a circumferential direction; Optionally, the positive projection of the second isolation structure on the array substrate is within the range of the positive projection of the second dam on the array substrate.

10. A display device, characterized in that, it includes the display panel according to any one of claims 1 to 9.

Images