A driving method, system and display panel of a display panel

Abstract

The application provides a display panel driving method, system and display panel, and belongs to the technical field of display driving. In the application, first, a refresh enable signal for controlling whether the to-be-displayed image data of each pixel row in each frame of to-be-displayed image is refreshed or not is acquired. Then, when the display panel is in a target refresh state according to the refresh enable signal, the output of the clock signal is stopped. Since the refresh enable signal can determine whether the to-be-displayed image data of each pixel row in each frame of to-be-displayed image needs to be refreshed or not, the refresh condition of the data of the pixel row can be accurately acquired. When the display panel is in the target refresh state according to the refresh enable signal, the output of the clock signal can be stopped, without affecting the normal function of the display panel. Meanwhile, after the output of the clock signal is stopped, the circuit related to the clock signal also stops working, so that the power consumption of the display panel in the partition frequency division application is further reduced.

Description

Technical Field

[0001] This application relates to the field of display driver technology, specifically to a driving method, system, and display panel for a display panel. Background Technology

[0002] Multi-Area Frequency Refresh (MAFR) technology, a core innovation of next-generation display systems, employs a control strategy that dynamically divides display areas and assigns independent refresh rates to different areas. For example, based on human visual characteristics and screen content features, this technology can divide the screen into static, low-dynamic, and high-dynamic areas, each driven by a different refresh rate (e.g., 1Hz, 60Hz, 120Hz). In always-on display scenarios on mobile devices, MAFR technology allows static information such as clocks and notifications to maintain display at ultra-low refresh rates, while dynamic content areas maintain smooth refresh, theoretically significantly reducing overall screen power consumption while ensuring basic interactive needs are met.

[0003] Currently, to achieve the zone-based frequency division function, it is necessary to control the refresh timing of each zone through independent clock and data signals. A timing controller is also needed to coordinate the refresh cycles of each zone, utilizing vertical and horizontal blanking periods to achieve synchronization and ensure a tear-free or flicker-free image. Finally, a zone management algorithm is required to dynamically divide zones based on the image content and allocate refresh rates. These technologies work together to enable the zone-based frequency division function to operate.

[0004] However, during the implementation of the zoned frequency technology, the circuits such as timing controllers and display driver chips will still maintain normal operation, resulting in the display panel requiring relatively high power to adopt the zoned frequency technology. Summary of the Invention

[0005] In view of the shortcomings of the prior art, this application provides a driving method, system and display panel for a display panel.

[0006] Firstly, this application provides a method for driving a display panel, comprising:

[0007] Obtain a refresh enable signal; wherein, the refresh enable signal is used to control whether the image data to be displayed in each pixel row of the image to be displayed in each frame is refreshed or not refreshed;

[0008] When the display panel is determined to be in the target refresh state based on the refresh enable signal, the clock signal output is stopped.

[0009] Optionally, before acquiring the refresh enable signal, the method further includes:

[0010] Based on the next frame of image data to be displayed on the display panel, determine in turn whether each pixel row in the image to be displayed needs to be refreshed;

[0011] For the pixel row that needs to be refreshed, the refresh enable signal corresponding to that pixel row is controlled to be output in a first level state;

[0012] For pixel rows that do not require refreshing, the refresh enable signal corresponding to that pixel row is output in a second level state.

[0013] Optionally, stopping the output of the clock signal when determining that the display panel is in the target refresh state based on the refresh enable signal includes:

[0014] If the refresh enable signal maintains the second level state within the frame duration corresponding to the image to be displayed in each frame of the display panel, the clock signal will stop being output within the frame duration of the image to be displayed in that frame.

[0015] Optional, also includes:

[0016] If the refresh enable signal corresponding to any pixel row is at the first level state within the frame duration of the image to be displayed, the clock signal is continuously output within the frame duration of the image to be displayed.

[0017] Optionally, stopping the output of the clock signal when determining that the display panel is in the target refresh state based on the refresh enable signal includes:

[0018] If the refresh enable signal includes the first level state and the second level state within the frame duration corresponding to the image to be displayed, then the frame duration of the image to be displayed is divided into several display periods according to the first level state and the second level state.

[0019] Obtain the signal level transmission partition of the display panel and determine the partition time period of each of the signal level transmission partitions within the frame duration;

[0020] The clock signal is stopped based on the display time period and the partition time period.

[0021] Optionally, the display time period includes a refresh interval and a non-refresh interval; dividing the frame duration of the image to be displayed into several display time periods according to the first level state and the second level state includes:

[0022] Within the frame duration, each time period in which the refresh enable signal is continuously at the first level is respectively regarded as the refresh interval;

[0023] Within the frame duration, each time period in which the refresh enable signal is continuously in the second level state is respectively regarded as the non-refresh interval.

[0024] Optionally, obtaining the signal level transmission partitions of the display panel and determining the partition time period of each signal level transmission partition within the frame duration includes:

[0025] Obtain the start and end pixel rows of each signal level transmission partition;

[0026] The refresh time of the starting pixel row within the frame duration is taken as the starting refresh time, and the refresh time of the ending pixel row within the frame duration is taken as the ending refresh time.

[0027] Based on the start refresh time and the end refresh time, the corresponding signal level transmission partition is obtained within the partition time period of the frame duration.

[0028] Optionally, controlling the clock signal to stop based on the display time period and the partition time period includes:

[0029] If the entire display period within the specified partition time period is a non-refresh interval, then the clock signal is controlled to stop within the specified partition time period;

[0030] If the display period portion within the partitioned time period is a non-refresh interval, then the clock signal is controlled to stop output between the end time of the non-refresh interval and the end refresh time corresponding to the partitioned time period.

[0031] Secondly, in one embodiment, this application provides a driving system for a display panel, comprising:

[0032] A signal acquisition unit is used to acquire a refresh enable signal; wherein, the refresh enable signal is used to control whether the image data to be displayed in each pixel row of the image to be displayed in each frame is refreshed or not refreshed;

[0033] When the control unit determines that the display panel is in the target refresh state based on the refresh enable signal, it stops outputting the clock signal.

[0034] Thirdly, in one embodiment, this application provides a display panel including a memory and a processor; the memory stores a computer program, and the processor is used to run the computer program in the memory to perform the steps in the above-described display panel driving method.

[0035] In summary, in this application, the refresh enable signal can determine whether the image data of each pixel row in each frame of the image to be displayed needs to be refreshed or not, so as to accurately obtain the refresh status of the pixel row data. This allows the clock signal output to be stopped when the display panel is determined to be in the target refresh state based on the refresh enable signal, without affecting the normal function of the display panel. Furthermore, after the clock signal output is stopped, the circuits related to the clock signal also stop working, thereby further reducing the power consumption of the display panel in frequency division applications. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a timing control diagram for a display panel in related technologies;

[0038] Figure 2 This is a flowchart of a display panel driving method in one embodiment of this application;

[0039] Figure 3 This is a timing control diagram of the display panel in one embodiment of this application;

[0040] Figure 4 This is a schematic diagram illustrating an application scenario of the display panel driving method in one embodiment of this application;

[0041] Figure 5 This is a flowchart of a display panel driving method in another embodiment of this application;

[0042] Figure 6 This is a timing control diagram of the display panel in another embodiment of this application;

[0043] Figure 7 This is a schematic diagram illustrating an application scenario of the display panel driving method in another embodiment of this application. Detailed Implementation

[0044] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0045] In the description of this application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified. In this application, the term "exemplary" is used to mean "used as an example, illustration, or description." Any embodiment described as "exemplary" in this application is not necessarily to be construed as being more preferred or advantageous than other embodiments. The following description is provided to enable any person skilled in the art to implement and use this application. In the following description, details are set forth for illustrative purposes. It should be understood that those skilled in the art will recognize that this application can be implemented without using these specific details. In other instances, well-known structures and processes will not be described in detail to avoid unnecessary detail that would obscure the description of this application. Therefore, this application is not intended to be limited to the embodiments shown, but is consistent with the broadest scope of the principles and features disclosed in this application.

[0046] First, based on the aforementioned background information, the background of this application will be further elaborated. In segmented frequency display technology, the timing controller (TCON) generates a high-frequency clock signal to drive the gate driver to transmit scan signals step by step to select the thin-film transistors of each row of pixels, while simultaneously controlling the source driver to inject voltage data into the data lines. During this process, the timing controller also outputs a refresh enable signal SEN as a dynamic control unit, controlling a specific area to activate the clock signal CK of the corresponding row when refresh is required, thereby achieving segmented frequency control. Combined with... Figure 1 In the example frames 1-5, the refresh enable signal SEN and clock signal CK are shown. For instance, in the first frame (Frame 1), the refresh enable signal SEN is low, indicating that the corresponding frame needs a refresh. In the second frame (Frame 2), the refresh enable signal SEN is high, indicating that the corresponding frame does not need a refresh. In the third frame (Frame 3), the refresh enable signal SEN is both high and low, indicating that some areas of the corresponding frame need a refresh while others do not. However, regardless of whether a refresh is needed in each frame, the clock signal CK is continuously output, meaning that the clock signal CK is always in a high-frequency toggle state, resulting in power consumption benefits that are far lower than theoretically expected.

[0047] Firstly, such as Figure 2As shown, in one embodiment, this application provides a driving method for a display panel, which includes steps S101-S102, which will be described in detail below.

[0048] Step S101: Obtain the refresh enable signal.

[0049] The refresh enable signal is used to control whether the image data of each pixel row in each frame to be displayed is refreshed or not.

[0050] Step S102: When the display panel is determined to be in the target refresh state based on the refresh enable signal, stop outputting the clock signal.

[0051] As an example, the refresh status of the display panel can be determined based on the status of the refresh enable signal. The target refresh status can be a state where the entire area of ​​the display panel does not need to be refreshed in a frame of the image to be displayed, or a state where a portion of the display panel needs to be refreshed.

[0052] In the above embodiments, the refresh enable signal can determine whether the image data of each pixel row in each frame of the image to be displayed needs to be refreshed or not, so as to accurately obtain the refresh status of the pixel row data. This allows the output of the clock signal to be stopped when the display panel is determined to be in the target refresh state based on the refresh enable signal, without affecting the normal function of the display panel. Furthermore, after the clock signal output is stopped, the circuits related to the clock signal also stop working, thereby further reducing the power consumption of the display panel in frequency division applications.

[0053] As a further embodiment of the driving method for the display panel, steps S201-S203 are included before step S101, which will be described in detail below.

[0054] Step S201: Based on the next frame of image data to be displayed on the display panel, determine in turn whether each pixel row in the image to be displayed needs to be refreshed.

[0055] As an example, the data of the image to be displayed in the next frame can be scanned line by line and analyzed by a timing controller or display processor. For example, when the image to be displayed is static (such as an always-on display clock or notification bar), the pixel row content may remain unchanged for several consecutive frames, so there is no need to refresh; while when the image to be displayed is a dynamic display area (such as video playback or game screen), the pixel row content changes frequently and needs to be updated at a high refresh rate.

[0056] Step S202: For the pixel row that needs to be refreshed, control the refresh enable signal corresponding to the pixel row to be output in the first level state.

[0057] Step S203: For pixel rows that do not need to be refreshed, control the refresh enable signal corresponding to that pixel row to be output in the second level state.

[0058] As an example, the timing controller can generate a refresh enable signal corresponding to a pixel row by determining the first and second level states. That is, in the time domain of the refresh enable signal, each moment corresponds to controlling one pixel row. The first level state can be a low level state, such as 0V; the second level state can be a high level state, such as 5V.

[0059] In the above implementation, firstly, based on the image data to be displayed in the next frame on the display panel, it is sequentially determined whether each pixel row in the image needs to be refreshed. If the image data of a certain pixel row is updated in the next frame, the corresponding refresh enable signal is set to a first level state, indicating that the pixel row needs to be refreshed; conversely, if the image data of a certain pixel row does not change, the corresponding refresh enable signal is set to a second level state, indicating that refresh is not required. In this way, the refresh requirement of a pixel row can be determined by the level state of the refresh enable signal.

[0060] Reference Figure 3 As one implementation of step S102, step S102 may include: within the frame duration corresponding to each frame of the image to be displayed on the display panel, if the refresh enable signal maintains the second level state, it indicates that the refresh state of the display panel is the target refresh state, and at this time the clock signal can be stopped from being output within the frame duration of the image to be displayed.

[0061] As an example, if the refresh enable signal remains at the second level within the frame duration corresponding to each frame of the image to be displayed on the display panel, it means that none of the pixel rows in the display panel need to be refreshed within that frame duration. Therefore, the clock signal output stops within the frame duration of the image to be displayed. For example, in a specific display scenario, the display panel can be divided into three areas, which are refreshed at refresh rates of 30Hz, 60Hz, and 10Hz respectively. When the refresh enable signals for all pixel rows in all areas are at the second level within a certain frame duration, the entire display panel does not need to refresh the image within the current frame duration. At this time, the clock signal output stops, thus avoiding the power waste caused by the clock signal still toggling when refresh is not required.

[0062] As a further embodiment of the driving method for the display panel, the driving method for the display panel may further include: if the refresh enable signal corresponding to any pixel row is in a first level state within the frame duration corresponding to the image to be displayed, then continuously outputting a clock signal within the frame duration of the image to be displayed in that frame.

[0063] As an example, if the refresh enable signal for any pixel row is at the first level within the frame duration corresponding to the image to be displayed, it means that some pixel rows in the image to be displayed need to be refreshed within the frame duration. Since the scanning signal of the display panel is transmitted step by step, the clock signal needs to be continuously output within the frame duration to ensure that the pixel rows that need to be refreshed can update the image data normally.

[0064] Reference Figure 4 As an example of the first application scenario, the display panel may include a source driver 200, a gate driver 300, a timing controller 100, and a display area 400. The source driver 200 is responsible for converting image data into pixel voltages and injecting them into the pixels via data lines (D1-Dm). First, the source driver 200 receives data signals (including grayscale information) from the timing controller 100 and converts them into analog voltages via an internal digital-to-analog converter. Based on control signals provided by the timing controller 100 (such as data latch signals and polarity inversion signals), the voltage values ​​are stored in an internal register, and the data is synchronously output to the data lines when the gate driver 300 selects the corresponding scan line. The gate driver adopts a cascaded architecture, controlling the selection of each pixel row in the display area 400 by progressively transmitting scan signals. Specifically, the gate driver 300 is composed of multiple gate driving circuits connected in series, with each stage corresponding to one scan line (G1-Gn). When the clock signal and start pulse are input, the first-stage gate driver circuit generates a scan pulse to drive the G1 line to be selected. Subsequently, through the cascaded link, it triggers the subsequent stages of the circuit, selecting lines G2 through Gn line by line. Due to the physical dependence of the cascaded link, if a gate driver circuit fails to receive a clock signal or is interrupted, the subsequent cascaded gate driver circuits will be unable to complete signal transmission, resulting in scan line selection failure. Therefore, even if only a portion of the pixel rows in a frame needs to be refreshed—that is, within the frame duration corresponding to the displayed image, the refresh enable signal for any pixel row is at the first level—the gate driver 300 must complete a full line scan from G1 to Gn, regardless of the actual number of pixel rows to be updated. For example, if only the bottom 10% of the screen needs to be refreshed (such as the status bar update), the gate driver circuit still needs to transmit scan signals sequentially from the first-stage gate driver circuit to the nth-stage gate driver circuit. All cascaded gate driver circuits must continue to operate to maintain signal transmission continuity. Therefore, a clock signal must be continuously output for the duration of that frame to ensure all cascaded gate driver circuits function normally.

[0065] As an example, such as Figure 4As shown, the display panel may also include a refresh control circuit located between the gate driving circuit and the display area. This refresh control circuit controls the on / off state of the scan signal and each pixel unit based on a refresh enable signal. The refresh control circuit receives a refresh enable signal from a timing controller, which indicates the pixel rows that need to be refreshed in the current frame. For pixel rows that need refreshing, the refresh control circuit allows the scan signal output by the gate driving circuit to be transmitted to the corresponding pixel row, driving the thin-film transistor (TFT) to turn on and receive new data injected by the source driving circuit. For pixel rows that do not need refreshing, the refresh control circuit blocks the transmission of the scan signal, keeping the pixel row in the state of the previous frame and avoiding unnecessary power consumption. In this way, the refresh control circuit implements the Manual Frequency Reduction (MAFR) function, that is, only a portion of the area is refreshed within the same frame, while blocking signal transmission in inactive areas. In this embodiment, the clock signal is also controlled to stop outputting within the frame duration based on the level of the refresh enable signal, further saving power consumption.

[0066] Reference Figure 3 , Figure 3 This is a waveform diagram of the refresh enable signal and the clock signal. In the first frame of the image to be displayed, the refresh enable signal SEN is at the first level, indicating that the image needs to be refreshed within the first frame duration Frame1. During this time, the clock signal is continuously output within Frame1. In the second frame of the image to be displayed, Frame2, the refresh enable signal SEN is at the second level, indicating that the image does not need to be refreshed. During this time, the clock signal output stops within Frame2. In the third frame of the image to be displayed, the refresh enable signal exhibits both the first and second levels. This indicates that within the third frame duration Frame3, the image needs to be refreshed for part of the frame duration, while not for the other part. However, since the refresh enable signal is at the first level within the third frame duration, the clock signal still needs to be continuously output within Frame3. The same logic applies to the fourth and fifth frames, Frame4 and Frame5, respectively, and will not be elaborated upon here.

[0067] Reference Figure 5 As another implementation of step S102, step S102 may include steps S1021-S1023, which will be described in detail below.

[0068] Step S1021: Within the frame duration corresponding to the image to be displayed, if the refresh enable signal includes a first level state and a second level state, then the frame duration of the image to be displayed is divided into several display periods according to the first level state and the second level state.

[0069] The display period is used to characterize the distribution of time intervals within a frame duration where each pixel row needs to be refreshed and not refreshed. It includes non-refresh intervals and refresh intervals, and the display period is determined based on the requirements of the image to be displayed. For example, in a certain display scenario, the display panel can be divided into three areas according to refresh requirements, such as on-demand refresh, where the three areas refresh at 30Hz, 60Hz, and 10Hz respectively. The refresh period of each area within the frame duration is the display period.

[0070] Step S1022: Obtain the signal level transmission partition of the display panel and determine the partition time period of each signal level transmission partition within the frame duration.

[0071] Among them, the signal level transmission zone is the pixel row area corresponding to each gate driver in the display panel. There can be multiple gate drivers obtained by connecting gate driving circuits in series in a display panel. Each gate driver is not cascaded and can work independently to control the display of the corresponding signal level transmission zone. That is, the subsequent gate driver does not depend on the signal of the previous gate driver to work.

[0072] Step S1023: Control the clock signal to stop according to the display time period and the partition time period.

[0073] In the above embodiments, if the refresh enable signal includes a first level state and a second level state within the frame duration corresponding to the image to be displayed, it indicates that some pixel rows in the display panel need to be refreshed, while others do not. In this case, the frame duration of the image to be displayed needs to be divided into several display periods based on the first and second level states. Simultaneously, the signal level transmission partitions of the display panel are acquired, and the partitioned time periods of each signal level transmission partition within the frame duration are determined. Finally, the clock signal is stopped based on the display periods and partitioned time periods, allowing the clock signal to stop within a portion of the frame period, rather than stopping for a full frame duration, thereby further saving power consumption.

[0074] As another implementation of step S1021, step S1021 may include steps S10211-S10212, which will be described in detail below.

[0075] Step S10211: Within the frame duration, each time period in which the refresh enable signal is continuously at the first level is taken as a refresh interval.

[0076] Step S10211: Within the frame duration, each time period in which the refresh enable signal is continuously in the second level state is taken as a non-refresh interval.

[0077] Within a frame duration, there can be multiple refresh intervals and non-refresh intervals.

[0078] Combination Figure 6As an example, since pixel rows need to be scanned and refreshed line by line within each frame duration, for instance, in the fourth frame duration Frame4, the first 40% of the frame duration is the refresh interval. Taking the display panel as refreshed sequentially from top to bottom, this means that the pixel rows of the upper half of the display panel (approximately 40%) need to be refreshed within this frame duration; while the latter 60% of the frame duration is the non-refresh interval, meaning that the pixel rows of the lower half of the display panel (approximately 60%) do not need to be refreshed within this frame duration.

[0079] Reference Figure 7 As an example of the second application scenario, the display panel may include a source driver 200, a gate driver 300, a timing controller 100, and a display area 400. Unlike the example of the first application scenario, the second application scenario uses multiple gate drivers. The display area is divided into several independent signal level transmission zones, each corresponding to an independent gate driver. Each gate driver contains several gate driving circuits connected in series, responsible for generating and transmitting scan signals within its respective signal level transmission zone. For example, the gate driver of the first signal level transmission zone only drives scan lines G11-G1n of that signal level transmission zone, while the gate driver of the second signal level transmission zone drives scan lines G21-G2n, and so on. The gate driving circuit of each signal level transmission zone operates independently, and the clock signal and start pulse are only transmitted within the current signal level transmission zone. When a signal level transmission zone does not need to be refreshed, the timing controller can turn off the clock signal input for that signal level transmission zone to avoid unnecessary power consumption.

[0080] In the above implementation, within the frame duration, each time period in which the refresh enable signal is continuously at the first level is designated as a refresh interval, and the corresponding pixel rows within each refresh interval require image data refresh. Conversely, within the frame duration, each time period in which the refresh enable signal is continuously at the second level is designated as a non-refresh interval, meaning that the corresponding pixel rows within the non-refresh interval do not require refresh. By dividing the display panel into refresh and non-refresh intervals, the pixel rows that require and do not require refresh can be converted into their corresponding refresh states within the frame duration. This allows for analysis of refresh requirements at different times within the frame duration, thereby enabling more accurate control of the clock signal's stopping.

[0081] As another implementation of step S1022, step S1022 may include steps S10221-S10223, which will be described in detail below.

[0082] Step S10221: Obtain the starting pixel row and ending pixel row of each signal level transmission partition.

[0083] Step S10222: Take the refresh time of the starting pixel row within the frame duration as the starting refresh time, and take the refresh time of the ending pixel row within the frame duration as the ending refresh time.

[0084] Step S10223: Based on the start refresh time and the end refresh time, obtain the corresponding signal level transmission partition time period within the frame duration.

[0085] As an example, in the display panel, a certain signal level transmission partition runs from the 100th row of pixels to the 200th row of pixels. The time when the 100th row of pixels starts refreshing is the start refresh time of the current signal level transmission partition, and the time when the 200th row of pixels starts refreshing is the end refresh time. In this way, the partition time of the signal level transmission partition within the entire frame duration can be determined by the start refresh time and the end refresh time, so as to control the clock signal more accurately.

[0086] As another implementation of step S1023, step S1023 may include steps S10231-S10232, which will be described in detail below.

[0087] Step S10231: If the entire display period within the partitioned time period is a non-refresh interval, then the control clock signal is stopped within the partitioned time period.

[0088] Step S10232: If the time period displayed within the partitioned time period is a non-refresh interval, then control the clock signal to stop outputting between the end time of the non-refresh interval and the end refresh time corresponding to the partitioned time period.

[0089] The partition time period refers to the refresh period of each signal level transmission zone within the frame duration, and therefore the partition time period is determined based on the hardware of the display panel.

[0090] As an example, since the current scan signal does not depend on the previous scan signal generated in other scan periods within each partition time period, taking a partition time period as a unit, if the entire display period within a partition time period is a non-refresh interval, it means that the pixel rows in the corresponding signal level partition of the partition time period do not need to be refreshed. Therefore, the clock signal is stopped within the partition time period, and the scan signals in other scan periods will not be affected. However, within a partition time period, the current scan signal needs to be output based on the previous scan signal. Therefore, if the display period within a partition time period is a non-refresh interval, the clock signal can only be stopped between the end of the non-refresh interval and the end refresh time of the corresponding partition time period. That is, the clock signal needs to be maintained normally within the refresh interval and the partition time period before the refresh interval so that the scan signal can be output normally within the refresh interval.

[0091] Combination Figure 6Taking a frame duration comprising two equal time-segment periods as an example, in the fourth frame of the image to be displayed, the display period within the first time-segment of the fourth frame duration (Frame4) is a refresh interval. Therefore, the clock signal needs to continuously toggle within the refresh interval. However, in the second time-segment of the fourth frame duration (Frame4), the display period is a non-refresh interval, so the clock signal can be stopped, allowing the clock signal to be turned off for a portion of the frame duration. In the third frame of the image to be displayed, although the third frame duration (Frame3) begins as a non-refresh interval and does not require pixel row refresh, a refresh interval exists within the same time-segment. Therefore, the clock signal needs to be continuously output from the beginning of the third frame duration (Frame3) to avoid the problem of scan signals not being able to propagate within the same time-segment.

[0092] In the above embodiments, if the entire display period within a partitioned time slot is a non-refresh interval, it means that none of the corresponding pixel rows within the partitioned time slot need to be refreshed, and the scanning signal within each partitioned time slot can be controlled independently. Therefore, the clock signal within the partitioned time slot in the frame duration can be stopped. If the display period within a partitioned time slot is a non-refresh interval, the clock signal is controlled to stop output between the end time of the non-refresh interval and the end refresh time corresponding to the partitioned time slot. This avoids invalid toggling of the clock signal when refresh is not needed, and ensures that the clock signal works normally when the pixel rows that need to be refreshed are refreshed.

[0093] Secondly, in one embodiment, this application provides a driving system for a display panel, including a signal acquisition unit and a control unit. The signal acquisition unit acquires a refresh enable signal; the refresh enable signal controls whether the image data of each pixel row in each frame of the image to be displayed is refreshed or not refreshed; when the control unit determines that the display panel is in a target refresh state based on the refresh enable signal, it stops outputting a clock signal.

[0094] Thirdly, in one embodiment, this application provides a display panel including a memory and a processor; the memory stores a computer program, and the processor is used to run the computer program in the memory to perform the steps in the above-described display panel driving method.

[0095] Fourthly, in one embodiment, this application provides a storage medium storing a plurality of computer programs that can be loaded by a processor to perform the steps of the above-described method.

[0096] It will be understood by those skilled in the art that any references to memory, storage, database, or other media used in the embodiments provided in this application may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), Synchlink, DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and RAMbus dynamic RAM (RDRAM), etc.

[0097] Since the computer program stored in the storage medium can execute the steps in the display panel driving method in any embodiment of the present application, the beneficial effects that the display panel driving method in any embodiment of the present application can achieve can be realized. For details, please refer to the previous embodiments, which will not be repeated here.

[0098] For details on the implementation of each of the above operations, please refer to the previous examples, which will not be repeated here.

[0099] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the detailed descriptions of other embodiments above, which will not be repeated here.

[0100] The above provides a detailed description of the alternative 1 provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

[0101] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

Claims

1. A driving method for a display panel, characterized in that, include: Obtain a refresh enable signal; wherein, the refresh enable signal is used to control whether the image data to be displayed in each pixel row of the image to be displayed in each frame is refreshed or not refreshed, and in the time domain of the refresh enable signal, each moment corresponds to controlling one pixel row; When the display panel is determined to be in the target refresh state according to the refresh enable signal, the clock signal is stopped being output; wherein, within the frame duration corresponding to the image to be displayed in each frame of the display panel, if the refresh enable signal maintains the second level state, the clock signal is stopped being output within the frame duration of the image to be displayed in that frame.

2. The driving method for the display panel according to claim 1, characterized in that, Before obtaining the refresh enable signal, the process also includes: Based on the next frame of image data to be displayed on the display panel, determine in turn whether each pixel row in the image to be displayed needs to be refreshed; For the pixel row that needs to be refreshed, the refresh enable signal corresponding to that pixel row is controlled to be output in a first level state; For pixel rows that do not require refreshing, the refresh enable signal corresponding to that pixel row is output in a second level state.

3. The driving method for the display panel according to claim 2, characterized in that, Also includes: If the refresh enable signal corresponding to any pixel row is at the first level state within the frame duration of the image to be displayed, the clock signal is continuously output within the frame duration of the image to be displayed.

4. The driving method for the display panel according to claim 2, characterized in that, When the refresh enable signal determines that the display panel is in the target refresh state, stopping the output of the clock signal includes: If the refresh enable signal includes the first level state and the second level state within the frame duration corresponding to the image to be displayed, then the frame duration of the image to be displayed is divided into several display periods according to the first level state and the second level state. Obtain the signal level transmission partition of the display panel and determine the partition time period of each of the signal level transmission partitions within the frame duration; The clock signal is stopped based on the display time period and the partition time period.

5. The driving method for a display panel according to claim 4, characterized in that, The display time period includes a refresh interval and a non-refresh interval; the step of dividing the frame duration of the image to be displayed into several display time periods according to the first level state and the second level state includes: Within the frame duration, each time period in which the refresh enable signal is continuously at the first level is respectively regarded as the refresh interval; Within the frame duration, each time period in which the refresh enable signal is continuously in the second level state is respectively regarded as the non-refresh interval.

6. The driving method for a display panel according to claim 5, characterized in that, The step of acquiring the signal level transmission partitions of the display panel and determining the partition time period of each signal level transmission partition within the frame duration includes: Obtain the start and end pixel rows of each signal level transmission partition; The refresh time of the starting pixel row within the frame duration is taken as the starting refresh time, and the refresh time of the ending pixel row within the frame duration is taken as the ending refresh time. Based on the start refresh time and the end refresh time, the corresponding signal level transmission partition is obtained within the partition time period of the frame duration.

7. The driving method for a display panel according to claim 6, characterized in that, The step of controlling the clock signal to stop based on the display time period and the partition time period includes: If the entire display period within the specified partition time period is a non-refresh interval, then the clock signal is controlled to stop within the specified partition time period; If the display period portion within the partitioned time period is a non-refresh interval, then the clock signal is controlled to stop output between the end time of the non-refresh interval and the end refresh time corresponding to the partitioned time period.

8. A driving system for a display panel, based on the driving method for a display panel according to any one of claims 1 to 7, characterized in that, include: A signal acquisition unit is used to acquire a refresh enable signal; wherein, the refresh enable signal is used to control whether the image data to be displayed in each pixel row of the image to be displayed in each frame is refreshed or not refreshed; When the control unit determines that the display panel is in the target refresh state based on the refresh enable signal, it stops outputting the clock signal.

9. A display panel, characterized in that, It includes a memory and a processor; the memory stores a computer program, and the processor is used to run the computer program in the memory to perform the steps in the driving method of a display panel according to any one of claims 1 to 7.

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