A high-reliability downlink telemetry baseband signal code rate recovery system and method

Abstract

The application relates to the field of satellite remote control and telemetry technology, and particularly relates to a high-reliability downlink telemetry baseband signal code rate recovery system and method; the system comprises a programmable logic device FPGA, a FLASH memory and a reset module; the programmable logic device FPGA and the FLASH memory are interconnected through address lines, data lines and control lines; the reset module is used for outputting a power-on reset signal to the programmable logic device FPGA and the FLASH memory after power-on of a power supply; the programmable logic device FPGA stores an initial rate through high and low level states of IO pins; the programmable logic device FPGA controls internal digital logic circuits to store a default rate by using a hardware description language; three reliability measures, namely an application level, a model level and a product level, are adopted; the three measures are mutually complementary, and together ensure that, in any case, when one fault occurs, service continuity can be ensured, and when two faults occur, safety can be ensured.

Description

Technical Field

[0001] This invention relates to the field of satellite remote control and telemetry technology, specifically to a highly reliable downlink telemetry baseband signal code rate recovery system and method. Background Technology

[0002] A satellite tracking, telemetry, and command (TT&C) system is a complex and sophisticated system, with its core components mainly consisting of the space segment and the ground segment. The space segment primarily comprises the communication equipment carried on the spacecraft, which is responsible for communicating with the ground in space and acts as a bridge for information transmission. The ground segment, on the other hand, is mainly responsible for receiving signals from the satellite, demodulating, decoding, and processing them. Simultaneously, the ground segment can also send commands and data to the satellite, enabling remote control of the satellite.

[0003] In satellite telemetry, tracking, and command (TT&C) systems, the downlink plays a crucial role. It transmits downlink telemetry data from the spacecraft to the ground. This data is essential for analyzing the spacecraft's operational status, preventing malfunctions, and is decisive for the safe operation of the spacecraft in orbit. Therefore, the reliability requirements for downlink telemetry data transmission are extremely high; any data loss or error can have a significant impact on the spacecraft's operation.

[0004] Various subsystems on the spacecraft collect telemetry data in real time. This data is processed by the spacecraft's onboard telemetry and remote control unit, which converts the baseband signal into a radio frequency signal before sending it to the transponder. In the transponder, the baseband signal is converted into a radio frequency signal for transmission in space. Finally, these radio frequency signals are transmitted to the ground control station via the telemetry, tracking, and command (TT&C) channel for reception and processing.

[0005] As space missions become increasingly complex, the demands on the flexibility of telemetry, tracking, and command (TT&C) systems are also rising. To meet this need, spacecraft must possess the ability to reliably and stably support variable code rates for on-orbit downlink telemetry baseband signals. This allows the spacecraft to adjust the transmission code rate of downlink telemetry data as required, regardless of mission changes, ensuring efficient and accurate data transmission.

[0006] However, in the complex space environment, the telemetry and control unit on a spacecraft may be subject to various interferences and influences, leading to resets and restarts. Once a telemetry and control unit resets and restarts, it is necessary to ensure that the baseband signal code rate (the code rate at which the telemetry and control unit communicates with the transponder) of each downlink telemetry output channel can reliably recover to its previously set final value. This is because if the code rate is mismatched, the ground station will be unable to correctly receive and process data from the spacecraft, thus affecting service continuity and security. Summary of the Invention

[0007] This invention provides a highly reliable downlink telemetry baseband signal code rate recovery system and method, which aims to solve the problem that after the existing telemetry and remote control unit is reset and restarted, the baseband signal code rate of each downlink telemetry output channel cannot be reliably restored to the previous final setting value, resulting in the inability to guarantee service continuity and safe operation.

[0008] To achieve the above objectives, the technical solution of the present invention is as follows: This invention provides a high-reliability downlink telemetry baseband signal code rate recovery system and method, including a programmable logic device (FPGA), a FLASH memory, and a reset module. The FPGA and the FLASH memory are interconnected through address lines, data lines, and control lines. The reset module is used to output a power-on reset signal to the FPGA and the FLASH memory after power-on. The programmable logic device (FPGA) stores the initial code rate through the high and low level states of its I / O pins, with each group consisting of 2 bits, and each group representing a different initial code rate. At the same time, the programmable logic device (FPGA) stores the default code rate by controlling its internal digital logic circuits through a hardware description language. In addition, the programmable logic device FPGA also includes: The proportional command receiving module is used to receive proportional commands sent from the ground and determine the correctness of the proportional commands; if the proportional commands are correct, the proportional commands are sent to the downlink telemetry code rate control module below. The reset management module is used to receive the power-on reset signal and control the programmable logic device FPGA to be in a reset state. The downlink telemetry code rate control module is used to change the baseband signal code rate of the corresponding downlink telemetry output channel according to the proportional command, initial code rate or default code rate sent by the proportional command receiving module. An important data storage module, connected to the FLASH memory, is used to write the baseband signal code rate of each downlink telemetry output channel into the FLASH memory three times respectively; in addition, when reading a certain baseband signal code rate from the FLASH memory, a bitwise 3-out-of-2 comparison is performed to determine whether the data reading is correct. The telemetry packet and transmission module is used to acquire downlink telemetry data and output downlink telemetry data to the transponder.

[0009] Furthermore, the FLASH memory is a non-volatile FLASH memory.

[0010] Furthermore, the reset module includes a power monitoring chip.

[0011] A method for restoring the code rate of downlink telemetry baseband signals after reset, specifically including the following steps: S11. After the telemetry and remote control unit restarts due to a power failure, the reset module outputs a power-on reset signal to put the programmable logic device FPGA and FLASH memory into a reset state; when the reset signal is removed, the programmable logic device FPGA and FLASH memory start to work. S12. The important data storage module of the FPGA sequentially reads the baseband signal code rate of each downlink telemetry output channel from the FLASH memory, and performs a bitwise 3-out-of-2 comparison of the read baseband signal code rate of each downlink telemetry output channel to determine whether the data read is correct. If the baseband signal code rate of a certain downlink telemetry output channel is read incorrectly, S13 is executed, and the baseband signal code rate recovery failure flag from FLASH is set. This telemetry flag is written into the insertion field in the telemetry frame. If the baseband signal code rate of a certain downlink telemetry output channel is read correctly, the correct baseband signal code rate data of this downlink telemetry output channel is sent to the downlink telemetry code rate control module and then S15 is executed. If all reads are correct, the baseband signal code rate recovery success flag from FLASH is set. S13. The downlink telemetry code rate control module reads the initial code rate of the downlink telemetry output channel. If the read initial code rate meets the specified value, then execute S15; if the read initial code rate does not meet the specified value, then execute S14. S14. The downlink telemetry code rate control module reads the default code rate of the downlink telemetry output channel and then executes S15; S15. The downlink telemetry code rate control module restores the baseband signal code rate of the corresponding downlink telemetry output channel based on the acquired baseband signal code rate data; S16. Repeat steps S12 to S15 until the baseband signal code rate of each downlink telemetry output channel is restored.

[0012] A method for setting the code rate of a downlink telemetry baseband signal specifically includes the following steps: S21. The proportional command receiving module receives the proportional command sent from the ground; S22. The ratio command receiving module judges the correctness of the ratio command. If it does not conform to the command code of the code rate switching command, it executes S23; if it conforms to the command code of the code rate switching command, it executes S24. S23. The proportional instruction receiving module treats this proportional instruction as an error instruction, increments the error proportional instruction count in the telemetry data by 1, and the programmable logic device FPGA does not change the code rate information stored in the FLASH memory, nor does it change the baseband signal code rate of each downlink telemetry output channel. S24. The downlink telemetry code rate control module changes the baseband signal code rate of the corresponding downlink telemetry output channel to the instruction setting value and increments the correct proportion instruction count in the telemetry data by 1; S25. The important data storage module stores the correctly determined code rate information in the FLASH memory or updates the code rate data stored in the FLASH memory; S26. After the code rate data storage is completed, the important data storage module reads the data stored in the FLASH memory for consistency comparison and sets the "baseband signal code rate command setting status" telemetry. If they are consistent, the storage success flag is set; if they are inconsistent, the storage failure flag is set and written into the insertion field in the telemetry frame.

[0013] The beneficial effects achieved by this invention are as follows: This invention allows for flexible adjustment of the code rate of each downlink telemetry baseband signal before launch or while in orbit, depending on mission requirements. This feature greatly enhances the adaptability of the satellite telemetry and control system to different mission scenarios, ensures a precise match between data transmission efficiency and mission requirements, and improves resource utilization efficiency.

[0014] Most importantly, in response to the vulnerability of spacecraft to the complex space environment, this invention employs three levels of reliability measures: application-level, model-level, and product-level. These three levels of measures complement each other and jointly ensure that, under any circumstances, especially after the telemetry and remote control unit is reset, the downlink telemetry code rate can be restored to the previous final setting value after the reset is completed. This achieves the goal of ensuring service continuity in the event of a single fault and ensuring safety in the event of a double fault. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0016] Figure 1 This is a schematic diagram of the code rate recovery system structure disclosed in this invention.

[0017] Figure 2 This is a flowchart of the baseband signal code rate recovery process after reset disclosed in this invention.

[0018] Figure 3 This is a flowchart of setting the baseband signal code rate via instructions, as disclosed in this invention. Detailed Implementation

[0019] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] Furthermore, if the embodiments of this invention involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, if the word "and / or" appears throughout the text, it means including three parallel solutions; for example, "A and / or B" includes solution A, solution B, or a solution that simultaneously satisfies A and B. Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by this invention.

[0021] This invention provides a highly reliable downlink telemetry baseband signal code rate recovery system, installed on existing spacecraft, for controlling the baseband signal code rate of each downlink telemetry output channel, and for restoring the baseband signal code rate of each downlink telemetry output channel to the previous final setting value after the telemetry and remote control unit onboard the spacecraft is reset and restarted; this invention solves the problem that the downlink telemetry code rate cannot be reliably restored to the previous final setting value after the telemetry and remote control unit onboard the existing spacecraft is reset and restarted.

[0022] like Figure 1 As shown, the baseband signal code rate recovery system includes a programmable logic device (FPGA), a FLASH memory, and a reset module. The FPGA and the FLASH memory are interconnected through address lines, data lines, and control lines. The reset module is used to output a power-on reset signal to the FPGA and the FLASH memory after power-on. The programmable logic device (FPGA) stores the initial code rate through the high and low levels of its I / O pins (specifically, the FPGA's I / O pins are configurable; by setting them to input mode, the high and low levels of external circuit inputs are read, i.e., the high and low levels of the I / O pins; since circuits that can output high and low levels are relatively common and simple, their specific structure will not be described in detail here). Each group consists of 2 bits, and each group represents a different initial code rate for the downlink telemetry output channel. Simultaneously, the FPGA uses a hardware description language to control its internal digital logic circuits to store the default code rate. The number of initial and default code rates is the same as the number of downlink telemetry output channels, and both the initial and default code rates are baseband signal code rates set at the factory. The storage locations of the initial and default code rates for different downlink telemetry output channels are also set at the factory, facilitating accurate and rapid reading after system reset. Furthermore, the programmable logic device FPGA includes: The proportional command receiving module is used to receive proportional commands sent from the ground and determine the correctness of the proportional commands; if the proportional commands are correct, the proportional commands are sent to the downlink telemetry code rate control module below. The reset management module is used to receive the power-on reset signal and control the programmable logic device FPGA to be in a reset state. The downlink telemetry code rate control module is used to change the baseband signal code rate of the corresponding downlink telemetry output channel according to the proportional instruction or initial code rate or default code rate sent by the proportional instruction receiving module. An important data storage module, connected to the FLASH memory, is used to write the baseband signal code rate of each downlink telemetry output channel into the FLASH memory three times respectively; in addition, when reading a certain baseband signal code rate from the FLASH memory, a bitwise 3-out-of-2 comparison is performed to determine whether the data reading is correct. The telemetry packet and transmission module is used to acquire downlink telemetry data and output downlink telemetry data to the transponder.

[0023] To illustrate this embodiment in detail, we will use the example of restoring the three baseband signal code rate states of each of the nine downlink telemetry output channels after product reset. The nine downlink telemetry output channels need to occupy twenty-seven independent sectors in the FLASH memory, and each downlink telemetry output channel corresponds to an initial code rate and a default code rate. It is worth noting that the nine downlink telemetry output channels and the three baseband signal code rate states mentioned here are for illustrative purposes only and do not constitute a limitation on the quantity.

[0024] The programmable logic device (FPGA) and the FLASH memory are interconnected via address lines, data lines, and control lines. The FPGA's internal "important data storage module" enables the storage and retrieval of baseband signal code rate data for each downlink telemetry output channel. The FPGA receives proportional commands from the ground via its internal "proportional command receiving module" and verifies their correctness (based on a pre-defined proportional command format). If correct, it immediately switches the baseband signal code rate of the corresponding downlink telemetry output channel to the appropriate code rate. Each proportional command consists of four bytes, and a total of twenty-seven proportional commands are designed to switch the code rates of the nine downlink telemetry output channels of the telemetry and remote control unit across three different code rates. One proportional command corresponds to one code rate switch for each downlink telemetry output channel. Each proportional command is manually defined, such as EB, 90, 01, 01, etc. After receiving the code rate change command through the proportional command receiving module, the telemetry and remote control unit updates the code rate data stored in the FLASH memory.

[0025] The initial code rate is determined by the high and low levels of the FPGA's I / O pins, grouped in 2-bit sets, with each group representing one initial code rate. For example, assuming that the FPGA programmable logic device defines three code rates from high to low in its program before leaving the factory: 01b, 10b, and 11b, then reading any value other than these three states will result in an error. The initial code rate is set by the telemetry and remote control unit before leaving the factory and is read by the downlink telemetry code rate control module. Nine downlink telemetry output channels require nine initial code rates.

[0026] The FLASH memory is a non-volatile FLASH memory. The FLASH memory uses a triple-backup design to store telemetry code rates. The code rate of each downlink telemetry output channel is stored in three independent sectors of the FLASH memory, and the code rates of N downlink telemetry output channels occupy a total of 3N independent sectors of the FLASH memory. In this embodiment, the nine downlink telemetry output channels occupy a total of twenty-seven sectors. Furthermore, the location of the data stored in the FLASH memory for each downlink telemetry output channel is known, so the important data storage module can directly read the baseband signal code rate of the corresponding downlink telemetry output channel during reading. When the important data storage module reads the code rate of a certain downlink telemetry output channel from the FLASH memory, it simultaneously reads three copies of the baseband signal code rate and performs a bitwise 2-out comparison on the three copies to eliminate erroneous values, preventing errors in the data stored in the FLASH memory from causing the reading of incorrect code rates. If all three read values ​​are different, it indicates that the data reading from the FLASH memory has failed.

[0027] The reset module includes a power monitoring chip, which can be a JSR706SD chip. Besides supporting power-on reset (power-on reset time is 200ms) and power-down reset, the JSR706SD chip can also monitor the power supply. It monitors +3.3V, and when +3.3V drops below +2.93V, the chip generates a reset signal to put the board in a reset state to prevent abnormalities caused by power fluctuations. Naturally, other reset chips with similar functions can also be used for the power monitoring chip; these will not be listed in this embodiment.

[0028] After the product is powered on, the reset module outputs a power-on reset signal, which puts the FPGA and FLASH memory into a reset state. When the reset signal is removed, the FPGA and FLASH memory begin to operate. After the reset signal is processed by the "reset management module" inside the FPGA through "asynchronous reset and synchronous removal", it is instantiated on the global clock network to perform reset initialization operations on all signals, restoring the internal flip-flops of the FPGA to their initial values.

[0029] Programmable logic devices (FPGAs) complete telemetry code rate recovery and control through their internal "downlink telemetry code rate control module".

[0030] Programmable logic devices (FPGAs) complete telemetry data acquisition and output downlink telemetry data to the transponder through their internal "telemetry packet and transmission module".

[0031] In summary, the code rate recovery system disclosed in this invention employs three levels of reliability measures during the downlink telemetry baseband signal code rate recovery process: application-level, model-level, and product-level. The priority of telemetry code rate recovery, from highest to lowest, is application-level, model-level, and product-level.

[0032] First, the application level uses non-volatile NOR FLASH memory to store downlink telemetry code rate data. The downlink telemetry code rate data stored in FLASH adopts a 2-out-of-3 reliability measure. The data stored in FLASH is backed up three times, and a 2-out-of-3 comparison is performed bit by bit when reading.

[0033] The baseband signal code rate of the downlink telemetry output channel stored in FLASH is set via a proportional command. Upon receiving a proportional command, the correctness of the command is first judged according to its format. If it conforms to the command code of the code rate switching command, the baseband signal code rate of the corresponding downlink telemetry output channel is changed to the command setting value, and the correct proportional command count in the telemetry data is incremented by 1. The code rate information judged to be correct is stored in FLASH or used to update the code rate data already stored in FLASH. After FLASH storage is completed, the data stored in FLASH is read for consistency comparison. The "PCM code rate command setting status" telemetry is set. If they are consistent, the storage success flag is set; if they are inconsistent, the storage failure flag is set and written to the insertion field in the telemetry frame. If the command code does not conform to the command code of the code rate switching command, it is considered an erroneous command. The erroneous proportional command count in the telemetry data is incremented by 1, but the code rate information stored in FLASH is not changed, and the baseband signal code rate of each downlink telemetry output channel is not changed.

[0034] Second, the model-level measure is to configure the hardware status of the IO pins of the programmable logic device FPGA to correspond to the initial code rate of each downlink telemetry output channel. When it fails to obtain downlink telemetry code rate data from the NOR FLASH memory, the downlink telemetry code rate control module reads and adopts the initial code rate.

[0035] Third, the product-level measure is to use the default code rate state stored in the FPGA of the programmable logic device. When it fails to obtain downlink telemetry code rate data from both the NOR FLASH memory and the hardware status of the FPGA's I / O pins, the downlink telemetry code rate control module reads and adopts the product's default code rate.

[0036] like Figure 2 As shown, a method for restoring the code rate of downlink telemetry baseband signal after reset, based on the aforementioned downlink telemetry baseband signal code rate restoration system, specifically includes the following steps: S11. After the telemetry and remote control unit restarts due to a power failure, the reset module outputs a power-on reset signal to put the programmable logic device FPGA and FLASH memory into a reset state; when the reset signal is removed, the programmable logic device FPGA and FLASH memory start to work. S12. The important data storage module of the programmable logic device FPGA sequentially reads the baseband signal code rate of each downlink telemetry output channel from the FLASH memory, and performs a bitwise 3-out-of-2 comparison of each read baseband signal code rate of each downlink telemetry output channel to determine whether the data read is correct. If the baseband signal code rate of a certain downlink telemetry output channel is read incorrectly, S13 is executed, and the baseband signal code rate recovery failure flag from FLASH is set. This telemetry flag is written into the insertion field in the telemetry frame. If the baseband signal code rate of a certain downlink telemetry output channel is read correctly, the correct baseband signal code rate data of this downlink telemetry output channel is sent to the downlink telemetry code rate control module, and then S15 is executed. If all reads are correct, the baseband signal code rate recovery success flag from FLASH is set. The success / failure flag telemetry can be transmitted to the ground, and the ground personnel can judge the status of the on-board FLASH. Among them, these two flags are set and sent to the ground by the "telemetry packet assembly and transmission module" and are not stored. S13. The downlink telemetry code rate control module reads the initial code rate of the downlink telemetry output channel. If the read initial code rate meets the specified value, then execute S15; if the read initial code rate does not meet the specified value, then execute S14. S14. The downlink telemetry code rate control module reads the default code rate of the downlink telemetry output channel from the programmable logic device FPGA, and then executes S15; S15. The downlink telemetry code rate control module restores the baseband signal code rate of the corresponding downlink telemetry output channel based on the acquired baseband signal code rate data; S16. Repeat steps S12 to S15 until the baseband signal code rate of each downlink telemetry output channel is restored.

[0037] like Figure 3 As shown, a method for setting the code rate of a downlink telemetry baseband signal, based on the aforementioned downlink telemetry baseband signal code rate recovery system, specifically includes the following steps: S21. The proportional command receiving module receives the proportional command sent from the ground; S22. The ratio command receiving module judges the correctness of the ratio command. If it does not conform to the command code of the code rate switching command, it executes S23; if it conforms to the command code of the code rate switching command, it executes S24. S23. The proportional instruction receiving module treats this proportional instruction as an error instruction, increments the error proportional instruction count in the telemetry data by 1, and the programmable logic device FPGA does not change the code rate information stored in the FLASH memory, nor does it change the baseband signal code rate of each downlink telemetry output channel. S24. The downlink telemetry code rate control module changes the baseband signal code rate of the corresponding downlink telemetry output channel to the instruction setting value and increments the correct proportion instruction count in the telemetry data by 1; S25. The important data storage module stores the correctly determined code rate information in the FLASH memory or updates the code rate data stored in the FLASH memory; S26. After the code rate data storage is completed, the important data storage module reads the data stored in the FLASH memory for consistency comparison and sets the "baseband signal code rate command setting status" telemetry. If they are consistent, the storage success flag is set; if they are inconsistent, the storage failure flag is set and written into the insertion field in the telemetry frame.

[0038] Among them, the error ratio command count, the correct ratio command count, and the telemetry of "baseband signal code rate command setting status" are all set and sent to the ground by the "telemetry package and transmission module" to facilitate ground staff to judge the working status of the telemetry and remote control unit.

[0039] The above description is merely an optional embodiment of the present invention and does not limit the patent scope of the present invention. All equivalent structural transformations made using the contents of the present invention's specification and drawings under the inventive concept of the present invention, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present invention.

Claims

1. A high-reliability downlink telemetry baseband signal code rate recovery system, characterized in that: It includes a programmable logic device (FPGA), a FLASH memory, and a reset module. The FPGA and the FLASH memory are interconnected through address lines, data lines, and control lines. The reset module is used to output a power-on reset signal to the FPGA and the FLASH memory after the power is turned on. The programmable logic device (FPGA) stores the initial code rate through the high and low level states of its I / O pins, with each group consisting of 2 bits, and each group representing a different initial code rate. At the same time, the programmable logic device (FPGA) stores the default code rate by controlling its internal digital logic circuits through a hardware description language. In addition, the programmable logic device FPGA also includes: The proportional command receiving module is used to receive proportional commands sent from the ground and determine the correctness of the proportional commands; if the proportional commands are correct, the proportional commands are sent to the downlink telemetry code rate control module below. The reset management module is used to receive the power-on reset signal and control the programmable logic device FPGA to be in a reset state. The downlink telemetry code rate control module is used to restore the baseband signal code rate of the corresponding downlink telemetry output channel in a three-level progressive manner, and to change the baseband signal code rate of the corresponding downlink telemetry output channel according to the proportional instruction sent by the proportional instruction receiving module. An important data storage module, connected to the FLASH memory, is used to write the baseband signal code rate of each downlink telemetry output channel into the FLASH memory three times respectively; in addition, when reading a certain baseband signal code rate from the FLASH memory, a bitwise 3-out-of-2 comparison is performed to determine whether the data reading is correct. The telemetry packet and transmission module is used to acquire downlink telemetry data and output downlink telemetry data to the transponder; The three-level progressive method is as follows: First, the baseband signal code rate is obtained from the three copies of data in the FLASH memory through a bitwise 2-out-of-3 comparison from the important data storage module; when the baseband signal code rate of a certain channel fails to be read from the FLASH memory, the initial code rate of that channel is obtained from the hardware status of the IO pins of the programmable logic device FPGA; when the initial code rate does not meet the specified value, the default code rate of that channel is obtained from the internal logic circuit of the programmable logic device FPGA.

2. The high-reliability downlink telemetry baseband signal code rate recovery system according to claim 1, characterized in that: The reset module includes a power monitoring chip.

3. A method for restoring the code rate of a downlink telemetry baseband signal after reset, based on the downlink telemetry baseband signal code rate restoration system according to any one of claims 1 to 2, characterized in that, Specifically, the following steps are included: S11. After the telemetry and remote control unit restarts due to a power failure, the reset module outputs a power-on reset signal to put the programmable logic device FPGA and FLASH memory into a reset state; when the reset signal is removed, the programmable logic device FPGA and FLASH memory start to work. S12. The important data storage module of the programmable logic device FPGA sequentially reads the baseband signal code rate of each downlink telemetry output channel from the FLASH memory, and performs a bitwise 3-out-of-2 comparison of the read baseband signal code rate of each downlink telemetry output channel to determine whether the data read is correct; if the baseband signal code rate of a certain downlink telemetry output channel is read incorrectly, S13 is executed, and the baseband signal code rate recovery failure flag from FLASH is set. This telemetry flag is written into the insertion field in the telemetry frame. If the baseband signal code rate of a certain downlink telemetry output channel is read correctly, the correct baseband signal code rate data of this downlink telemetry output channel is sent to the downlink telemetry code rate control module and then S15 is executed; if all are read correctly, the baseband signal code rate is set to the FLASH recovery success flag. S13. The downlink telemetry code rate control module reads the initial code rate of the downlink telemetry output channel. If the read initial code rate meets the specified value, then execute S15; if the read initial code rate does not meet the specified value, then execute S14. S14. The downlink telemetry code rate control module reads the default code rate of the downlink telemetry output channel and then executes S15; S15. The downlink telemetry code rate control module restores the baseband signal code rate of the corresponding downlink telemetry output channel based on the acquired baseband signal code rate data; S16. Repeat steps S12 to S15 until the baseband signal code rate of each downlink telemetry output channel is restored.

4. A method for setting the code rate of a downlink telemetry baseband signal, based on the downlink telemetry baseband signal code rate recovery system according to any one of claims 1 to 2, characterized in that, Specifically, the following steps are included: S21. The proportional command receiving module receives the proportional command sent from the ground; S22. The ratio command receiving module judges the correctness of the ratio command. If it does not conform to the command code of the code rate switching command, it executes S23; if it conforms to the command code of the code rate switching command, it executes S24. S23. The proportional instruction receiving module treats this proportional instruction as an error instruction, increments the error proportional instruction count in the telemetry data by 1, and the programmable logic device FPGA does not change the code rate information stored in the FLASH memory, nor does it change the baseband signal code rate of each downlink telemetry output channel. S24. The downlink telemetry code rate control module changes the baseband signal code rate of the corresponding downlink telemetry output channel to the instruction setting value and increments the correct proportion instruction count in the telemetry data by 1; S25. The important data storage module stores the correctly determined code rate information in the FLASH memory or updates the code rate data stored in the FLASH memory; S26. After the code rate data storage is completed, the important data storage module reads the data stored in the FLASH memory for consistency comparison and sets the "baseband signal code rate instruction setting status" telemetry. If they are consistent, the storage success flag is set; if they are inconsistent, the storage failure flag is set. The "baseband signal code rate instruction setting status" telemetry is written into the insertion field in the telemetry frame.

Images