Pixel module and image sensor
By designing a multi-capacitance structure and transistor-controlled pixel module in the image sensor, the problem that the expansion of dynamic range in the prior art will affect the signal is solved, and the accuracy of high dynamic range output and signal processing is achieved.
Patent Information
- Application Number
- CN202311524528.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-15
- Publication Date
- 2025-05-30
AI Technical Summary
When existing image sensors expand the dynamic range, there are problems in which large pixels affect small pixel signals and high conversion gain and low conversion gain values during signal processing.
A pixel module is designed, including a photosensitive unit, a charge transmission unit, a conversion gain control unit and an output unit. Through multi-capacitor structure and transistor control, a high conversion gain, low conversion gain and ultra-low conversion gain are achieved.
The output with high dynamic range is achieved, the technical defects in the existing solutions are avoided, and the accuracy and sensitivity of signal processing are ensured.
Smart Images
Figure CN120075638A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of image sensors, and in particular to a pixel module and an image sensor. Background Art
[0002] Image sensors use the photoelectric conversion function of photoelectric devices to convert the light image on the photosensitive surface into an electrical signal that is proportional to the light image. At present, widely used image sensors include CCD image sensors and CMOS image sensors. In order to capture a true and complete image, the dynamic range of the image sensor needs to be large enough. In order to expand the dynamic range of the image sensor, existing solutions include pixel designs using large and small pixels and pixel designs using a single large pixel. However, the existing pixel design scheme using large and small pixels has the defect that the large pixel affects the signal of the small pixel, and the existing pixel design scheme using a single large pixel has the defect that the value of the high conversion gain and the low conversion gain is affected during the signal processing.
[0003] Therefore, how to achieve a high dynamic range while avoiding the above-mentioned defects has become a technical problem that needs to be solved urgently by those skilled in the art. Summary of the invention
[0004] The purpose of the present application is to provide a pixel module and an image sensor, wherein the pixel module has a high dynamic range and does not have the above-mentioned defects.
[0005] In order to solve the above technical problems, the present application provides a pixel module, including:
[0006] A photosensitive unit, used for sensing light and generating electric charge;
[0007] A first charge transfer unit, used for transferring charge to a third capacitor, and transferring charge to the first capacitor via a first conversion gain control unit; the charge of the third capacitor is output to a floating diffusion node;
[0008] A second charge transfer unit, used for transferring charges to a second capacitor;
[0009] a second conversion gain control unit, configured to transfer the charge of the second capacitor to the floating diffusion node;
[0010] The first conversion gain control unit is used to transfer the charge of the first capacitor to the floating diffusion node;
[0011] An output unit, used for outputting the voltage of the floating diffusion node;
[0012] The reset unit is used to reset the pixel module.
[0013] Optionally, the photosensitive unit includes:
[0014] A photodiode; the cathode of the photodiode is respectively connected to the first charge transfer unit and the second charge transfer unit, and the anode of the photodiode is grounded.
[0015] Optionally, the first charge transfer unit includes:
[0016] A first transistor; the first end of the first transistor is connected to the floating diffusion node, the second end of the first transistor is connected to the photosensitive unit, and a first control signal is input to the control end of the first transistor.
[0017] Optionally, the second charge transfer unit includes:
[0018] A second transistor; the first end of the second transistor is connected to the photosensitive unit, the second end of the second transistor is connected to the second capacitor, and a second control signal is input to the control end of the second transistor.
[0019] Optionally, the second charge transfer unit includes:
[0020] A diode; the anode of the diode is connected to the photosensitive unit, and the cathode of the diode is connected to the second capacitor.
[0021] Optionally, the second conversion gain control unit includes:
[0022] A third transistor; the first end of the third transistor is connected to the second capacitor, the second end of the third transistor is connected to the floating diffusion node, and a second conversion gain control signal is input to the control end of the third transistor.
[0023] Optionally, the first conversion gain control unit includes:
[0024] A fourth transistor; the first end of the fourth transistor is respectively connected to the first capacitor and the reset unit, the second end of the fourth transistor is connected to the floating diffusion node, and a first conversion gain control signal is input to the control end of the fourth transistor.
[0025] Optionally, the reset unit includes:
[0026] A fifth transistor; the first end of the fifth transistor is connected to a preset potential, the second end of the fifth transistor is respectively connected to the first conversion gain control unit and the first capacitor, and a reset signal is input to the control end of the fifth transistor.
[0027] Optionally, the output unit includes:
[0028] An amplifying transistor and a selection transistor; a control terminal of the amplifying transistor is connected to the floating diffusion node, a first terminal of the amplifying transistor is connected to a preset potential, a second terminal of the amplifying transistor is connected to a first terminal of the selection transistor, a second terminal of the selection transistor serves as an output terminal of the pixel module, and a selection control signal is input to a control terminal of the selection transistor.
[0029] To solve the above technical problems, the present application also provides an image sensor, and the image sensor includes the pixel module as described above.
[0030] The pixel module provided by the present application includes: a photosensitive unit for generating charges by photosensing; a first charge transfer unit for transferring charges to a third capacitor and transferring charges to a first capacitor via a first conversion gain control unit; charges of the third capacitor are output to the floating diffusion node; a second charge transfer unit for transferring charges to a second capacitor; a second conversion gain control unit for transferring charges of the second capacitor to the floating diffusion node; the first conversion gain control unit for transferring charges of the first capacitor to the floating diffusion node; an output unit for outputting a voltage of the floating diffusion node; and a reset unit for resetting the pixel module.
[0031] The pixel module provided by the present application can achieve high conversion gain and low conversion gain through the first charge transfer unit, the first conversion gain control unit, the first capacitor and the third capacitor. Combining with the second conversion gain control unit, the second charge transfer unit and the second capacitor, ultra-low conversion gain can be achieved. In this way, the pixel module has high conversion gain, low conversion gain and ultra-low conversion gain, enabling the pixel module to have a high dynamic range output and without the technical defects in the existing solutions.
[0032] The image sensor provided by the present application also has the above technical effects. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the prior art and the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0034] Figure 1 A schematic diagram of a pixel module provided by an embodiment of the present application;
[0035] Figure 2 A schematic diagram of a specific pixel module provided by an embodiment of the present application;
[0036] Figure 3Schematic diagram of another specific pixel module provided by the embodiments of the present application;
[0037] Figure 4 Pixel timing diagram provided by the embodiments of the present application;
[0038] Figure 5 Curve graph of an output signal provided by the embodiments of the present application;
[0039] Figure 6 Another pixel timing diagram provided by the embodiments of the present application. Detailed implementation manners
[0040] The core of the present application is to provide a pixel module and an image sensor. The pixel module has a high dynamic range and does not have the above-mentioned defects.
[0041] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.
[0042] Please refer to Figure 1 , Figure 1 Schematic diagram of a pixel module provided by the embodiments of the present application. Referring to Figure 1 as shown, the pixel module mainly includes a photosensitive unit 10, a first charge transfer unit 20, a second charge transfer unit 30, a second conversion gain control unit 40, a first conversion gain control unit 50, an output unit 60, a reset unit 70, a first capacitor C1, a second capacitor C2, and a third capacitor C3.
[0043] The photosensitive unit 10 is used for photosensing to generate charges. Referring to Figure 2 as shown, in some embodiments, the photosensitive unit 10 includes: a photodiode PD; the cathode of the photodiode PD is respectively connected to the first charge transfer unit 20 and the second charge transfer unit 30, and the anode of the photodiode PD is grounded.
[0044] The first charge transfer unit 20 is used for transferring charges to the third capacitor C3 and transferring charges to the first capacitor C1 via the first conversion gain control unit 50; the charges of the third capacitor C3 are output to a floating diffusion node ( Figure 1 FD shown in
[0045] Among them, the first capacitor C1 and the third capacitor C3 can be parasitic capacitors. The first capacitor C1 and the third capacitor C3 can also be physically connected capacitors.
[0046] In some embodiments, the first charge transfer unit 20 includes: a first transistor M1; a first end of the first transistor M1 is connected to a floating diffusion node, a second end of the first transistor M1 is connected to the photosensitive unit 10, and a first control signal is input to a control end of the first transistor M1. Refer to Figure 2 As shown, a first end of the first transistor M1 is connected to the floating diffusion node, a second end of the first transistor M1 is connected to a cathode of the photodiode PD, and a first control signal is input to a control end of the first transistor M1 ( Figure 2 TX1 shown in). When the first transistor M1 is fully turned on, charges are transferred to the third capacitor C3 through the first transistor M1. When the first transistor M1 is fully turned on and the first conversion gain control unit 50 is fully turned on, the charges can also be transferred to the first capacitor C1 through the first conversion gain control unit 50.
[0047] The second charge transfer unit 30 is used to transfer charges to the second capacitor C2.
[0048] In some embodiments, the second charge transfer unit 30 includes: a second transistor M2; a first end of the second transistor M2 is connected to the photosensitive unit 10, a second end of the second transistor M2 is connected to the second capacitor C2, and a second control signal is input to a control end of the second transistor M2. Refer to Figure 2 As shown, a first end of the second transistor M2 is connected to the cathode of the photodiode PD, a second end of the second transistor M2 is connected to the second capacitor C2, and a second control signal is input to a control end of the second transistor M2 ( Figure 2 TX2 shown in). When the second transistor M2 is half-closed and the charges of the photodiode PD are excessive, the charges overflow to the second capacitor C2 through the second transistor M2.
[0049] In other embodiments, the second charge transfer unit 30 includes: a diode; an anode of the diode is connected to the photosensitive unit 10, and a cathode of the diode is connected to the second capacitor C2. Refer to Figure 3 As shown, an anode of the diode D is connected to the cathode of the photodiode PD, and a cathode of the diode D is connected to the second capacitor C2. It should be noted that the diode D needs to satisfy: when the charges of the photodiode PD are excessive, the charges will overflow to the second capacitor C2 through the diode D. Among them, the conduction threshold of the diode D is adjustable, and by adjusting the conduction threshold of the diode D, the full well of the photodiode PD can be controlled.
[0050] The second conversion gain control unit 40 is used to transfer the charges of the second capacitor C2 to the floating diffusion node. Refer to Figure 2As shown, in some embodiments, the second conversion gain control unit 40 includes: a third transistor M3; a first end of the third transistor M3 is connected to a second capacitor C2, a second end of the third transistor M3 is connected to a floating diffusion node, and a control end of the third transistor M3 inputs a second conversion gain control signal ( Figure 2 SLCG shown in). When the third transistor M3 is fully turned on, the charge of the second capacitor C2 is output to the floating diffusion node.
[0051] The first conversion gain control unit 50 is configured to transfer the charge of the first capacitor C1 to the floating diffusion node. In some embodiments, the first conversion gain control unit 50 includes: a fourth transistor M4; a first end of the fourth transistor M4 is respectively connected to the first capacitor C1 and a reset unit 70, a second end of the fourth transistor M4 is connected to the floating diffusion node, and a control end of the fourth transistor M4 inputs a first conversion gain control signal ( Figure 2 LCG shown in). Refer to Figure 2 As shown, when the fourth transistor M4 is fully turned on, the charge of the first capacitor C1 is output to the floating diffusion node.
[0052] The reset unit 70 is configured to reset the pixel module. Refer to Figure 2 As shown, in some embodiments, the reset unit 70 includes: a fifth transistor M5; a first end of the fifth transistor M5 is connected to a preset potential, a second end of the fifth transistor M5 is respectively connected to the first conversion gain control unit 50 and the first capacitor C1, and a control end of the fifth transistor M5 inputs a reset signal ( Figure 2 RST shown in).
[0053] The output unit 60 is configured to output the voltage of the floating diffusion node. In some embodiments, the output unit 60 includes: an amplifying transistor M6 and a selecting transistor M7; a control end of the amplifying transistor M6 is connected to the floating diffusion node, a first end of the amplifying transistor M6 is connected to a preset potential, a second end of the amplifying transistor M6 is connected to a first end of the selecting transistor M7, a second end of the selecting transistor M7 serves as an output end of the pixel module, and a control end of the selecting transistor M7 inputs a selection control signal ( Figure 2 SEL shown in).
[0054] When only the charge of the third capacitor C3 is output to the floating diffusion node, the conversion gain is a high conversion gain. When the charges of the first capacitor C1 and the third capacitor C3 are output to the floating diffusion node, the conversion gain is a low conversion gain. When the charges of the first capacitor C1, the second capacitor C2, and the third capacitor C3 are output to the floating diffusion node, the conversion gain is an ultra-low conversion gain.
[0055] Each transistor in the above embodiments may specifically be an NMOS transistor. The first end of the transistor is the drain of the NMOS transistor, the second end of the transistor is the source of the NMOS transistor, and the control end of the transistor is the gate of the NMOS transistor.
[0056] Figure 4 It is a pixel timing diagram. At time T1, the pixel module is in the pixel reset state. At time T2, the pixel module is in the exposure state. At time T3, the pixel module is in the sampling LCG (low conversion gain) reset state. At time T4, the pixel module is in the sampling HCG (high conversion gain) reset state. At time T5, the pixel module is in the sampling HCG signal state. At time T6, the pixel module is in the sampling LCG signal state. At time T7, the pixel module is in the sampling SLCG (super low conversion gain) signal state. At time T8, the pixel module is in the sampling SLCG reset state. At time T9, the pixel module is in the pixel reset state.
[0057] Table 1 lists Figure 2 the states of each transistor in the structure shown.
[0058] Table 1
[0059] Moment M5 M4 M1 M2 M3 M7 M6 T1 Fully Open Fully Open Fully Open Fully Open Fully Open Fully Closed / T2 Fully Open Fully Open Fully Closed Half Closed Fully Closed Fully Closed / T3 Fully Closed Fully Open Fully Closed Half Closed Fully Closed Fully Open / T4 Fully Closed Fully Closed Fully Closed Half Closed Fully Closed Fully Open / T5 Fully Closed Fully Closed Fully Closed Half Closed Fully Closed Fully Open / T6 Fully Closed Fully Open Fully Closed Half Closed Fully Closed Fully Open / T7 Fully Closed Fully Open Fully Closed Half Closed Fully Open Fully Open / T8 Fully Closed Fully Open Fully Closed Half Closed Fully Open Fully Open / T9 Fully Open Fully Open Fully Open Fully Open Fully Open Fully Closed /
[0060] Combined with Figure 4 Table 1 shown, Figure 2 the operating principle of the pixel module shown is as follows:
[0061] In the pixel reset state, the reset signal RST, the first conversion gain control signal LCG, the first control signal TX1, the second control signal TX2, and the second conversion gain control signal SLCG are at high level, and the photodiode PD is in the reset state. When entering the exposure state, the reset signal RST and the first conversion gain control signal LCG remain at high level to reset the first capacitor C1. At the same time, the second control signal TX2 is in a semi-off state. When there is too much charge in the photodiode PD, the charge in the photodiode PD overflows to the second capacitor C2 through the second transistor M2, and the second capacitor C2 stores the excess charge. After the exposure ends, it enters the sampling LCG reset state to start reading the voltage. The reset signal RST drops to sample the output of the pixel module, and the sampled voltage is called the reset voltage V1_LCG. Then the first conversion gain control signal LCG drops, enters the sampling HCG reset state, and samples the output of the pixel module. The sampled voltage is called V1_HCG. The first transistor M1 is turned on, and the charge on the photodiode PD is transferred to the floating diffusion node, and then the first transistor M1 is turned off. In the sampling HCG signal state, the output of the pixel module is sampled, and the sampled voltage is called V2_HCG. After that, the first conversion gain control signal LCG rises, the first transistor M1 is turned on again, so that the charge on the photodiode PD is transferred to the floating diffusion node and the first capacitor C1, and the output of the pixel module is sampled at time T6. The sampled voltage is called V2_LCG. Then at time T7, the third transistor M3 is turned on to sample the output of the pixel module, and the sampled voltage is called V2_SLCG. Then the reset RST signal is turned on to reset the floating diffusion node, the first capacitor C1, and the second capacitor C2. The reset signal RST is turned off to sample the output of the pixel module, and the sampled voltage is called V1_SLCG.
[0062] V1_HCG - V2_HCG = Vo_HCG;
[0063] V1_LCG - V2_LCG = Vo_LCG;
[0064] V1_SLCG - V2_SLCG = Vo_SLCG.
[0065] Vo_HCG represents the high conversion gain voltage output by the pixel module, Vo_LCG represents the low conversion gain voltage output by the pixel module, and Vo_SLCG represents the ultra-low conversion gain voltage output by the pixel module. These three voltages correspond to three sensitivity curves. As Figure 5 shown, the abscissa represents the illuminance and the ordinate represents the voltage. According to Figure 5From the three different curves shown, the corresponding dynamic range can be obtained. Among them, the larger the second capacitor C2, the smaller the ultra-low conversion gain, that is Figure 5 the curve with the slope of SLCG in Figure 5 is flatter, and the corresponding dynamic range is larger. The smaller the third capacitor C3, the larger the high conversion gain, that is Figure 5 the curve with the slope of HCG in Figure 5 is steeper, and the corresponding dynamic range is larger.
[0066] Figure 6 Shown is a pixel timing diagram. Similarly, at time T1, the pixel module is in the pixel reset state, at time T2, the pixel module is in the exposure state, at time T3, the pixel module is in the sampling LCG reset state, at time T4, the pixel module is in the sampling HCG reset state, at time T5, the pixel module is in the sampling HCG signal state, at time T6, the pixel module is in the sampling LCG signal state, at time T7, the pixel module is in the sampling SLCG signal state, at time T8, the pixel module is in the sampling SLCG reset state, and at time T9, the pixel module is in the pixel reset state.
[0067] Table 2 lists the states of each transistor in the structure shown Figure 3 at different times.
[0068] Table 2
[0069] Moment M5 M4 M1 D M3 M7 M6 T1 Fully Open Fully Open Fully Open / Fully Open Fully Closed / T2 Fully Open Fully Open Fully Closed / Fully Closed Fully Closed / T3 Fully Closed Fully Open Fully Closed / Fully Closed Fully Open / T4 Fully Closed Fully Closed Fully Closed / Fully Closed Fully Open / T5 Fully Closed Fully Closed Fully Closed / Fully Closed Fully Open / T6 Fully Closed Fully Open Fully Closed / Fully Closed Fully Open / T7 Fully Closed Fully Open Fully Closed / Fully Open Fully Open / T8 Fully Closed Fully Open Fully Closed / Fully Open Fully Open / T9 Fully Open Fully Open Fully Open / Fully Open Fully Closed /
[0070] Combined with Figure 6 shown in Table 2, Figure 3 the operating principle of the pixel module shown is as follows:
[0071] In the reset state, the reset signal RST, the first conversion gain control signal LCG, the first control signal TX1, the second control signal TX2, and the second conversion gain control signal SLCG are at high level, and the photodiode PD is in the reset state. When entering the exposure state, the reset signal RST and the first conversion gain control signal LCG remain at high level to reset the first capacitor C1. When there is too much charge in the photodiode PD, the charge in the photodiode PD overflows to the second capacitor C2 through the diode D, and the second capacitor C2 stores the excess charge. After the exposure ends, it enters the sampling LCG reset state and starts to read the voltage. The reset signal RST drops to sample the output of the pixel module, and the sampled voltage is called V1_LCG. Then the first conversion gain control signal LCG drops, and it enters the sampling HCG reset state to sample the output of the pixel module, and the sampled voltage is called V1_HCG of HCG. The first transistor M1 is turned on, and the charge on the photodiode PD is transferred to the floating diffusion node, and then the first transistor M1 is turned off. In the sampling HCG signal state, the output of the pixel module is sampled, and the sampled voltage is called V2_HCG. After that, the first conversion gain control signal LCG is at high level, the first transistor M1 is turned on again, so that the charge on the photodiode PD is transferred to the floating diffusion node and the first capacitor C1, and the output of the pixel module is sampled at time T6, and the sampled voltage is called V2_LCG. Then at time T7, the third transistor M3 is turned on to sample the output of the pixel module, and the sampled voltage at this time is called V2_SLCG. Then the reset signal RST is turned on to reset the floating diffusion node, the first capacitor C1, and the second capacitor C2, and then the reset signal RST is turned off to sample the output of the pixel module, and the sampled voltage is called V1_SLCG.
[0072] V1_HCG - V2_HCG = Vo_HCG;
[0073] V1_LCG - V2_LCG = Vo_LCG;
[0074] V1_SLCG - V2_SLCG = Vo_SLCG.
[0075] Vo_HCG represents the high conversion gain voltage output by the pixel module, Vo_LCG represents the low conversion gain voltage output by the pixel module, and Vo_SLCG represents the ultra-low conversion gain voltage output by the pixel module. These three signals correspond to three sensitivity curves. As Figure 5 shown, the abscissa represents the illuminance and the ordinate represents the voltage. According to Figure 5 the three different curves shown, the corresponding dynamic range can be obtained. Among them, the larger the second capacitor C2, the smaller the ultra-low conversion gain, that is Figure 5The curve with a slope of SLCG in [the figure] is flatter, and the corresponding dynamic range is larger. The smaller the third capacitor C3, the larger the high conversion gain, that is Figure 5 The curve with a slope of HCG in [the figure] is steeper, and the corresponding dynamic range is larger. Figure 5 In [the figure], Noise floor represents the background noise, and DR represents the dynamic range.
[0076] The second capacitor C2 can be a high-density MIM capacitor, MOS capacitor, etc.
[0077] In summary, the pixel module provided by this application can achieve high conversion gain and low conversion gain through the first charge transfer unit, the first conversion gain control unit, the first capacitor, and the third capacitor. Combining the second conversion gain control unit, the second charge transfer unit, and the second capacitor can achieve an ultra-low conversion gain. In this way, the pixel module has high conversion gain, low conversion gain, and ultra-low conversion gain, enabling the pixel module to have a high dynamic range output and not having the technical defects in the existing solutions.
[0078] This application also provides an image sensor, which includes the pixel module described in the above embodiments. For the image sensor provided by this application, reference can be made to the introduction of the pixel module, which will not be elaborated here.
[0079] Because the situation is complex and cannot be listed and elaborated one by one, those skilled in the art should be able to realize that under the basic principle of the embodiments provided by this application, multiple examples can exist in combination with the actual situation. Without sufficient creative labor, they should all be within the scope of this application.
[0080] The various embodiments in the specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts among the various embodiments can be referred to each other.
[0081] The above has introduced the pixel module and the image sensor provided by this application in detail. Specific examples are used in this article to elaborate on the principle and implementation manner of this application. The description of the above embodiments is only used to help understand the method and its core idea of this application. It should be noted that for those of ordinary skill in the art in this technical field, without departing from the principle of this application, several improvements and modifications can be made to this application, and these improvements and modifications also fall within the protection scope of the claims of this application.
[0082] It should also be noted that in this specification, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.
Claims
1. A pixel module, characterized in that, it includes: a photosensitive unit for generating charges by photosensitivity; a first charge transfer unit for transferring charges to a third capacitor and transferring charges to a first capacitor via a first conversion gain control unit; the charges of the third capacitor are output to a floating diffusion node; a second charge transfer unit for transferring charges to a second capacitor; a second conversion gain control unit for transferring the charges of the second capacitor to the floating diffusion node; the first conversion gain control unit for transferring the charges of the first capacitor to the floating diffusion node; an output unit for outputting the voltage of the floating diffusion node; the reset unit for resetting the pixel module.
2. The pixel module according to claim 1, characterized in that, the photosensitive unit includes: a photodiode; the cathode of the photodiode is respectively connected to the first charge transfer unit and the second charge transfer unit, and the anode of the photodiode is grounded.
3. The pixel module according to claim 1, characterized in that, the first charge transfer unit includes: a first transistor; the first end of the first transistor is connected to the floating diffusion node, the second end of the first transistor is connected to the photosensitive unit, and the control end of the first transistor inputs a first control signal.
4. The pixel module according to claim 1, characterized in that, the second charge transfer unit includes: a second transistor; the first end of the second transistor is connected to the photosensitive unit, the second end of the second transistor is connected to the second capacitor, and the control end of the second transistor inputs a second control signal.
5. The pixel module according to claim 1, characterized in that, the second charge transfer unit includes: a diode; the anode of the diode is connected to the photosensitive unit, and the cathode of the diode is connected to the second capacitor.
6. The pixel module according to claim 1, characterized in that, the second conversion gain control unit includes: a third transistor; the first end of the third transistor is connected to the second capacitor, the second end of the third transistor is connected to the floating diffusion node, and the control end of the third transistor inputs a second conversion gain control signal.
7. The pixel module according to claim 1, characterized in that, the first conversion gain control unit includes: a fourth transistor; the first end of the fourth transistor is respectively connected to the first capacitor and the reset unit, the second end of the fourth transistor is connected to the floating diffusion node, and the control end of the fourth transistor inputs a first conversion gain control signal.
8. The pixel module according to claim 1, characterized in that, the reset unit includes: a fifth transistor; the first end of the fifth transistor is connected to a preset potential, the second end of the fifth transistor is respectively connected to the first conversion gain control unit and the first capacitor, and the control end of the fifth transistor inputs a reset signal.
9. The pixel module according to claim 1, characterized in that, the output unit includes: An amplifying transistor and a selection transistor; a control terminal of the amplifying transistor is connected to the floating diffusion node, a first terminal of the amplifying transistor is connected to a preset potential, a second terminal of the amplifying transistor is connected to a first terminal of the selection transistor, a second terminal of the selection transistor serves as an output terminal of the pixel module, and a selection control signal is input to a control terminal of the selection transistor.
10. An image sensor, characterized in that the image sensor includes the pixel module according to any one of claims 1 to 9.